Changeset 99291 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Apr 5, 2023 1:04:00 AM (21 months ago)

Author:

vboxsync

Message:

VMM/IEM: More work on processing MC blocks and generating threaded functions from them. bugref:10369

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAllThreadedPython.py (modified) (2 diffs)
• IEMThreadedFunctions.cpp (modified) (3 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllThreadedPython.py

@@ -340 +340 @@
                 elif oNewStmt.sName in ('IEM_MC_ADVANCE_RIP_AND_FINISH', 'IEM_MC_REL_JMP_S8_AND_FINISH',
                                         'IEM_MC_REL_JMP_S16_AND_FINISH', 'IEM_MC_REL_JMP_S32_AND_FINISH'):
+                    oNewStmt.asParams.append(self.dParamRefs['cbInstr'][0].sNewName);
+                    if oNewStmt.sName in ('IEM_MC_REL_JMP_S8_AND_FINISH',  'IEM_MC_REL_JMP_S32_AND_FINISH'):
+                        oNewStmt.asParams.append(self.dParamRefs['pVCpu->iem.s.enmEffOpSize'][0].sNewName);
                     oNewStmt.sName += '_THREADED';
-                    oNewStmt.asParams.append(self.dParamRefs['cbInstr'][0].sNewName);
+
                 # ... and IEM_MC_CALL_CIMPL_[0-5] into *_THREADED ...
                 elif oNewStmt.sName.startswith('IEM_MC_CALL_CIMPL_'):
@@ -461 +464 @@
                                'IEM_MC_CALL_CIMPL_2', 'IEM_MC_CALL_CIMPL_3', 'IEM_MC_CALL_CIMPL_4', 'IEM_MC_CALL_CIMPL_5', ):
                 self.aoParamRefs.append(ThreadedParamRef('cbInstr', 'uint4_t', oStmt));
+
+            if oStmt.sName in ('IEM_MC_REL_JMP_S8_AND_FINISH',  'IEM_MC_REL_JMP_S32_AND_FINISH'):
+                self.aoParamRefs.append(ThreadedParamRef('pVCpu->iem.s.enmEffOpSize', 'IEMMODE', oStmt));
 
             if oStmt.sName == 'IEM_MC_CALC_RM_EFF_ADDR':

trunk/src/VBox/VMM/VMMAll/IEMThreadedFunctions.cpp

@@ -83 +83 @@
 
 /** Variant of IEM_MC_REL_JMP_S8_AND_FINISH with instruction length as param. */
-#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED(a_i8, a_cbInstr) \
-    return iemRegRipRelativeJumpS8AndFinishClearingRF(pVCpu, a_cbInstr, (a_i8), pVCpu->iem.s.enmEffOpSize)
+#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED(a_i8, a_cbInstr, a_enmEffOpSize) \
+    return iemRegRipRelativeJumpS8AndFinishClearingRF(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize)
 #undef IEM_MC_REL_JMP_S8_AND_FINISH
 
@@ -93 +93 @@
 
 /** Variant of IEM_MC_REL_JMP_S32_AND_FINISH with instruction length as param. */
-#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED(a_i32, a_cbInstr) \
-    return iemRegRipRelativeJumpS32AndFinishClearingRF(pVCpu, a_cbInstr, (a_i32), pVCpu->iem.s.enmEffOpSize)
+#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED(a_i32, a_cbInstr, a_enmEffOpSize) \
+    return iemRegRipRelativeJumpS32AndFinishClearingRF(pVCpu, a_cbInstr, (a_i32), a_enmEffOpSize)
 #undef IEM_MC_REL_JMP_S32_AND_FINISH
 
@@ -116 +116 @@
 # define IEM_MC_CALC_RM_EFF_ADDR_THREADED_ADDR6432(a_GCPtrEff, a_bRmEx, a_bSib, a_u32Disp, a_cbImm) \
     (a_GCPtrEff) = (uint32_t)iemOpHlpCalcRmEffAddrThreadedAddr64(pVCpu, a_bRmEx, a_bSib, a_u32Disp, a_cbImm)
+
+/** Variant of IEM_MC_CALL_CIMPL_1 with explicit instruction length parameter. */
+# define IEM_MC_CALL_CIMPL_1_THREADED(a_cbInstr, a_pfnCImpl, a0) \
+    return (a_pfnCImpl)(pVCpu, (a_cbInstr), a0)
+
+/** Variant of IEM_MC_CALL_CIMPL_2 with explicit instruction length parameter. */
+# define IEM_MC_CALL_CIMPL_2_THREADED(a_cbInstr, a_pfnCImpl, a0, a1) \
+    return (a_pfnCImpl)(pVCpu, (a_cbInstr), a0, a1)
+
+/** Variant of IEM_MC_CALL_CIMPL_3 with explicit instruction length parameter. */
+# define IEM_MC_CALL_CIMPL_3_THREADED(a_cbInstr, a_pfnCImpl, a0, a1, a2) \
+    return (a_pfnCImpl)(pVCpu, (a_cbInstr), a0, a1, a2)
+
+/** Variant of IEM_MC_CALL_CIMPL_4 with explicit instruction length parameter. */
+# define IEM_MC_CALL_CIMPL_4_THREADED(a_cbInstr, a_pfnCImpl, a0, a1, a2, a3) \
+    return (a_pfnCImpl)(pVCpu, (a_cbInstr), a0, a1, a2, a3)
+
 
 /**