Changeset 99330 in vbox for trunk/src/VBox/VMM/VMMAll
- Timestamp:
- Apr 7, 2023 12:23:11 AM (21 months ago)
- Location:
- trunk/src/VBox/VMM/VMMAll
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r99304 r99330 2657 2657 'IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT': McBlock.parseMcGeneric, 2658 2658 'IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT': McBlock.parseMcGeneric, 2659 'IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT_CHECK_SSE_OR_MMXEXT': McBlock.parseMcGeneric,2660 'IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT_EX': McBlock.parseMcGeneric,2661 2659 'IEM_MC_MAYBE_RAISE_NON_CANONICAL_ADDR_GP0': McBlock.parseMcGeneric, 2662 2660 'IEM_MC_MAYBE_RAISE_PCLMUL_RELATED_XCPT': McBlock.parseMcGeneric, -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h
r99326 r99330 34 34 */ 35 35 36 FNIEMOP_DEF_2(iemOpCommonMmx_FullFull_To_Full_Ex, PFNIEMAIMPLMEDIAF2U64, pfnU64, bool, fSupported); /* in IEMAllInstructionsTwoByteOf.cpp.h */ 36 /** 37 * Common worker for MMX instructions on the form: 38 * pxxx mm1, mm2/mem64 39 * that was introduced with SSE3. 40 */ 41 FNIEMOP_DEF_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, PFNIEMAIMPLMEDIAF2U64, pfnU64) 42 { 43 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 44 if (IEM_IS_MODRM_REG_MODE(bRm)) 45 { 46 /* 47 * MMX, MMX. 48 */ 49 /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */ 50 /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */ 51 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3); 52 IEM_MC_BEGIN(2, 0); 53 IEM_MC_ARG(uint64_t *, pDst, 0); 54 IEM_MC_ARG(uint64_t const *, pSrc, 1); 55 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 56 IEM_MC_PREPARE_FPU_USAGE(); 57 IEM_MC_FPU_TO_MMX_MODE(); 58 59 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 60 IEM_MC_REF_MREG_U64_CONST(pSrc, IEM_GET_MODRM_RM_8(bRm)); 61 IEM_MC_CALL_MMX_AIMPL_2(pfnU64, pDst, pSrc); 62 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 63 64 IEM_MC_ADVANCE_RIP_AND_FINISH(); 65 IEM_MC_END(); 66 } 67 else 68 { 69 /* 70 * MMX, [mem64]. 71 */ 72 IEM_MC_BEGIN(2, 2); 73 IEM_MC_ARG(uint64_t *, pDst, 0); 74 IEM_MC_LOCAL(uint64_t, uSrc); 75 IEM_MC_ARG_LOCAL_REF(uint64_t const *, pSrc, uSrc, 1); 76 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 77 78 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 79 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3); 80 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 81 IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 82 83 IEM_MC_PREPARE_FPU_USAGE(); 84 IEM_MC_FPU_TO_MMX_MODE(); 85 86 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 87 IEM_MC_CALL_MMX_AIMPL_2(pfnU64, pDst, pSrc); 88 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 89 90 IEM_MC_ADVANCE_RIP_AND_FINISH(); 91 IEM_MC_END(); 92 } 93 } 37 94 38 95 … … 387 444 { 388 445 IEMOP_MNEMONIC2(RM, PSHUFB, pshufb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 389 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 390 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pshufb_u64,&iemAImpl_pshufb_u64_fallback), 391 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 446 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 447 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pshufb_u64,&iemAImpl_pshufb_u64_fallback)); 392 448 } 393 449 … … 407 463 { 408 464 IEMOP_MNEMONIC2(RM, PHADDW, phaddw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 409 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 410 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddw_u64,&iemAImpl_phaddw_u64_fallback), 411 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 465 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 466 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddw_u64,&iemAImpl_phaddw_u64_fallback)); 412 467 } 413 468 … … 427 482 { 428 483 IEMOP_MNEMONIC2(RM, PHADDD, phaddd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 429 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 430 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddd_u64,&iemAImpl_phaddd_u64_fallback), 431 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 484 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 485 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddd_u64,&iemAImpl_phaddd_u64_fallback)); 432 486 } 433 487 … … 447 501 { 448 502 IEMOP_MNEMONIC2(RM, PHADDSW, phaddsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 449 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 450 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddsw_u64,&iemAImpl_phaddsw_u64_fallback), 451 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 503 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 504 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phaddsw_u64,&iemAImpl_phaddsw_u64_fallback)); 452 505 } 453 506 … … 467 520 { 468 521 IEMOP_MNEMONIC2(RM, PMADDUBSW, pmaddubsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 469 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 470 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pmaddubsw_u64, &iemAImpl_pmaddubsw_u64_fallback), 471 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 522 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 523 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pmaddubsw_u64, &iemAImpl_pmaddubsw_u64_fallback)); 472 524 } 473 525 … … 487 539 { 488 540 IEMOP_MNEMONIC2(RM, PHSUBW, phsubw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 489 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 490 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubw_u64,&iemAImpl_phsubw_u64_fallback), 491 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 541 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 542 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubw_u64,&iemAImpl_phsubw_u64_fallback)); 492 543 } 493 544 … … 507 558 { 508 559 IEMOP_MNEMONIC2(RM, PHSUBD, phsubd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 509 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 510 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubd_u64,&iemAImpl_phsubd_u64_fallback), 511 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 560 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 561 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubd_u64,&iemAImpl_phsubd_u64_fallback)); 512 562 } 513 563 … … 528 578 { 529 579 IEMOP_MNEMONIC2(RM, PHSUBSW, phsubsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 530 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 531 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubsw_u64,&iemAImpl_phsubsw_u64_fallback), 532 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 580 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 581 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_phsubsw_u64,&iemAImpl_phsubsw_u64_fallback)); 533 582 } 534 583 … … 548 597 { 549 598 IEMOP_MNEMONIC2(RM, PSIGNB, psignb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 550 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 551 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignb_u64, &iemAImpl_psignb_u64_fallback), 552 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 599 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 600 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignb_u64, &iemAImpl_psignb_u64_fallback)); 553 601 } 554 602 … … 568 616 { 569 617 IEMOP_MNEMONIC2(RM, PSIGNW, psignw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 570 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 571 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignw_u64, &iemAImpl_psignw_u64_fallback), 572 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 618 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 619 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignw_u64, &iemAImpl_psignw_u64_fallback)); 573 620 } 574 621 … … 588 635 { 589 636 IEMOP_MNEMONIC2(RM, PSIGND, psignd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 590 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 591 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignd_u64, &iemAImpl_psignd_u64_fallback), 592 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 637 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 638 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignd_u64, &iemAImpl_psignd_u64_fallback)); 593 639 } 594 640 … … 608 654 { 609 655 IEMOP_MNEMONIC2(RM, PMULHRSW, pmulhrsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 610 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 611 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pmulhrsw_u64, &iemAImpl_pmulhrsw_u64_fallback), 612 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 656 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 657 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pmulhrsw_u64, &iemAImpl_pmulhrsw_u64_fallback)); 613 658 } 614 659 … … 796 841 { 797 842 IEMOP_MNEMONIC2(RM, PABSB, pabsb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 798 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 799 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsb_u64, &iemAImpl_pabsb_u64_fallback), 800 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 843 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 844 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsb_u64, &iemAImpl_pabsb_u64_fallback)); 801 845 } 802 846 … … 816 860 { 817 861 IEMOP_MNEMONIC2(RM, PABSW, pabsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 818 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 819 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsw_u64, &iemAImpl_pabsw_u64_fallback), 820 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 862 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 863 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsw_u64, &iemAImpl_pabsw_u64_fallback)); 821 864 } 822 865 … … 836 879 { 837 880 IEMOP_MNEMONIC2(RM, PABSD, pabsd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 838 return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex, 839 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsd_u64, &iemAImpl_pabsd_u64_fallback), 840 IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3); 881 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Ssse3, 882 IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_pabsd_u64, &iemAImpl_pabsd_u64_fallback)); 841 883 } 842 884 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f3a.cpp.h
r99326 r99330 481 481 /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */ 482 482 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 483 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();483 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3); 484 484 IEM_MC_BEGIN(3, 0); 485 485 IEM_MC_ARG(uint64_t *, pDst, 0); 486 486 IEM_MC_ARG(uint64_t, uSrc, 1); 487 487 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 488 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _EX(IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3);488 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 489 489 IEM_MC_PREPARE_FPU_USAGE(); 490 490 IEM_MC_FPU_TO_MMX_MODE(); … … 510 510 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 511 511 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 512 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();513 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _EX(IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3);512 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3); 513 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 514 514 IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 515 515 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r99329 r99330 172 172 /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */ 173 173 /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */ 174 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();174 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 175 175 IEM_MC_BEGIN(2, 0); 176 176 IEM_MC_ARG(uint64_t *, pDst, 0); 177 177 IEM_MC_ARG(uint64_t const *, pSrc, 1); 178 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();178 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 179 179 IEM_MC_PREPARE_FPU_USAGE(); 180 180 IEM_MC_FPU_TO_MMX_MODE(); … … 200 200 201 201 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 202 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();203 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();202 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 203 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 204 204 IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 205 205 … … 235 235 /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */ 236 236 /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */ 237 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();237 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 238 238 IEM_MC_BEGIN(2, 0); 239 239 IEM_MC_ARG(uint64_t *, pDst, 0); 240 240 IEM_MC_ARG(uint64_t const *, pSrc, 1); 241 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();241 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 242 242 IEM_MC_PREPARE_FPU_USAGE(); 243 243 IEM_MC_FPU_TO_MMX_MODE(); … … 263 263 264 264 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 265 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();266 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();265 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 266 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 267 267 IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 268 268 … … 285 285 * that was introduced with SSE2. 286 286 */ 287 FNIEMOP_DEF_ 2(iemOpCommonMmx_FullFull_To_Full_Ex, PFNIEMAIMPLMEDIAF2U64, pfnU64, bool, fSupported)287 FNIEMOP_DEF_1(iemOpCommonMmx_FullFull_To_Full_Sse2, PFNIEMAIMPLMEDIAF2U64, pfnU64) 288 288 { 289 289 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); … … 295 295 /** @todo testcase: REX.B / REX.R and MMX register indexing. Ignored? */ 296 296 /** @todo testcase: REX.B / REX.R and segment register indexing. Ignored? */ 297 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();297 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 298 298 IEM_MC_BEGIN(2, 0); 299 299 IEM_MC_ARG(uint64_t *, pDst, 0); 300 300 IEM_MC_ARG(uint64_t const *, pSrc, 1); 301 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _EX(fSupported);301 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 302 302 IEM_MC_PREPARE_FPU_USAGE(); 303 303 IEM_MC_FPU_TO_MMX_MODE(); … … 323 323 324 324 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 325 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();326 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _EX(fSupported);325 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse2); 326 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 327 327 IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 328 328 … … 6549 6549 */ 6550 6550 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 6551 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();6551 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 6552 6552 6553 6553 IEM_MC_BEGIN(3, 0); … … 6555 6555 IEM_MC_ARG(uint64_t const *, pSrc, 1); 6556 6556 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 6557 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();6557 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 6558 6558 IEM_MC_PREPARE_FPU_USAGE(); 6559 6559 IEM_MC_FPU_TO_MMX_MODE(); … … 6581 6581 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 6582 6582 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 6583 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();6584 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();6583 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 6584 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 6585 6585 IEM_MC_FETCH_MEM_U64(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6586 6586 … … 11882 11882 */ 11883 11883 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 11884 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();11884 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 11885 11885 IEM_MC_BEGIN(3, 0); 11886 11886 IEM_MC_ARG(uint64_t *, pu64Dst, 0); 11887 11887 IEM_MC_ARG(uint16_t, u16Src, 1); 11888 11888 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11889 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();11889 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 11890 11890 IEM_MC_PREPARE_FPU_USAGE(); 11891 11891 IEM_MC_FPU_TO_MMX_MODE(); … … 11910 11910 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 11911 11911 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11912 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();11913 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();11912 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 11913 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 11914 11914 IEM_MC_PREPARE_FPU_USAGE(); 11915 11915 IEM_MC_FPU_TO_MMX_MODE(); … … 11990 11990 */ 11991 11991 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 11992 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();11992 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 11993 11993 IEM_MC_BEGIN(3, 1); 11994 11994 IEM_MC_LOCAL(uint16_t, u16Dst); … … 11996 11996 IEM_MC_ARG(uint64_t, u64Src, 1); 11997 11997 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 11998 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();11998 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 11999 11999 IEM_MC_PREPARE_FPU_USAGE(); 12000 12000 IEM_MC_FPU_TO_MMX_MODE(); … … 12739 12739 { 12740 12740 IEMOP_MNEMONIC2(RM, PADDQ, paddq, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 12741 return FNIEMOP_CALL_ 2(iemOpCommonMmx_FullFull_To_Full_Ex, iemAImpl_paddq_u64, IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2);12741 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Sse2, iemAImpl_paddq_u64); 12742 12742 } 12743 12743 … … 12937 12937 /* Note! Taking the lazy approch here wrt the high 32-bits of the GREG. */ 12938 12938 IEMOP_MNEMONIC2(RM_REG, PMOVMSKB, pmovmskb, Gd, Nq, DISOPTYPE_X86_MMX | DISOPTYPE_HARMLESS, 0); 12939 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX ();12939 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX_2_OR(fSse, fAmdMmxExts); 12940 12940 IEM_MC_BEGIN(2, 0); 12941 12941 IEM_MC_ARG(uint64_t *, puDst, 0); 12942 12942 IEM_MC_ARG(uint64_t const *, puSrc, 1); 12943 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT _CHECK_SSE_OR_MMXEXT();12943 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT(); 12944 12944 IEM_MC_PREPARE_FPU_USAGE(); 12945 12945 IEM_MC_FPU_TO_MMX_MODE(); … … 13744 13744 { 13745 13745 IEMOP_MNEMONIC2(RM, PSUBQ, psubq, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_X86_MMX, IEMOPHINT_IGNORES_OP_SIZES); 13746 return FNIEMOP_CALL_ 2(iemOpCommonMmx_FullFull_To_Full_Ex, iemAImpl_psubq_u64, IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse2);13746 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full_Sse2, iemAImpl_psubq_u64); 13747 13747 } 13748 13748
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