Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py	(revision 99337)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py	(revision 99338)
@@ -2663,5 +2663,4 @@
     'IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT':                     McBlock.parseMcGeneric,
     'IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT':                     McBlock.parseMcGeneric,
-    'IEM_MC_MAYBE_RAISE_SSSE3_RELATED_XCPT':                     McBlock.parseMcGeneric,
     'IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE':              McBlock.parseMcGeneric,
     'IEM_MC_MEM_COMMIT_AND_UNMAP':                               McBlock.parseMcGeneric,
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h	(revision 99337)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h	(revision 99338)
@@ -115,5 +115,5 @@
         IEM_MC_ARG(PRTUINT128U,                 puDst, 0);
         IEM_MC_ARG(PCRTUINT128U,                puSrc, 1);
-        IEM_MC_MAYBE_RAISE_SSSE3_RELATED_XCPT();
+        IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
         IEM_MC_PREPARE_SSE_USAGE();
         IEM_MC_REF_XREG_U128(puDst,             IEM_GET_MODRM_REG(pVCpu, bRm));
@@ -136,5 +136,5 @@
         IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3);
-        IEM_MC_MAYBE_RAISE_SSSE3_RELATED_XCPT();
+        IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
         IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
 
Index: trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f3a.cpp.h
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f3a.cpp.h	(revision 99337)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f3a.cpp.h	(revision 99338)
@@ -57,5 +57,5 @@
         IEM_MC_ARG(PCRTUINT128U,                puSrc,               1);
         IEM_MC_ARG_CONST(uint8_t,               bImmArg, /*=*/ bImm, 2);
-        IEM_MC_MAYBE_RAISE_SSSE3_RELATED_XCPT();
+        IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
         IEM_MC_PREPARE_SSE_USAGE();
         IEM_MC_REF_XREG_U128(puDst,             IEM_GET_MODRM_REG(pVCpu, bRm));
@@ -80,5 +80,5 @@
         IEM_MC_ARG_CONST(uint8_t,               bImmArg, /*=*/ bImm, 2);
         IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSsse3);
-        IEM_MC_MAYBE_RAISE_SSSE3_RELATED_XCPT();
+        IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT();
         IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
 
Index: trunk/src/VBox/VMM/include/IEMMc.h
===================================================================
--- trunk/src/VBox/VMM/include/IEMMc.h	(revision 99337)
+++ trunk/src/VBox/VMM/include/IEMMc.h	(revision 99338)
@@ -122,12 +122,4 @@
     } while (0)
 #define IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT() \
-    do { \
-        if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
-            || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
-            return iemRaiseUndefinedOpcode(pVCpu); \
-        if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \
-            return iemRaiseDeviceNotAvailable(pVCpu); \
-    } while (0)
-#define IEM_MC_MAYBE_RAISE_SSSE3_RELATED_XCPT() \
     do { \
         if (   (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \
Index: trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
===================================================================
--- trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp	(revision 99337)
+++ trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp	(revision 99338)
@@ -578,5 +578,4 @@
 #define IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT()           do { (void)fMcBegin; } while (0)
 #define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT()           do { (void)fMcBegin; } while (0)
-#define IEM_MC_MAYBE_RAISE_SSSE3_RELATED_XCPT()         do { (void)fMcBegin; } while (0)
 #define IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT()         do { (void)fMcBegin; } while (0)
 #define IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT()         do { (void)fMcBegin; } while (0)
