Changeset 99339 in vbox
- Timestamp:
- Apr 7, 2023 12:37:28 PM (20 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r99338 r99339 2661 2661 'IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT': McBlock.parseMcGeneric, 2662 2662 'IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT': McBlock.parseMcGeneric, 2663 'IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT': McBlock.parseMcGeneric,2664 2663 'IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT': McBlock.parseMcGeneric, 2665 2664 'IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE': McBlock.parseMcGeneric, -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h
r99338 r99339 171 171 IEM_MC_ARG(PRTUINT128U, puDst, 0); 172 172 IEM_MC_ARG(PCRTUINT128U, puSrc, 1); 173 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();173 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 174 174 IEM_MC_PREPARE_SSE_USAGE(); 175 175 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 192 192 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 193 193 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 194 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();194 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 195 195 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 196 196 … … 230 230 IEM_MC_ARG(PRTUINT128U, puDst, 0); 231 231 IEM_MC_ARG(PCRTUINT128U, puSrc, 1); 232 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();232 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 233 233 IEM_MC_PREPARE_SSE_USAGE(); 234 234 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 251 251 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 252 252 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 253 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();253 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 254 254 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 255 255 … … 695 695 IEM_MC_ARG(PCRTUINT128U, puSrc, 1); \ 696 696 IEM_MC_ARG(PCRTUINT128U, puMask, 2); \ 697 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT(); \697 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); \ 698 698 IEM_MC_PREPARE_SSE_USAGE(); \ 699 699 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ … … 720 720 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 721 721 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); \ 722 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT(); \722 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); \ 723 723 IEM_MC_PREPARE_SSE_USAGE(); \ 724 724 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ … … 790 790 IEM_MC_ARG(PCRTUINT128U, puSrc2, 1); 791 791 IEM_MC_ARG(uint32_t *, pEFlags, 2); 792 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();792 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 793 793 IEM_MC_PREPARE_SSE_USAGE(); 794 794 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 813 813 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 814 814 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 815 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();815 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 816 816 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 817 817 … … 910 910 IEM_MC_ARG(PRTUINT128U, puDst, 0); \ 911 911 IEM_MC_ARG(uint64_t, uSrc, 1); \ 912 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT(); \912 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); \ 913 913 IEM_MC_PREPARE_SSE_USAGE(); \ 914 914 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_RM(pVCpu, bRm), 0 /* a_iQword */); \ … … 932 932 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 933 933 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); \ 934 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT(); \934 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); \ 935 935 IEM_MC_PREPARE_SSE_USAGE(); \ 936 936 IEM_MC_FETCH_MEM_U## a_SrcWidth (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ … … 1045 1045 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 1046 1046 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 1047 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();1047 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 1048 1048 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 1049 1049 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f3a.cpp.h
r99338 r99339 116 116 IEM_MC_ARG(PCRTUINT128U, puSrc, 1); 117 117 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 118 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();118 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 119 119 IEM_MC_PREPARE_SSE_USAGE(); 120 120 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); … … 139 139 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 2); 140 140 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 141 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();141 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 142 142 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 143 143 … … 179 179 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 180 180 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 181 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();181 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 182 182 IEM_MC_PREPARE_SSE_USAGE(); 183 183 IEM_MC_REF_MXCSR(pfMxcsr); … … 208 208 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 209 209 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 210 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();210 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 211 211 IEM_MC_FETCH_MEM_XMM_ALIGN_SSE(Src.uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 212 212 … … 331 331 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 332 332 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 333 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();333 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 334 334 IEM_MC_PREPARE_SSE_USAGE(); 335 335 IEM_MC_REF_MXCSR(pfMxcsr); … … 360 360 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 361 361 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 362 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();362 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 363 363 IEM_MC_FETCH_MEM_XMM_U32(Src.uSrc2, 0 /*a_iDword */, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 364 364 … … 396 396 IEM_MC_ARG_LOCAL_REF(PCIEMMEDIAF2XMMSRC, pSrc, Src, 2); 397 397 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 398 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();398 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 399 399 IEM_MC_PREPARE_SSE_USAGE(); 400 400 IEM_MC_REF_MXCSR(pfMxcsr); … … 425 425 IEM_MC_ARG_CONST(uint8_t, bImmArg, /*=*/ bImm, 3); 426 426 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 427 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();427 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 428 428 IEM_MC_FETCH_MEM_XMM_U64(Src.uSrc2, 0 /*a_iQword */, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 429 429 … … 556 556 IEM_MC_BEGIN(0, 1); 557 557 IEM_MC_LOCAL(uint8_t, uValue); 558 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();558 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 559 559 IEM_MC_PREPARE_SSE_USAGE(); 560 560 IEM_MC_FETCH_XREG_U8(uValue, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 15 /*a_iByte*/); … … 575 575 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 576 576 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 577 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();577 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 578 578 IEM_MC_PREPARE_SSE_USAGE(); 579 579 … … 600 600 IEM_MC_BEGIN(0, 1); 601 601 IEM_MC_LOCAL(uint16_t, uValue); 602 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();602 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 603 603 IEM_MC_PREPARE_SSE_USAGE(); 604 604 IEM_MC_FETCH_XREG_U16(uValue, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 7 /*a_iWord*/); … … 619 619 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 620 620 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 621 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();621 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 622 622 IEM_MC_PREPARE_SSE_USAGE(); 623 623 … … 651 651 IEM_MC_BEGIN(0, 1); 652 652 IEM_MC_LOCAL(uint64_t, uSrc); 653 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();653 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 654 654 IEM_MC_PREPARE_SSE_USAGE(); 655 655 IEM_MC_FETCH_XREG_U64(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1 /*a_iQword*/); … … 670 670 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 671 671 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 672 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();672 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 673 673 IEM_MC_PREPARE_SSE_USAGE(); 674 674 … … 698 698 IEM_MC_BEGIN(0, 1); 699 699 IEM_MC_LOCAL(uint32_t, uSrc); 700 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();700 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 701 701 IEM_MC_PREPARE_SSE_USAGE(); 702 702 IEM_MC_FETCH_XREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3 /*a_iDword*/); … … 717 717 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 718 718 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 719 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();719 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 720 720 IEM_MC_PREPARE_SSE_USAGE(); 721 721 IEM_MC_FETCH_XREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3 /*a_iDword*/); … … 742 742 IEM_MC_BEGIN(0, 1); 743 743 IEM_MC_LOCAL(uint32_t, uSrc); 744 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();744 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 745 745 IEM_MC_PREPARE_SSE_USAGE(); 746 746 IEM_MC_FETCH_XREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3 /*a_iDword*/); … … 761 761 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 762 762 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 763 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();763 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 764 764 IEM_MC_PREPARE_SSE_USAGE(); 765 765 IEM_MC_FETCH_XREG_U32(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 3 /*a_iDword*/); … … 795 795 IEM_MC_BEGIN(0, 1); 796 796 IEM_MC_LOCAL(uint8_t, uSrc); 797 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();797 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 798 798 IEM_MC_PREPARE_SSE_USAGE(); 799 799 IEM_MC_FETCH_GREG_U8(uSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); … … 814 814 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 815 815 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 816 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();816 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 817 817 IEM_MC_PREPARE_SSE_USAGE(); 818 818 … … 840 840 IEM_MC_LOCAL(uint8_t, uSrcSel); 841 841 IEM_MC_LOCAL(uint8_t, uDstSel); 842 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();842 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 843 843 IEM_MC_PREPARE_SSE_USAGE(); 844 844 IEM_MC_ASSIGN(uSrcSel, bImm); … … 867 867 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 868 868 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 869 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();869 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 870 870 IEM_MC_PREPARE_SSE_USAGE(); 871 871 … … 902 902 IEM_MC_BEGIN(0, 1); 903 903 IEM_MC_LOCAL(uint64_t, uSrc); 904 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();904 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 905 905 IEM_MC_PREPARE_SSE_USAGE(); 906 906 IEM_MC_FETCH_GREG_U64(uSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); … … 921 921 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 922 922 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 923 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();923 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 924 924 IEM_MC_PREPARE_SSE_USAGE(); 925 925 … … 949 949 IEM_MC_BEGIN(0, 1); 950 950 IEM_MC_LOCAL(uint32_t, uSrc); 951 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();951 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 952 952 IEM_MC_PREPARE_SSE_USAGE(); 953 953 IEM_MC_FETCH_GREG_U32(uSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); … … 968 968 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 969 969 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX_EX(fSse41); 970 IEM_MC_MAYBE_RAISE_SSE 41_RELATED_XCPT();970 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 971 971 IEM_MC_PREPARE_SSE_USAGE(); 972 972 -
trunk/src/VBox/VMM/include/IEMMc.h
r99338 r99339 114 114 } while (0) 115 115 #define IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT() \ 116 do { \117 if ( (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \118 || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \119 return iemRaiseUndefinedOpcode(pVCpu); \120 if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \121 return iemRaiseDeviceNotAvailable(pVCpu); \122 } while (0)123 #define IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT() \124 116 do { \ 125 117 if ( (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \ -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r99338 r99339 578 578 #define IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT() do { (void)fMcBegin; } while (0) 579 579 #define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT() do { (void)fMcBegin; } while (0) 580 #define IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT() do { (void)fMcBegin; } while (0)581 580 #define IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT() do { (void)fMcBegin; } while (0) 582 581 #define IEM_MC_MAYBE_RAISE_AESNI_RELATED_XCPT() do { (void)fMcBegin; } while (0)
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