Changeset 99353 in vbox

Timestamp:

Apr 8, 2023 12:27:03 AM (20 months ago)

Author:

vboxsync

Message:

VMM/IEM: Mojo improvments for IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT. bugref:10369

File:

• trunk/src/VBox/VMM/include/IEMMc.h (modified) (2 diffs)

trunk/src/VBox/VMM/include/IEMMc.h

@@ -94 +94 @@
 #define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT() \
     do { \
-        if (   (pVCpu->cpum.GstCtx.aXcr[0] & (XSAVE_C_YMM | XSAVE_C_SSE)) == (XSAVE_C_YMM | XSAVE_C_SSE) \
-            && (pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSXSAVE)) { /* probable */ } \
-        else return iemRaiseUndefinedOpcode(pVCpu); \
-        \
-        if (!(pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS)) { /* probable */ } \
-        else return iemRaiseDeviceNotAvailable(pVCpu); \
-    } while (0)
+        /* Since none of the bits we compare from XCR0, CR4 and CR0 overlap, it can \
+           be reduced to a single compare branch in the more probably code path. */ \
+        if (RT_LIKELY(   (  (pVCpu->cpum.GstCtx.aXcr[0] & (XSAVE_C_YMM | XSAVE_C_SSE)) \
+                          | (pVCpu->cpum.GstCtx.cr4     & X86_CR4_OSXSAVE) \
+                          | (pVCpu->cpum.GstCtx.cr0     & X86_CR0_TS)) \
+                      == (XSAVE_C_YMM | XSAVE_C_SSE | X86_CR4_OSXSAVE))) \
+        { /* probable */ } \
+        else if (   (pVCpu->cpum.GstCtx.aXcr[0] & (XSAVE_C_YMM | XSAVE_C_SSE)) != (XSAVE_C_YMM | XSAVE_C_SSE) \
+                 || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSXSAVE)) \
+            return iemRaiseUndefinedOpcode(pVCpu); \
+        else \
+            return iemRaiseDeviceNotAvailable(pVCpu); \
+    } while (0)
+AssertCompile(!((XSAVE_C_YMM | XSAVE_C_SSE) & X86_CR4_OSXSAVE));
+AssertCompile(!((XSAVE_C_YMM | XSAVE_C_SSE) & X86_CR0_TS));
+AssertCompile(!(X86_CR4_OSXSAVE & X86_CR0_TS));
 #define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT() \
     do { \
         /* Since the CR4 and CR0 bits doesn't overlap, it can be reduced to a
            single compare branch in the more probable code path. */ \
-        AssertCompile(!((X86_CR0_EM | X86_CR0_TS) & X86_CR4_OSFXSR)); \
         if (RT_LIKELY(  (  (pVCpu->cpum.GstCtx.cr0 & (X86_CR0_EM | X86_CR0_TS)) \
                          | (pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR)) \
@@ -116 +124 @@
             return iemRaiseDeviceNotAvailable(pVCpu); \
     } while (0)
+AssertCompile(!((X86_CR0_EM | X86_CR0_TS) & X86_CR4_OSFXSR));
 #define IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT() \
     do { \