Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-cmd.cpp
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-cmd.cpp	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA-cmd.cpp	(revision 99535)
@@ -3437,8 +3437,7 @@
 {
 #ifdef VMSVGA3D_DX
-    DEBUG_BREAKPOINT_TEST();
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
-    return vmsvga3dDXSetVSConstantBufferOffset(pThisCC, idDXContext);
+    //DEBUG_BREAKPOINT_TEST();
+    RT_NOREF(cbCmd);
+    return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_VS);
 #else
     RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
@@ -3452,8 +3451,7 @@
 {
 #ifdef VMSVGA3D_DX
-    DEBUG_BREAKPOINT_TEST();
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
-    return vmsvga3dDXSetPSConstantBufferOffset(pThisCC, idDXContext);
+    //DEBUG_BREAKPOINT_TEST();
+    RT_NOREF(cbCmd);
+    return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_PS);
 #else
     RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
@@ -3467,8 +3465,7 @@
 {
 #ifdef VMSVGA3D_DX
-    DEBUG_BREAKPOINT_TEST();
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
-    return vmsvga3dDXSetGSConstantBufferOffset(pThisCC, idDXContext);
+    //DEBUG_BREAKPOINT_TEST();
+    RT_NOREF(cbCmd);
+    return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_GS);
 #else
     RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
@@ -3482,8 +3479,7 @@
 {
 #ifdef VMSVGA3D_DX
-    DEBUG_BREAKPOINT_TEST();
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
-    return vmsvga3dDXSetHSConstantBufferOffset(pThisCC, idDXContext);
+    //DEBUG_BREAKPOINT_TEST();
+    RT_NOREF(cbCmd);
+    return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_HS);
 #else
     RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
@@ -3497,8 +3493,7 @@
 {
 #ifdef VMSVGA3D_DX
-    DEBUG_BREAKPOINT_TEST();
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
-    return vmsvga3dDXSetDSConstantBufferOffset(pThisCC, idDXContext);
+    //DEBUG_BREAKPOINT_TEST();
+    RT_NOREF(cbCmd);
+    return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_DS);
 #else
     RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
@@ -3512,8 +3507,7 @@
 {
 #ifdef VMSVGA3D_DX
-    DEBUG_BREAKPOINT_TEST();
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    RT_NOREF(pSvgaR3State, pCmd, cbCmd);
-    return vmsvga3dDXSetCSConstantBufferOffset(pThisCC, idDXContext);
+    //DEBUG_BREAKPOINT_TEST();
+    RT_NOREF(cbCmd);
+    return vmsvga3dDXSetConstantBufferOffset(pThisCC, idDXContext, pCmd, SVGA3D_SHADERTYPE_CS);
 #else
     RT_NOREF(pThisCC, idDXContext, pCmd, cbCmd);
@@ -3602,5 +3596,5 @@
 {
 #ifdef VMSVGA3D_DX
-    DEBUG_BREAKPOINT_TEST();
+    //DEBUG_BREAKPOINT_TEST();
     PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
 
Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp	(revision 99535)
@@ -398,4 +398,9 @@
     SSMFIELD_ENTRY(                 VMSVGAState, u32CurrentGMRId),
     SSMFIELD_ENTRY(                 VMSVGAState, u32DeviceCaps),
+    SSMFIELD_ENTRY_VER(             VMSVGAState, u32DeviceCaps2, VGA_SAVEDSTATE_VERSION_VMSVGA_REG_CAP2),
+    SSMFIELD_ENTRY_VER(             VMSVGAState, u32GuestDriverId, VGA_SAVEDSTATE_VERSION_VMSVGA_REG_CAP2),
+    SSMFIELD_ENTRY_VER(             VMSVGAState, u32GuestDriverVer1, VGA_SAVEDSTATE_VERSION_VMSVGA_REG_CAP2),
+    SSMFIELD_ENTRY_VER(             VMSVGAState, u32GuestDriverVer2, VGA_SAVEDSTATE_VERSION_VMSVGA_REG_CAP2),
+    SSMFIELD_ENTRY_VER(             VMSVGAState, u32GuestDriverVer3, VGA_SAVEDSTATE_VERSION_VMSVGA_REG_CAP2),
     SSMFIELD_ENTRY(                 VMSVGAState, u32IndexReg),
     SSMFIELD_ENTRY_IGNORE(          VMSVGAState, hFIFORequestSem),
@@ -1520,4 +1525,67 @@
             break;
 
+        case SVGA_REG_BLANK_SCREEN_TARGETS:
+            /// @todo STAM_REL_COUNTER_INC(&pThis->svga.aStatRegRd[idxReg]);
+            *pu32 = 0; /* Not supported. */
+            break;
+
+        case SVGA_REG_CAP2:
+            *pu32 = pThis->svga.u32DeviceCaps2;
+            break;
+
+        case SVGA_REG_DEVEL_CAP:
+            *pu32 = 0; /* Not supported. */
+            break;
+
+        /*
+         * SVGA_REG_GUEST_DRIVER_* registers require SVGA_CAP2_DX2.
+         */
+        case SVGA_REG_GUEST_DRIVER_ID:
+            *pu32 = pThis->svga.u32GuestDriverId;
+            break;
+
+        case SVGA_REG_GUEST_DRIVER_VERSION1:
+            *pu32 = pThis->svga.u32GuestDriverVer1;
+            break;
+
+        case SVGA_REG_GUEST_DRIVER_VERSION2:
+            *pu32 = pThis->svga.u32GuestDriverVer2;
+            break;
+
+        case SVGA_REG_GUEST_DRIVER_VERSION3:
+            *pu32 = pThis->svga.u32GuestDriverVer3;
+            break;
+
+        /*
+         * SVGA_REG_CURSOR_ registers require SVGA_CAP2_CURSOR_MOB which the device does not support currently.
+         */
+        case SVGA_REG_CURSOR_MOBID:
+            *pu32 = SVGA_ID_INVALID;
+            break;
+
+        case SVGA_REG_CURSOR_MAX_BYTE_SIZE:
+            *pu32 = 0;
+            break;
+
+        case SVGA_REG_CURSOR_MAX_DIMENSION:
+            *pu32 = 0;
+            break;
+
+        case SVGA_REG_FIFO_CAPS:
+        case SVGA_REG_FENCE: /* Same as SVGA_FIFO_FENCE for PCI_ID_SVGA3. Our device is PCI_ID_SVGA2 so not supported. */
+        case SVGA_REG_RESERVED1: /* SVGA_REG_RESERVED* correspond to SVGA_REG_CURSOR4_*. Require SVGA_CAP2_EXTRA_REGS. */
+        case SVGA_REG_RESERVED2:
+        case SVGA_REG_RESERVED3:
+        case SVGA_REG_RESERVED4:
+        case SVGA_REG_RESERVED5:
+        case SVGA_REG_SCREENDMA:
+            *pu32 = 0; /* Not supported. */
+            break;
+
+        case SVGA_REG_GBOBJECT_MEM_SIZE_KB:
+            /** @todo "The maximum amount of guest-backed objects that the device can have resident at a time" */
+            *pu32 = _1G / _1K;
+            break;
+
         default:
         {
@@ -2259,4 +2327,25 @@
             STAM_REL_COUNTER_INC(&pThis->svga.StatRegCmdPrependHighWr);
             /* Not supported. */
+            break;
+
+        case SVGA_REG_GUEST_DRIVER_ID:
+            if (u32 != SVGA_REG_GUEST_DRIVER_ID_SUBMIT)
+                pThis->svga.u32GuestDriverId = u32;
+            break;
+
+        case SVGA_REG_GUEST_DRIVER_VERSION1:
+            pThis->svga.u32GuestDriverVer1 = u32;
+            break;
+
+        case SVGA_REG_GUEST_DRIVER_VERSION2:
+            pThis->svga.u32GuestDriverVer2 = u32;
+            break;
+
+        case SVGA_REG_GUEST_DRIVER_VERSION3:
+            pThis->svga.u32GuestDriverVer3 = u32;
+            break;
+
+        case SVGA_REG_CURSOR_MOBID:
+            /* Not supported, ignore. See correspondent comments in vmsvgaReadPort. */
             break;
 
@@ -2286,4 +2375,18 @@
         case SVGA_REG_SCREENTARGET_MAX_HEIGHT:
         case SVGA_REG_MOB_MAX_SIZE:
+        case SVGA_REG_BLANK_SCREEN_TARGETS:
+        case SVGA_REG_CAP2:
+        case SVGA_REG_DEVEL_CAP:
+        case SVGA_REG_CURSOR_MAX_BYTE_SIZE:
+        case SVGA_REG_CURSOR_MAX_DIMENSION:
+        case SVGA_REG_FIFO_CAPS:
+        case SVGA_REG_FENCE:
+        case SVGA_REG_RESERVED1:
+        case SVGA_REG_RESERVED2:
+        case SVGA_REG_RESERVED3:
+        case SVGA_REG_RESERVED4:
+        case SVGA_REG_RESERVED5:
+        case SVGA_REG_SCREENDMA:
+        case SVGA_REG_GBOBJECT_MEM_SIZE_KB:
             /* Read only - ignore. */
             Log(("Write to R/O register %x - val %x ignored\n", idxReg, u32));
@@ -5411,4 +5514,9 @@
     pHlp->pfnPrintf(pHlp, "Current GMR ID:     %#x\n", pThis->svga.u32CurrentGMRId);
     pHlp->pfnPrintf(pHlp, "Device Capabilites: %#x\n", pThis->svga.u32DeviceCaps);
+    pHlp->pfnPrintf(pHlp, "Device Cap2:        %#x\n", pThis->svga.u32DeviceCaps2);
+    pHlp->pfnPrintf(pHlp, "Guest driver id:    %#x\n", pThis->svga.u32GuestDriverId);
+    pHlp->pfnPrintf(pHlp, "Guest driver ver1:  %#x\n", pThis->svga.u32GuestDriverVer1);
+    pHlp->pfnPrintf(pHlp, "Guest driver ver2:  %#x\n", pThis->svga.u32GuestDriverVer2);
+    pHlp->pfnPrintf(pHlp, "Guest driver ver3:  %#x\n", pThis->svga.u32GuestDriverVer3);
     pHlp->pfnPrintf(pHlp, "Index reg:          %#x\n", pThis->svga.u32IndexReg);
     pHlp->pfnPrintf(pHlp, "Action flags:       %#x\n", pThis->svga.u32ActionFlags);
@@ -6306,7 +6414,8 @@
  * @param   pThisCC   The VGA/VMSVGA state for ring-3.
  * @param   pu32DeviceCaps Device capabilities (SVGA_CAP_*).
+ * @param   pu32DeviceCaps2 Device capabilities (SVGA_CAP2_*).
  * @param   pu32FIFOCaps FIFO capabilities (SVGA_FIFO_CAPS_*).
  */
-static void vmsvgaR3GetCaps(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t *pu32DeviceCaps, uint32_t *pu32FIFOCaps)
+static void vmsvgaR3GetCaps(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t *pu32DeviceCaps, uint32_t *pu32DeviceCaps2, uint32_t *pu32FIFOCaps)
 {
 #ifndef VBOX_WITH_VMSVGA3D
@@ -6329,6 +6438,7 @@
 
     *pu32DeviceCaps |= SVGA_CAP_COMMAND_BUFFERS   /* Enable register based command buffer submission. */
-//                  |  SVGA_CAP_CMD_BUFFERS_2     /* Support for SVGA_REG_CMD_PREPEND_LOW/HIGH */
                     ;
+
+    *pu32DeviceCaps2 = SVGA_CAP2_NONE;
 
     /* VGPU10 capabilities. */
@@ -6339,5 +6449,22 @@
            *pu32DeviceCaps |= SVGA_CAP_GBOBJECTS; /* Enable guest-backed objects and surfaces. */
         if (pThisCC->svga.pSvgaR3State->pFuncsDX)
-           *pu32DeviceCaps |= SVGA_CAP_DX;        /* Enable support for DX commands, and command buffers in a mob. */
+        {
+           *pu32DeviceCaps |= SVGA_CAP_DX                 /* DX commands, and command buffers in a mob. */
+                           |  SVGA_CAP_CAP2_REGISTER      /* Extended capabilities. */
+                           ;
+
+           if (*pu32DeviceCaps & SVGA_CAP_CAP2_REGISTER)
+               *pu32DeviceCaps2 |= SVGA_CAP2_GROW_OTABLE  /* "Allow the GrowOTable/DXGrowCOTable commands" */
+                                |  SVGA_CAP2_DX2          /* Shader Model 4.1.
+                                                           * "Allow the DefineGBSurface_v3, WholeSurfaceCopy, WriteZeroSurface, and
+                                                           * HintZeroSurface commands, and the SVGA_REG_GUEST_DRIVER_ID register."
+                                                           */
+                                |  SVGA_CAP2_GB_MEMSIZE_2 /* "Allow the SVGA_REG_GBOBJECT_MEM_SIZE_KB register" */
+                                |  SVGA_CAP2_OTABLE_PTDEPTH_2
+                                |  SVGA_CAP2_DX3          /* Shader Model 5.
+                                                           * DefineGBSurface_v4, etc
+                                                           */
+                                ;
+        }
 # endif
     }
@@ -6485,5 +6612,5 @@
 
     /* Initialize FIFO and register capabilities. */
-    vmsvgaR3GetCaps(pThis, pThisCC, &pThis->svga.u32DeviceCaps, &pThisCC->svga.pau32FIFO[SVGA_FIFO_CAPABILITIES]);
+    vmsvgaR3GetCaps(pThis, pThisCC, &pThis->svga.u32DeviceCaps, &pThis->svga.u32DeviceCaps2, &pThisCC->svga.pau32FIFO[SVGA_FIFO_CAPABILITIES]);
 
 # ifdef VBOX_WITH_VMSVGA3D
@@ -6927,5 +7054,5 @@
     {
         vmsvgaR3InitFIFO(pThis, pThisCC);
-        vmsvgaR3GetCaps(pThis, pThisCC, &pThis->svga.u32DeviceCaps, &pThisCC->svga.pau32FIFO[SVGA_FIFO_CAPABILITIES]);
+        vmsvgaR3GetCaps(pThis, pThisCC, &pThis->svga.u32DeviceCaps, &pThis->svga.u32DeviceCaps2, &pThisCC->svga.pau32FIFO[SVGA_FIFO_CAPABILITIES]);
     }
 # ifdef DEBUG
@@ -6934,9 +7061,11 @@
         /* If saved state is being loaded then FIFO and caps are already restored. */
         uint32_t u32DeviceCaps = 0;
+        uint32_t u32DeviceCaps2 = 0;
         uint32_t u32FIFOCaps = 0;
-        vmsvgaR3GetCaps(pThis, pThisCC, &u32DeviceCaps, &u32FIFOCaps);
+        vmsvgaR3GetCaps(pThis, pThisCC, &u32DeviceCaps, &u32DeviceCaps2, &u32FIFOCaps);
 
         /* Capabilities should not change normally. */
         Assert(   pThis->svga.u32DeviceCaps == u32DeviceCaps
+               && pThis->svga.u32DeviceCaps2 == u32DeviceCaps2
                && pThisCC->svga.pau32FIFO[SVGA_FIFO_CAPABILITIES] == u32FIFOCaps);
     }
Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h	(revision 99535)
@@ -331,5 +331,10 @@
     /** SVGA device capabilities. */
     uint32_t                    u32DeviceCaps;
-    uint32_t                    Padding0; /* Used to be I/O port base address. */
+    uint32_t                    u32DeviceCaps2; /* Used to be I/O port base address and Padding0. */
+    /** Guest driver information (SVGA_REG_GUEST_DRIVER_*). */
+    uint32_t                    u32GuestDriverId;
+    uint32_t                    u32GuestDriverVer1;
+    uint32_t                    u32GuestDriverVer2;
+    uint32_t                    u32GuestDriverVer3;
     /** Port io index register. */
     uint32_t                    u32IndexReg;
Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp	(revision 99535)
@@ -4641,5 +4641,5 @@
 
     case SVGA3D_DEVCAP_SM41:
-        *pu32Val = 0; /* boolean */
+        *pu32Val = 1; /* boolean */
         break;
 
@@ -4672,5 +4672,5 @@
 
     case SVGA3D_DEVCAP_SM5:
-        *pu32Val = 0; /* boolean */
+        *pu32Val = 1; /* boolean */
         break;
 
@@ -9448,64 +9448,4 @@
 
 static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
-{
-    PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
-
-    RT_NOREF(pBackend, pDXContext);
-    AssertFailed(); /** @todo Implement */
-    return VERR_NOT_IMPLEMENTED;
-}
-
-
-static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
-{
-    PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
-
-    RT_NOREF(pBackend, pDXContext);
-    AssertFailed(); /** @todo Implement */
-    return VERR_NOT_IMPLEMENTED;
-}
-
-
-static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
-{
-    PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
-
-    RT_NOREF(pBackend, pDXContext);
-    AssertFailed(); /** @todo Implement */
-    return VERR_NOT_IMPLEMENTED;
-}
-
-
-static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
-{
-    PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
-
-    RT_NOREF(pBackend, pDXContext);
-    AssertFailed(); /** @todo Implement */
-    return VERR_NOT_IMPLEMENTED;
-}
-
-
-static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
-{
-    PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
-
-    RT_NOREF(pBackend, pDXContext);
-    AssertFailed(); /** @todo Implement */
-    return VERR_NOT_IMPLEMENTED;
-}
-
-
-static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
-{
-    PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
-
-    RT_NOREF(pBackend, pDXContext);
-    AssertFailed(); /** @todo Implement */
-    return VERR_NOT_IMPLEMENTED;
-}
-
-
-static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
 {
     PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
@@ -10244,10 +10184,4 @@
                 p->pfnDXHint                      = vmsvga3dBackDXHint;
                 p->pfnDXBufferUpdate              = vmsvga3dBackDXBufferUpdate;
-                p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
-                p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
-                p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
-                p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
-                p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
-                p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
                 p->pfnDXCondBindAllShader         = vmsvga3dBackDXCondBindAllShader;
                 p->pfnScreenCopy                  = vmsvga3dBackScreenCopy;
Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-shader.cpp
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-shader.cpp	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-shader.cpp	(revision 99535)
@@ -1783,22 +1783,29 @@
                 /* Integer divide. */
                 pOpcode->cOperand = 4; /* dstQuit, dstRem, src0, src1. */
-
-                /* Operands. */
-                uint32_t cOperandRemain = RT_ELEMENTS(pOpcode->aValOperand);
-                for (uint32_t i = 0; i < pOpcode->cOperand; ++i)
-                {
-                    Log6(("  [operand %d]\n", i));
-                    uint32_t const idxOperand = RT_ELEMENTS(pOpcode->aValOperand) - cOperandRemain;
-                    pOpcode->aIdxOperand[i] = idxOperand;
-                    int rc = dxbcParseOperand(r, &pOpcode->aValOperand[idxOperand], &cOperandRemain);
-                    ASSERT_GUEST_RETURN(RT_SUCCESS(rc), VERR_INVALID_PARAMETER);
-                }
-            }
-            //else if (opcode.vmwareOpcodeType == VGPU10_VMWARE_OPCODE_DFRC)
-            //else if (opcode.vmwareOpcodeType == VGPU10_VMWARE_OPCODE_DRSQ)
+            }
+            else if (opcode.vmwareOpcodeType == VGPU10_VMWARE_OPCODE_DFRC)
+            {
+                /* Double precision fraction. */
+                pOpcode->cOperand = 2; /* dst, src. */
+            }
+            else if (opcode.vmwareOpcodeType == VGPU10_VMWARE_OPCODE_DRSQ)
+            {
+                /* Double precision reciprocal square root. */
+                pOpcode->cOperand = 2; /* dst, src. */
+            }
             else
             {
-                /** @todo implement */
                 ASSERT_GUEST_FAILED_RETURN(VERR_INVALID_PARAMETER);
+            }
+
+            /* Operands. */
+            uint32_t cOperandRemain = RT_ELEMENTS(pOpcode->aValOperand);
+            for (uint32_t i = 0; i < pOpcode->cOperand; ++i)
+            {
+                Log6(("  [operand %d]\n", i));
+                uint32_t const idxOperand = RT_ELEMENTS(pOpcode->aValOperand) - cOperandRemain;
+                pOpcode->aIdxOperand[i] = idxOperand;
+                int rc = dxbcParseOperand(r, &pOpcode->aValOperand[idxOperand], &cOperandRemain);
+                ASSERT_GUEST_RETURN(RT_SUCCESS(rc), VERR_INVALID_PARAMETER);
             }
         }
@@ -1832,15 +1839,9 @@
 
 
-static int dxbcEmitVmwareIDIV(DXBCOUTPUTCTX *pOutctx, DXBCByteWriter *w, VGPUOpcode *pOpcode)
-{
-    /* Insert a call and append a subroutne. */
+static void dxbcEmitCall(DXBCByteWriter *w, VGPUOpcode const *pOpcode, uint32_t label)
+{
     VGPU10OpcodeToken0 opcode;
     VGPU10OperandToken0 operand;
 
-    uint32_t const label = (pOutctx->offSubroutine - dxbcByteWriterSize(w)) / 4;
-
-    /*
-     * Call
-     */
     opcode.value = 0;
     opcode.opcodeType = VGPU10_OPCODE_CALL;
@@ -1862,13 +1863,12 @@
     for (unsigned i = 0; i < pOpcode->cOpcodeToken - 3; ++i)
         dxbcByteWriterAddTokens(w, &opcode.value, 1);
-
-    /*
-     * Subroutine.
-     */
-    DXBCByteWriterState savedWriterState;
-    if (!dxbcByteWriterSetOffset(w, pOutctx->offSubroutine, &savedWriterState))
-        return w->rc;
-
-    /* label */
+}
+
+
+static void dxbcEmitLabel(DXBCByteWriter *w, uint32_t label)
+{
+    VGPU10OpcodeToken0 opcode;
+    VGPU10OperandToken0 operand;
+
     opcode.value = 0;
     opcode.opcodeType = VGPU10_OPCODE_LABEL;
@@ -1883,4 +1883,35 @@
     dxbcByteWriterAddTokens(w, &operand.value, 1);
     dxbcByteWriterAddTokens(w, &label, 1);
+}
+
+
+static void dxbcEmitRet(DXBCByteWriter *w)
+{
+    VGPU10OpcodeToken0 opcode;
+
+    opcode.value = 0;
+    opcode.opcodeType = VGPU10_OPCODE_RET;
+    opcode.instructionLength = 1;
+    dxbcByteWriterAddTokens(w, &opcode.value, 1);
+}
+
+
+static int dxbcEmitVmwareIDIV(DXBCOUTPUTCTX *pOutctx, DXBCByteWriter *w, VGPUOpcode *pOpcode)
+{
+    /* Insert a call and append a subroutne. */
+    VGPU10OpcodeToken0 opcode;
+
+    uint32_t const label = (pOutctx->offSubroutine - dxbcByteWriterSize(w)) / 4;
+
+    dxbcEmitCall(w, pOpcode, label);
+
+    /*
+     * Subroutine.
+     */
+    DXBCByteWriterState savedWriterState;
+    if (!dxbcByteWriterSetOffset(w, pOutctx->offSubroutine, &savedWriterState))
+        return w->rc;
+
+    dxbcEmitLabel(w, label);
 
     /* Just output UDIV for now. */
@@ -1891,9 +1922,73 @@
     dxbcByteWriterAddTokens(w, &pOpcode->paOpcodeToken[1], pOpcode->cOpcodeToken - 1);
 
-    /* ret */
+    dxbcEmitRet(w);
+
+    pOutctx->offSubroutine = dxbcByteWriterSize(w);
+    dxbcByteWriterRestore(w, &savedWriterState);
+
+    return w->rc;
+}
+
+
+static int dxbcEmitVmwareDFRC(DXBCOUTPUTCTX *pOutctx, DXBCByteWriter *w, VGPUOpcode *pOpcode)
+{
+    /* Insert a call and append a subroutine. */
+    VGPU10OpcodeToken0 opcode;
+
+    uint32_t const label = (pOutctx->offSubroutine - dxbcByteWriterSize(w)) / 4;
+
+    dxbcEmitCall(w, pOpcode, label);
+
+    /*
+     * Subroutine.
+     */
+    DXBCByteWriterState savedWriterState;
+    if (!dxbcByteWriterSetOffset(w, pOutctx->offSubroutine, &savedWriterState))
+        return w->rc;
+
+    dxbcEmitLabel(w, label);
+
+    /* Just output a MOV for now. */
     opcode.value = 0;
-    opcode.opcodeType = VGPU10_OPCODE_RET;
-    opcode.instructionLength = 1;
+    opcode.opcodeType = VGPU10_OPCODE_MOV;
+    opcode.instructionLength = pOpcode->cOpcodeToken;
     dxbcByteWriterAddTokens(w, &opcode.value, 1);
+    dxbcByteWriterAddTokens(w, &pOpcode->paOpcodeToken[1], pOpcode->cOpcodeToken - 1);
+
+    dxbcEmitRet(w);
+
+    pOutctx->offSubroutine = dxbcByteWriterSize(w);
+    dxbcByteWriterRestore(w, &savedWriterState);
+
+    return w->rc;
+}
+
+
+static int dxbcEmitVmwareDRSQ(DXBCOUTPUTCTX *pOutctx, DXBCByteWriter *w, VGPUOpcode *pOpcode)
+{
+    /* Insert a call and append a subroutine. */
+    VGPU10OpcodeToken0 opcode;
+
+    uint32_t const label = (pOutctx->offSubroutine - dxbcByteWriterSize(w)) / 4;
+
+    dxbcEmitCall(w, pOpcode, label);
+
+    /*
+     * Subroutine.
+     */
+    DXBCByteWriterState savedWriterState;
+    if (!dxbcByteWriterSetOffset(w, pOutctx->offSubroutine, &savedWriterState))
+        return w->rc;
+
+    dxbcEmitLabel(w, label);
+
+    /* Just output a MOV for now. */
+    opcode.value = 0;
+    opcode.opcodeType = VGPU10_OPCODE_MOV;
+    opcode.instructionLength = pOpcode->cOpcodeToken;
+    dxbcByteWriterAddTokens(w, &opcode.value, 1);
+    dxbcByteWriterAddTokens(w, &pOpcode->paOpcodeToken[1], pOpcode->cOpcodeToken - 1);
+
+    dxbcEmitRet(w);
 
     pOutctx->offSubroutine = dxbcByteWriterSize(w);
@@ -1934,7 +2029,9 @@
     {
         if (pOpcode->opcodeSubtype == VGPU10_VMWARE_OPCODE_IDIV)
-        {
             return dxbcEmitVmwareIDIV(pOutctx, w, pOpcode);
-        }
+        if (pOpcode->opcodeSubtype == VGPU10_VMWARE_OPCODE_DFRC)
+            return dxbcEmitVmwareDFRC(pOutctx, w, pOpcode);
+        if (pOpcode->opcodeSubtype == VGPU10_VMWARE_OPCODE_DRSQ)
+            return dxbcEmitVmwareDRSQ(pOutctx, w, pOpcode);
 
         ASSERT_GUEST_FAILED_RETURN(VERR_NOT_SUPPORTED);
@@ -2206,4 +2303,5 @@
 }
 
+
 void DXShaderGenerateSemantics(DXShaderInfo *pInfo)
 {
@@ -2221,4 +2319,26 @@
                               pInfo->aPatchConstantSemantic, DXBC_BLOB_TYPE_PCSG);
 }
+
+
+void DXShaderSortSignatures(DXShaderInfo *pInfo)
+{
+    /* Sort signatures by register index and mask because the host API need them to be sorted. */
+    if (pInfo->cInputSignature)
+    {
+        RTSortShell(pInfo->aInputSignature, pInfo->cInputSignature, sizeof(pInfo->aInputSignature[0]),
+                    signatureEntryCmp, NULL);
+    }
+    if (pInfo->cOutputSignature)
+    {
+        RTSortShell(pInfo->aOutputSignature, pInfo->cOutputSignature, sizeof(pInfo->aOutputSignature[0]),
+                    signatureEntryCmp, NULL);
+    }
+    if (pInfo->cPatchConstantSignature)
+    {
+        RTSortShell(pInfo->aPatchConstantSignature, pInfo->cPatchConstantSignature, sizeof(pInfo->aPatchConstantSignature[0]),
+                    signatureEntryCmp, NULL);
+    }
+}
+
 
 void DXShaderFree(DXShaderInfo *pInfo)
@@ -2372,4 +2492,9 @@
     pHdrISGN->offElement = RT_UOFFSETOF(DXBCBlobIOSGN, aElement[0]);
 
+#ifdef DEBUG
+    /* Check that signatures are sorted by register index because the host API need them to be sorted. */
+    uint32_t idxRegisterLast = 0;
+#endif
+
     for (uint32_t iSignatureEntry = 0; iSignatureEntry < cSignature; ++iSignatureEntry)
     {
@@ -2398,4 +2523,9 @@
               iSignatureEntry, srcSemantic->pcszSemanticName, dst->idxSemantic,
               dst->enmSystemValue, dst->enmComponentType, dst->idxRegister, dst->u.mask));
+
+#ifdef DEBUG
+        Assert(idxRegisterLast <= dst->idxRegister);
+        idxRegisterLast = dst->idxRegister;
+#endif
 
         if (dst->offElementName == 0)
Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-shader.h
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-shader.h	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-shader.h	(revision 99535)
@@ -77,4 +77,5 @@
 int DXShaderParse(void const *pvCode, uint32_t cbCode, DXShaderInfo *pInfo);
 void DXShaderGenerateSemantics(DXShaderInfo *pInfo);
+void DXShaderSortSignatures(DXShaderInfo *pInfo);
 void DXShaderFree(DXShaderInfo *pInfo);
 int DXShaderUpdateResources(DXShaderInfo const *pInfo, VGPU10_RESOURCE_DIMENSION *paResourceDimension,
Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp	(revision 99535)
@@ -1990,4 +1990,8 @@
                 memcpy(pShaderInfo->aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
 
+                /* Sort must be called before GenerateSemantics which assigns attribute indices
+                 * based on the order of attributes.
+                 */
+                DXShaderSortSignatures(pShaderInfo);
                 DXShaderGenerateSemantics(pShaderInfo);
             }
@@ -2481,102 +2485,28 @@
 
 
-int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
-{
-    int rc;
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
-    PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
-    AssertReturn(p3dState, VERR_INVALID_STATE);
-
-    PVMSVGA3DDXCONTEXT pDXContext;
-    rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
-    AssertRCReturn(rc, rc);
-
-    rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
-    return rc;
-}
-
-
-int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
-{
-    int rc;
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
-    PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
-    AssertReturn(p3dState, VERR_INVALID_STATE);
-
-    PVMSVGA3DDXCONTEXT pDXContext;
-    rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
-    AssertRCReturn(rc, rc);
-
-    rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
-    return rc;
-}
-
-
-int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
-{
-    int rc;
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
-    PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
-    AssertReturn(p3dState, VERR_INVALID_STATE);
-
-    PVMSVGA3DDXCONTEXT pDXContext;
-    rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
-    AssertRCReturn(rc, rc);
-
-    rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
-    return rc;
-}
-
-
-int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
-{
-    int rc;
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
-    PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
-    AssertReturn(p3dState, VERR_INVALID_STATE);
-
-    PVMSVGA3DDXCONTEXT pDXContext;
-    rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
-    AssertRCReturn(rc, rc);
-
-    rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
-    return rc;
-}
-
-
-int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
-{
-    int rc;
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
-    PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
-    AssertReturn(p3dState, VERR_INVALID_STATE);
-
-    PVMSVGA3DDXCONTEXT pDXContext;
-    rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
-    AssertRCReturn(rc, rc);
-
-    rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
-    return rc;
-}
-
-
-int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
-{
-    int rc;
-    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
-    AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
-    PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
-    AssertReturn(p3dState, VERR_INVALID_STATE);
-
-    PVMSVGA3DDXCONTEXT pDXContext;
-    rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
-    AssertRCReturn(rc, rc);
-
-    rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
+int vmsvga3dDXSetConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetConstantBufferOffset const *pCmd, SVGA3dShaderType type)
+{
+    int rc;
+    PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
+    AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
+    PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
+    AssertReturn(p3dState, VERR_INVALID_STATE);
+
+    PVMSVGA3DDXCONTEXT pDXContext;
+    rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
+    AssertRCReturn(rc, rc);
+
+    ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
+    RT_UNTRUSTED_VALIDATED_FENCE();
+
+    uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
+    SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
+
+    /* Only 'offsetInBytes' is updated. */
+    // pCBB->sid;
+    pCBB->offsetInBytes = pCmd->offsetInBytes;
+    // pCBB->sizeInBytes;
+
+    rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, type, pCBB->sid, pCBB->offsetInBytes, pCBB->sizeInBytes);
     return rc;
 }
Index: /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.h
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.h	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.h	(revision 99535)
@@ -513,10 +513,4 @@
     DECLCALLBACKMEMBER(int, pfnDXHint,                      (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
     DECLCALLBACKMEMBER(int, pfnDXBufferUpdate,              (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
-    DECLCALLBACKMEMBER(int, pfnDXSetVSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
-    DECLCALLBACKMEMBER(int, pfnDXSetPSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
-    DECLCALLBACKMEMBER(int, pfnDXSetGSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
-    DECLCALLBACKMEMBER(int, pfnDXSetHSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
-    DECLCALLBACKMEMBER(int, pfnDXSetDSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
-    DECLCALLBACKMEMBER(int, pfnDXSetCSConstantBufferOffset, (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
     DECLCALLBACKMEMBER(int, pfnDXCondBindAllShader,         (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
     DECLCALLBACKMEMBER(int, pfnScreenCopy,                  (PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext));
@@ -637,10 +631,5 @@
 int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext);
 int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext);
-int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext);
-int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext);
-int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext);
-int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext);
-int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext);
-int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext);
+int vmsvga3dDXSetConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetConstantBufferOffset const *pCmd, SVGA3dShaderType type);
 int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext);
 int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext);
Index: /trunk/src/VBox/Devices/Graphics/DevVGASavedState.h
===================================================================
--- /trunk/src/VBox/Devices/Graphics/DevVGASavedState.h	(revision 99534)
+++ /trunk/src/VBox/Devices/Graphics/DevVGASavedState.h	(revision 99535)
@@ -57,5 +57,6 @@
     } while (0)
 
-#define VGA_SAVEDSTATE_VERSION                   26
+#define VGA_SAVEDSTATE_VERSION                   27
+#define VGA_SAVEDSTATE_VERSION_VMSVGA_REG_CAP2   27 /* SVGA_REG_CAP2. */
 #define VGA_SAVEDSTATE_VERSION_VMSVGA_DX_SFLAGS  26 /* SVGA3dSurfaceAllFlags. */
 #define VGA_SAVEDSTATE_VERSION_VMSVGA_DX_CMDBUF  25 /* Command buffers capability is not tied to VGPU10 setting. */
