Changeset 99734 in vbox for trunk/include

Timestamp:

May 10, 2023 5:28:24 PM (19 months ago)

Author:

vboxsync

Message:

VMM/GIC: Updates to the implementation, implement forwarding of SGIs and PPIs, bugref:10404

Location:

trunk/include/VBox

Files:

• gic.h (modified) (2 diffs)
• vmm/gic.h (modified) (1 diff)

trunk/include/VBox/gic.h

@@ -42 +42 @@
 #include <iprt/types.h>
 #include <iprt/armv8.h>
+
+/** @name INTIDs - Interrupt identifier ranges.
+ * @{ */
+/** Start of the SGI (Software Generated Interrupts) range. */
+#define GIC_INTID_RANGE_SGI_START                          0
+/** Last valid SGI (Software Generated Interrupts) identifier. */
+#define GIC_INTID_RANGE_SGI_LAST                          15
+
+/** Start of the PPI (Private Peripheral Interrupts) range. */
+#define GIC_INTID_RANGE_PPI_START                         16
+/** Last valid PPI (Private Peripheral Interrupts) identifier. */
+#define GIC_INTID_RANGE_PPI_LAST                          31
+
+/** Start of the SPI (Shared Peripheral Interrupts) range. */
+#define GIC_INTID_RANGE_SPI_START                         32
+/** Last valid SPI (Shared Peripheral Interrupts) identifier. */
+#define GIC_INTID_RANGE_SPI_LAST                        1019
+
+/** Start of the special interrupt range. */
+#define GIC_INTID_RANGE_SPECIAL_START                   1020
+/** Last valid special interrupt identifier. */
+#define GIC_INTID_RANGE_SPECIAL_LAST                    1023
+/** Value for an interrupt acknowledge if no pending interrupt with sufficient
+ * priority, security state or interrupt group. */
+# define GIC_INTID_RANGE_SPECIAL_NO_INTERRUPT           1023
+
+/** Start of the extended PPI (Private Peripheral Interrupts) range. */
+#define GIC_INTID_RANGE_EPPI_START                      1056
+/** Last valid extended PPI (Private Peripheral Interrupts) identifier. */
+#define GIC_INTID_RANGE_EPPI_LAST                       1119
+
+/** Start of the extended SPI (Shared Peripheral Interrupts) range. */
+#define GIC_INTID_RANGE_ESPI_START                      4096
+/** Last valid extended SPI (Shared Peripheral Interrupts) identifier. */
+#define GIC_INTID_RANGE_ESPI_LAST                       5119
+
+/** Start of the LPI (Locality-specific Peripheral Interrupts) range. */
+#define GIC_INTID_RANGE_LPI_START                       8192
+/** @} */
 
 
@@ -368 +407 @@
 
 /** Interrupt Clear Enable Register 0 - RW. */
-#define GIC_REDIST_SGI_PPI_REG_ICENABLER0_OFF           0x0100
+#define GIC_REDIST_SGI_PPI_REG_ICENABLER0_OFF           0x0180
 /** Interrupt Clear Enable Register 1 for extended PPI range - RW. */
-#define GIC_REDIST_SGI_PPI_REG_ICENABLER1E_OFF          0x0104
+#define GIC_REDIST_SGI_PPI_REG_ICENABLER1E_OFF          0x0184
 /** Interrupt Clear Enable Register 2 for extended PPI range - RW. */
-#define GIC_REDIST_SGI_PPI_REG_ICENABLER2E_OFF          0x0108
+#define GIC_REDIST_SGI_PPI_REG_ICENABLER2E_OFF          0x0188
 
 /** Interrupt Set Pend Register 0 - RW. */

trunk/include/VBox/vmm/gic.h

@@ -57 +57 @@
 VMM_INT_DECL(VBOXSTRICTRC)  GICReadSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t *pu64Value);
 VMM_INT_DECL(VBOXSTRICTRC)  GICWriteSysReg(PVMCPUCC pVCpu, uint32_t u32Reg, uint64_t u64Value);
+VMM_INT_DECL(int)           GICSpiSet(PVMCC pVM, uint32_t uIntId, bool fAsserted);
+VMM_INT_DECL(int)           GICPpiSet(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted);
+VMM_INT_DECL(int)           GICSgiSet(PVMCPUCC pVCpu, uint32_t uIntId, bool fAsserted);
 
 #ifdef IN_RING3
-/** @defgroup grp_gic_r3  The APIC Host Context Ring-3 API
+/** @defgroup grp_gic_r3  The GIC Host Context Ring-3 API
  * @{
  */