VirtualBox

Changeset 99743 in vbox


Ignore:
Timestamp:
May 11, 2023 9:59:52 AM (19 months ago)
Author:
vboxsync
Message:

VMM: Add full support for reading/writing I/O ports on ARMv8 in order to emulate PIO accesses to PCI devices through a dedicated MMIO region by the host to PCI bridge, bugref:10445

Location:
trunk
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/vmm/pdmdev.h

    r99739 r99743  
    24302430
    24312431/** Current PDMDEVHLPR3 version number. */
    2432 #define PDM_DEVHLPR3_VERSION                    PDM_VERSION_MAKE_PP(0xffe7, 65, 0)
     2432#define PDM_DEVHLPR3_VERSION                    PDM_VERSION_MAKE_PP(0xffe7, 66, 0)
    24332433
    24342434/**
     
    25162516
    25172517    /**
    2518      * Writes to an I/O port register.
     2518     * Reads from an I/O port register.
    25192519     *
    25202520     * @returns Strict VBox status code. Informational status codes other than the one documented
     
    25302530     *
    25312531     * @thread EMT
    2532      * @todo r=aeichner This is only used by DevPCI.cpp to write the ELCR of the PIC. This shouldn't be done that way
    2533      *       and removed again as soon as possible (no time right now)...
     2532     *
     2533     * @note This is required for the ARM platform in order to emulate PIO accesses through a dedicated MMIO region.
     2534     */
     2535    DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnIoPortRead,(PPDMDEVINS pDevIns, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue));
     2536
     2537    /**
     2538     * Writes to an I/O port register.
     2539     *
     2540     * @returns Strict VBox status code. Informational status codes other than the one documented
     2541     *          here are to be treated as internal failure. Use IOM_SUCCESS() to check for success.
     2542     * @retval  VINF_SUCCESS                Success.
     2543     * @retval  VINF_EM_FIRST-VINF_EM_LAST  Success with some exceptions (see IOM_SUCCESS()), the
     2544     *                                      status code must be passed on to EM.
     2545     *
     2546     * @param   pDevIns     The device instance to register the ports with.
     2547     * @param   Port        The port to write to.
     2548     * @param   u32Value    The value to write.
     2549     * @param   cbValue     The size of the register to read in bytes. 1, 2 or 4 bytes.
     2550     *
     2551     * @thread EMT
     2552     *
     2553     * @note This is required for the ARM platform in order to emulate PIO accesses through a dedicated MMIO region.
    25342554     */
    25352555    DECLR3CALLBACKMEMBER(VBOXSTRICTRC, pfnIoPortWrite,(PPDMDEVINS pDevIns, RTIOPORT Port, uint32_t u32Value, size_t cbValue));
     
    66386658}
    66396659
     6660/**
     6661 * @copydoc PDMDEVHLPR3::pfnIoPortRead
     6662 */
     6663DECLINLINE(VBOXSTRICTRC) PDMDevHlpIoPortRead(PPDMDEVINS pDevIns, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue)
     6664{
     6665    return pDevIns->pHlpR3->pfnIoPortRead(pDevIns, Port, pu32Value, cbValue);
     6666}
     6667
     6668/**
     6669 * @copydoc PDMDEVHLPR3::pfnIoPortWrite
     6670 */
     6671DECLINLINE(VBOXSTRICTRC) PDMDevHlpIoPortWrite(PPDMDEVINS pDevIns, RTIOPORT Port, uint32_t u32Value, size_t cbValue)
     6672{
     6673    return pDevIns->pHlpR3->pfnIoPortWrite(pDevIns, Port, u32Value, cbValue);
     6674}
     6675
    66406676
    66416677#endif /* IN_RING3 */
  • trunk/src/VBox/VMM/Makefile.kmk

    r99385 r99743  
    379379        VMMR3/IEMR3.cpp \
    380380        VMMR3/IOM.cpp \
     381        VMMR3/IOMR3IoPort.cpp \
    381382        VMMR3/IOMR3Mmio.cpp \
    382383        VMMR3/GMM.cpp \
  • trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

    r99051 r99743  
    9090    VM_ASSERT_STATE_RETURN(pVM, VMSTATE_CREATING, VERR_VM_INVALID_VM_STATE);
    9191
    92 #if defined(VBOX_VMM_TARGET_ARMV8)
    93     int rc = VERR_NOT_SUPPORTED;
    94     AssertReleaseFailed();
    95 #else
    9692    int rc = IOMR3IoPortCreate(pVM, pDevIns, cPorts, fFlags, pPciDev, iPciRegion,
    9793                               pfnOut, pfnIn, pfnOutStr, pfnInStr, pvUser, pszDesc, paExtDescs, phIoPorts);
    98 #endif
    9994
    10095    LogFlow(("pdmR3DevHlp_IoPortCreateEx: caller='%s'/%d: returns %Rrc (*phIoPorts=%#x)\n",
     
    112107    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    113108
    114 #if defined(VBOX_VMM_TARGET_ARMV8)
    115     int rc = VERR_NOT_SUPPORTED;
    116     AssertReleaseFailed();
    117 #else
    118109    int rc = IOMR3IoPortMap(pVM, pDevIns, hIoPorts, Port);
    119 #endif
    120110
    121111    LogFlow(("pdmR3DevHlp_IoPortMap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
     
    132122    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    133123
    134 #if defined(VBOX_VMM_TARGET_ARMV8)
    135     int rc = VERR_NOT_SUPPORTED;
    136     AssertReleaseFailed();
    137 #else
    138124    int rc = IOMR3IoPortUnmap(pVM, pDevIns, hIoPorts);
    139 #endif
    140125
    141126    LogFlow(("pdmR3DevHlp_IoPortMap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
     
    150135    LogFlow(("pdmR3DevHlp_IoPortGetMappingAddress: caller='%s'/%d: hIoPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, hIoPorts));
    151136
    152 #if defined(VBOX_VMM_TARGET_ARMV8)
    153     uint32_t uAddress = UINT32_MAX;
    154     AssertReleaseFailed();
    155 #else
    156137    uint32_t uAddress = IOMR3IoPortGetMappingAddress(pDevIns->Internal.s.pVMR3, pDevIns, hIoPorts);
    157 #endif
    158138
    159139    LogFlow(("pdmR3DevHlp_IoPortGetMappingAddress: caller='%s'/%d: returns %#RX32\n", pDevIns->pReg->szName, pDevIns->iInstance, uAddress));
     
    162142
    163143
     144/** @interface_method_impl{PDMDEVHLPR3,pfnIoPortRead} */
     145static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlp_IoPortRead(PPDMDEVINS pDevIns, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue)
     146{
     147    PDMDEV_ASSERT_DEVINS(pDevIns);
     148    LogFlow(("pdmR3DevHlp_IoPortRead: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
     149    PVM pVM = pDevIns->Internal.s.pVMR3;
     150    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
     151
     152    PVMCPU pVCpu = VMMGetCpu(pVM);
     153    AssertPtrReturn(pVCpu, VERR_ACCESS_DENIED);
     154
     155    VBOXSTRICTRC rcStrict = IOMIOPortRead(pVM, pVCpu, Port, pu32Value, cbValue);
     156
     157    LogFlow(("pdmR3DevHlp_IoPortRead: caller='%s'/%d: returns %Rrc\n",
     158             pDevIns->pReg->szName, pDevIns->iInstance, VBOXSTRICTRC_VAL(rcStrict)));
     159    return rcStrict;
     160}
     161
     162
    164163/** @interface_method_impl{PDMDEVHLPR3,pfnIoPortWrite} */
    165164static DECLCALLBACK(VBOXSTRICTRC) pdmR3DevHlp_IoPortWrite(PPDMDEVINS pDevIns, RTIOPORT Port, uint32_t u32Value, size_t cbValue)
     
    170169    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    171170
    172 #if defined(VBOX_VMM_TARGET_ARMV8)
    173     RT_NOREF(Port, u32Value, cbValue);
    174     VBOXSTRICTRC rcStrict = VERR_NOT_SUPPORTED;
    175     AssertReleaseFailed();
    176 #else
    177171    PVMCPU pVCpu = VMMGetCpu(pVM);
    178172    AssertPtrReturn(pVCpu, VERR_ACCESS_DENIED);
    179173
    180174    VBOXSTRICTRC rcStrict = IOMIOPortWrite(pVM, pVCpu, Port, u32Value, cbValue);
    181 #endif
    182175
    183176    LogFlow(("pdmR3DevHlp_IoPortWrite: caller='%s'/%d: returns %Rrc\n",
     
    21202113        case PDMPCIDEV_IORGN_F_IOPORT_HANDLE:
    21212114            AssertReturn(enmType == PCI_ADDRESS_SPACE_IO, VERR_INVALID_FLAGS);
    2122 #if defined(VBOX_VMM_TARGET_ARMV8)
    2123             rc = VERR_NOT_SUPPORTED;
    2124             AssertReleaseFailed();
    2125             AssertRCReturn(rc, rc);
    2126 #else
    21272115            rc = IOMR3IoPortValidateHandle(pVM, pDevIns, (IOMIOPORTHANDLE)hHandle);
    21282116            AssertRCReturn(rc, rc);
    2129 #endif
    21302117            break;
    21312118        case PDMPCIDEV_IORGN_F_MMIO_HANDLE:
     
    48734860    pdmR3DevHlp_IoPortUnmap,
    48744861    pdmR3DevHlp_IoPortGetMappingAddress,
     4862    pdmR3DevHlp_IoPortRead,
    48754863    pdmR3DevHlp_IoPortWrite,
    48764864    pdmR3DevHlp_MmioCreateEx,
     
    52705258    pdmR3DevHlpTracing_IoPortUnmap,
    52715259    pdmR3DevHlp_IoPortGetMappingAddress,
    5272     pdmR3DevHlp_IoPortWrite,
     5260    pdmR3DevHlp_IoPortRead,  /** @todo Needs tracing variants for ARM now. */
     5261    pdmR3DevHlp_IoPortWrite, /** @todo Needs tracing variants for ARM now. */
    52735262    pdmR3DevHlpTracing_MmioCreateEx,
    52745263    pdmR3DevHlpTracing_MmioMap,
     
    59875976    pdmR3DevHlp_IoPortUnmap,
    59885977    pdmR3DevHlp_IoPortGetMappingAddress,
     5978    pdmR3DevHlp_IoPortRead,
    59895979    pdmR3DevHlp_IoPortWrite,
    59905980    pdmR3DevHlp_MmioCreateEx,
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