Changeset 99956 in vbox for trunk/include

Timestamp:

May 24, 2023 11:39:15 AM (21 months ago)

Author:

vboxsync

Message:

VMM/CPUM-armv8: Implement OSDLR_EL1, OSLAR_EL1 and OSLSR_EL1 accessed by Linux guests, bugref:10387

Location:

trunk/include

Files:

• VBox/vmm/cpum-armv8.h (modified) (2 diffs)
• VBox/vmm/cpumctx-armv8.h (modified) (1 diff)
• iprt/armv8.h (modified) (4 diffs)

trunk/include/VBox/vmm/cpum-armv8.h

@@ -68 +68 @@
     /** Read from a GICv3 PE ICC system register. */
     kCpumSysRegRdFn_GicV3Icc,
+    /** Read from the OSLSR_EL1 syste register. */
+    kCpumSysRegRdFn_OslsrEl1,
 
     /** End of valid system register read function indexes. */
@@ -92 +94 @@
     /** Write to a GICv3 PE ICC system register. */
     kCpumSysRegWrFn_GicV3Icc,
+    /** Write to the OSLAR_EL1 syste register. */
+    kCpumSysRegWrFn_OslarEl1,
 
     /** End of valid system register write function indexes. */

trunk/include/VBox/vmm/cpumctx-armv8.h

@@ -157 +157 @@
     uint32_t        fPadding0;
 
+    /** OS lock status accessed through OSLAR_EL1 and OSLSR_EL1. */
+    bool            fOsLck;
+
+    uint8_t         afPadding1[7];
+
     /** Externalized state tracker, CPUMCTX_EXTRN_XXX. */
     uint64_t        fExtrn;
 
-    uint64_t        au64Padding1[2];
+    uint64_t        au64Padding2[1];
 } CPUMCTX;
 

trunk/include/iprt/armv8.h

@@ -185 +185 @@
 /** @name System register IDs.
  * @{ */
-/** OSLAR_EL1 register - RW. */
+/** OSLAR_EL1 register - WO. */
 #define ARMV8_AARCH64_SYSREG_OSLAR_EL1              ARMV8_AARCH64_SYSREG_ID_CREATE(2, 0, 1, 0, 4)
-/** OSLSR_EL1 register - RW. */
+/** OSLSR_EL1 register - RO. */
 #define ARMV8_AARCH64_SYSREG_OSLSR_EL1              ARMV8_AARCH64_SYSREG_ID_CREATE(2, 0, 1, 1, 4)
 /** OSDLR_EL1 register - RW. */
@@ -1068 +1068 @@
 /** @} */
 
+
 /** @name ICC_IGRPEN1_EL1 - Interrupt Controller Interrupt Group 1 Enable Register (EL1)
  * @{ */
@@ -1074 +1075 @@
 #define ARMV8_ICC_IGRPEN1_EL1_AARCH64_ENABLE_BIT                0
 /** @} */
-
 
 
@@ -1091 +1091 @@
 
 
+/** @name OSLAR_EL1 - OS Lock Access Register.
+ * @{ */
+/** Bit 0 - The OS Lock status bit. */
+#define ARMV8_OSLAR_EL1_AARCH64_OSLK                            RT_BIT_64(0)
+#define ARMV8_OSLAR_EL1_AARCH64_OSLK_BIT                        0
+/** @} */
+
+
+/** @name OSLSR_EL1 - OS Lock Status Register.
+ * @{ */
+/** Bit 0 - OSLM[0] Bit 0 of OS Lock model implemented. */
+#define ARMV8_OSLSR_EL1_AARCH64_OSLM0                           RT_BIT_64(0)
+#define ARMV8_OSLSR_EL1_AARCH64_OSLM0_BIT                       0
+/** Bit 1 - The OS Lock status bit. */
+#define ARMV8_OSLSR_EL1_AARCH64_OSLK                            RT_BIT_64(1)
+#define ARMV8_OSLSR_EL1_AARCH64_OSLK_BIT                        1
+/** Bit 2 - Not 32-bit access. */
+#define ARMV8_OSLSR_EL1_AARCH64_NTT                             RT_BIT_64(2)
+#define ARMV8_OSLSR_EL1_AARCH64_NTT_BIT                         2
+/** Bit 0 - OSLM[1] Bit 1 of OS Lock model implemented. */
+#define ARMV8_OSLSR_EL1_AARCH64_OSLM1                           RT_BIT_64(3)
+#define ARMV8_OSLSR_EL1_AARCH64_OSLM1_BIT                       3
+/** @} */
+
+
 /** @} */