Changeset 99976 in vbox for trunk/src/VBox/VMM/VMMR3

Timestamp:

May 25, 2023 11:44:00 AM (21 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

157636

Message:

VMM/NEMR3Native-darwin-armv8: Set the vTimer offset to account for suspending VMs, bugref:10387 bugref:10390

File:

• trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin-armv8.cpp (modified) (7 diffs)

trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin-armv8.cpp

@@ -50 +50 @@
 #include <iprt/armv8.h>
 #include <iprt/asm.h>
+#include <iprt/asm-arm.h>
 #include <iprt/ldr.h>
 #include <iprt/mem.h>
@@ -443 +444 @@
 {
     RT_NOREF(pVM);
-    hv_return_t hrc = HV_SUCCESS;
-
-    if (fWhat & (CPUMCTX_EXTRN_GPRS_MASK | CPUMCTX_EXTRN_PC | CPUMCTX_EXTRN_FPCR | CPUMCTX_EXTRN_FPSR))
+
+    hv_return_t hrc = hv_vcpu_get_sys_reg(pVCpu->nem.s.hVCpu, HV_SYS_REG_CNTV_CTL_EL0, &pVCpu->cpum.GstCtx.CntvCtlEl0);
+    if (hrc == HV_SUCCESS)
+        hrc = hv_vcpu_get_sys_reg(pVCpu->nem.s.hVCpu, HV_SYS_REG_CNTV_CVAL_EL0, &pVCpu->cpum.GstCtx.CntvCValEl0);
+
+    if (   hrc == HV_SUCCESS
+        && (fWhat & (CPUMCTX_EXTRN_GPRS_MASK | CPUMCTX_EXTRN_PC | CPUMCTX_EXTRN_FPCR | CPUMCTX_EXTRN_FPSR)))
     {
         for (uint32_t i = 0; i < RT_ELEMENTS(s_aCpumRegs); i++)
@@ -595 +600 @@
     if (hrc == HV_SUCCESS)
     {
-        pVM->nem.s.fCreatedVm = true;
+        pVM->nem.s.fCreatedVm  = true;
+        pVM->nem.s.u64CntFrqHz = ASMReadCntFrqEl0();
         VM_SET_MAIN_EXECUTION_ENGINE(pVM, VM_EXEC_ENGINE_NATIVE_API);
         Log(("NEM: Marked active!\n"));
@@ -632 +638 @@
         return VMSetError(pVM, VERR_NEM_VM_CREATE_FAILED, RT_SRC_POS,
                           "Call to hv_vcpu_create failed on vCPU %u: %#x (%Rrc)", idCpu, hrc, nemR3DarwinHvSts2Rc(hrc));
+
+    /* Set the vTiemr offset so all vCpus start at (nearly) 0. */
+    pVCpu->nem.s.u64VTimerOff = ASMReadTSC();
+
+    hrc = hv_vcpu_set_vtimer_offset(pVCpu->nem.s.hVCpu, pVCpu->nem.s.u64VTimerOff);
+    AssertLogRelMsg(hrc == HV_SUCCESS, ("vCPU#%u: Failed to set vTimer offset to %#RX64 -> hrc = %#x\n",
+                                        pVCpu->idCpu, pVCpu->nem.s.u64VTimerOff, hrc));
 
     if (idCpu == 0)
@@ -1187 +1200 @@
      * everything every time.  This will be optimized later.
      */
+
+    /* Update the vTimer offset after resuming if instructed. */
+    if (pVCpu->nem.s.fVTimerOffUpdate)
+    {
+        /*
+         * Program the new offset, first get the new TSC value with the old vTimer offset and then adjust the
+         * the new offset to let the guest not notice the pause.
+         */
+        uint64_t u64TscNew = ASMReadTSC() - pVCpu->nem.s.u64VTimerOff;
+        Assert(u64TscNew >= pVM->nem.s.u64VTimerValuePaused);
+        pVCpu->nem.s.u64VTimerOff += u64TscNew - pVM->nem.s.u64VTimerValuePaused;
+        hv_return_t hrc = hv_vcpu_set_vtimer_offset(pVCpu->nem.s.hVCpu, pVCpu->nem.s.u64VTimerOff);
+        if (hrc != HV_SUCCESS)
+            return nemR3DarwinHvSts2Rc(hrc);
+
+        pVCpu->nem.s.fVTimerOffUpdate = false;
+    }
 
     /*
@@ -1667 +1697 @@
     STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatQueryCpuTick);
 
-    AssertReleaseFailed();
-    return VERR_NOT_IMPLEMENTED;
+    if (puAux)
+        *puAux = 0;
+    *pcTicks = ASMReadTSC() - pVCpu->nem.s.u64VTimerOff; /* This is the host timer minus the offset. */
+    return VINF_SUCCESS;
 }
 
@@ -1688 +1720 @@
     AssertReturn(VM_IS_NEM_ENABLED(pVM), VERR_NEM_IPE_9);
 
-    //AssertReleaseFailed();
+    pVM->nem.s.u64VTimerValuePaused = uPausedTscValue;
+
+    /*
+     * Set the flag to update the vTimer offset when the vCPU resumes for the first time
+     * (needs to be done on the actual EMT).
+     */
+    for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
+    {
+        PVMCPUCC pVCpuDst = pVM->apCpusR3[idCpu];
+        pVCpuDst->nem.s.fVTimerOffUpdate = true;
+    }
+
     return VINF_SUCCESS;
 }