Changeset 99996 in vbox
- Timestamp:
- May 27, 2023 12:24:43 AM (18 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r99993 r99996 785 785 { 786 786 #ifndef IEM_WITH_CODE_TLB 787 pVCpu->iem.s.cbOpcode = cbInstr; 787 pVCpu->iem.s.cbOpcode = cbInstr; /* Note! SVM and VT-x may set this to zero on exit, rather than the instruction length. */ 788 788 #elif 1 789 789 pVCpu->iem.s.pbInstrBuf = NULL; -
trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp
r99984 r99996 124 124 * @returns Strict VBox status code from PGMChangeMode. 125 125 * @param pVCpu The cross context virtual CPU structure. 126 */ 127 DECLINLINE(VBOXSTRICTRC) iemSvmWorldSwitch(PVMCPUCC pVCpu) 126 * @param cbInstr The length of the current instruction. 127 */ 128 DECLINLINE(VBOXSTRICTRC) iemSvmWorldSwitch(PVMCPUCC pVCpu, uint8_t cbInstr) 128 129 { 129 130 /* … … 143 144 144 145 /* Re-initialize IEM cache/state after the drastic mode switch. */ 145 iemReInitExec(pVCpu );146 iemReInitExec(pVCpu, cbInstr); 146 147 return rc; 147 148 } … … 351 352 * Update PGM, IEM and others of a world-switch. 352 353 */ 353 rcStrict = iemSvmWorldSwitch(pVCpu );354 rcStrict = iemSvmWorldSwitch(pVCpu, 0 /*cbInstr - whatever*/); 354 355 if (rcStrict == VINF_SUCCESS) 355 356 rcStrict = VINF_SVM_VMEXIT; … … 822 823 * Update PGM, IEM and others of a world-switch. 823 824 */ 824 VBOXSTRICTRC rcStrict = iemSvmWorldSwitch(pVCpu );825 VBOXSTRICTRC rcStrict = iemSvmWorldSwitch(pVCpu, cbInstr); 825 826 if (rcStrict == VINF_SUCCESS) 826 827 { /* likely */ } -
trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp
r99765 r99996 1278 1278 * 1279 1279 * @param pVCpu The cross context virtual CPU structure. 1280 */ 1281 static int iemVmxTransition(PVMCPUCC pVCpu) RT_NOEXCEPT 1280 * @param cbInstr The length of the current instruction. 1281 */ 1282 static int iemVmxTransition(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT 1282 1283 { 1283 1284 /* … … 1300 1301 1301 1302 /* Re-initialize IEM cache/state after the drastic mode switch. */ 1302 iemReInitExec(pVCpu );1303 iemReInitExec(pVCpu, cbInstr); 1303 1304 return rc; 1304 1305 } … … 2089 2090 2090 2091 /* Perform the VMX transition (PGM updates). */ 2091 VBOXSTRICTRC rcStrict = iemVmxTransition(pVCpu );2092 VBOXSTRICTRC rcStrict = iemVmxTransition(pVCpu, 0 /*cbInstr - whatever*/); 2092 2093 if (rcStrict == VINF_SUCCESS) 2093 2094 { /* likely */ } … … 7923 7924 7924 7925 /* Perform the VMX transition (PGM updates). */ 7925 VBOXSTRICTRC rcStrict = iemVmxTransition(pVCpu );7926 VBOXSTRICTRC rcStrict = iemVmxTransition(pVCpu, cbInstr); 7926 7927 if (rcStrict == VINF_SUCCESS) 7927 7928 { /* likely */ } -
trunk/src/VBox/VMM/include/IEMInline.h
r99984 r99996 265 265 * 266 266 * @param pVCpu The cross context virtual CPU structure of the calling EMT. 267 */ 268 DECLINLINE(void) iemReInitExec(PVMCPUCC pVCpu) RT_NOEXCEPT 269 { 270 IEMMODE const enmMode = iemCalcCpuMode(pVCpu); 271 uint8_t const uCpl = CPUMGetGuestCPL(pVCpu); 272 273 pVCpu->iem.s.uCpl = uCpl; 274 pVCpu->iem.s.enmCpuMode = enmMode; 275 /** @todo r=bird: The rest of this function should not be necessary! 276 * All these fields below will be re-initialized before we decode more code - as 277 * they are _not_ relevant to 'Exec' (xcpt rcPassUp), only to 'Decoding'. 278 * 279 * Only exception might be rcPassUp, though, I don't know why anyone other than 280 * the execution loops should need to mess around with it! 281 * 282 * I don't think we really need or want this function, better to just set uCpl 283 * and enmCpuMode explicitly in the relevant code. We do this in a number of 284 * other scenarios. Or, rename it to iemReCalcCpuModeAndCpl. 285 */ 286 pVCpu->iem.s.enmDefAddrMode = enmMode; /** @todo check if this is correct... */ 287 pVCpu->iem.s.enmEffAddrMode = enmMode; 288 if (enmMode != IEMMODE_64BIT) 289 { 290 pVCpu->iem.s.enmDefOpSize = enmMode; /** @todo check if this is correct... */ 291 pVCpu->iem.s.enmEffOpSize = enmMode; 292 } 293 else 294 { 295 pVCpu->iem.s.enmDefOpSize = IEMMODE_32BIT; 296 pVCpu->iem.s.enmEffOpSize = enmMode; 297 } 298 pVCpu->iem.s.iEffSeg = X86_SREG_DS; 299 # ifndef IEM_WITH_CODE_TLB 300 /** @todo Shouldn't we be doing this in IEMTlbInvalidateAll()? */ 301 pVCpu->iem.s.offOpcode = 0; 302 pVCpu->iem.s.cbOpcode = 0; 303 # endif 304 pVCpu->iem.s.rcPassUp = VINF_SUCCESS; 267 * @param cbInstr The instruction length (for flushing). 268 */ 269 DECLINLINE(void) iemReInitExec(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT 270 { 271 pVCpu->iem.s.uCpl = CPUMGetGuestCPL(pVCpu); 272 pVCpu->iem.s.enmCpuMode = iemCalcCpuMode(pVCpu); 273 iemOpcodeFlushHeavy(pVCpu, cbInstr); 305 274 } 306 275 # endif
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