VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

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Diff Rev Age Author Log Message
(edit) @13960   16 years vboxsync Moved guest and host CPU contexts into per-VCPU array.
(edit) @13905   16 years vboxsync Moved more data.
(edit) @13898   16 years vboxsync Moved more data to VMCPU.
(edit) @13883   16 years vboxsync Moved more data around.
(edit) @13879   16 years vboxsync SMP updates for VT-x/AMD-V.
(edit) @13873   16 years vboxsync Updates
(edit) @13872   16 years vboxsync Pass the VMCPU id on to all hwaccm functions.
(edit) @13825   16 years vboxsync VMM: %VX64 -> %RX64
(edit) @13824   16 years vboxsync VMM: %VGp -> %RGp
(edit) @13823   16 years vboxsync VMM: %VGv -> %RGv
(edit) @13820   16 years vboxsync VMM: %VG* inspection - an awfaul lot of these, hope I got it all right…
(edit) @13818   16 years vboxsync VMM: %Vrc -> %Rrc, %Vra -> %Rra.
(edit) @13816   16 years vboxsync VMM: VBOX_SUCCESS -> RT_SUCCESS, VBOX_FAILURE -> RT_FAILURE.
(edit) @13541   16 years vboxsync Paranoid assertions
(edit) @13514   16 years vboxsync Enabled power notification callbacks to disable VT-x/AMD-V before …
(edit) @13252   16 years vboxsync Obsolete comment
(edit) @13251   16 years vboxsync Stats for forced TLB flushes by physical page invalidation.
(edit) @13250   16 years vboxsync AMD-V/nested paging: invlpga only invalidates TLB entries for guest …
(edit) @13089   16 years vboxsync EPT updates
(edit) @13025   16 years vboxsync Updates for EPT.
(edit) @12989   16 years vboxsync VMM + VBox/cdefs.h: consolidated all the XYZ*DECLS of the VMM into …
(edit) @12795   16 years vboxsync HWACCM: fixed unsigned/signed compare warning (x86.h), use const and g_.
(edit) @12708   16 years vboxsync Comments added
(edit) @12702   16 years vboxsync #1865: HWACCM - alignment fix+check for 32-bit gcc, doxygen.
(edit) @12692   16 years vboxsync Backed out paging changes (36990/86/83).
(edit) @12681   16 years vboxsync Updates for real and protected mode without paging shadow mode.
(edit) @12674   16 years vboxsync Off by one.
(edit) @12664   16 years vboxsync IO breakpoint length implies an io range.
(edit) @12625   16 years vboxsync IO breakpoints triggered after the fact.
(edit) @12610   16 years vboxsync Extra statistics for IO debug breakpoint checking.
(edit) @12609   16 years vboxsync IO breakpoint support for VT-x and AMD-V.
(edit) @12600   16 years vboxsync Turned dr0..dr7 into an array.
(edit) @12578   16 years vboxsync Enable hardware breakpoint support for VT-x and AMD-V.
(edit) @12554   16 years vboxsync Some debug register statistics added.
(edit) @12549   16 years vboxsync VMM: Implemented a TSC mode where it's tied to execution and halt …
(edit) @12350   16 years vboxsync Cleaned up a bit.
(edit) @12122   16 years vboxsync Fixed regression for AMD-V cpus with erratum 170.
(edit) @12121   16 years vboxsync Committed hardware breakpoint support for VT-x and AMD-V. Untested and …
(edit) @12091   16 years vboxsync Debug register support updates
(edit) @12090   16 years vboxsync Started with hardware debug register support. Fixed out of sync …
(edit) @12077   16 years vboxsync Adjusted assertions.
(edit) @11575   16 years vboxsync Sync back CR2 as it can be changed behind our back in the nested …
(edit) @11568   16 years vboxsync Cleanup
(edit) @11474   16 years vboxsync AMD-V: Corrected current asid handling. (multiple VMs could end up …
(edit) @10886   16 years vboxsync Fixes for syncing back sysenter MSRs.
(edit) @10683   16 years vboxsync Backed out 33399; must save the host context on entry due to long …
(edit) @10682   16 years vboxsync Saving of the host state is done correctly already for VT-x. (not …
(edit) @10667   16 years vboxsync Sync back TPR if necessary.
(edit) @10661   16 years vboxsync Reduce the number of world switches caused by cr8 writes by checking …
(edit) @10647   16 years vboxsync Manual saving of XMM registers. Use new FPU/MMX/XMM state saving for …
(edit) @10609   16 years vboxsync Check for unexpected rescheduling.
(edit) @10607   16 years vboxsync Guest state loading and host state saving *must* be done after TPR …
(edit) @10572   16 years vboxsync Use NIL_RTR0MEMOBJ and ASMMemZeroPage.
(edit) @10566   16 years vboxsync Comment
(edit) @10542   16 years vboxsync Go directly to the halted state when encountering a hlt instruction …
(edit) @10537   16 years vboxsync Updated HWACCMDumpRegs
(edit) @10509   16 years vboxsync And again
(edit) @10508   16 years vboxsync Stupid compiler
(edit) @10506   16 years vboxsync Assertion
(edit) @10505   16 years vboxsync Easier to grep for
(edit) @10504   16 years vboxsync Don't violate my own rules…
(edit) @10503   16 years vboxsync More logging
(edit) @10502   16 years vboxsync Take precautions for being rescheduled to a different cpu due to long …
(edit) @10500   16 years vboxsync Clarified comment
(edit) @10499   16 years vboxsync Another paranoid assertion.
(edit) @10498   16 years vboxsync Added warning
(edit) @10497   16 years vboxsync Another edge case where we need to flush the TLB.
(edit) @10491   16 years vboxsync Logging
(edit) @10489   16 years vboxsync AMD-V: Always flush the TLB the first time a cpu is used.
(edit) @10480   16 years vboxsync Must monitor CR8 writes. (for now)
(edit) @10458   16 years vboxsync TPR & interrupt dispatch updates.
(edit) @10354   16 years vboxsync Extra assertion
(edit) @10353   16 years vboxsync TPR caching for VT-x. Removed the CR8 register from CPUMCTX.
(edit) @10331   16 years vboxsync Removed the assertion completely.
(edit) @10330   16 years vboxsync Wrong assertion. Due to ring 3 far jumps the assertion condition can …
(edit) @10299   16 years vboxsync Force a TLB flush on a mode switch too.
(edit) @10297   16 years vboxsync More assertions.
(edit) @10269   16 years vboxsync Logging updates
(edit) @10206   16 years vboxsync Fixed regression introduced by TPR caching. (never execute code that …
(edit) @10110   16 years vboxsync More TPR updates
(edit) @10108   16 years vboxsync More CR8 updates
(edit) @10097   16 years vboxsync Derive CPL from cs, not ss.
(edit) @10095   16 years vboxsync logging change
(edit) @10066   16 years vboxsync Paranoid assertion
(edit) @10018   16 years vboxsync Wrong assertion + logging updates
(edit) @10015   16 years vboxsync Don't forget to sync back MSR_K8_KERNEL_GS_BASE.
(edit) @10014   16 years vboxsync Filter out the MSR_K6_LME bit or else AMD-V expects amd64 shadow …
(edit) @10011   16 years vboxsync Compile fix
(edit) @10010   16 years vboxsync Updates for 64 bits mode (invlpg - amd-v)
(edit) @9988   16 years vboxsync Unconditionally update the sysenter msrs.
(edit) @9897   16 years vboxsync Updates for executing 64 bits guest code with AMD-V.
(edit) @9720   17 years vboxsync Emulate rdmsr & wrmsr. Note that Intel mentions a (slightly different) …
(edit) @9718   17 years vboxsync Single instruction emulation for rd/wrmsr
(edit) @9708   17 years vboxsync Use RIP everywhere
(edit) @9660   17 years vboxsync Correction
(edit) @9659   17 years vboxsync SELMGetCpuModeFromSelector is a better name.
(edit) @9658   17 years vboxsync Renamed SELMIsSelector32Bit to SELMGetSelectorType.
(edit) @9457   17 years vboxsync Reapplied fixed 31707.
(edit) @9453   17 years vboxsync Backed out 31707
(edit) @9452   17 years vboxsync Preparing for 64 bits vmlaunch/vmresume.
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