bs3-cpu-instr-2-template.c

	Rev	Age	Author	Log Message
(edit)	@76553	6 years	vboxsync	scm --update-copyright-year
(edit)	@72717	6 years	vboxsync	bootsectors/bs3-cpu-instr-2-template: Fix typo in testing WRGSBASE …
(edit)	@70697	7 years	vboxsync	bootsectors/bs3-cpu-instr-2: Fix restoring FS/GS base after testing.
(edit)	@70696	7 years	vboxsync	bootsectors/bs3-cpu-instr-2: Use the FS/GS base MSR to verify initial, …
(edit)	@70667	7 years	vboxsync	bootsectors/bs3-cpu-instr-2: Clear out rbx so rdfsbase, rdgsbase can't …
(edit)	@70666	7 years	vboxsync	bootsector/bs3-cpu-instr-2: FSGSBASE testcase fixes.
(edit)	@70651	7 years	vboxsync	bootsectors/bs3-cpu-instr-2: Added testcase for FSGSBASE instructions.
(edit)	@69111	7 years	vboxsync	(C) year
(edit)	@66342	8 years	vboxsync	IEM: Converted grp 9 to tables and fixed cmpxchg16b/8b prefix handling.
(edit)	@65507	8 years	vboxsync	bs3-cpu-instr-2: Simple cmpxchg16b testcase.
(edit)	@64758	8 years	vboxsync	validationkit: warnings
(edit)	@62455	8 years	vboxsync	bs3-cpu-instr-2: Test 2 operand imul variant.
(edit)	@62412	8 years	vboxsync	bs3kit: div and mul testcase.
(add)	@62410	8 years	vboxsync	bs3kit: Added a instruction test case for imul & idiv.

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