VirtualBox

source: vbox/trunk/include/VBox/pdmdev.h@ 12970

Last change on this file since 12970 was 12970, checked in by vboxsync, 16 years ago

#1865: PDMINS.

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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 *
25 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
26 * Clara, CA 95054 USA or visit http://www.sun.com if you need
27 * additional information or have any questions.
28 */
29
30#ifndef ___VBox_pdmdev_h
31#define ___VBox_pdmdev_h
32
33#include <VBox/pdmqueue.h>
34#include <VBox/pdmcritsect.h>
35#include <VBox/pdmthread.h>
36#include <VBox/pdmifs.h>
37#include <VBox/pdmins.h>
38#include <VBox/iom.h>
39#include <VBox/tm.h>
40#include <VBox/ssm.h>
41#include <VBox/cfgm.h>
42#include <VBox/dbgf.h>
43#include <VBox/mm.h>
44#include <VBox/err.h>
45#include <VBox/pci.h>
46#include <iprt/stdarg.h>
47
48__BEGIN_DECLS
49
50/** @defgroup grp_pdm_device Devices
51 * @ingroup grp_pdm
52 * @{
53 */
54
55/**
56 * Construct a device instance for a VM.
57 *
58 * @returns VBox status.
59 * @param pDevIns The device instance data.
60 * If the registration structure is needed, pDevIns->pDevReg points to it.
61 * @param iInstance Instance number. Use this to figure out which registers and such to use.
62 * The instance number is also found in pDevIns->iInstance, but since it's
63 * likely to be freqently used PDM passes it as parameter.
64 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
65 * of the device instance. It's also found in pDevIns->pCfgHandle, but since it's
66 * primary usage will in this function it's passed as a parameter.
67 */
68typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle);
69/** Pointer to a FNPDMDEVCONSTRUCT() function. */
70typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
71
72/**
73 * Destruct a device instance.
74 *
75 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
76 * resources can be freed correctly.
77 *
78 * @returns VBox status.
79 * @param pDevIns The device instance data.
80 */
81typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
82/** Pointer to a FNPDMDEVDESTRUCT() function. */
83typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
84
85/**
86 * Device relocation callback.
87 *
88 * When this callback is called the device instance data, and if the
89 * device have a GC component, is being relocated, or/and the selectors
90 * have been changed. The device must use the chance to perform the
91 * necessary pointer relocations and data updates.
92 *
93 * Before the GC code is executed the first time, this function will be
94 * called with a 0 delta so GC pointer calculations can be one in one place.
95 *
96 * @param pDevIns Pointer to the device instance.
97 * @param offDelta The relocation delta relative to the old location.
98 *
99 * @remark A relocation CANNOT fail.
100 */
101typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
102/** Pointer to a FNPDMDEVRELOCATE() function. */
103typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
104
105
106/**
107 * Device I/O Control interface.
108 *
109 * This is used by external components, such as the COM interface, to
110 * communicate with devices using a class wide interface or a device
111 * specific interface.
112 *
113 * @returns VBox status code.
114 * @param pDevIns Pointer to the device instance.
115 * @param uFunction Function to perform.
116 * @param pvIn Pointer to input data.
117 * @param cbIn Size of input data.
118 * @param pvOut Pointer to output data.
119 * @param cbOut Size of output data.
120 * @param pcbOut Where to store the actual size of the output data.
121 */
122typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
123 void *pvIn, RTUINT cbIn,
124 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
125/** Pointer to a FNPDMDEVIOCTL() function. */
126typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
127
128/**
129 * Power On notification.
130 *
131 * @returns VBox status.
132 * @param pDevIns The device instance data.
133 */
134typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
135/** Pointer to a FNPDMDEVPOWERON() function. */
136typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
137
138/**
139 * Reset notification.
140 *
141 * @returns VBox status.
142 * @param pDevIns The device instance data.
143 */
144typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
145/** Pointer to a FNPDMDEVRESET() function. */
146typedef FNPDMDEVRESET *PFNPDMDEVRESET;
147
148/**
149 * Suspend notification.
150 *
151 * @returns VBox status.
152 * @param pDevIns The device instance data.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVSUSPEND() function. */
156typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
157
158/**
159 * Resume notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 */
164typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
165/** Pointer to a FNPDMDEVRESUME() function. */
166typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
167
168/**
169 * Power Off notification.
170 *
171 * @param pDevIns The device instance data.
172 */
173typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
174/** Pointer to a FNPDMDEVPOWEROFF() function. */
175typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
176
177/**
178 * Attach command.
179 *
180 * This is called to let the device attach to a driver for a specified LUN
181 * at runtime. This is not called during VM construction, the device
182 * constructor have to attach to all the available drivers.
183 *
184 * This is like plugging in the keyboard or mouse after turning on the PC.
185 *
186 * @returns VBox status code.
187 * @param pDevIns The device instance.
188 * @param iLUN The logical unit which is being detached.
189 */
190typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN);
191/** Pointer to a FNPDMDEVATTACH() function. */
192typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
193
194/**
195 * Detach notification.
196 *
197 * This is called when a driver is detaching itself from a LUN of the device.
198 * The device should adjust it's state to reflect this.
199 *
200 * This is like unplugging the network cable to use it for the laptop or
201 * something while the PC is still running.
202 *
203 * @param pDevIns The device instance.
204 * @param iLUN The logical unit which is being detached.
205 */
206typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN);
207/** Pointer to a FNPDMDEVDETACH() function. */
208typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
209
210/**
211 * Query the base interface of a logical unit.
212 *
213 * @returns VBOX status code.
214 * @param pDevIns The device instance.
215 * @param iLUN The logicial unit to query.
216 * @param ppBase Where to store the pointer to the base interface of the LUN.
217 */
218typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
219/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
220typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
221
222/**
223 * Init complete notification.
224 * This can be done to do communication with other devices and other
225 * initialization which requires everything to be in place.
226 *
227 * @returns VBOX status code.
228 * @param pDevIns The device instance.
229 */
230typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
231/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
232typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
233
234
235
236/** PDM Device Registration Structure,
237 * This structure is used when registering a device from
238 * VBoxInitDevices() in HC Ring-3. PDM will continue use till
239 * the VM is terminated.
240 */
241typedef struct PDMDEVREG
242{
243 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
244 uint32_t u32Version;
245 /** Device name. */
246 char szDeviceName[32];
247 /** Name of guest context module (no path).
248 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
249 char szGCMod[32];
250 /** Name of guest context module (no path).
251 * Only evalutated if PDM_DEVREG_FLAGS_GC is set. */
252 char szR0Mod[32];
253 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
254 * remain unchanged from registration till VM destruction. */
255 const char *pszDescription;
256
257 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
258 RTUINT fFlags;
259 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
260 RTUINT fClass;
261 /** Maximum number of instances (per VM). */
262 RTUINT cMaxInstances;
263 /** Size of the instance data. */
264 RTUINT cbInstance;
265
266 /** Construct instance - required. */
267 PFNPDMDEVCONSTRUCT pfnConstruct;
268 /** Destruct instance - optional. */
269 PFNPDMDEVDESTRUCT pfnDestruct;
270 /** Relocation command - optional. */
271 PFNPDMDEVRELOCATE pfnRelocate;
272 /** I/O Control interface - optional. */
273 PFNPDMDEVIOCTL pfnIOCtl;
274 /** Power on notification - optional. */
275 PFNPDMDEVPOWERON pfnPowerOn;
276 /** Reset notification - optional. */
277 PFNPDMDEVRESET pfnReset;
278 /** Suspend notification - optional. */
279 PFNPDMDEVSUSPEND pfnSuspend;
280 /** Resume notification - optional. */
281 PFNPDMDEVRESUME pfnResume;
282 /** Attach command - optional. */
283 PFNPDMDEVATTACH pfnAttach;
284 /** Detach notification - optional. */
285 PFNPDMDEVDETACH pfnDetach;
286 /** Query a LUN base interface - optional. */
287 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
288 /** Init complete notification - optional. */
289 PFNPDMDEVINITCOMPLETE pfnInitComplete;
290 /** Power off notification - optional. */
291 PFNPDMDEVPOWEROFF pfnPowerOff;
292} PDMDEVREG;
293/** Pointer to a PDM Device Structure. */
294typedef PDMDEVREG *PPDMDEVREG;
295/** Const pointer to a PDM Device Structure. */
296typedef PDMDEVREG const *PCPDMDEVREG;
297
298/** Current DEVREG version number. */
299#define PDM_DEVREG_VERSION 0xc0010000
300
301/** PDM Device Flags.
302 * @{ */
303/** This flag is used to indicate that the device has a GC component. */
304#define PDM_DEVREG_FLAGS_GC 0x00000001
305/** This flag is used to indicate that the device has a R0 component. */
306#define PDM_DEVREG_FLAGS_R0 0x00010000
307
308/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
309 * The bit count for the current host. */
310#if HC_ARCH_BITS == 32
311# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000002
312#elif HC_ARCH_BITS == 64
313# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000004
314#else
315# error Unsupported HC_ARCH_BITS value.
316#endif
317/** The host bit count mask. */
318#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000006
319
320/** The device support only 32-bit guests. */
321#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000008
322/** The device support only 64-bit guests. */
323#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000010
324/** The device support both 32-bit & 64-bit guests. */
325#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000018
326/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
327 * The guest bit count for the current compilation. */
328#if GC_ARCH_BITS == 32
329# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
330#elif GC_ARCH_BITS == 64
331# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
332#else
333# error Unsupported GC_ARCH_BITS value.
334#endif
335/** The guest bit count mask. */
336#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000018
337
338/** Indicates that the devices support PAE36 on a 32-bit guest. */
339#define PDM_DEVREG_FLAGS_PAE36 0x00000020
340/** @} */
341
342
343/** PDM Device Classes.
344 * The order is important, lower bit earlier instantiation.
345 * @{ */
346/** Architecture device. */
347#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
348/** Architecture BIOS device. */
349#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
350/** PCI bus brigde. */
351#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
352/** ISA bus brigde. */
353#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
354/** Input device (mouse, keyboard, joystick,..). */
355#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
356/** Interrupt controller (PIC). */
357#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
358/** Interval controoler (PIT). */
359#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
360/** RTC/CMOS. */
361#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
362/** DMA controller. */
363#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
364/** VMM Device. */
365#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
366/** Graphics device, like VGA. */
367#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
368/** Storage controller device. */
369#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
370/** Network interface controller. */
371#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
372/** Audio. */
373#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
374/** USB HIC. */
375#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
376/** ACPI. */
377#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
378/** Serial controller device. */
379#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
380/** Parallel controller device */
381#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
382/** Misc devices (always last). */
383#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
384/** @} */
385
386
387/** @name IRQ Level for use with the *SetIrq APIs.
388 * @{
389 */
390/** Assert the IRQ (can assume value 1). */
391#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
392/** Deassert the IRQ (can assume value 0). */
393#define PDM_IRQ_LEVEL_LOW 0
394/** flip-flop - assert and then deassert it again immediately. */
395#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
396/** @} */
397
398
399/**
400 * PCI Bus registration structure.
401 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
402 */
403typedef struct PDMPCIBUSREG
404{
405 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
406 uint32_t u32Version;
407
408 /**
409 * Registers the device with the default PCI bus.
410 *
411 * @returns VBox status code.
412 * @param pDevIns Device instance of the PCI Bus.
413 * @param pPciDev The PCI device structure.
414 * Any PCI enabled device must keep this in it's instance data!
415 * Fill in the PCI data config before registration, please.
416 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
417 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
418 * If negative, the pci bus device will assign one.
419 */
420 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
421
422 /**
423 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
424 *
425 * @returns VBox status code.
426 * @param pDevIns Device instance of the PCI Bus.
427 * @param pPciDev The PCI device structure.
428 * @param iRegion The region number.
429 * @param cbRegion Size of the region.
430 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
431 * @param pfnCallback Callback for doing the mapping.
432 */
433 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
434
435 /**
436 * Register PCI configuration space read/write callbacks.
437 *
438 * @param pDevIns Device instance of the PCI Bus.
439 * @param pPciDev The PCI device structure.
440 * @param pfnRead Pointer to the user defined PCI config read function.
441 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
442 * PCI config read function. This way, user can decide when (and if)
443 * to call default PCI config read function. Can be NULL.
444 * @param pfnWrite Pointer to the user defined PCI config write function.
445 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
446 * PCI config write function. This way, user can decide when (and if)
447 * to call default PCI config write function. Can be NULL.
448 * @thread EMT
449 */
450 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
451 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
452
453 /**
454 * Set the IRQ for a PCI device.
455 *
456 * @param pDevIns Device instance of the PCI Bus.
457 * @param pPciDev The PCI device structure.
458 * @param iIrq IRQ number to set.
459 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
460 */
461 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
462
463 /**
464 * Saves a state of the PCI device.
465 *
466 * @returns VBox status code.
467 * @param pDevIns Device instance of the PCI Bus.
468 * @param pPciDev Pointer to PCI device.
469 * @param pSSMHandle The handle to save the state to.
470 */
471 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
472
473 /**
474 * Loads a saved PCI device state.
475 *
476 * @returns VBox status code.
477 * @param pDevIns Device instance of the PCI Bus.
478 * @param pPciDev Pointer to PCI device.
479 * @param pSSMHandle The handle to the saved state.
480 */
481 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
482
483 /**
484 * Called to perform the job of the bios.
485 * This is only called for the first PCI Bus - it is expected to
486 * service all the PCI buses.
487 *
488 * @returns VBox status.
489 * @param pDevIns Device instance of the first bus.
490 */
491 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
492
493 /** The name of the SetIrq RC entry point. */
494 const char *pszSetIrqRC;
495
496 /** The name of the SetIrq R0 entry point. */
497 const char *pszSetIrqR0;
498
499} PDMPCIBUSREG;
500/** Pointer to a PCI bus registration structure. */
501typedef PDMPCIBUSREG *PPDMPCIBUSREG;
502
503/** Current PDMPCIBUSREG version number. */
504#define PDM_PCIBUSREG_VERSION 0xd0020000
505
506/**
507 * PCI Bus RC helpers.
508 */
509typedef struct PDMPCIHLPRC
510{
511 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
512 uint32_t u32Version;
513
514 /**
515 * Set an ISA IRQ.
516 *
517 * @param pDevIns PCI device instance.
518 * @param iIrq IRQ number to set.
519 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
520 * @thread EMT only.
521 */
522 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
523
524 /**
525 * Set an I/O-APIC IRQ.
526 *
527 * @param pDevIns PCI device instance.
528 * @param iIrq IRQ number to set.
529 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
530 * @thread EMT only.
531 */
532 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
533
534 /**
535 * Acquires the PDM lock.
536 *
537 * @returns VINF_SUCCESS on success.
538 * @returns rc if we failed to acquire the lock.
539 * @param pDevIns The PCI device instance.
540 * @param rc What to return if we fail to acquire the lock.
541 */
542 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
543
544 /**
545 * Releases the PDM lock.
546 *
547 * @param pDevIns The PCI device instance.
548 */
549 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
550
551 /** Just a safety precaution. */
552 uint32_t u32TheEnd;
553} PDMPCIHLPRC;
554/** Pointer to PCI helpers. */
555typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
556/** Pointer to const PCI helpers. */
557typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
558
559/** Current PDMPCIHLPR3 version number. */
560#define PDM_PCIHLPRC_VERSION 0xe1010000
561
562
563/**
564 * PCI Bus R0 helpers.
565 */
566typedef struct PDMPCIHLPR0
567{
568 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
569 uint32_t u32Version;
570
571 /**
572 * Set an ISA IRQ.
573 *
574 * @param pDevIns PCI device instance.
575 * @param iIrq IRQ number to set.
576 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
577 * @thread EMT only.
578 */
579 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
580
581 /**
582 * Set an I/O-APIC IRQ.
583 *
584 * @param pDevIns PCI device instance.
585 * @param iIrq IRQ number to set.
586 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
587 * @thread EMT only.
588 */
589 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
590
591 /**
592 * Acquires the PDM lock.
593 *
594 * @returns VINF_SUCCESS on success.
595 * @returns rc if we failed to acquire the lock.
596 * @param pDevIns The PCI device instance.
597 * @param rc What to return if we fail to acquire the lock.
598 */
599 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
600
601 /**
602 * Releases the PDM lock.
603 *
604 * @param pDevIns The PCI device instance.
605 */
606 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
607
608 /** Just a safety precaution. */
609 uint32_t u32TheEnd;
610} PDMPCIHLPR0;
611/** Pointer to PCI helpers. */
612typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
613/** Pointer to const PCI helpers. */
614typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
615
616/** Current PDMPCIHLPR0 version number. */
617#define PDM_PCIHLPR0_VERSION 0xe1010000
618
619/**
620 * PCI device helpers.
621 */
622typedef struct PDMPCIHLPR3
623{
624 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
625 uint32_t u32Version;
626
627 /**
628 * Set an ISA IRQ.
629 *
630 * @param pDevIns The PCI device instance.
631 * @param iIrq IRQ number to set.
632 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
633 * @thread EMT only.
634 */
635 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
636
637 /**
638 * Set an I/O-APIC IRQ.
639 *
640 * @param pDevIns The PCI device instance.
641 * @param iIrq IRQ number to set.
642 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
643 * @thread EMT only.
644 */
645 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
646
647 /**
648 * Checks if the given address is an MMIO2 base address or not.
649 *
650 * @returns true/false accordingly.
651 * @param pDevIns The PCI device instance.
652 * @param pOwner The owner of the memory, optional.
653 * @param GCPhys The address to check.
654 */
655 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
656
657 /**
658 * Gets the address of the RC PCI Bus helpers.
659 *
660 * This should be called at both construction and relocation time
661 * to obtain the correct address of the RC helpers.
662 *
663 * @returns RC pointer to the PCI Bus helpers.
664 * @param pDevIns Device instance of the PCI Bus.
665 * @thread EMT only.
666 */
667 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
668
669 /**
670 * Gets the address of the R0 PCI Bus helpers.
671 *
672 * This should be called at both construction and relocation time
673 * to obtain the correct address of the R0 helpers.
674 *
675 * @returns R0 pointer to the PCI Bus helpers.
676 * @param pDevIns Device instance of the PCI Bus.
677 * @thread EMT only.
678 */
679 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
680
681 /**
682 * Acquires the PDM lock.
683 *
684 * @returns VINF_SUCCESS on success.
685 * @returns Fatal error on failure.
686 * @param pDevIns The PCI device instance.
687 * @param rc Dummy for making the interface identical to the RC and R0 versions.
688 */
689 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
690
691 /**
692 * Releases the PDM lock.
693 *
694 * @param pDevIns The PCI device instance.
695 */
696 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
697
698 /** Just a safety precaution. */
699 uint32_t u32TheEnd;
700} PDMPCIHLPR3;
701/** Pointer to PCI helpers. */
702typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
703/** Pointer to const PCI helpers. */
704typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
705
706/** Current PDMPCIHLPR3 version number. */
707#define PDM_PCIHLPR3_VERSION 0xf1020000
708
709
710/**
711 * Programmable Interrupt Controller registration structure.
712 */
713typedef struct PDMPICREG
714{
715 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
716 uint32_t u32Version;
717
718 /**
719 * Set the an IRQ.
720 *
721 * @param pDevIns Device instance of the PIC.
722 * @param iIrq IRQ number to set.
723 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
724 */
725 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
726
727 /**
728 * Get a pending interrupt.
729 *
730 * @returns Pending interrupt number.
731 * @param pDevIns Device instance of the PIC.
732 */
733 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
734
735 /** The name of the RC SetIrq entry point. */
736 const char *pszSetIrqRC;
737 /** The name of the RC GetInterrupt entry point. */
738 const char *pszGetInterruptRC;
739
740 /** The name of the R0 SetIrq entry point. */
741 const char *pszSetIrqR0;
742 /** The name of the R0 GetInterrupt entry point. */
743 const char *pszGetInterruptR0;
744} PDMPICREG;
745/** Pointer to a PIC registration structure. */
746typedef PDMPICREG *PPDMPICREG;
747
748/** Current PDMPICREG version number. */
749#define PDM_PICREG_VERSION 0xe0020000
750
751/**
752 * PIC RC helpers.
753 */
754typedef struct PDMPICHLPRC
755{
756 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
757 uint32_t u32Version;
758
759 /**
760 * Set the interrupt force action flag.
761 *
762 * @param pDevIns Device instance of the PIC.
763 */
764 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
765
766 /**
767 * Clear the interrupt force action flag.
768 *
769 * @param pDevIns Device instance of the PIC.
770 */
771 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
772
773 /**
774 * Acquires the PDM lock.
775 *
776 * @returns VINF_SUCCESS on success.
777 * @returns rc if we failed to acquire the lock.
778 * @param pDevIns The PIC device instance.
779 * @param rc What to return if we fail to acquire the lock.
780 */
781 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
782
783 /**
784 * Releases the PDM lock.
785 *
786 * @param pDevIns The PIC device instance.
787 */
788 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
789
790 /** Just a safety precaution. */
791 uint32_t u32TheEnd;
792} PDMPICHLPRC;
793
794/** Pointer to PIC RC helpers. */
795typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
796/** Pointer to const PIC RC helpers. */
797typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
798
799/** Current PDMPICHLPRC version number. */
800#define PDM_PICHLPRC_VERSION 0xfc010000
801
802
803/**
804 * PIC R0 helpers.
805 */
806typedef struct PDMPICHLPR0
807{
808 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
809 uint32_t u32Version;
810
811 /**
812 * Set the interrupt force action flag.
813 *
814 * @param pDevIns Device instance of the PIC.
815 */
816 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
817
818 /**
819 * Clear the interrupt force action flag.
820 *
821 * @param pDevIns Device instance of the PIC.
822 */
823 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
824
825 /**
826 * Acquires the PDM lock.
827 *
828 * @returns VINF_SUCCESS on success.
829 * @returns rc if we failed to acquire the lock.
830 * @param pDevIns The PIC device instance.
831 * @param rc What to return if we fail to acquire the lock.
832 */
833 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
834
835 /**
836 * Releases the PDM lock.
837 *
838 * @param pDevIns The PCI device instance.
839 */
840 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
841
842 /** Just a safety precaution. */
843 uint32_t u32TheEnd;
844} PDMPICHLPR0;
845
846/** Pointer to PIC R0 helpers. */
847typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
848/** Pointer to const PIC R0 helpers. */
849typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
850
851/** Current PDMPICHLPR0 version number. */
852#define PDM_PICHLPR0_VERSION 0xfc010000
853
854/**
855 * PIC R3 helpers.
856 */
857typedef struct PDMPICHLPR3
858{
859 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
860 uint32_t u32Version;
861
862 /**
863 * Set the interrupt force action flag.
864 *
865 * @param pDevIns Device instance of the PIC.
866 */
867 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
868
869 /**
870 * Clear the interrupt force action flag.
871 *
872 * @param pDevIns Device instance of the PIC.
873 */
874 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
875
876 /**
877 * Acquires the PDM lock.
878 *
879 * @returns VINF_SUCCESS on success.
880 * @returns Fatal error on failure.
881 * @param pDevIns The PIC device instance.
882 * @param rc Dummy for making the interface identical to the RC and R0 versions.
883 */
884 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
885
886 /**
887 * Releases the PDM lock.
888 *
889 * @param pDevIns The PIC device instance.
890 */
891 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
892
893 /**
894 * Gets the address of the RC PIC helpers.
895 *
896 * This should be called at both construction and relocation time
897 * to obtain the correct address of the RC helpers.
898 *
899 * @returns RC pointer to the PIC helpers.
900 * @param pDevIns Device instance of the PIC.
901 */
902 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
903
904 /**
905 * Gets the address of the R0 PIC helpers.
906 *
907 * This should be called at both construction and relocation time
908 * to obtain the correct address of the R0 helpers.
909 *
910 * @returns R0 pointer to the PIC helpers.
911 * @param pDevIns Device instance of the PIC.
912 */
913 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
914
915 /** Just a safety precaution. */
916 uint32_t u32TheEnd;
917} PDMPICHLPR3;
918
919/** Pointer to PIC R3 helpers. */
920typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
921/** Pointer to const PIC R3 helpers. */
922typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
923
924/** Current PDMPICHLPR3 version number. */
925#define PDM_PICHLPR3_VERSION 0xf0010000
926
927
928
929/**
930 * Advanced Programmable Interrupt Controller registration structure.
931 */
932typedef struct PDMAPICREG
933{
934 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
935 uint32_t u32Version;
936
937 /**
938 * Get a pending interrupt.
939 *
940 * @returns Pending interrupt number.
941 * @param pDevIns Device instance of the APIC.
942 */
943 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
944
945 /**
946 * Check if the APIC has a pending interrupt/if a TPR change would active one
947 *
948 * @returns Pending interrupt yes/no
949 * @param pDevIns Device instance of the APIC.
950 */
951 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
952
953 /**
954 * Set the APIC base.
955 *
956 * @param pDevIns Device instance of the APIC.
957 * @param u64Base The new base.
958 */
959 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
960
961 /**
962 * Get the APIC base.
963 *
964 * @returns Current base.
965 * @param pDevIns Device instance of the APIC.
966 */
967 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
968
969 /**
970 * Set the TPR (task priority register).
971 *
972 * @param pDevIns Device instance of the APIC.
973 * @param u8TPR The new TPR.
974 */
975 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
976
977 /**
978 * Get the TPR (task priority register).
979 *
980 * @returns The current TPR.
981 * @param pDevIns Device instance of the APIC.
982 * @param pfPending Pending interrupt state (out).
983 */
984 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
985
986 /**
987 * Private interface between the IOAPIC and APIC.
988 *
989 * This is a low-level, APIC/IOAPIC implementation specific interface
990 * which is registered with PDM only because it makes life so much
991 * simpler right now (GC bits). This is a bad bad hack! The correct
992 * way of doing this would involve some way of querying GC interfaces
993 * and relocating them. Perhaps doing some kind of device init in GC...
994 *
995 * @returns The current TPR.
996 * @param pDevIns Device instance of the APIC.
997 * @param u8Dest See APIC implementation.
998 * @param u8DestMode See APIC implementation.
999 * @param u8DeliveryMode See APIC implementation.
1000 * @param iVector See APIC implementation.
1001 * @param u8Polarity See APIC implementation.
1002 * @param u8TriggerMode See APIC implementation.
1003 */
1004 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1005 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1006
1007 /** The name of the RC GetInterrupt entry point. */
1008 const char *pszGetInterruptRC;
1009 /** The name of the RC HasPendingIrq entry point. */
1010 const char *pszHasPendingIrqRC;
1011 /** The name of the RC SetBase entry point. */
1012 const char *pszSetBaseRC;
1013 /** The name of the RC GetBase entry point. */
1014 const char *pszGetBaseRC;
1015 /** The name of the RC SetTPR entry point. */
1016 const char *pszSetTPRRC;
1017 /** The name of the RC GetTPR entry point. */
1018 const char *pszGetTPRRC;
1019 /** The name of the RC BusDeliver entry point. */
1020 const char *pszBusDeliverRC;
1021
1022 /** The name of the R0 GetInterrupt entry point. */
1023 const char *pszGetInterruptR0;
1024 /** The name of the R0 HasPendingIrq entry point. */
1025 const char *pszHasPendingIrqR0;
1026 /** The name of the R0 SetBase entry point. */
1027 const char *pszSetBaseR0;
1028 /** The name of the R0 GetBase entry point. */
1029 const char *pszGetBaseR0;
1030 /** The name of the R0 SetTPR entry point. */
1031 const char *pszSetTPRR0;
1032 /** The name of the R0 GetTPR entry point. */
1033 const char *pszGetTPRR0;
1034 /** The name of the R0 BusDeliver entry point. */
1035 const char *pszBusDeliverR0;
1036
1037} PDMAPICREG;
1038/** Pointer to an APIC registration structure. */
1039typedef PDMAPICREG *PPDMAPICREG;
1040
1041/** Current PDMAPICREG version number. */
1042#define PDM_APICREG_VERSION 0x70010000
1043
1044
1045/**
1046 * APIC RC helpers.
1047 */
1048typedef struct PDMAPICHLPRC
1049{
1050 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1051 uint32_t u32Version;
1052
1053 /**
1054 * Set the interrupt force action flag.
1055 *
1056 * @param pDevIns Device instance of the APIC.
1057 * @param idCpu Virtual CPU to set flag upon.
1058 */
1059 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1060
1061 /**
1062 * Clear the interrupt force action flag.
1063 *
1064 * @param pDevIns Device instance of the APIC.
1065 * @param idCpu Virtual CPU to clear flag upon.
1066 */
1067 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1068
1069 /**
1070 * Sets or clears the APIC bit in the CPUID feature masks.
1071 *
1072 * @param pDevIns Device instance of the APIC.
1073 * @param fEnabled If true the bit is set, else cleared.
1074 */
1075 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1076
1077 /**
1078 * Acquires the PDM lock.
1079 *
1080 * @returns VINF_SUCCESS on success.
1081 * @returns rc if we failed to acquire the lock.
1082 * @param pDevIns The APIC device instance.
1083 * @param rc What to return if we fail to acquire the lock.
1084 */
1085 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1086
1087 /**
1088 * Releases the PDM lock.
1089 *
1090 * @param pDevIns The APIC device instance.
1091 */
1092 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1093
1094 /**
1095 * Get the virtual CPU id corresponding to the current EMT.
1096 *
1097 * @param pDevIns The APIC device instance.
1098 */
1099 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1100
1101 /** Just a safety precaution. */
1102 uint32_t u32TheEnd;
1103} PDMAPICHLPRC;
1104/** Pointer to APIC GC helpers. */
1105typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1106/** Pointer to const APIC helpers. */
1107typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1108
1109/** Current PDMAPICHLPRC version number. */
1110#define PDM_APICHLPRC_VERSION 0x60010000
1111
1112
1113/**
1114 * APIC R0 helpers.
1115 */
1116typedef struct PDMAPICHLPR0
1117{
1118 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1119 uint32_t u32Version;
1120
1121 /**
1122 * Set the interrupt force action flag.
1123 *
1124 * @param pDevIns Device instance of the APIC.
1125 * @param idCpu Virtual CPU to set flag upon.
1126 */
1127 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1128
1129 /**
1130 * Clear the interrupt force action flag.
1131 *
1132 * @param pDevIns Device instance of the APIC.
1133 * @param idCpu Virtual CPU to clear flag upon.
1134 */
1135 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1136
1137 /**
1138 * Sets or clears the APIC bit in the CPUID feature masks.
1139 *
1140 * @param pDevIns Device instance of the APIC.
1141 * @param fEnabled If true the bit is set, else cleared.
1142 */
1143 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1144
1145 /**
1146 * Acquires the PDM lock.
1147 *
1148 * @returns VINF_SUCCESS on success.
1149 * @returns rc if we failed to acquire the lock.
1150 * @param pDevIns The APIC device instance.
1151 * @param rc What to return if we fail to acquire the lock.
1152 */
1153 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1154
1155 /**
1156 * Releases the PDM lock.
1157 *
1158 * @param pDevIns The APIC device instance.
1159 */
1160 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1161
1162 /**
1163 * Get the virtual CPU id corresponding to the current EMT.
1164 *
1165 * @param pDevIns The APIC device instance.
1166 */
1167 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1168
1169 /** Just a safety precaution. */
1170 uint32_t u32TheEnd;
1171} PDMAPICHLPR0;
1172/** Pointer to APIC GC helpers. */
1173typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1174/** Pointer to const APIC helpers. */
1175typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1176
1177/** Current PDMAPICHLPR0 version number. */
1178#define PDM_APICHLPR0_VERSION 0x60010000
1179
1180/**
1181 * APIC R3 helpers.
1182 */
1183typedef struct PDMAPICHLPR3
1184{
1185 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1186 uint32_t u32Version;
1187
1188 /**
1189 * Set the interrupt force action flag.
1190 *
1191 * @param pDevIns Device instance of the APIC.
1192 * @param idCpu Virtual CPU to set flag upon.
1193 */
1194 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1195
1196 /**
1197 * Clear the interrupt force action flag.
1198 *
1199 * @param pDevIns Device instance of the APIC.
1200 * @param idCpu Virtual CPU to clear flag upon.
1201 */
1202 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1203
1204 /**
1205 * Sets or clears the APIC bit in the CPUID feature masks.
1206 *
1207 * @param pDevIns Device instance of the APIC.
1208 * @param fEnabled If true the bit is set, else cleared.
1209 */
1210 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, bool fEnabled));
1211
1212 /**
1213 * Acquires the PDM lock.
1214 *
1215 * @returns VINF_SUCCESS on success.
1216 * @returns Fatal error on failure.
1217 * @param pDevIns The APIC device instance.
1218 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1219 */
1220 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1221
1222 /**
1223 * Releases the PDM lock.
1224 *
1225 * @param pDevIns The APIC device instance.
1226 */
1227 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1228
1229 /**
1230 * Get the virtual CPU id corresponding to the current EMT.
1231 *
1232 * @param pDevIns The APIC device instance.
1233 */
1234 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1235
1236 /**
1237 * Gets the address of the RC APIC helpers.
1238 *
1239 * This should be called at both construction and relocation time
1240 * to obtain the correct address of the RC helpers.
1241 *
1242 * @returns GC pointer to the APIC helpers.
1243 * @param pDevIns Device instance of the APIC.
1244 */
1245 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1246
1247 /**
1248 * Gets the address of the R0 APIC helpers.
1249 *
1250 * This should be called at both construction and relocation time
1251 * to obtain the correct address of the R0 helpers.
1252 *
1253 * @returns R0 pointer to the APIC helpers.
1254 * @param pDevIns Device instance of the APIC.
1255 */
1256 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1257
1258 /** Just a safety precaution. */
1259 uint32_t u32TheEnd;
1260} PDMAPICHLPR3;
1261/** Pointer to APIC helpers. */
1262typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1263/** Pointer to const APIC helpers. */
1264typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1265
1266/** Current PDMAPICHLP version number. */
1267#define PDM_APICHLPR3_VERSION 0xfd010000
1268
1269
1270/**
1271 * I/O APIC registration structure.
1272 */
1273typedef struct PDMIOAPICREG
1274{
1275 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1276 uint32_t u32Version;
1277
1278 /**
1279 * Set the an IRQ.
1280 *
1281 * @param pDevIns Device instance of the I/O APIC.
1282 * @param iIrq IRQ number to set.
1283 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1284 */
1285 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1286
1287 /** The name of the GC SetIrq entry point. */
1288 const char *pszSetIrqRC;
1289
1290 /** The name of the R0 SetIrq entry point. */
1291 const char *pszSetIrqR0;
1292} PDMIOAPICREG;
1293/** Pointer to an APIC registration structure. */
1294typedef PDMIOAPICREG *PPDMIOAPICREG;
1295
1296/** Current PDMAPICREG version number. */
1297#define PDM_IOAPICREG_VERSION 0x50010000
1298
1299
1300/**
1301 * IOAPIC RC helpers.
1302 */
1303typedef struct PDMIOAPICHLPRC
1304{
1305 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1306 uint32_t u32Version;
1307
1308 /**
1309 * Private interface between the IOAPIC and APIC.
1310 *
1311 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1312 *
1313 * @returns The current TPR.
1314 * @param pDevIns Device instance of the IOAPIC.
1315 * @param u8Dest See APIC implementation.
1316 * @param u8DestMode See APIC implementation.
1317 * @param u8DeliveryMode See APIC implementation.
1318 * @param iVector See APIC implementation.
1319 * @param u8Polarity See APIC implementation.
1320 * @param u8TriggerMode See APIC implementation.
1321 */
1322 DECLRCCALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1323 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1324
1325 /**
1326 * Acquires the PDM lock.
1327 *
1328 * @returns VINF_SUCCESS on success.
1329 * @returns rc if we failed to acquire the lock.
1330 * @param pDevIns The IOAPIC device instance.
1331 * @param rc What to return if we fail to acquire the lock.
1332 */
1333 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1334
1335 /**
1336 * Releases the PDM lock.
1337 *
1338 * @param pDevIns The IOAPIC device instance.
1339 */
1340 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1341
1342 /** Just a safety precaution. */
1343 uint32_t u32TheEnd;
1344} PDMIOAPICHLPRC;
1345/** Pointer to IOAPIC RC helpers. */
1346typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1347/** Pointer to const IOAPIC helpers. */
1348typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1349
1350/** Current PDMIOAPICHLPRC version number. */
1351#define PDM_IOAPICHLPRC_VERSION 0xfe010000
1352
1353
1354/**
1355 * IOAPIC R0 helpers.
1356 */
1357typedef struct PDMIOAPICHLPR0
1358{
1359 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1360 uint32_t u32Version;
1361
1362 /**
1363 * Private interface between the IOAPIC and APIC.
1364 *
1365 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1366 *
1367 * @returns The current TPR.
1368 * @param pDevIns Device instance of the IOAPIC.
1369 * @param u8Dest See APIC implementation.
1370 * @param u8DestMode See APIC implementation.
1371 * @param u8DeliveryMode See APIC implementation.
1372 * @param iVector See APIC implementation.
1373 * @param u8Polarity See APIC implementation.
1374 * @param u8TriggerMode See APIC implementation.
1375 */
1376 DECLR0CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1377 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1378
1379 /**
1380 * Acquires the PDM lock.
1381 *
1382 * @returns VINF_SUCCESS on success.
1383 * @returns rc if we failed to acquire the lock.
1384 * @param pDevIns The IOAPIC device instance.
1385 * @param rc What to return if we fail to acquire the lock.
1386 */
1387 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1388
1389 /**
1390 * Releases the PDM lock.
1391 *
1392 * @param pDevIns The IOAPIC device instance.
1393 */
1394 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1395
1396 /** Just a safety precaution. */
1397 uint32_t u32TheEnd;
1398} PDMIOAPICHLPR0;
1399/** Pointer to IOAPIC R0 helpers. */
1400typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1401/** Pointer to const IOAPIC helpers. */
1402typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1403
1404/** Current PDMIOAPICHLPR0 version number. */
1405#define PDM_IOAPICHLPR0_VERSION 0xfe010000
1406
1407/**
1408 * IOAPIC R3 helpers.
1409 */
1410typedef struct PDMIOAPICHLPR3
1411{
1412 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1413 uint32_t u32Version;
1414
1415 /**
1416 * Private interface between the IOAPIC and APIC.
1417 *
1418 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1419 *
1420 * @returns The current TPR.
1421 * @param pDevIns Device instance of the IOAPIC.
1422 * @param u8Dest See APIC implementation.
1423 * @param u8DestMode See APIC implementation.
1424 * @param u8DeliveryMode See APIC implementation.
1425 * @param iVector See APIC implementation.
1426 * @param u8Polarity See APIC implementation.
1427 * @param u8TriggerMode See APIC implementation.
1428 */
1429 DECLR3CALLBACKMEMBER(void, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1430 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1431
1432 /**
1433 * Acquires the PDM lock.
1434 *
1435 * @returns VINF_SUCCESS on success.
1436 * @returns Fatal error on failure.
1437 * @param pDevIns The IOAPIC device instance.
1438 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1439 */
1440 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1441
1442 /**
1443 * Releases the PDM lock.
1444 *
1445 * @param pDevIns The IOAPIC device instance.
1446 */
1447 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1448
1449 /**
1450 * Gets the address of the RC IOAPIC helpers.
1451 *
1452 * This should be called at both construction and relocation time
1453 * to obtain the correct address of the RC helpers.
1454 *
1455 * @returns RC pointer to the IOAPIC helpers.
1456 * @param pDevIns Device instance of the IOAPIC.
1457 */
1458 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1459
1460 /**
1461 * Gets the address of the R0 IOAPIC helpers.
1462 *
1463 * This should be called at both construction and relocation time
1464 * to obtain the correct address of the R0 helpers.
1465 *
1466 * @returns R0 pointer to the IOAPIC helpers.
1467 * @param pDevIns Device instance of the IOAPIC.
1468 */
1469 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1470
1471 /** Just a safety precaution. */
1472 uint32_t u32TheEnd;
1473} PDMIOAPICHLPR3;
1474/** Pointer to IOAPIC R3 helpers. */
1475typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1476/** Pointer to const IOAPIC helpers. */
1477typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1478
1479/** Current PDMIOAPICHLPR3 version number. */
1480#define PDM_IOAPICHLPR3_VERSION 0xff010000
1481
1482
1483
1484#ifdef IN_RING3
1485
1486/**
1487 * DMA Transfer Handler.
1488 *
1489 * @returns Number of bytes transferred.
1490 * @param pDevIns Device instance of the DMA.
1491 * @param pvUser User pointer.
1492 * @param uChannel Channel number.
1493 * @param off DMA position.
1494 * @param cb Block size.
1495 */
1496typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1497/** Pointer to a FNDMATRANSFERHANDLER(). */
1498typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1499
1500/**
1501 * DMA Controller registration structure.
1502 */
1503typedef struct PDMDMAREG
1504{
1505 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1506 uint32_t u32Version;
1507
1508 /**
1509 * Execute pending transfers.
1510 *
1511 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1512 * @param pDevIns Device instance of the DMAC.
1513 */
1514 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1515
1516 /**
1517 * Register transfer function for DMA channel.
1518 *
1519 * @param pDevIns Device instance of the DMAC.
1520 * @param uChannel Channel number.
1521 * @param pfnTransferHandler Device specific transfer function.
1522 * @param pvUSer User pointer to be passed to the callback.
1523 */
1524 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
1525
1526 /**
1527 * Read memory
1528 *
1529 * @returns Number of bytes read.
1530 * @param pDevIns Device instance of the DMAC.
1531 * @param pvBuffer Pointer to target buffer.
1532 * @param off DMA position.
1533 * @param cbBlock Block size.
1534 */
1535 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
1536
1537 /**
1538 * Write memory
1539 *
1540 * @returns Number of bytes written.
1541 * @param pDevIns Device instance of the DMAC.
1542 * @param pvBuffer Memory to write.
1543 * @param off DMA position.
1544 * @param cbBlock Block size.
1545 */
1546 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
1547
1548 /**
1549 * Set the DREQ line.
1550 *
1551 * @param pDevIns Device instance of the DMAC.
1552 * @param uChannel Channel number.
1553 * @param uLevel Level of the line.
1554 */
1555 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
1556
1557 /**
1558 * Get channel mode
1559 *
1560 * @returns Channel mode.
1561 * @param pDevIns Device instance of the DMAC.
1562 * @param uChannel Channel number.
1563 */
1564 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
1565
1566} PDMDMACREG;
1567/** Pointer to a DMAC registration structure. */
1568typedef PDMDMACREG *PPDMDMACREG;
1569
1570/** Current PDMDMACREG version number. */
1571#define PDM_DMACREG_VERSION 0xf5010000
1572
1573
1574/**
1575 * DMA Controller device helpers.
1576 */
1577typedef struct PDMDMACHLP
1578{
1579 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
1580 uint32_t u32Version;
1581
1582 /* to-be-defined */
1583
1584} PDMDMACHLP;
1585/** Pointer to DMAC helpers. */
1586typedef PDMDMACHLP *PPDMDMACHLP;
1587/** Pointer to const DMAC helpers. */
1588typedef const PDMDMACHLP *PCPDMDMACHLP;
1589
1590/** Current PDMDMACHLP version number. */
1591#define PDM_DMACHLP_VERSION 0xf6010000
1592
1593#endif /* IN_RING3 */
1594
1595
1596
1597/**
1598 * RTC registration structure.
1599 */
1600typedef struct PDMRTCREG
1601{
1602 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
1603 uint32_t u32Version;
1604 uint32_t u32Alignment; /**< structure size alignment. */
1605
1606 /**
1607 * Write to a CMOS register and update the checksum if necessary.
1608 *
1609 * @returns VBox status code.
1610 * @param pDevIns Device instance of the RTC.
1611 * @param iReg The CMOS register index.
1612 * @param u8Value The CMOS register value.
1613 */
1614 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
1615
1616 /**
1617 * Read a CMOS register.
1618 *
1619 * @returns VBox status code.
1620 * @param pDevIns Device instance of the RTC.
1621 * @param iReg The CMOS register index.
1622 * @param pu8Value Where to store the CMOS register value.
1623 */
1624 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
1625
1626} PDMRTCREG;
1627/** Pointer to a RTC registration structure. */
1628typedef PDMRTCREG *PPDMRTCREG;
1629/** Pointer to a const RTC registration structure. */
1630typedef const PDMRTCREG *PCPDMRTCREG;
1631
1632/** Current PDMRTCREG version number. */
1633#define PDM_RTCREG_VERSION 0xfa010000
1634
1635
1636/**
1637 * RTC device helpers.
1638 */
1639typedef struct PDMRTCHLP
1640{
1641 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
1642 uint32_t u32Version;
1643
1644 /* to-be-defined */
1645
1646} PDMRTCHLP;
1647/** Pointer to RTC helpers. */
1648typedef PDMRTCHLP *PPDMRTCHLP;
1649/** Pointer to const RTC helpers. */
1650typedef const PDMRTCHLP *PCPDMRTCHLP;
1651
1652/** Current PDMRTCHLP version number. */
1653#define PDM_RTCHLP_VERSION 0xf6010000
1654
1655
1656
1657#ifdef IN_RING3
1658
1659/**
1660 * PDM Device API.
1661 */
1662typedef struct PDMDEVHLPR3
1663{
1664 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
1665 uint32_t u32Version;
1666
1667 /**
1668 * Register a number of I/O ports with a device.
1669 *
1670 * These callbacks are of course for the host context (HC).
1671 * Register HC handlers before guest context (GC) handlers! There must be a
1672 * HC handler for every GC handler!
1673 *
1674 * @returns VBox status.
1675 * @param pDevIns The device instance to register the ports with.
1676 * @param Port First port number in the range.
1677 * @param cPorts Number of ports to register.
1678 * @param pvUser User argument.
1679 * @param pfnOut Pointer to function which is gonna handle OUT operations.
1680 * @param pfnIn Pointer to function which is gonna handle IN operations.
1681 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
1682 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
1683 * @param pszDesc Pointer to description string. This must not be freed.
1684 */
1685 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
1686 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1687 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
1688
1689 /**
1690 * Register a number of I/O ports with a device for GC.
1691 *
1692 * These callbacks are for the host context (GC).
1693 * Register host context (HC) handlers before guest context handlers! There must be a
1694 * HC handler for every GC handler!
1695 *
1696 * @returns VBox status.
1697 * @param pDevIns The device instance to register the ports with and which GC module
1698 * to resolve the names against.
1699 * @param Port First port number in the range.
1700 * @param cPorts Number of ports to register.
1701 * @param pvUser User argument.
1702 * @param pszOut Name of the GC function which is gonna handle OUT operations.
1703 * @param pszIn Name of the GC function which is gonna handle IN operations.
1704 * @param pszOutStr Name of the GC function which is gonna handle string OUT operations.
1705 * @param pszInStr Name of the GC function which is gonna handle string IN operations.
1706 * @param pszDesc Pointer to description string. This must not be freed.
1707 */
1708 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterGC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
1709 const char *pszOut, const char *pszIn,
1710 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1711
1712 /**
1713 * Register a number of I/O ports with a device.
1714 *
1715 * These callbacks are of course for the ring-0 host context (R0).
1716 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
1717 *
1718 * @returns VBox status.
1719 * @param pDevIns The device instance to register the ports with.
1720 * @param Port First port number in the range.
1721 * @param cPorts Number of ports to register.
1722 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1723 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
1724 * @param pszIn Name of the R0 function which is gonna handle IN operations.
1725 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
1726 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
1727 * @param pszDesc Pointer to description string. This must not be freed.
1728 */
1729 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1730 const char *pszOut, const char *pszIn,
1731 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
1732
1733 /**
1734 * Deregister I/O ports.
1735 *
1736 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1737 *
1738 * @returns VBox status.
1739 * @param pDevIns The device instance owning the ports.
1740 * @param Port First port number in the range.
1741 * @param cPorts Number of ports to deregister.
1742 */
1743 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
1744
1745 /**
1746 * Register a Memory Mapped I/O (MMIO) region.
1747 *
1748 * These callbacks are of course for the host context (HC).
1749 * Register HC handlers before guest context (GC) handlers! There must be a
1750 * HC handler for every GC handler!
1751 *
1752 * @returns VBox status.
1753 * @param pDevIns The device instance to register the MMIO with.
1754 * @param GCPhysStart First physical address in the range.
1755 * @param cbRange The size of the range (in bytes).
1756 * @param pvUser User argument.
1757 * @param pfnWrite Pointer to function which is gonna handle Write operations.
1758 * @param pfnRead Pointer to function which is gonna handle Read operations.
1759 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
1760 * @param pszDesc Pointer to description string. This must not be freed.
1761 */
1762 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1763 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1764 const char *pszDesc));
1765
1766 /**
1767 * Register a Memory Mapped I/O (MMIO) region for GC.
1768 *
1769 * These callbacks are for the guest context (GC).
1770 * Register host context (HC) handlers before guest context handlers! There must be a
1771 * HC handler for every GC handler!
1772 *
1773 * @returns VBox status.
1774 * @param pDevIns The device instance to register the MMIO with.
1775 * @param GCPhysStart First physical address in the range.
1776 * @param cbRange The size of the range (in bytes).
1777 * @param pvUser User argument.
1778 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1779 * @param pszRead Name of the GC function which is gonna handle Read operations.
1780 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1781 * @param pszDesc Obsolete. NULL is fine.
1782 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1783 */
1784 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1785 const char *pszWrite, const char *pszRead, const char *pszFill,
1786 const char *pszDesc));
1787
1788 /**
1789 * Register a Memory Mapped I/O (MMIO) region for R0.
1790 *
1791 * These callbacks are for the ring-0 host context (R0).
1792 * Register R3 (HC) handlers before R0 handlers! There must be a R3 handler for every R0 handler!
1793 *
1794 * @returns VBox status.
1795 * @param pDevIns The device instance to register the MMIO with.
1796 * @param GCPhysStart First physical address in the range.
1797 * @param cbRange The size of the range (in bytes).
1798 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
1799 * @param pszWrite Name of the GC function which is gonna handle Write operations.
1800 * @param pszRead Name of the GC function which is gonna handle Read operations.
1801 * @param pszFill Name of the GC function which is gonna handle Fill/memset operations. (optional)
1802 * @param pszDesc Obsolete. NULL is fine.
1803 * @todo Remove pszDesc in the next major revision of PDMDEVHLPR3.
1804 */
1805 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1806 const char *pszWrite, const char *pszRead, const char *pszFill,
1807 const char *pszDesc));
1808
1809 /**
1810 * Deregister a Memory Mapped I/O (MMIO) region.
1811 *
1812 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
1813 *
1814 * @returns VBox status.
1815 * @param pDevIns The device instance owning the MMIO region(s).
1816 * @param GCPhysStart First physical address in the range.
1817 * @param cbRange The size of the range (in bytes).
1818 */
1819 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
1820
1821 /**
1822 * Register a ROM (BIOS) region.
1823 *
1824 * It goes without saying that this is read-only memory. The memory region must be
1825 * in unassigned memory. I.e. from the top of the address space or on the PC in
1826 * the 0xa0000-0xfffff range.
1827 *
1828 * @returns VBox status.
1829 * @param pDevIns The device instance owning the ROM region.
1830 * @param GCPhysStart First physical address in the range.
1831 * Must be page aligned!
1832 * @param cbRange The size of the range (in bytes).
1833 * Must be page aligned!
1834 * @param pvBinary Pointer to the binary data backing the ROM image.
1835 * This must be cbRange bytes big.
1836 * It will be copied and doesn't have to stick around if fShadow is clear.
1837 * @param fShadow Whether to emulate ROM shadowing. This involves leaving
1838 * the ROM writable for a while during the POST and refreshing
1839 * it at reset. When this flag is set, the memory pointed to by
1840 * pvBinary has to stick around for the lifespan of the VM.
1841 * @param pszDesc Pointer to description string. This must not be freed.
1842 *
1843 * @remark There is no way to remove the rom, automatically on device cleanup or
1844 * manually from the device yet. At present I doubt we need such features...
1845 */
1846 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc));
1847
1848 /**
1849 * Register a save state data unit.
1850 *
1851 * @returns VBox status.
1852 * @param pDevIns Device instance.
1853 * @param pszName Data unit name.
1854 * @param u32Instance The instance identifier of the data unit.
1855 * This must together with the name be unique.
1856 * @param u32Version Data layout version number.
1857 * @param cbGuess The approximate amount of data in the unit.
1858 * Only for progress indicators.
1859 * @param pfnSavePrep Prepare save callback, optional.
1860 * @param pfnSaveExec Execute save callback, optional.
1861 * @param pfnSaveDone Done save callback, optional.
1862 * @param pfnLoadPrep Prepare load callback, optional.
1863 * @param pfnLoadExec Execute load callback, optional.
1864 * @param pfnLoadDone Done load callback, optional.
1865 */
1866 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1867 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1868 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
1869
1870 /**
1871 * Creates a timer.
1872 *
1873 * @returns VBox status.
1874 * @param pDevIns Device instance.
1875 * @param enmClock The clock to use on this timer.
1876 * @param pfnCallback Callback function.
1877 * @param pszDesc Pointer to description string which must stay around
1878 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1879 * @param ppTimer Where to store the timer on success.
1880 */
1881 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer));
1882
1883 /**
1884 * Creates an external timer.
1885 *
1886 * @returns timer pointer
1887 * @param pDevIns Device instance.
1888 * @param enmClock The clock to use on this timer.
1889 * @param pfnCallback Callback function.
1890 * @param pvUser User pointer
1891 * @param pszDesc Pointer to description string which must stay around
1892 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
1893 */
1894 DECLR3CALLBACKMEMBER(PTMTIMERR3, pfnTMTimerCreateExternal,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc));
1895
1896 /**
1897 * Registers the device with the default PCI bus.
1898 *
1899 * @returns VBox status code.
1900 * @param pDevIns Device instance.
1901 * @param pPciDev The PCI device structure.
1902 * Any PCI enabled device must keep this in it's instance data!
1903 * Fill in the PCI data config before registration, please.
1904 * @remark This is the simple interface, a Ex interface will be created if
1905 * more features are needed later.
1906 */
1907 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
1908
1909 /**
1910 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
1911 *
1912 * @returns VBox status code.
1913 * @param pDevIns Device instance.
1914 * @param iRegion The region number.
1915 * @param cbRegion Size of the region.
1916 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
1917 * @param pfnCallback Callback for doing the mapping.
1918 */
1919 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
1920
1921 /**
1922 * Register PCI configuration space read/write callbacks.
1923 *
1924 * @param pDevIns Device instance.
1925 * @param pPciDev The PCI device structure.
1926 * If NULL the default PCI device for this device instance is used.
1927 * @param pfnRead Pointer to the user defined PCI config read function.
1928 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
1929 * PCI config read function. This way, user can decide when (and if)
1930 * to call default PCI config read function. Can be NULL.
1931 * @param pfnWrite Pointer to the user defined PCI config write function.
1932 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
1933 * PCI config write function. This way, user can decide when (and if)
1934 * to call default PCI config write function. Can be NULL.
1935 * @thread EMT
1936 */
1937 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1938 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
1939
1940 /**
1941 * Set the IRQ for a PCI device.
1942 *
1943 * @param pDevIns Device instance.
1944 * @param iIrq IRQ number to set.
1945 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1946 * @thread Any thread, but will involve the emulation thread.
1947 */
1948 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1949
1950 /**
1951 * Set the IRQ for a PCI device, but don't wait for EMT to process
1952 * the request when not called from EMT.
1953 *
1954 * @param pDevIns Device instance.
1955 * @param iIrq IRQ number to set.
1956 * @param iLevel IRQ level.
1957 * @thread Any thread, but will involve the emulation thread.
1958 */
1959 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1960
1961 /**
1962 * Set ISA IRQ for a device.
1963 *
1964 * @param pDevIns Device instance.
1965 * @param iIrq IRQ number to set.
1966 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1967 * @thread Any thread, but will involve the emulation thread.
1968 */
1969 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1970
1971 /**
1972 * Set the ISA IRQ for a device, but don't wait for EMT to process
1973 * the request when not called from EMT.
1974 *
1975 * @param pDevIns Device instance.
1976 * @param iIrq IRQ number to set.
1977 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1978 * @thread Any thread, but will involve the emulation thread.
1979 */
1980 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1981
1982 /**
1983 * Attaches a driver (chain) to the device.
1984 *
1985 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
1986 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
1987 *
1988 * @returns VBox status code.
1989 * @param pDevIns Device instance.
1990 * @param iLun The logical unit to attach.
1991 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
1992 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
1993 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
1994 * for the live of the device instance.
1995 */
1996 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
1997
1998 /**
1999 * Allocate memory which is associated with current VM instance
2000 * and automatically freed on it's destruction.
2001 *
2002 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2003 * @param pDevIns Device instance.
2004 * @param cb Number of bytes to allocate.
2005 */
2006 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2007
2008 /**
2009 * Allocate memory which is associated with current VM instance
2010 * and automatically freed on it's destruction. The memory is ZEROed.
2011 *
2012 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2013 * @param pDevIns Device instance.
2014 * @param cb Number of bytes to allocate.
2015 */
2016 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2017
2018 /**
2019 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2020 *
2021 * @param pDevIns Device instance.
2022 * @param pv Pointer to the memory to free.
2023 */
2024 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2025
2026 /**
2027 * Set the VM error message
2028 *
2029 * @returns rc.
2030 * @param pDevIns Device instance.
2031 * @param rc VBox status code.
2032 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2033 * @param pszFormat Error message format string.
2034 * @param ... Error message arguments.
2035 */
2036 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2037
2038 /**
2039 * Set the VM error message
2040 *
2041 * @returns rc.
2042 * @param pDevIns Device instance.
2043 * @param rc VBox status code.
2044 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2045 * @param pszFormat Error message format string.
2046 * @param va Error message arguments.
2047 */
2048 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2049
2050 /**
2051 * Set the VM runtime error message
2052 *
2053 * @returns VBox status code.
2054 * @param pDevIns Device instance.
2055 * @param fFatal Whether it is a fatal error or not.
2056 * @param pszErrorID Error ID string.
2057 * @param pszFormat Error message format string.
2058 * @param ... Error message arguments.
2059 */
2060 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2061
2062 /**
2063 * Set the VM runtime error message
2064 *
2065 * @returns VBox status code.
2066 * @param pDevIns Device instance.
2067 * @param fFatal Whether it is a fatal error or not.
2068 * @param pszErrorID Error ID string.
2069 * @param pszFormat Error message format string.
2070 * @param va Error message arguments.
2071 */
2072 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2073
2074 /**
2075 * Assert that the current thread is the emulation thread.
2076 *
2077 * @returns True if correct.
2078 * @returns False if wrong.
2079 * @param pDevIns Device instance.
2080 * @param pszFile Filename of the assertion location.
2081 * @param iLine The linenumber of the assertion location.
2082 * @param pszFunction Function of the assertion location.
2083 */
2084 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2085
2086 /**
2087 * Assert that the current thread is NOT the emulation thread.
2088 *
2089 * @returns True if correct.
2090 * @returns False if wrong.
2091 * @param pDevIns Device instance.
2092 * @param pszFile Filename of the assertion location.
2093 * @param iLine The linenumber of the assertion location.
2094 * @param pszFunction Function of the assertion location.
2095 */
2096 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2097
2098 /**
2099 * Stops the VM and enters the debugger to look at the guest state.
2100 *
2101 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2102 * invoking this function directly.
2103 *
2104 * @returns VBox status code which must be passed up to the VMM.
2105 * @param pDevIns Device instance.
2106 * @param pszFile Filename of the assertion location.
2107 * @param iLine The linenumber of the assertion location.
2108 * @param pszFunction Function of the assertion location.
2109 * @param pszFormat Message. (optional)
2110 * @param args Message parameters.
2111 */
2112 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2113
2114 /**
2115 * Register a info handler with DBGF,
2116 *
2117 * @returns VBox status code.
2118 * @param pDevIns Device instance.
2119 * @param pszName The identifier of the info.
2120 * @param pszDesc The description of the info and any arguments the handler may take.
2121 * @param pfnHandler The handler function to be called to display the info.
2122 */
2123 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2124
2125 /**
2126 * Registers a statistics sample if statistics are enabled.
2127 *
2128 * @param pDevIns Device instance of the DMA.
2129 * @param pvSample Pointer to the sample.
2130 * @param enmType Sample type. This indicates what pvSample is pointing at.
2131 * @param pszName Sample name. The name is on this form "/<component>/<sample>".
2132 * Further nesting is possible.
2133 * @param enmUnit Sample unit.
2134 * @param pszDesc Sample description.
2135 */
2136 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2137
2138 /**
2139 * Same as pfnSTAMRegister except that the name is specified in a
2140 * RTStrPrintf like fashion.
2141 *
2142 * @returns VBox status.
2143 * @param pDevIns Device instance of the DMA.
2144 * @param pvSample Pointer to the sample.
2145 * @param enmType Sample type. This indicates what pvSample is pointing at.
2146 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2147 * @param enmUnit Sample unit.
2148 * @param pszDesc Sample description.
2149 * @param pszName The sample name format string.
2150 * @param ... Arguments to the format string.
2151 */
2152 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2153 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2154
2155 /**
2156 * Same as pfnSTAMRegister except that the name is specified in a
2157 * RTStrPrintfV like fashion.
2158 *
2159 * @returns VBox status.
2160 * @param pDevIns Device instance of the DMA.
2161 * @param pvSample Pointer to the sample.
2162 * @param enmType Sample type. This indicates what pvSample is pointing at.
2163 * @param enmVisibility Visibility type specifying whether unused statistics should be visible or not.
2164 * @param enmUnit Sample unit.
2165 * @param pszDesc Sample description.
2166 * @param pszName The sample name format string.
2167 * @param args Arguments to the format string.
2168 */
2169 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2170 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2171
2172 /**
2173 * Register the RTC device.
2174 *
2175 * @returns VBox status code.
2176 * @param pDevIns Device instance.
2177 * @param pRtcReg Pointer to a RTC registration structure.
2178 * @param ppRtcHlp Where to store the pointer to the helper functions.
2179 */
2180 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
2181
2182 /**
2183 * Create a queue.
2184 *
2185 * @returns VBox status code.
2186 * @param pDevIns The device instance.
2187 * @param cbItem The size of a queue item.
2188 * @param cItems The number of items in the queue.
2189 * @param cMilliesInterval The number of milliseconds between polling the queue.
2190 * If 0 then the emulation thread will be notified whenever an item arrives.
2191 * @param pfnCallback The consumer function.
2192 * @param fGCEnabled Set if the queue should work in GC too.
2193 * @param ppQueue Where to store the queue handle on success.
2194 * @thread The emulation thread.
2195 */
2196 DECLR3CALLBACKMEMBER(int, pfnPDMQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2197 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue));
2198
2199 /**
2200 * Initializes a PDM critical section.
2201 *
2202 * The PDM critical sections are derived from the IPRT critical sections, but
2203 * works in GC as well.
2204 *
2205 * @returns VBox status code.
2206 * @param pDevIns Device instance.
2207 * @param pCritSect Pointer to the critical section.
2208 * @param pszName The name of the critical section (for statistics).
2209 */
2210 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName));
2211
2212 /**
2213 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2214 *
2215 * @returns pTime.
2216 * @param pDevIns Device instance.
2217 * @param pTime Where to store the time.
2218 */
2219 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnUTCNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2220
2221 /**
2222 * Creates a PDM thread.
2223 *
2224 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
2225 * resuming, and destroying the thread as the VM state changes.
2226 *
2227 * @returns VBox status code.
2228 * @param pDevIns The device instance.
2229 * @param ppThread Where to store the thread 'handle'.
2230 * @param pvUser The user argument to the thread function.
2231 * @param pfnThread The thread function.
2232 * @param pfnWakeup The wakup callback. This is called on the EMT thread when
2233 * a state change is pending.
2234 * @param cbStack See RTThreadCreate.
2235 * @param enmType See RTThreadCreate.
2236 * @param pszName See RTThreadCreate.
2237 */
2238 DECLR3CALLBACKMEMBER(int, pfnPDMThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2239 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
2240
2241 /**
2242 * Convert a guest virtual address to a guest physical address.
2243 *
2244 * @returns VBox status code.
2245 * @param pDevIns Device instance.
2246 * @param GCPtr Guest virtual address.
2247 * @param pGCPhys Where to store the GC physical address corresponding to GCPtr.
2248 * @thread The emulation thread.
2249 * @remark Careful with page boundraries.
2250 */
2251 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2252
2253 /**
2254 * Gets the VM state.
2255 *
2256 * @returns VM state.
2257 * @param pDevIns The device instance.
2258 * @thread Any thread (just keep in mind that it's volatile info).
2259 */
2260 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2261
2262 /** Space reserved for future members.
2263 * @{ */
2264 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
2265 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
2266 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
2267 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
2268 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
2269 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
2270 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
2271 /** @} */
2272
2273
2274 /** API available to trusted devices only.
2275 *
2276 * These APIs are providing unrestricted access to the guest and the VM,
2277 * or they are interacting intimately with PDM.
2278 *
2279 * @{
2280 */
2281 /**
2282 * Gets the VM handle. Restricted API.
2283 *
2284 * @returns VM Handle.
2285 * @param pDevIns Device instance.
2286 */
2287 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
2288
2289 /**
2290 * Register the PCI Bus.
2291 *
2292 * @returns VBox status code.
2293 * @param pDevIns Device instance.
2294 * @param pPciBusReg Pointer to PCI bus registration structure.
2295 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus helpers.
2296 */
2297 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
2298
2299 /**
2300 * Register the PIC device.
2301 *
2302 * @returns VBox status code.
2303 * @param pDevIns Device instance.
2304 * @param pPicReg Pointer to a PIC registration structure.
2305 * @param ppPicHlpR3 Where to store the pointer to the PIC HC helpers.
2306 */
2307 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
2308
2309 /**
2310 * Register the APIC device.
2311 *
2312 * @returns VBox status code.
2313 * @param pDevIns Device instance.
2314 * @param pApicReg Pointer to a APIC registration structure.
2315 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
2316 */
2317 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
2318
2319 /**
2320 * Register the I/O APIC device.
2321 *
2322 * @returns VBox status code.
2323 * @param pDevIns Device instance.
2324 * @param pIoApicReg Pointer to a I/O APIC registration structure.
2325 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC helpers.
2326 */
2327 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
2328
2329 /**
2330 * Register the DMA device.
2331 *
2332 * @returns VBox status code.
2333 * @param pDevIns Device instance.
2334 * @param pDmacReg Pointer to a DMAC registration structure.
2335 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
2336 */
2337 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
2338
2339 /**
2340 * Read physical memory.
2341 *
2342 * @param pDevIns Device instance.
2343 * @param GCPhys Physical address start reading from.
2344 * @param pvBuf Where to put the read bits.
2345 * @param cbRead How many bytes to read.
2346 * @thread Any thread, but the call may involve the emulation thread.
2347 */
2348 DECLR3CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2349
2350 /**
2351 * Write to physical memory.
2352 *
2353 * @param pDevIns Device instance.
2354 * @param GCPhys Physical address to write to.
2355 * @param pvBuf What to write.
2356 * @param cbWrite How many bytes to write.
2357 * @thread Any thread, but the call may involve the emulation thread.
2358 */
2359 DECLR3CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2360
2361 /**
2362 * Read guest physical memory by virtual address.
2363 *
2364 * @param pDevIns Device instance.
2365 * @param pvDst Where to put the read bits.
2366 * @param GCVirtSrc Guest virtual address to start reading from.
2367 * @param cb How many bytes to read.
2368 * @thread The emulation thread.
2369 */
2370 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2371
2372 /**
2373 * Write to guest physical memory by virtual address.
2374 *
2375 * @param pDevIns Device instance.
2376 * @param GCVirtDst Guest virtual address to write to.
2377 * @param pvSrc What to write.
2378 * @param cb How many bytes to write.
2379 * @thread The emulation thread.
2380 */
2381 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2382
2383 /**
2384 * Reserve physical address space for ROM and MMIO ranges.
2385 *
2386 * @returns VBox status code.
2387 * @param pDevIns Device instance.
2388 * @param GCPhys Start physical address.
2389 * @param cbRange The size of the range.
2390 * @param pszDesc Description string.
2391 * @thread The emulation thread.
2392 */
2393 DECLR3CALLBACKMEMBER(int, pfnPhysReserve,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc));
2394
2395 /**
2396 * Convert a guest physical address to a host virtual address. (OBSOLETE)
2397 *
2398 * @returns VBox status code.
2399 * @param pDevIns Device instance.
2400 * @param GCPhys Start physical address.
2401 * @param cbRange The size of the range. Use 0 if you don't care about the range.
2402 * @param ppvHC Where to store the HC pointer corresponding to GCPhys.
2403 * @thread The emulation thread.
2404 *
2405 * @remark Careful with page boundraries.
2406 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2407 */
2408 DECLR3CALLBACKMEMBER(int, pfnObsoletePhys2HCVirt,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC));
2409
2410 /**
2411 * Convert a guest virtual address to a host virtual address. (OBSOLETE)
2412 *
2413 * @returns VBox status code.
2414 * @param pDevIns Device instance.
2415 * @param GCPtr Guest virtual address.
2416 * @param pHCPtr Where to store the HC pointer corresponding to GCPtr.
2417 * @thread The emulation thread.
2418 *
2419 * @remark Careful with page boundraries.
2420 * @remark Do not use the mapping after you return to the caller! (it could get invalidated/changed)
2421 */
2422 DECLR3CALLBACKMEMBER(int, pfnObsoletePhysGCPtr2HCPtr,(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr));
2423
2424 /**
2425 * Checks if the Gate A20 is enabled or not.
2426 *
2427 * @returns true if A20 is enabled.
2428 * @returns false if A20 is disabled.
2429 * @param pDevIns Device instance.
2430 * @thread The emulation thread.
2431 */
2432 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2433
2434 /**
2435 * Enables or disables the Gate A20.
2436 *
2437 * @param pDevIns Device instance.
2438 * @param fEnable Set this flag to enable the Gate A20; clear it to disable.
2439 * @thread The emulation thread.
2440 */
2441 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
2442
2443 /**
2444 * Resets the VM.
2445 *
2446 * @returns The appropriate VBox status code to pass around on reset.
2447 * @param pDevIns Device instance.
2448 * @thread The emulation thread.
2449 */
2450 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
2451
2452 /**
2453 * Suspends the VM.
2454 *
2455 * @returns The appropriate VBox status code to pass around on suspend.
2456 * @param pDevIns Device instance.
2457 * @thread The emulation thread.
2458 */
2459 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
2460
2461 /**
2462 * Power off the VM.
2463 *
2464 * @returns The appropriate VBox status code to pass around on power off.
2465 * @param pDevIns Device instance.
2466 * @thread The emulation thread.
2467 */
2468 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
2469
2470 /**
2471 * Acquire global VM lock
2472 *
2473 * @returns VBox status code
2474 * @param pDevIns Device instance.
2475 */
2476 DECLR3CALLBACKMEMBER(int , pfnLockVM,(PPDMDEVINS pDevIns));
2477
2478 /**
2479 * Release global VM lock
2480 *
2481 * @returns VBox status code
2482 * @param pDevIns Device instance.
2483 */
2484 DECLR3CALLBACKMEMBER(int, pfnUnlockVM,(PPDMDEVINS pDevIns));
2485
2486 /**
2487 * Check that the current thread owns the global VM lock.
2488 *
2489 * @returns boolean
2490 * @param pDevIns Device instance.
2491 * @param pszFile Filename of the assertion location.
2492 * @param iLine Linenumber of the assertion location.
2493 * @param pszFunction Function of the assertion location.
2494 */
2495 DECLR3CALLBACKMEMBER(bool, pfnAssertVMLock,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
2496
2497 /**
2498 * Register transfer function for DMA channel.
2499 *
2500 * @returns VBox status code.
2501 * @param pDevIns Device instance.
2502 * @param uChannel Channel number.
2503 * @param pfnTransferHandler Device specific transfer callback function.
2504 * @param pvUser User pointer to pass to the callback.
2505 * @thread EMT
2506 */
2507 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2508
2509 /**
2510 * Read memory.
2511 *
2512 * @returns VBox status code.
2513 * @param pDevIns Device instance.
2514 * @param uChannel Channel number.
2515 * @param pvBuffer Pointer to target buffer.
2516 * @param off DMA position.
2517 * @param cbBlock Block size.
2518 * @param pcbRead Where to store the number of bytes which was read. optional.
2519 * @thread EMT
2520 */
2521 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
2522
2523 /**
2524 * Write memory.
2525 *
2526 * @returns VBox status code.
2527 * @param pDevIns Device instance.
2528 * @param uChannel Channel number.
2529 * @param pvBuffer Memory to write.
2530 * @param off DMA position.
2531 * @param cbBlock Block size.
2532 * @param pcbWritten Where to store the number of bytes which was written. optional.
2533 * @thread EMT
2534 */
2535 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
2536
2537 /**
2538 * Set the DREQ line.
2539 *
2540 * @returns VBox status code.
2541 * @param pDevIns Device instance.
2542 * @param uChannel Channel number.
2543 * @param uLevel Level of the line.
2544 * @thread EMT
2545 */
2546 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2547
2548 /**
2549 * Get channel mode.
2550 *
2551 * @returns Channel mode. See specs.
2552 * @param pDevIns Device instance.
2553 * @param uChannel Channel number.
2554 * @thread EMT
2555 */
2556 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2557
2558 /**
2559 * Schedule DMA execution.
2560 *
2561 * @param pDevIns Device instance.
2562 * @thread Any thread.
2563 */
2564 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
2565
2566 /**
2567 * Write CMOS value and update the checksum(s).
2568 *
2569 * @returns VBox status code.
2570 * @param pDevIns Device instance.
2571 * @param iReg The CMOS register index.
2572 * @param u8Value The CMOS register value.
2573 * @thread EMT
2574 */
2575 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2576
2577 /**
2578 * Read CMOS value.
2579 *
2580 * @returns VBox status code.
2581 * @param pDevIns Device instance.
2582 * @param iReg The CMOS register index.
2583 * @param pu8Value Where to store the CMOS register value.
2584 * @thread EMT
2585 */
2586 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2587
2588 /**
2589 * Get CPUID.
2590 *
2591 * @param pDevIns Device instance.
2592 * @param iLeaf The CPUID leaf to get.
2593 * @param pEax Where to store the EAX value.
2594 * @param pEbx Where to store the EBX value.
2595 * @param pEcx Where to store the ECX value.
2596 * @param pEdx Where to store the EDX value.
2597 */
2598 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
2599
2600 /**
2601 * Write protects a shadow ROM mapping.
2602 *
2603 * This is intented for use by the system BIOS or by the device that
2604 * employs a shadow ROM BIOS, so that the shadow ROM mapping can be
2605 * write protected once the POST is over.
2606 *
2607 * @param pDevIns Device instance.
2608 * @param GCPhysStart Where the shadow ROM mapping starts.
2609 * @param cbRange The size of the shadow ROM mapping.
2610 */
2611 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2612
2613 /**
2614 * Allocate and register a MMIO2 region.
2615 *
2616 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2617 * RAM associated with a device. It is also non-shared memory with a
2618 * permanent ring-3 mapping and page backing (presently).
2619 *
2620 * @returns VBox status.
2621 * @param pDevIns The device instance.
2622 * @param iRegion The region number. Use the PCI region number as
2623 * this must be known to the PCI bus device too. If it's not associated
2624 * with the PCI device, then any number up to UINT8_MAX is fine.
2625 * @param cb The size (in bytes) of the region.
2626 * @param fFlags Reserved for future use, must be zero.
2627 * @param ppv Where to store the address of the ring-3 mapping of the memory.
2628 * @param pszDesc Pointer to description string. This must not be freed.
2629 * @thread EMT.
2630 */
2631 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2632
2633 /**
2634 * Deregisters and frees a MMIO2 region.
2635 *
2636 * Any physical (and virtual) access handlers registered for the region must
2637 * be deregistered before calling this function.
2638 *
2639 * @returns VBox status code.
2640 * @param pDevIns The device instance.
2641 * @param iRegion The region number used during registration.
2642 * @thread EMT.
2643 */
2644 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2645
2646 /**
2647 * Maps a MMIO2 region into the physical memory space.
2648 *
2649 * A MMIO2 range may overlap with base memory if a lot of RAM
2650 * is configured for the VM, in which case we'll drop the base
2651 * memory pages. Presently we will make no attempt to preserve
2652 * anything that happens to be present in the base memory that
2653 * is replaced, this is of course incorrectly but it's too much
2654 * effort.
2655 *
2656 * @returns VBox status code.
2657 * @param pDevIns The device instance.
2658 * @param iRegion The region number used during registration.
2659 * @param GCPhys The physical address to map it at.
2660 * @thread EMT.
2661 */
2662 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2663
2664 /**
2665 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2666 *
2667 * @returns VBox status code.
2668 * @param pDevIns The device instance.
2669 * @param iRegion The region number used during registration.
2670 * @param GCPhys The physical address it's currently mapped at.
2671 * @thread EMT.
2672 */
2673 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2674
2675 /**
2676 * Maps a portion of an MMIO2 region into the hypervisor region.
2677 *
2678 * Callers of this API must never deregister the MMIO2 region before the
2679 * VM is powered off.
2680 *
2681 * @return VBox status code.
2682 * @param pDevIns The device owning the MMIO2 memory.
2683 * @param iRegion The region.
2684 * @param off The offset into the region. Will be rounded down to closest page boundrary.
2685 * @param cb The number of bytes to map. Will be rounded up to the closest page boundrary.
2686 * @param pszDesc Mapping description.
2687 * @param pRCPtr Where to store the RC address.
2688 */
2689 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2690 const char *pszDesc, PRTRCPTR pRCPtr));
2691
2692 /**
2693 * Registers the VMM device heap
2694 *
2695 * @returns VBox status code.
2696 * @param pDevIns The device instance.
2697 * @param GCPhys The physical address.
2698 * @param pvHeap Ring 3 heap pointer.
2699 * @param cbSize Size of the heap.
2700 * @thread EMT.
2701 */
2702 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
2703
2704 /**
2705 * Unregisters the VMM device heap
2706 *
2707 * @returns VBox status code.
2708 * @param pDevIns The device instance.
2709 * @param GCPhys The physical address.
2710 * @thread EMT.
2711 */
2712 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
2713
2714 /** @} */
2715
2716 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
2717 uint32_t u32TheEnd;
2718} PDMDEVHLPR3;
2719#endif /* !IN_RING3 */
2720/** Pointer to the R3 PDM Device API. */
2721typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
2722/** Pointer to the R3 PDM Device API, const variant. */
2723typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
2724
2725/** Current PDMDEVHLP version number. */
2726#define PDM_DEVHLP_VERSION 0xf2060001
2727
2728
2729/**
2730 * PDM Device API - RC Variant.
2731 */
2732typedef struct PDMDEVHLPRC
2733{
2734 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
2735 uint32_t u32Version;
2736
2737 /**
2738 * Set the IRQ for a PCI device.
2739 *
2740 * @param pDevIns Device instance.
2741 * @param iIrq IRQ number to set.
2742 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2743 * @thread Any thread, but will involve the emulation thread.
2744 */
2745 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2746
2747 /**
2748 * Set ISA IRQ for a device.
2749 *
2750 * @param pDevIns Device instance.
2751 * @param iIrq IRQ number to set.
2752 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2753 * @thread Any thread, but will involve the emulation thread.
2754 */
2755 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2756
2757 /**
2758 * Read physical memory.
2759 *
2760 * @param pDevIns Device instance.
2761 * @param GCPhys Physical address start reading from.
2762 * @param pvBuf Where to put the read bits.
2763 * @param cbRead How many bytes to read.
2764 */
2765 DECLRCCALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2766
2767 /**
2768 * Write to physical memory.
2769 *
2770 * @param pDevIns Device instance.
2771 * @param GCPhys Physical address to write to.
2772 * @param pvBuf What to write.
2773 * @param cbWrite How many bytes to write.
2774 */
2775 DECLRCCALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2776
2777 /**
2778 * Checks if the Gate A20 is enabled or not.
2779 *
2780 * @returns true if A20 is enabled.
2781 * @returns false if A20 is disabled.
2782 * @param pDevIns Device instance.
2783 * @thread The emulation thread.
2784 */
2785 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2786
2787 /**
2788 * Set the VM error message
2789 *
2790 * @returns rc.
2791 * @param pDrvIns Driver instance.
2792 * @param rc VBox status code.
2793 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2794 * @param pszFormat Error message format string.
2795 * @param ... Error message arguments.
2796 */
2797 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2798
2799 /**
2800 * Set the VM error message
2801 *
2802 * @returns rc.
2803 * @param pDrvIns Driver instance.
2804 * @param rc VBox status code.
2805 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2806 * @param pszFormat Error message format string.
2807 * @param va Error message arguments.
2808 */
2809 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2810
2811 /**
2812 * Set the VM runtime error message
2813 *
2814 * @returns VBox status code.
2815 * @param pDevIns Device instance.
2816 * @param fFatal Whether it is a fatal error or not.
2817 * @param pszErrorID Error ID string.
2818 * @param pszFormat Error message format string.
2819 * @param ... Error message arguments.
2820 */
2821 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2822
2823 /**
2824 * Set the VM runtime error message
2825 *
2826 * @returns VBox status code.
2827 * @param pDevIns Device instance.
2828 * @param fFatal Whether it is a fatal error or not.
2829 * @param pszErrorID Error ID string.
2830 * @param pszFormat Error message format string.
2831 * @param va Error message arguments.
2832 */
2833 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2834
2835 /**
2836 * Set parameters for pending MMIO patch operation
2837 *
2838 * @returns VBox status code.
2839 * @param pDevIns Device instance.
2840 * @param GCPhys MMIO physical address
2841 * @param pCachedData GC pointer to cached data
2842 */
2843 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2844
2845 /** Just a safety precaution. */
2846 uint32_t u32TheEnd;
2847} PDMDEVHLPRC;
2848/** Pointer PDM Device RC API. */
2849typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
2850/** Pointer PDM Device RC API. */
2851typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
2852
2853/** Current PDMDEVHLP version number. */
2854#define PDM_DEVHLPRC_VERSION 0xfb010000
2855
2856
2857/**
2858 * PDM Device API - R0 Variant.
2859 */
2860typedef struct PDMDEVHLPR0
2861{
2862 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
2863 uint32_t u32Version;
2864
2865 /**
2866 * Set the IRQ for a PCI device.
2867 *
2868 * @param pDevIns Device instance.
2869 * @param iIrq IRQ number to set.
2870 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2871 * @thread Any thread, but will involve the emulation thread.
2872 */
2873 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2874
2875 /**
2876 * Set ISA IRQ for a device.
2877 *
2878 * @param pDevIns Device instance.
2879 * @param iIrq IRQ number to set.
2880 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2881 * @thread Any thread, but will involve the emulation thread.
2882 */
2883 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2884
2885 /**
2886 * Read physical memory.
2887 *
2888 * @param pDevIns Device instance.
2889 * @param GCPhys Physical address start reading from.
2890 * @param pvBuf Where to put the read bits.
2891 * @param cbRead How many bytes to read.
2892 */
2893 DECLR0CALLBACKMEMBER(void, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2894
2895 /**
2896 * Write to physical memory.
2897 *
2898 * @param pDevIns Device instance.
2899 * @param GCPhys Physical address to write to.
2900 * @param pvBuf What to write.
2901 * @param cbWrite How many bytes to write.
2902 */
2903 DECLR0CALLBACKMEMBER(void, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2904
2905 /**
2906 * Checks if the Gate A20 is enabled or not.
2907 *
2908 * @returns true if A20 is enabled.
2909 * @returns false if A20 is disabled.
2910 * @param pDevIns Device instance.
2911 * @thread The emulation thread.
2912 */
2913 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
2914
2915 /**
2916 * Set the VM error message
2917 *
2918 * @returns rc.
2919 * @param pDrvIns Driver instance.
2920 * @param rc VBox status code.
2921 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2922 * @param pszFormat Error message format string.
2923 * @param ... Error message arguments.
2924 */
2925 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2926
2927 /**
2928 * Set the VM error message
2929 *
2930 * @returns rc.
2931 * @param pDrvIns Driver instance.
2932 * @param rc VBox status code.
2933 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2934 * @param pszFormat Error message format string.
2935 * @param va Error message arguments.
2936 */
2937 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2938
2939 /**
2940 * Set the VM runtime error message
2941 *
2942 * @returns VBox status code.
2943 * @param pDevIns Device instance.
2944 * @param fFatal Whether it is a fatal error or not.
2945 * @param pszErrorID Error ID string.
2946 * @param pszFormat Error message format string.
2947 * @param ... Error message arguments.
2948 */
2949 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...));
2950
2951 /**
2952 * Set the VM runtime error message
2953 *
2954 * @returns VBox status code.
2955 * @param pDevIns Device instance.
2956 * @param fFatal Whether it is a fatal error or not.
2957 * @param pszErrorID Error ID string.
2958 * @param pszFormat Error message format string.
2959 * @param va Error message arguments.
2960 */
2961 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va));
2962
2963 /**
2964 * Set parameters for pending MMIO patch operation
2965 *
2966 * @returns rc.
2967 * @param pDevIns Device instance.
2968 * @param GCPhys MMIO physical address
2969 * @param pCachedData GC pointer to cached data
2970 */
2971 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
2972
2973 /** Just a safety precaution. */
2974 uint32_t u32TheEnd;
2975} PDMDEVHLPR0;
2976/** Pointer PDM Device R0 API. */
2977typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
2978/** Pointer PDM Device GC API. */
2979typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
2980
2981/** Current PDMDEVHLP version number. */
2982#define PDM_DEVHLPR0_VERSION 0xfb010000
2983
2984
2985
2986/**
2987 * PDM Device Instance.
2988 */
2989typedef struct PDMDEVINS
2990{
2991 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
2992 uint32_t u32Version;
2993 /** Device instance number. */
2994 RTUINT iInstance;
2995
2996 /** Pointer the GC PDM Device API. */
2997 PCPDMDEVHLPRC pDevHlpRC;
2998 /** Pointer to device instance data. */
2999 RTRCPTR pvInstanceDataRC;
3000
3001 /** Pointer the R0 PDM Device API. */
3002 PCPDMDEVHLPR0 pDevHlpR0;
3003 /** Pointer to device instance data (R0). */
3004 RTR0PTR pvInstanceDataR0;
3005
3006 /** Pointer the HC PDM Device API. */
3007 PCPDMDEVHLPR3 pDevHlpR3;
3008 /** Pointer to device instance data. */
3009 RTR3PTR pvInstanceDataR3;
3010
3011 /** Pointer to device registration structure. */
3012 R3PTRTYPE(PCPDMDEVREG) pDevReg;
3013 /** Configuration handle. */
3014 R3PTRTYPE(PCFGMNODE) pCfgHandle;
3015
3016 /** The base interface of the device.
3017 * The device constructor initializes this if it has any
3018 * device level interfaces to export. To obtain this interface
3019 * call PDMR3QueryDevice(). */
3020 PDMIBASE IBase;
3021 /** Align the internal data more naturally. */
3022 RTR3PTR R3PtrPadding;
3023
3024 /** Internal data. */
3025 union
3026 {
3027#ifdef PDMDEVINSINT_DECLARED
3028 PDMDEVINSINT s;
3029#endif
3030 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
3031 } Internal;
3032
3033 /** Device instance data. The size of this area is defined
3034 * in the PDMDEVREG::cbInstanceData field. */
3035 char achInstanceData[8];
3036} PDMDEVINS;
3037
3038/** Current PDMDEVINS version number. */
3039#define PDM_DEVINS_VERSION 0xf3020000
3040
3041/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3042#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3043
3044
3045/** @def PDMDEV_ASSERT_EMT
3046 * Assert that the current thread is the emulation thread.
3047 */
3048#ifdef VBOX_STRICT
3049# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3050#else
3051# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
3052#endif
3053
3054/** @def PDMDEV_ASSERT_OTHER
3055 * Assert that the current thread is NOT the emulation thread.
3056 */
3057#ifdef VBOX_STRICT
3058# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3059#else
3060# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
3061#endif
3062
3063/** @def PDMDEV_ASSERT_VMLOCK_OWNER
3064 * Assert that the current thread is owner of the VM lock.
3065 */
3066#ifdef VBOX_STRICT
3067# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
3068#else
3069# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
3070#endif
3071
3072/** @def PDMDEV_SET_ERROR
3073 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
3074 */
3075#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
3076 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
3077
3078/** @def PDMDEV_SET_RUNTIME_ERROR
3079 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
3080 */
3081#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFatal, pszErrorID, pszError) \
3082 PDMDevHlpVMSetRuntimeError(pDevIns, fFatal, pszErrorID, "%s", pszError)
3083
3084/** @def PDMDEVINS_2_RCPTR
3085 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
3086 */
3087#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3088
3089/** @def PDMDEVINS_2_R3PTR
3090 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
3091 */
3092#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3093
3094/** @def PDMDEVINS_2_R0PTR
3095 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
3096 */
3097#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
3098
3099
3100/**
3101 * VBOX_STRICT wrapper for pDevHlp->pfnDBGFStopV.
3102 *
3103 * @returns VBox status code which must be passed up to the VMM.
3104 * @param pDevIns Device instance.
3105 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3106 * @param pszFormat Message. (optional)
3107 * @param ... Message parameters.
3108 */
3109DECLINLINE(int) PDMDeviceDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
3110{
3111#ifdef VBOX_STRICT
3112# ifdef IN_RING3
3113 int rc;
3114 va_list args;
3115 va_start(args, pszFormat);
3116 rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
3117 va_end(args);
3118 return rc;
3119# else
3120 return VINF_EM_DBG_STOP;
3121# endif
3122#else
3123 NOREF(pDevIns);
3124 NOREF(pszFile);
3125 NOREF(iLine);
3126 NOREF(pszFunction);
3127 NOREF(pszFormat);
3128 return VINF_SUCCESS;
3129#endif
3130}
3131
3132
3133#ifdef IN_RING3
3134/**
3135 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
3136 */
3137DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
3138 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
3139 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
3140{
3141 return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
3142}
3143
3144/**
3145 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
3146 */
3147DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
3148 const char *pszOut, const char *pszIn, const char *pszOutStr,
3149 const char *pszInStr, const char *pszDesc)
3150{
3151 return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3152}
3153
3154/**
3155 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
3156 */
3157DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
3158 const char *pszOut, const char *pszIn, const char *pszOutStr,
3159 const char *pszInStr, const char *pszDesc)
3160{
3161 return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
3162}
3163
3164/**
3165 * @copydoc PDMDEVHLPR3::pfnMMIORegister
3166 */
3167DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
3168 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
3169 const char *pszDesc)
3170{
3171 return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
3172}
3173
3174/**
3175 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
3176 */
3177DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
3178 const char *pszWrite, const char *pszRead, const char *pszFill)
3179{
3180 return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3181}
3182
3183/**
3184 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
3185 */
3186DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
3187 const char *pszWrite, const char *pszRead, const char *pszFill)
3188{
3189 return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
3190}
3191
3192/**
3193 * @copydoc PDMDEVHLPR3::pfnROMRegister
3194 */
3195DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
3196{
3197 return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
3198}
3199/**
3200 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
3201 */
3202DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3203{
3204 return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
3205}
3206
3207/**
3208 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
3209 */
3210DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3211{
3212 return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
3213}
3214
3215/**
3216 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
3217 */
3218DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3219{
3220 return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
3221}
3222
3223/**
3224 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
3225 */
3226DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3227{
3228 return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
3229}
3230
3231/**
3232 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
3233 */
3234DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3235{
3236 return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
3237}
3238
3239/**
3240 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
3241 */
3242DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
3243 const char *pszDesc, PRTRCPTR pRCPtr)
3244{
3245 return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
3246}
3247
3248/**
3249 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
3250 */
3251DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3252{
3253 return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
3254}
3255
3256/**
3257 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
3258 */
3259DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3260{
3261 return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
3262}
3263
3264/**
3265 * @copydoc PDMDEVHLPR3::pfnSSMRegister
3266 */
3267DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
3268 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
3269 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
3270{
3271 return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
3272 pfnSavePrep, pfnSaveExec, pfnSaveDone,
3273 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
3274}
3275
3276/**
3277 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
3278 */
3279DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
3280{
3281 return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
3282}
3283
3284/**
3285 * @copydoc PDMDEVHLPR3::pfnPCIRegister
3286 */
3287DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
3288{
3289 return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
3290}
3291
3292/**
3293 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
3294 */
3295DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
3296{
3297 return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
3298}
3299
3300/**
3301 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
3302 */
3303DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
3304 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
3305{
3306 pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
3307}
3308
3309/**
3310 * @copydoc PDMDEVHLPR3::pfnDriverAttach
3311 */
3312DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
3313{
3314 return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
3315}
3316
3317/**
3318 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
3319 */
3320DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
3321{
3322 return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
3323}
3324
3325/**
3326 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
3327 */
3328DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
3329{
3330 return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
3331}
3332
3333/**
3334 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
3335 */
3336DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
3337{
3338 pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
3339}
3340
3341/**
3342 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
3343 */
3344DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
3345{
3346 return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
3347}
3348
3349/**
3350 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
3351 */
3352DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
3353{
3354 pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
3355}
3356
3357/**
3358 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
3359 */
3360DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
3361 const char *pszDesc, const char *pszName, ...)
3362{
3363 va_list va;
3364 va_start(va, pszName);
3365 pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
3366 va_end(va);
3367}
3368
3369/**
3370 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
3371 */
3372DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
3373 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
3374{
3375 return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
3376}
3377
3378/**
3379 * @copydoc PDMDEVHLPR3::pfnCritSectInit
3380 */
3381DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
3382{
3383 return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
3384}
3385
3386/**
3387 * @copydoc PDMDEVHLPR3::pfnUTCNow
3388 */
3389DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
3390{
3391 return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
3392}
3393
3394/**
3395 * @copydoc PDMDEVHLPR3::pfnGetVM
3396 */
3397DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
3398{
3399 return pDevIns->pDevHlpR3->pfnGetVM(pDevIns);
3400}
3401
3402/**
3403 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
3404 */
3405DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3406{
3407 return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
3408}
3409
3410/**
3411 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
3412 */
3413DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3414{
3415 return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
3416}
3417
3418/**
3419 * @copydoc PDMDEVHLPR3::pfnPhysReserve
3420 */
3421DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3422{
3423 return pDevIns->pDevHlpR3->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
3424}
3425
3426/**
3427 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
3428 */
3429DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3430{
3431 return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
3432}
3433
3434/**
3435 * @copydoc PDMDEVHLPR3::pfnVMState
3436 */
3437DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
3438{
3439 return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
3440}
3441
3442/**
3443 * @copydoc PDMDEVHLPR3::pfnA20Set
3444 */
3445DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
3446{
3447 pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
3448}
3449
3450/**
3451 * @copydoc PDMDEVHLPR3::pfnVMReset
3452 */
3453DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
3454{
3455 return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
3456}
3457
3458/**
3459 * @copydoc PDMDEVHLPR3::pfnVMSuspend
3460 */
3461DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
3462{
3463 return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
3464}
3465
3466/**
3467 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
3468 */
3469DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
3470{
3471 return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
3472}
3473
3474/**
3475 * @copydoc PDMDEVHLPR3::pfnDMARegister
3476 */
3477DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3478{
3479 return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
3480}
3481
3482/**
3483 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
3484 */
3485DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3486{
3487 return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
3488}
3489
3490/**
3491 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
3492 */
3493DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3494{
3495 return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
3496}
3497
3498/**
3499 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
3500 */
3501DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3502{
3503 return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
3504}
3505
3506/**
3507 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
3508 */
3509DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3510{
3511 return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
3512}
3513
3514/**
3515 * @copydoc PDMDEVHLPR3::pfnDMASchedule
3516 */
3517DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
3518{
3519 pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
3520}
3521
3522/**
3523 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
3524 */
3525DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3526{
3527 return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
3528}
3529
3530/**
3531 * @copydoc PDMDEVHLPR3::pfnCMOSRead
3532 */
3533DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3534{
3535 return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
3536}
3537
3538/**
3539 * @copydoc PDMDEVHLPR3::pfnGetCpuId
3540 */
3541DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3542{
3543 pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
3544}
3545
3546/**
3547 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
3548 */
3549DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3550 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
3551{
3552 return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
3553}
3554#endif /* IN_RING3 */
3555
3556
3557/**
3558 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
3559 */
3560DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3561{
3562 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3563}
3564
3565/**
3566 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
3567 */
3568DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3569{
3570 pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
3571}
3572
3573/**
3574 * @copydoc PDMDEVHLPR3::pfnISASetIrq
3575 */
3576DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3577{
3578 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3579}
3580
3581/**
3582 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
3583 */
3584DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
3585{
3586 pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
3587}
3588
3589/**
3590 * @copydoc PDMDEVHLPR3::pfnPhysRead
3591 */
3592DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3593{
3594 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
3595}
3596
3597/**
3598 * @copydoc PDMDEVHLPR3::pfnPhysWrite
3599 */
3600DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3601{
3602 pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
3603}
3604
3605/**
3606 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
3607 */
3608DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
3609{
3610 return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
3611}
3612
3613/**
3614 * @copydoc PDMDEVHLPR3::pfnVMSetError
3615 */
3616DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
3617{
3618 va_list va;
3619 va_start(va, pszFormat);
3620 pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
3621 va_end(va);
3622 return rc;
3623}
3624
3625/**
3626 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
3627 */
3628DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
3629{
3630 va_list va;
3631 int rc;
3632 va_start(va, pszFormat);
3633 rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
3634 va_end(va);
3635 return rc;
3636}
3637
3638
3639
3640/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
3641typedef struct PDMDEVREGCB *PPDMDEVREGCB;
3642
3643/**
3644 * Callbacks for VBoxDeviceRegister().
3645 */
3646typedef struct PDMDEVREGCB
3647{
3648 /** Interface version.
3649 * This is set to PDM_DEVREG_CB_VERSION. */
3650 uint32_t u32Version;
3651
3652 /**
3653 * Registers a device with the current VM instance.
3654 *
3655 * @returns VBox status code.
3656 * @param pCallbacks Pointer to the callback table.
3657 * @param pDevReg Pointer to the device registration record.
3658 * This data must be permanent and readonly.
3659 */
3660 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg));
3661
3662 /**
3663 * Allocate memory which is associated with current VM instance
3664 * and automatically freed on it's destruction.
3665 *
3666 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
3667 * @param pCallbacks Pointer to the callback table.
3668 * @param cb Number of bytes to allocate.
3669 */
3670 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVREGCB pCallbacks, size_t cb));
3671} PDMDEVREGCB;
3672
3673/** Current version of the PDMDEVREGCB structure. */
3674#define PDM_DEVREG_CB_VERSION 0xf4010000
3675
3676
3677/**
3678 * The VBoxDevicesRegister callback function.
3679 *
3680 * PDM will invoke this function after loading a device module and letting
3681 * the module decide which devices to register and how to handle conflicts.
3682 *
3683 * @returns VBox status code.
3684 * @param pCallbacks Pointer to the callback table.
3685 * @param u32Version VBox version number.
3686 */
3687typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
3688
3689/** @} */
3690
3691__END_DECLS
3692
3693#endif
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