VirtualBox

Changeset 12970 in vbox


Ignore:
Timestamp:
Oct 3, 2008 7:04:11 AM (17 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
37403
Message:

#1865: PDMINS.

Location:
trunk
Files:
10 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/pdmdev.h

    r12895 r12970  
    16601660 * PDM Device API.
    16611661 */
    1662 typedef struct PDMDEVHLP
     1662typedef struct PDMDEVHLPR3
    16631663{
    16641664    /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
     
    17801780     * @param   pszFill             Name of the GC function which is gonna handle Fill/memset operations. (optional)
    17811781     * @param   pszDesc             Obsolete. NULL is fine.
    1782      * @todo    Remove pszDesc in the next major revision of PDMDEVHLP.
     1782     * @todo    Remove pszDesc in the next major revision of PDMDEVHLPR3.
    17831783     */
    17841784    DECLR3CALLBACKMEMBER(int, pfnMMIORegisterGC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
     
    18011801     * @param   pszFill             Name of the GC function which is gonna handle Fill/memset operations. (optional)
    18021802     * @param   pszDesc             Obsolete. NULL is fine.
    1803      * @todo    Remove pszDesc in the next major revision of PDMDEVHLP.
     1803     * @todo    Remove pszDesc in the next major revision of PDMDEVHLPR3.
    18041804     */
    18051805    DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
     
    27162716    /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
    27172717    uint32_t                        u32TheEnd;
    2718 } PDMDEVHLP;
     2718} PDMDEVHLPR3;
    27192719#endif /* !IN_RING3 */
    2720 /** Pointer PDM Device API. */
    2721 typedef R3PTRTYPE(struct PDMDEVHLP *) PPDMDEVHLP;
    2722 /** Pointer PDM Device API. */
    2723 typedef R3PTRTYPE(const struct PDMDEVHLP *) PCPDMDEVHLP;
     2720/** Pointer to the R3 PDM Device API. */
     2721typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
     2722/** Pointer to the R3 PDM Device API, const variant. */
     2723typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
    27242724
    27252725/** Current PDMDEVHLP version number. */
     
    27282728
    27292729/**
    2730  * PDM Device API - GC Variant.
    2731  */
    2732 typedef struct PDMDEVHLPGC
    2733 {
    2734     /** Structure version. PDM_DEVHLPGC_VERSION defines the current version. */
     2730 * PDM Device API - RC Variant.
     2731 */
     2732typedef struct PDMDEVHLPRC
     2733{
     2734    /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
    27352735    uint32_t                    u32Version;
    27362736
     
    28452845    /** Just a safety precaution. */
    28462846    uint32_t                        u32TheEnd;
    2847 } PDMDEVHLPGC;
    2848 /** Pointer PDM Device GC API. */
    2849 typedef RCPTRTYPE(struct PDMDEVHLPGC *) PPDMDEVHLPGC;
    2850 /** Pointer PDM Device GC API. */
    2851 typedef RCPTRTYPE(const struct PDMDEVHLPGC *) PCPDMDEVHLPGC;
     2847} PDMDEVHLPRC;
     2848/** Pointer PDM Device RC API. */
     2849typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
     2850/** Pointer PDM Device RC API. */
     2851typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
    28522852
    28532853/** Current PDMDEVHLP version number. */
    2854 #define PDM_DEVHLPGC_VERSION  0xfb010000
     2854#define PDM_DEVHLPRC_VERSION  0xfb010000
    28552855
    28562856
     
    29932993    /** Device instance number. */
    29942994    RTUINT                      iInstance;
     2995
     2996    /** Pointer the GC PDM Device API. */
     2997    PCPDMDEVHLPRC               pDevHlpRC;
     2998    /** Pointer to device instance data. */
     2999    RTRCPTR                     pvInstanceDataRC;
     3000
     3001    /** Pointer the R0 PDM Device API. */
     3002    PCPDMDEVHLPR0               pDevHlpR0;
     3003    /** Pointer to device instance data (R0). */
     3004    RTR0PTR                     pvInstanceDataR0;
     3005
     3006    /** Pointer the HC PDM Device API. */
     3007    PCPDMDEVHLPR3               pDevHlpR3;
     3008    /** Pointer to device instance data. */
     3009    RTR3PTR                     pvInstanceDataR3;
     3010
     3011    /** Pointer to device registration structure.  */
     3012    R3PTRTYPE(PCPDMDEVREG)      pDevReg;
     3013    /** Configuration handle. */
     3014    R3PTRTYPE(PCFGMNODE)        pCfgHandle;
     3015
    29953016    /** The base interface of the device.
    29963017     * The device constructor initializes this if it has any
     
    29983019     * call PDMR3QueryDevice(). */
    29993020    PDMIBASE                    IBase;
     3021    /** Align the internal data more naturally. */
     3022    RTR3PTR                     R3PtrPadding;
    30003023
    30013024    /** Internal data. */
     
    30053028        PDMDEVINSINT            s;
    30063029#endif
    3007         uint8_t                 padding[HC_ARCH_BITS == 32 ? 48 : 96];
     3030        uint8_t                 padding[HC_ARCH_BITS == 32 ? 64 + 16 : 112];
    30083031    } Internal;
    30093032
    3010     /** Pointer the HC PDM Device API. */
    3011     R3PTRTYPE(PCPDMDEVHLP)      pDevHlp;
    3012     /** Pointer the R0 PDM Device API. */
    3013     R0PTRTYPE(PCPDMDEVHLPR0)    pDevHlpR0;
    3014     /** Pointer to device registration structure.  */
    3015     R3PTRTYPE(PCPDMDEVREG)      pDevReg;
    3016     /** Configuration handle. */
    3017     R3PTRTYPE(PCFGMNODE)        pCfgHandle;
    3018     /** Pointer to device instance data. */
    3019     R3PTRTYPE(void *)           pvInstanceDataR3;
    3020     /** Pointer to device instance data. */
    3021     R0PTRTYPE(void *)           pvInstanceDataR0;
    3022     /** Pointer the GC PDM Device API. */
    3023     RCPTRTYPE(PCPDMDEVHLPGC)    pDevHlpGC;
    3024     /** Pointer to device instance data. */
    3025     RCPTRTYPE(void *)           pvInstanceDataGC;
    3026     /* padding to make achInstanceData aligned at 32 byte boundrary. */
    3027     uint32_t                    au32Padding[HC_ARCH_BITS == 32 ? 1 : 6];
    30283033    /** Device instance data. The size of this area is defined
    30293034     * in the PDMDEVREG::cbInstanceData field. */
     
    30313036} PDMDEVINS;
    30323037
    3033 /** Current DEVREG version number. */
    3034 #define PDM_DEVINS_VERSION  0xf3010000
     3038/** Current PDMDEVINS version number. */
     3039#define PDM_DEVINS_VERSION  0xf3020000
    30353040
    30363041/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
     
    30423047 */
    30433048#ifdef VBOX_STRICT
    3044 # define PDMDEV_ASSERT_EMT(pDevIns)  pDevIns->pDevHlp->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
     3049# define PDMDEV_ASSERT_EMT(pDevIns)  pDevIns->pDevHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
    30453050#else
    30463051# define PDMDEV_ASSERT_EMT(pDevIns)  do { } while (0)
     
    30513056 */
    30523057#ifdef VBOX_STRICT
    3053 # define PDMDEV_ASSERT_OTHER(pDevIns)  pDevIns->pDevHlp->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
     3058# define PDMDEV_ASSERT_OTHER(pDevIns)  pDevIns->pDevHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
    30543059#else
    30553060# define PDMDEV_ASSERT_OTHER(pDevIns)  do { } while (0)
     
    30603065 */
    30613066#ifdef VBOX_STRICT
    3062 # define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns)  pDevIns->pDevHlp->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
     3067# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns)  pDevIns->pDevHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
    30633068#else
    30643069# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns)  do { } while (0)
     
    30803085 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
    30813086 */
    3082 #define PDMDEVINS_2_RCPTR(pDevIns)  ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataGC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
     3087#define PDMDEVINS_2_RCPTR(pDevIns)  ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
    30833088
    30843089/** @def PDMDEVINS_2_R3PTR
     
    31093114    va_list args;
    31103115    va_start(args, pszFormat);
    3111     rc = pDevIns->pDevHlp->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
     3116    rc = pDevIns->pDevHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
    31123117    va_end(args);
    31133118    return rc;
     
    31283133#ifdef IN_RING3
    31293134/**
    3130  * @copydoc PDMDEVHLP::pfnIOPortRegister
     3135 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
    31313136 */
    31323137DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
     
    31343139                                        PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
    31353140{
    3136     return pDevIns->pDevHlp->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
    3137 }
    3138 
    3139 /**
    3140  * @copydoc PDMDEVHLP::pfnIOPortRegisterGC
     3141    return pDevIns->pDevHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
     3142}
     3143
     3144/**
     3145 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC
    31413146 */
    31423147DECLINLINE(int) PDMDevHlpIOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
     
    31443149                                          const char *pszInStr, const char *pszDesc)
    31453150{
    3146     return pDevIns->pDevHlp->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
    3147 }
    3148 
    3149 /**
    3150  * @copydoc PDMDEVHLP::pfnIOPortRegisterR0
     3151    return pDevIns->pDevHlpR3->pfnIOPortRegisterGC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
     3152}
     3153
     3154/**
     3155 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
    31513156 */
    31523157DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
     
    31543159                                          const char *pszInStr, const char *pszDesc)
    31553160{
    3156     return pDevIns->pDevHlp->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
    3157 }
    3158 
    3159 /**
    3160  * @copydoc PDMDEVHLP::pfnMMIORegister
     3161    return pDevIns->pDevHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
     3162}
     3163
     3164/**
     3165 * @copydoc PDMDEVHLPR3::pfnMMIORegister
    31613166 */
    31623167DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
     
    31643169                                      const char *pszDesc)
    31653170{
    3166     return pDevIns->pDevHlp->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
    3167 }
    3168 
    3169 /**
    3170  * @copydoc PDMDEVHLP::pfnMMIORegisterGC
     3171    return pDevIns->pDevHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
     3172}
     3173
     3174/**
     3175 * @copydoc PDMDEVHLPR3::pfnMMIORegisterGC
    31713176 */
    31723177DECLINLINE(int) PDMDevHlpMMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
    31733178                                        const char *pszWrite, const char *pszRead, const char *pszFill)
    31743179{
    3175     return pDevIns->pDevHlp->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
    3176 }
    3177 
    3178 /**
    3179  * @copydoc PDMDEVHLP::pfnMMIORegisterR0
     3180    return pDevIns->pDevHlpR3->pfnMMIORegisterGC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
     3181}
     3182
     3183/**
     3184 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
    31803185 */
    31813186DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
    31823187                                        const char *pszWrite, const char *pszRead, const char *pszFill)
    31833188{
    3184     return pDevIns->pDevHlp->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
    3185 }
    3186 
    3187 /**
    3188  * @copydoc PDMDEVHLP::pfnROMRegister
     3189    return pDevIns->pDevHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill, NULL);
     3190}
     3191
     3192/**
     3193 * @copydoc PDMDEVHLPR3::pfnROMRegister
    31893194 */
    31903195DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
    31913196{
    3192     return pDevIns->pDevHlp->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
    3193 }
    3194 /**
    3195  * @copydoc PDMDEVHLP::pfnROMProtectShadow
     3197    return pDevIns->pDevHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
     3198}
     3199/**
     3200 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
    31963201 */
    31973202DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
    31983203{
    3199     return pDevIns->pDevHlp->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
    3200 }
    3201 
    3202 /**
    3203  * @copydoc PDMDEVHLP::pfnMMIO2Register
     3204    return pDevIns->pDevHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange);
     3205}
     3206
     3207/**
     3208 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
    32043209 */
    32053210DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
    32063211{
    3207     return pDevIns->pDevHlp->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
    3208 }
    3209 
    3210 /**
    3211  * @copydoc PDMDEVHLP::pfnMMIO2Deregister
     3212    return pDevIns->pDevHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
     3213}
     3214
     3215/**
     3216 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
    32123217 */
    32133218DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
    32143219{
    3215     return pDevIns->pDevHlp->pfnMMIO2Deregister(pDevIns, iRegion);
    3216 }
    3217 
    3218 /**
    3219  * @copydoc PDMDEVHLP::pfnMMIO2Map
     3220    return pDevIns->pDevHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
     3221}
     3222
     3223/**
     3224 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
    32203225 */
    32213226DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
    32223227{
    3223     return pDevIns->pDevHlp->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
    3224 }
    3225 
    3226 /**
    3227  * @copydoc PDMDEVHLP::pfnMMIO2Unmap
     3228    return pDevIns->pDevHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
     3229}
     3230
     3231/**
     3232 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
    32283233 */
    32293234DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
    32303235{
    3231     return pDevIns->pDevHlp->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
    3232 }
    3233 
    3234 /**
    3235  * @copydoc PDMDEVHLP::pfnMMHyperMapMMIO2
     3236    return pDevIns->pDevHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
     3237}
     3238
     3239/**
     3240 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
    32363241 */
    32373242DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
    32383243                                         const char *pszDesc, PRTRCPTR pRCPtr)
    32393244{
    3240     return pDevIns->pDevHlp->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
    3241 }
    3242 
    3243 /**
    3244  * @copydoc PDMDEVHLP::pfnRegisterVMMDevHeap
     3245    return pDevIns->pDevHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
     3246}
     3247
     3248/**
     3249 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
    32453250 */
    32463251DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
    32473252{
    3248     return pDevIns->pDevHlp->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
    3249 }
    3250 
    3251 /**
    3252  * @copydoc PDMDEVHLP::pfnUnregisterVMMDevHeap
     3253    return pDevIns->pDevHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
     3254}
     3255
     3256/**
     3257 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
    32533258 */
    32543259DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
    32553260{
    3256     return pDevIns->pDevHlp->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
    3257 }
    3258 
    3259 /**
    3260  * @copydoc PDMDEVHLP::pfnSSMRegister
     3261    return pDevIns->pDevHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
     3262}
     3263
     3264/**
     3265 * @copydoc PDMDEVHLPR3::pfnSSMRegister
    32613266 */
    32623267DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
     
    32643269                                     PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
    32653270{
    3266     return pDevIns->pDevHlp->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
     3271    return pDevIns->pDevHlpR3->pfnSSMRegister(pDevIns, pszName, u32Instance, u32Version, cbGuess,
    32673272                                            pfnSavePrep, pfnSaveExec, pfnSaveDone,
    32683273                                            pfnLoadPrep, pfnLoadExec, pfnLoadDone);
     
    32703275
    32713276/**
    3272  * @copydoc PDMDEVHLP::pfnTMTimerCreate
     3277 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
    32733278 */
    32743279DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
    32753280{
    3276     return pDevIns->pDevHlp->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
    3277 }
    3278 
    3279 /**
    3280  * @copydoc PDMDEVHLP::pfnPCIRegister
     3281    return pDevIns->pDevHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
     3282}
     3283
     3284/**
     3285 * @copydoc PDMDEVHLPR3::pfnPCIRegister
    32813286 */
    32823287DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
    32833288{
    3284     return pDevIns->pDevHlp->pfnPCIRegister(pDevIns, pPciDev);
    3285 }
    3286 
    3287 /**
    3288  * @copydoc PDMDEVHLP::pfnPCIIORegionRegister
     3289    return pDevIns->pDevHlpR3->pfnPCIRegister(pDevIns, pPciDev);
     3290}
     3291
     3292/**
     3293 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
    32893294 */
    32903295DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
    32913296{
    3292     return pDevIns->pDevHlp->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
    3293 }
    3294 
    3295 /**
    3296  * @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks
     3297    return pDevIns->pDevHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
     3298}
     3299
     3300/**
     3301 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
    32973302 */
    32983303DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
    32993304                                                PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
    33003305{
    3301     pDevIns->pDevHlp->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
    3302 }
    3303 
    3304 /**
    3305  * @copydoc PDMDEVHLP::pfnDriverAttach
     3306    pDevIns->pDevHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
     3307}
     3308
     3309/**
     3310 * @copydoc PDMDEVHLPR3::pfnDriverAttach
    33063311 */
    33073312DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
    33083313{
    3309     return pDevIns->pDevHlp->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
    3310 }
    3311 
    3312 /**
    3313  * @copydoc PDMDEVHLP::pfnMMHeapAlloc
     3314    return pDevIns->pDevHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
     3315}
     3316
     3317/**
     3318 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
    33143319 */
    33153320DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
    33163321{
    3317     return pDevIns->pDevHlp->pfnMMHeapAlloc(pDevIns, cb);
    3318 }
    3319 
    3320 /**
    3321  * @copydoc PDMDEVHLP::pfnMMHeapAllocZ
     3322    return pDevIns->pDevHlpR3->pfnMMHeapAlloc(pDevIns, cb);
     3323}
     3324
     3325/**
     3326 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
    33223327 */
    33233328DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
    33243329{
    3325     return pDevIns->pDevHlp->pfnMMHeapAllocZ(pDevIns, cb);
    3326 }
    3327 
    3328 /**
    3329  * @copydoc PDMDEVHLP::pfnMMHeapFree
     3330    return pDevIns->pDevHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
     3331}
     3332
     3333/**
     3334 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
    33303335 */
    33313336DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
    33323337{
    3333     pDevIns->pDevHlp->pfnMMHeapFree(pDevIns, pv);
    3334 }
    3335 
    3336 /**
    3337  * @copydoc PDMDEVHLP::pfnDBGFInfoRegister
     3338    pDevIns->pDevHlpR3->pfnMMHeapFree(pDevIns, pv);
     3339}
     3340
     3341/**
     3342 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
    33383343 */
    33393344DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
    33403345{
    3341     return pDevIns->pDevHlp->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
    3342 }
    3343 
    3344 /**
    3345  * @copydoc PDMDEVHLP::pfnSTAMRegister
     3346    return pDevIns->pDevHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
     3347}
     3348
     3349/**
     3350 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
    33463351 */
    33473352DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
    33483353{
    3349     pDevIns->pDevHlp->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
    3350 }
    3351 
    3352 /**
    3353  * @copydoc PDMDEVHLP::pfnSTAMRegisterF
     3354    pDevIns->pDevHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
     3355}
     3356
     3357/**
     3358 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
    33543359 */
    33553360DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
     
    33583363    va_list va;
    33593364    va_start(va, pszName);
    3360     pDevIns->pDevHlp->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
     3365    pDevIns->pDevHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
    33613366    va_end(va);
    33623367}
    33633368
    33643369/**
    3365  * @copydoc PDMDEVHLP::pfnPDMQueueCreate
     3370 * @copydoc PDMDEVHLPR3::pfnPDMQueueCreate
    33663371 */
    33673372DECLINLINE(int) PDMDevHlpPDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
    33683373                                        PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
    33693374{
    3370     return pDevIns->pDevHlp->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
    3371 }
    3372 
    3373 /**
    3374  * @copydoc PDMDEVHLP::pfnCritSectInit
     3375    return pDevIns->pDevHlpR3->pfnPDMQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
     3376}
     3377
     3378/**
     3379 * @copydoc PDMDEVHLPR3::pfnCritSectInit
    33753380 */
    33763381DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
    33773382{
    3378     return pDevIns->pDevHlp->pfnCritSectInit(pDevIns, pCritSect, pszName);
    3379 }
    3380 
    3381 /**
    3382  * @copydoc PDMDEVHLP::pfnUTCNow
     3383    return pDevIns->pDevHlpR3->pfnCritSectInit(pDevIns, pCritSect, pszName);
     3384}
     3385
     3386/**
     3387 * @copydoc PDMDEVHLPR3::pfnUTCNow
    33833388 */
    33843389DECLINLINE(PRTTIMESPEC) PDMDevHlpUTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
    33853390{
    3386     return pDevIns->pDevHlp->pfnUTCNow(pDevIns, pTime);
    3387 }
    3388 
    3389 /**
    3390  * @copydoc PDMDEVHLP::pfnGetVM
     3391    return pDevIns->pDevHlpR3->pfnUTCNow(pDevIns, pTime);
     3392}
     3393
     3394/**
     3395 * @copydoc PDMDEVHLPR3::pfnGetVM
    33913396 */
    33923397DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
    33933398{
    3394     return pDevIns->pDevHlp->pfnGetVM(pDevIns);
    3395 }
    3396 
    3397 /**
    3398  * @copydoc PDMDEVHLP::pfnPhysReadGCVirt
     3399    return pDevIns->pDevHlpR3->pfnGetVM(pDevIns);
     3400}
     3401
     3402/**
     3403 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
    33993404 */
    34003405DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
    34013406{
    3402     return pDevIns->pDevHlp->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
    3403 }
    3404 
    3405 /**
    3406  * @copydoc PDMDEVHLP::pfnPhysWriteGCVirt
     3407    return pDevIns->pDevHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
     3408}
     3409
     3410/**
     3411 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
    34073412 */
    34083413DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
    34093414{
    3410     return pDevIns->pDevHlp->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
    3411 }
    3412 
    3413 /**
    3414  * @copydoc PDMDEVHLP::pfnPhysReserve
     3415    return pDevIns->pDevHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
     3416}
     3417
     3418/**
     3419 * @copydoc PDMDEVHLPR3::pfnPhysReserve
    34153420 */
    34163421DECLINLINE(int) PDMDevHlpPhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
    34173422{
    3418     return pDevIns->pDevHlp->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
    3419 }
    3420 
    3421 /**
    3422  * @copydoc PDMDEVHLP::pfnPhysGCPtr2GCPhys
     3423    return pDevIns->pDevHlpR3->pfnPhysReserve(pDevIns, GCPhys, cbRange, pszDesc);
     3424}
     3425
     3426/**
     3427 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
    34233428 */
    34243429DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
    34253430{
    3426     return pDevIns->pDevHlp->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
    3427 }
    3428 
    3429 /**
    3430  * @copydoc PDMDEVHLP::pfnVMState
     3431    return pDevIns->pDevHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
     3432}
     3433
     3434/**
     3435 * @copydoc PDMDEVHLPR3::pfnVMState
    34313436 */
    34323437DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
    34333438{
    3434     return pDevIns->pDevHlp->pfnVMState(pDevIns);
    3435 }
    3436 
    3437 /**
    3438  * @copydoc PDMDEVHLP::pfnA20Set
     3439    return pDevIns->pDevHlpR3->pfnVMState(pDevIns);
     3440}
     3441
     3442/**
     3443 * @copydoc PDMDEVHLPR3::pfnA20Set
    34393444 */
    34403445DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
    34413446{
    3442     pDevIns->pDevHlp->pfnA20Set(pDevIns, fEnable);
    3443 }
    3444 
    3445 /**
    3446  * @copydoc PDMDEVHLP::pfnVMReset
     3447    pDevIns->pDevHlpR3->pfnA20Set(pDevIns, fEnable);
     3448}
     3449
     3450/**
     3451 * @copydoc PDMDEVHLPR3::pfnVMReset
    34473452 */
    34483453DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
    34493454{
    3450     return pDevIns->pDevHlp->pfnVMReset(pDevIns);
    3451 }
    3452 
    3453 /**
    3454  * @copydoc PDMDEVHLP::pfnVMSuspend
     3455    return pDevIns->pDevHlpR3->pfnVMReset(pDevIns);
     3456}
     3457
     3458/**
     3459 * @copydoc PDMDEVHLPR3::pfnVMSuspend
    34553460 */
    34563461DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
    34573462{
    3458     return pDevIns->pDevHlp->pfnVMSuspend(pDevIns);
    3459 }
    3460 
    3461 /**
    3462  * @copydoc PDMDEVHLP::pfnVMPowerOff
     3463    return pDevIns->pDevHlpR3->pfnVMSuspend(pDevIns);
     3464}
     3465
     3466/**
     3467 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
    34633468 */
    34643469DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
    34653470{
    3466     return pDevIns->pDevHlp->pfnVMPowerOff(pDevIns);
    3467 }
    3468 
    3469 /**
    3470  * @copydoc PDMDEVHLP::pfnDMARegister
     3471    return pDevIns->pDevHlpR3->pfnVMPowerOff(pDevIns);
     3472}
     3473
     3474/**
     3475 * @copydoc PDMDEVHLPR3::pfnDMARegister
    34713476 */
    34723477DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
    34733478{
    3474     return pDevIns->pDevHlp->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
    3475 }
    3476 
    3477 /**
    3478  * @copydoc PDMDEVHLP::pfnDMAReadMemory
     3479    return pDevIns->pDevHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
     3480}
     3481
     3482/**
     3483 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
    34793484 */
    34803485DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
    34813486{
    3482     return pDevIns->pDevHlp->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
    3483 }
    3484 
    3485 /**
    3486  * @copydoc PDMDEVHLP::pfnDMAWriteMemory
     3487    return pDevIns->pDevHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
     3488}
     3489
     3490/**
     3491 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
    34873492 */
    34883493DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
    34893494{
    3490     return pDevIns->pDevHlp->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
    3491 }
    3492 
    3493 /**
    3494  * @copydoc PDMDEVHLP::pfnDMASetDREQ
     3495    return pDevIns->pDevHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
     3496}
     3497
     3498/**
     3499 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
    34953500 */
    34963501DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
    34973502{
    3498     return pDevIns->pDevHlp->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
    3499 }
    3500 
    3501 /**
    3502  * @copydoc PDMDEVHLP::pfnDMAGetChannelMode
     3503    return pDevIns->pDevHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
     3504}
     3505
     3506/**
     3507 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
    35033508 */
    35043509DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
    35053510{
    3506     return pDevIns->pDevHlp->pfnDMAGetChannelMode(pDevIns, uChannel);
    3507 }
    3508 
    3509 /**
    3510  * @copydoc PDMDEVHLP::pfnDMASchedule
     3511    return pDevIns->pDevHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
     3512}
     3513
     3514/**
     3515 * @copydoc PDMDEVHLPR3::pfnDMASchedule
    35113516 */
    35123517DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
    35133518{
    3514     pDevIns->pDevHlp->pfnDMASchedule(pDevIns);
    3515 }
    3516 
    3517 /**
    3518  * @copydoc PDMDEVHLP::pfnCMOSWrite
     3519    pDevIns->pDevHlpR3->pfnDMASchedule(pDevIns);
     3520}
     3521
     3522/**
     3523 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
    35193524 */
    35203525DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
    35213526{
    3522     return pDevIns->pDevHlp->pfnCMOSWrite(pDevIns, iReg, u8Value);
    3523 }
    3524 
    3525 /**
    3526  * @copydoc PDMDEVHLP::pfnCMOSRead
     3527    return pDevIns->pDevHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
     3528}
     3529
     3530/**
     3531 * @copydoc PDMDEVHLPR3::pfnCMOSRead
    35273532 */
    35283533DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
    35293534{
    3530     return pDevIns->pDevHlp->pfnCMOSRead(pDevIns, iReg, pu8Value);
    3531 }
    3532 
    3533 /**
    3534  * @copydoc PDMDEVHLP::pfnGetCpuId
     3535    return pDevIns->pDevHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
     3536}
     3537
     3538/**
     3539 * @copydoc PDMDEVHLPR3::pfnGetCpuId
    35353540 */
    35363541DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
    35373542{
    3538     pDevIns->pDevHlp->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
    3539 }
    3540 
    3541 /**
    3542  * @copydoc PDMDEVHLP::pfnPDMThreadCreate
     3543    pDevIns->pDevHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
     3544}
     3545
     3546/**
     3547 * @copydoc PDMDEVHLPR3::pfnPDMThreadCreate
    35433548 */
    35443549DECLINLINE(int) PDMDevHlpPDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
    35453550                                         PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
    35463551{
    3547     return pDevIns->pDevHlp->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
     3552    return pDevIns->pDevHlpR3->pfnPDMThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
    35483553}
    35493554#endif /* IN_RING3 */
     
    35513556
    35523557/**
    3553  * @copydoc PDMDEVHLP::pfnPCISetIrq
     3558 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
    35543559 */
    35553560DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    35563561{
    3557 #ifdef IN_GC
    3558     pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
    3559 #elif defined(IN_RING0)
    3560     pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
    3561 #else
    3562     pDevIns->pDevHlp->pfnPCISetIrq(pDevIns, iIrq, iLevel);
    3563 #endif
    3564 }
    3565 
    3566 /**
    3567  * @copydoc PDMDEVHLP::pfnPCISetIrqNoWait
     3562    pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
     3563}
     3564
     3565/**
     3566 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
    35683567 */
    35693568DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    35703569{
    3571 #ifdef IN_GC
    3572     pDevIns->pDevHlpGC->pfnPCISetIrq(pDevIns, iIrq, iLevel);
    3573 #elif defined(IN_RING0)
    3574     pDevIns->pDevHlpR0->pfnPCISetIrq(pDevIns, iIrq, iLevel);
    3575 #else
    3576     pDevIns->pDevHlp->pfnPCISetIrqNoWait(pDevIns, iIrq, iLevel);
    3577 #endif
    3578 }
    3579 
    3580 /**
    3581  * @copydoc PDMDEVHLP::pfnISASetIrq
     3570    pDevIns->CTX_SUFF(pDevHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
     3571}
     3572
     3573/**
     3574 * @copydoc PDMDEVHLPR3::pfnISASetIrq
    35823575 */
    35833576DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    35843577{
    3585 #ifdef IN_GC
    3586     pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
    3587 #elif defined(IN_RING0)
    3588     pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
    3589 #else
    3590     pDevIns->pDevHlp->pfnISASetIrq(pDevIns, iIrq, iLevel);
    3591 #endif
    3592 }
    3593 
    3594 /**
    3595  * @copydoc PDMDEVHLP::pfnISASetIrqNoWait
     3578    pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
     3579}
     3580
     3581/**
     3582 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
    35963583 */
    35973584DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    35983585{
    3599 #ifdef IN_GC
    3600     pDevIns->pDevHlpGC->pfnISASetIrq(pDevIns, iIrq, iLevel);
    3601 #elif defined(IN_RING0)
    3602     pDevIns->pDevHlpR0->pfnISASetIrq(pDevIns, iIrq, iLevel);
    3603 #else
    3604     pDevIns->pDevHlp->pfnISASetIrqNoWait(pDevIns, iIrq, iLevel);
    3605 #endif
    3606 }
    3607 
    3608 /**
    3609  * @copydoc PDMDEVHLP::pfnPhysRead
     3586    pDevIns->CTX_SUFF(pDevHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
     3587}
     3588
     3589/**
     3590 * @copydoc PDMDEVHLPR3::pfnPhysRead
    36103591 */
    36113592DECLINLINE(void) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    36123593{
    3613 #ifdef IN_GC
    3614     pDevIns->pDevHlpGC->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
    3615 #elif defined(IN_RING0)
    3616     pDevIns->pDevHlpR0->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
    3617 #else
    3618     pDevIns->pDevHlp->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
    3619 #endif
    3620 }
    3621 
    3622 /**
    3623  * @copydoc PDMDEVHLP::pfnPhysWrite
     3594    pDevIns->CTX_SUFF(pDevHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
     3595}
     3596
     3597/**
     3598 * @copydoc PDMDEVHLPR3::pfnPhysWrite
    36243599 */
    36253600DECLINLINE(void) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    36263601{
    3627 #ifdef IN_GC
    3628     pDevIns->pDevHlpGC->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
    3629 #elif defined(IN_RING0)
    3630     pDevIns->pDevHlpR0->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
    3631 #else
    3632     pDevIns->pDevHlp->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
    3633 #endif
    3634 }
    3635 
    3636 /**
    3637  * @copydoc PDMDEVHLP::pfnA20IsEnabled
     3602    pDevIns->CTX_SUFF(pDevHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
     3603}
     3604
     3605/**
     3606 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
    36383607 */
    36393608DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
    36403609{
    3641 #ifdef IN_GC
    3642     return pDevIns->pDevHlpGC->pfnA20IsEnabled(pDevIns);
    3643 #elif defined(IN_RING0)
    3644     return pDevIns->pDevHlpR0->pfnA20IsEnabled(pDevIns);
    3645 #else
    3646     return pDevIns->pDevHlp->pfnA20IsEnabled(pDevIns);
    3647 #endif
    3648 }
    3649 
    3650 /**
    3651  * @copydoc PDMDEVHLP::pfnVMSetError
     3610    return pDevIns->CTX_SUFF(pDevHlp)->pfnA20IsEnabled(pDevIns);
     3611}
     3612
     3613/**
     3614 * @copydoc PDMDEVHLPR3::pfnVMSetError
    36523615 */
    36533616DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
     
    36553618    va_list va;
    36563619    va_start(va, pszFormat);
    3657 #ifdef IN_GC
    3658     pDevIns->pDevHlpGC->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
    3659 #elif defined(IN_RING0)
    3660     pDevIns->pDevHlpR0->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
    3661 #else
    3662     pDevIns->pDevHlp->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
    3663 #endif
     3620    pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
    36643621    va_end(va);
    36653622    return rc;
     
    36673624
    36683625/**
    3669  * @copydoc PDMDEVHLP::pfnVMSetRuntimeError
     3626 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
    36703627 */
    36713628DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
     
    36743631    int rc;
    36753632    va_start(va, pszFormat);
    3676 #ifdef IN_GC
    3677     rc = pDevIns->pDevHlpGC->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
    3678 #elif defined(IN_RING0)
    3679     rc = pDevIns->pDevHlpR0->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
    3680 #else
    3681     rc = pDevIns->pDevHlp->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
    3682 #endif
     3633    rc = pDevIns->CTX_SUFF(pDevHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFatal, pszErrorID, pszFormat, va);
    36833634    va_end(va);
    36843635    return rc;
  • trunk/include/VBox/pdmins.h

    r12653 r12970  
    5353 * Converts a PDM Device, USB Device, or Driver instance pointer to a RC pointer to the instance data.
    5454 */
    55 #define PDMINS_2_DATA_RCPTR(pIns)   ( (pIns)->pvInstanceDataGC )
     55#define PDMINS_2_DATA_RCPTR(pIns)   ( (pIns)->pvInstanceDataRC )
    5656
    5757/** @def PDMINS_2_DATA_R3PTR
  • trunk/src/VBox/VMM/PDM.cpp

    r12807 r12970  
    311311     * Devices.
    312312     */
    313     RCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
    314     int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmGCDevHlp", &pDevHlpGC);
    315     AssertReleaseMsgRC(rc, ("rc=%Vrc when resolving g_pdmGCDevHlp\n", rc));
    316     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
     313    PCPDMDEVHLPRC pDevHlpRC;
     314    int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmRCDevHlp", &pDevHlpRC);
     315    AssertReleaseMsgRC(rc, ("rc=%Vrc when resolving g_pdmRCDevHlp\n", rc));
     316    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3)
    317317    {
    318318        if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
    319319        {
    320             pDevIns->pDevHlpGC = pDevHlpGC;
    321             pDevIns->pvInstanceDataGC = MMHyperR3ToRC(pVM, pDevIns->pvInstanceDataR3);
    322             pDevIns->pvInstanceDataR0 = MMHyperR3ToR0(pVM, pDevIns->pvInstanceDataR3);
    323             pDevIns->Internal.s.pVMGC = pVM->pVMGC;
    324             if (pDevIns->Internal.s.pPciBusHC)
    325                 pDevIns->Internal.s.pPciBusGC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusHC);
    326             if (pDevIns->Internal.s.pPciDeviceHC)
    327                 pDevIns->Internal.s.pPciDeviceGC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciDeviceHC);
     320            pDevIns->pDevHlpRC = pDevHlpRC;
     321            pDevIns->pvInstanceDataRC = MMHyperR3ToRC(pVM, pDevIns->pvInstanceDataR3);
     322            pDevIns->Internal.s.pVMRC = pVM->pVMRC;
     323            if (pDevIns->Internal.s.pPciBusR3)
     324                pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
     325            if (pDevIns->Internal.s.pPciDeviceR3)
     326                pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciDeviceR3);
    328327            if (pDevIns->pDevReg->pfnRelocate)
    329328            {
     
    416415
    417416    /* then the 'normal' ones. */
    418     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
    419     {
    420         pdmR3TermLuns(pVM, pDevIns->Internal.s.pLunsHC, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
     417    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3)
     418    {
     419        pdmR3TermLuns(pVM, pDevIns->Internal.s.pLunsR3, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
    421420
    422421        if (pDevIns->pDevReg->pfnDestruct)
     
    508507    /** @todo We might have to filter out some device classes, like USB attached devices. */
    509508    uint32_t i = 0;
    510     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC, i++)
     509    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3, i++)
    511510    {
    512511        SSMR3PutU32(pSSM, i);
     
    626625    uint32_t i = 0;
    627626    PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances;
    628     for (;;pDevIns = pDevIns->Internal.s.pNextHC, i++)
     627    for (;;pDevIns = pDevIns->Internal.s.pNextR3, i++)
    629628    {
    630629        /* Get the separator / terminator. */
     
    694693     * The attached drivers are processed first.
    695694     */
    696     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
    697     {
    698         for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
     695    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3)
     696    {
     697        for (PPDMLUN pLun = pDevIns->Internal.s.pLunsR3; pLun; pLun = pLun->pNext)
    699698            /** @todo Inverse the order here? */
    700699            for (PPDMDRVINS pDrvIns = pLun->pTop; pDrvIns; pDrvIns = pDrvIns->Internal.s.pDown)
     
    767766     * The attached drivers are processed first.
    768767     */
    769     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
    770     {
    771         for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
     768    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3)
     769    {
     770        for (PPDMLUN pLun = pDevIns->Internal.s.pLunsR3; pLun; pLun = pLun->pNext)
    772771            /** @todo Inverse the order here? */
    773772            for (PPDMDRVINS pDrvIns = pLun->pTop; pDrvIns; pDrvIns = pDrvIns->Internal.s.pDown)
     
    826825     * The attached drivers are processed first.
    827826     */
    828     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
    829     {
    830         for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
     827    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3)
     828    {
     829        for (PPDMLUN pLun = pDevIns->Internal.s.pLunsR3; pLun; pLun = pLun->pNext)
    831830            for (PPDMDRVINS pDrvIns = pLun->pTop; pDrvIns; pDrvIns = pDrvIns->Internal.s.pDown)
    832831                if (pDrvIns->pDrvReg->pfnSuspend)
     
    889888     * The attached drivers are processed first.
    890889     */
    891     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
    892     {
    893         for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
     890    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3)
     891    {
     892        for (PPDMLUN pLun = pDevIns->Internal.s.pLunsR3; pLun; pLun = pLun->pNext)
    894893            for (PPDMDRVINS pDrvIns = pLun->pTop; pDrvIns; pDrvIns = pDrvIns->Internal.s.pDown)
    895894                if (pDrvIns->pDrvReg->pfnResume)
     
    952951     * The attached drivers are processed first.
    953952     */
    954     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
    955     {
    956         for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
     953    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3)
     954    {
     955        for (PPDMLUN pLun = pDevIns->Internal.s.pLunsR3; pLun; pLun = pLun->pNext)
    957956            for (PPDMDRVINS pDrvIns = pLun->pTop; pDrvIns; pDrvIns = pDrvIns->Internal.s.pDown)
    958957                if (pDrvIns->pDrvReg->pfnPowerOff)
     
    10311030             * Iterate device instances.
    10321031             */
    1033             for (PPDMDEVINS pDevIns = pDev->pInstances; pDevIns; pDevIns = pDevIns->Internal.s.pPerDeviceNextHC)
     1032            for (PPDMDEVINS pDevIns = pDev->pInstances; pDevIns; pDevIns = pDevIns->Internal.s.pPerDeviceNextR3)
    10341033            {
    10351034                if (pDevIns->iInstance == iInstance)
  • trunk/src/VBox/VMM/PDMDevice.cpp

    r12807 r12970  
    8080/* VSlick regex:
    8181search : \om/\*\*.+?\*\/\nDECLCALLBACKMEMBER\(([^,]*), *pfn([^)]*)\)\(
    82 replace: \/\*\* @copydoc PDMDEVHLP::pfn\2 \*\/\nstatic DECLCALLBACK\(\1\) pdmR3DevHlp_\2\(
     82replace: \/\*\* @copydoc PDMDEVHLPR3::pfn\2 \*\/\nstatic DECLCALLBACK\(\1\) pdmR3DevHlp_\2\(
    8383 */
    8484
     
    298298 * The device helper structure for trusted devices.
    299299 */
    300 const PDMDEVHLP g_pdmR3DevHlpTrusted =
     300const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
    301301{
    302302    PDM_DEVHLP_VERSION,
     
    394394 * The device helper structure for non-trusted devices.
    395395 */
    396 const PDMDEVHLP g_pdmR3DevHlpUnTrusted =
     396const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
    397397{
    398398    PDM_DEVHLP_VERSION,
     
    601601
    602602    /*
    603      * Get the GC & R0 devhlps and create the devhlp R3 task queue.
    604      */
    605     RCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
    606     int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmGCDevHlp", &pDevHlpGC);
     603     * Get the RC & R0 devhlps and create the devhlp R3 task queue.
     604     */
     605    PCPDMDEVHLPRC pDevHlpRC;
     606    int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmRCDevHlp", &pDevHlpRC);
    607607    AssertReleaseRCReturn(rc, rc);
    608608
    609     R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
     609    PCPDMDEVHLPR0 pDevHlpR0;
    610610    rc = PDMR3GetSymbolR0(pVM, NULL, "g_pdmR0DevHlp", &pDevHlpR0);
    611611    AssertReleaseRCReturn(rc, rc);
     
    883883         */
    884884        pDevIns->u32Version                     = PDM_DEVINS_VERSION;
    885         //pDevIns->Internal.s.pNextHC             = NULL;
    886         //pDevIns->Internal.s.pPerDeviceNextHC    = NULL;
    887         pDevIns->Internal.s.pDevHC              = paDevs[i].pDev;
    888         pDevIns->Internal.s.pVMHC               = pVM;
    889         pDevIns->Internal.s.pVMGC               = pVM->pVMGC;
    890         //pDevIns->Internal.s.pLunsHC             = NULL;
     885        //pDevIns->Internal.s.pNextR3             = NULL;
     886        //pDevIns->Internal.s.pPerDeviceNextR3    = NULL;
     887        pDevIns->Internal.s.pDevR3              = paDevs[i].pDev;
     888        pDevIns->Internal.s.pVMR3               = pVM;
     889        pDevIns->Internal.s.pVMR0               = pVM->pVMR0;
     890        pDevIns->Internal.s.pVMRC               = pVM->pVMRC;
     891        //pDevIns->Internal.s.pLunsR3             = NULL;
    891892        pDevIns->Internal.s.pCfgHandle          = paDevs[i].pNode;
    892         //pDevIns->Internal.s.pPciDevice          = NULL;
    893         //pDevIns->Internal.s.pPciBus             = NULL; /** @todo pci bus selection. (in 2008 perhaps) */
    894         pDevIns->pDevHlp                        = fTrusted ? &g_pdmR3DevHlpTrusted : &g_pdmR3DevHlpUnTrusted;
    895         pDevIns->pDevHlpGC                      = pDevHlpGC;
     893        //pDevIns->Internal.s.pPciDeviceR3        = NULL;
     894        //pDevIns->Internal.s.pPciBusR3           = NULL; /** @todo pci bus selection. (in 2008 perhaps) */
     895        //pDevIns->Internal.s.pPciDeviceR0        = 0;
     896        //pDevIns->Internal.s.pPciBusR0           = 0;
     897        //pDevIns->Internal.s.pPciDeviceRC        = 0;
     898        //pDevIns->Internal.s.pPciBusRC           = 0;
     899        pDevIns->pDevHlpR3                      = fTrusted ? &g_pdmR3DevHlpTrusted : &g_pdmR3DevHlpUnTrusted;
     900        pDevIns->pDevHlpRC                      = pDevHlpRC;
    896901        pDevIns->pDevHlpR0                      = pDevHlpR0;
    897902        pDevIns->pDevReg                        = paDevs[i].pDev->pDevReg;
     
    899904        pDevIns->iInstance                      = paDevs[i].iInstance;
    900905        pDevIns->pvInstanceDataR3               = &pDevIns->achInstanceData[0];
    901         pDevIns->pvInstanceDataGC               = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC
    902                                                    ? MMHyperHC2GC(pVM, pDevIns->pvInstanceDataR3) : 0;
    903         pDevIns->pvInstanceDataR0               =  pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0
    904                                                    ? MMHyperR3ToR0(pVM, pDevIns->pvInstanceDataR3) : 0;
     906        pDevIns->pvInstanceDataRC               = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC
     907                                                ? MMHyperR3ToRC(pVM, pDevIns->pvInstanceDataR3) : NIL_RTRCPTR;
     908        pDevIns->pvInstanceDataR0               = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0
     909                                                ? MMHyperR3ToR0(pVM, pDevIns->pvInstanceDataR3) : NIL_RTR0PTR;
    905910
    906911        /*
     
    913918        else
    914919        {
    915             while (pPrev1->Internal.s.pNextHC)
    916                 pPrev1 = pPrev1->Internal.s.pNextHC;
    917             pPrev1->Internal.s.pNextHC = pDevIns;
     920            while (pPrev1->Internal.s.pNextR3)
     921                pPrev1 = pPrev1->Internal.s.pNextR3;
     922            pPrev1->Internal.s.pNextR3 = pDevIns;
    918923        }
    919924
     
    924929        else
    925930        {
    926             while (pPrev2->Internal.s.pPerDeviceNextHC)
    927                 pPrev2 = pPrev2->Internal.s.pPerDeviceNextHC;
    928             pPrev2->Internal.s.pPerDeviceNextHC = pDevIns;
     931            while (pPrev2->Internal.s.pPerDeviceNextR3)
     932                pPrev2 = pPrev2->Internal.s.pPerDeviceNextR3;
     933            pPrev2->Internal.s.pPerDeviceNextR3 = pDevIns;
    929934        }
    930935
     
    967972    }
    968973
    969     for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
     974    for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextR3)
    970975    {
    971976        if (pDevIns->pDevReg->pfnInitComplete)
     
    12221227
    12231228
    1224 /** @copydoc PDMDEVHLP::pfnIOPortRegister */
     1229/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
    12251230static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
    12261231                                                    PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
     
    12291234    LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
    12301235             Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
    1231     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
    1232 
    1233     int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
     1236    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
     1237
     1238    int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
    12341239
    12351240    LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    12381243
    12391244
    1240 /** @copydoc PDMDEVHLP::pfnIOPortRegisterGC */
     1245/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
    12411246static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
    12421247                                                      const char *pszOut, const char *pszIn,
     
    12441249{
    12451250    PDMDEV_ASSERT_DEVINS(pDevIns);
    1246     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1251    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    12471252    LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
    12481253             Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
     
    12581263        if (pszIn)
    12591264        {
    1260             rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszIn, &GCPtrIn);
     1265            rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szGCMod, pszIn, &GCPtrIn);
    12611266            AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szGCMod, pszIn));
    12621267        }
     
    12641269        if (pszOut && VBOX_SUCCESS(rc))
    12651270        {
    1266             rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszOut, &GCPtrOut);
     1271            rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szGCMod, pszOut, &GCPtrOut);
    12671272            AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szGCMod, pszOut));
    12681273        }
     
    12701275        if (pszInStr && VBOX_SUCCESS(rc))
    12711276        {
    1272             rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszInStr, &GCPtrInStr);
     1277            rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szGCMod, pszInStr, &GCPtrInStr);
    12731278            AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szGCMod, pszInStr));
    12741279        }
     
    12761281        if (pszOutStr && VBOX_SUCCESS(rc))
    12771282        {
    1278             rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszOutStr, &GCPtrOutStr);
     1283            rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szGCMod, pszOutStr, &GCPtrOutStr);
    12791284            AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szGCMod, pszOutStr));
    12801285        }
    12811286
    12821287        if (VBOX_SUCCESS(rc))
    1283             rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, GCPtrOut, GCPtrIn, GCPtrOutStr, GCPtrInStr, pszDesc);
     1288            rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, GCPtrOut, GCPtrIn, GCPtrOutStr, GCPtrInStr, pszDesc);
    12841289    }
    12851290    else
     
    12941299
    12951300
    1296 /** @copydoc PDMDEVHLP::pfnIOPortRegisterR0 */
     1301/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
    12971302static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
    12981303                                                      const char *pszOut, const char *pszIn,
     
    13001305{
    13011306    PDMDEV_ASSERT_DEVINS(pDevIns);
    1302     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1307    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    13031308    LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
    13041309             Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
     
    13141319        if (pszIn)
    13151320        {
    1316             rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
     1321            rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
    13171322            AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
    13181323        }
     
    13201325        if (pszOut && VBOX_SUCCESS(rc))
    13211326        {
    1322             rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
     1327            rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
    13231328            AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
    13241329        }
     
    13261331        if (pszInStr && VBOX_SUCCESS(rc))
    13271332        {
    1328             rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
     1333            rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
    13291334            AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
    13301335        }
     
    13321337        if (pszOutStr && VBOX_SUCCESS(rc))
    13331338        {
    1334             rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
     1339            rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
    13351340            AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
    13361341        }
    13371342
    13381343        if (VBOX_SUCCESS(rc))
    1339             rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
     1344            rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
    13401345    }
    13411346    else
     
    13501355
    13511356
    1352 /** @copydoc PDMDEVHLP::pfnIOPortDeregister */
     1357/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
    13531358static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
    13541359{
    13551360    PDMDEV_ASSERT_DEVINS(pDevIns);
    1356     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1361    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    13571362    LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
    13581363             Port, cPorts));
    13591364
    1360     int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts);
     1365    int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
    13611366
    13621367    LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    13651370
    13661371
    1367 /** @copydoc PDMDEVHLP::pfnMMIORegister */
     1372/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
    13681373static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
    13691374                                                  PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
     
    13711376{
    13721377    PDMDEV_ASSERT_DEVINS(pDevIns);
    1373     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1378    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    13741379    LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
    13751380             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
    13761381
    1377     int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
     1382    int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
    13781383
    13791384    LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    13821387
    13831388
    1384 /** @copydoc PDMDEVHLP::pfnMMIORegisterGC */
     1389/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
    13851390static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
    13861391                                                    const char *pszWrite, const char *pszRead, const char *pszFill,
     
    13881393{
    13891394    PDMDEV_ASSERT_DEVINS(pDevIns);
    1390     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1395    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    13911396    LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
    13921397             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
     
    14021407        RTGCPTR32 GCPtrWrite = 0;
    14031408        if (pszWrite)
    1404             rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszWrite, &GCPtrWrite);
     1409            rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szGCMod, pszWrite, &GCPtrWrite);
    14051410        RTGCPTR32 GCPtrRead = 0;
    14061411        int rc2 = VINF_SUCCESS;
    14071412        if (pszRead)
    1408             rc2 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszRead, &GCPtrRead);
     1413            rc2 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szGCMod, pszRead, &GCPtrRead);
    14091414        RTGCPTR32 GCPtrFill = 0;
    14101415        int rc3 = VINF_SUCCESS;
    14111416        if (pszFill)
    1412             rc3 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszFill, &GCPtrFill);
     1417            rc3 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szGCMod, pszFill, &GCPtrFill);
    14131418        if (VBOX_SUCCESS(rc) && VBOX_SUCCESS(rc2) && VBOX_SUCCESS(rc3))
    1414             rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, GCPtrWrite, GCPtrRead, GCPtrFill);
     1419            rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, GCPtrWrite, GCPtrRead, GCPtrFill);
    14151420        else
    14161421        {
     
    14341439}
    14351440
    1436 /** @copydoc PDMDEVHLP::pfnMMIORegisterR0 */
     1441/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
    14371442static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
    14381443                                                    const char *pszWrite, const char *pszRead, const char *pszFill,
     
    14401445{
    14411446    PDMDEV_ASSERT_DEVINS(pDevIns);
    1442     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1447    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    14431448    LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
    14441449             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
     
    14541459        R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
    14551460        if (pszWrite)
    1456             rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
     1461            rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
    14571462        R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
    14581463        int rc2 = VINF_SUCCESS;
    14591464        if (pszRead)
    1460             rc2 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
     1465            rc2 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
    14611466        R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
    14621467        int rc3 = VINF_SUCCESS;
    14631468        if (pszFill)
    1464             rc3 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
     1469            rc3 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
    14651470        if (VBOX_SUCCESS(rc) && VBOX_SUCCESS(rc2) && VBOX_SUCCESS(rc3))
    1466             rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
     1471            rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
    14671472        else
    14681473        {
     
    14871492
    14881493
    1489 /** @copydoc PDMDEVHLP::pfnMMIODeregister */
     1494/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
    14901495static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
    14911496{
    14921497    PDMDEV_ASSERT_DEVINS(pDevIns);
    1493     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1498    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    14941499    LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x\n",
    14951500             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
    14961501
    1497     int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange);
     1502    int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
    14981503
    14991504    LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    15021507
    15031508
    1504 /** @copydoc PDMDEVHLP::pfnROMRegister */
     1509/** @copydoc PDMDEVHLPR3::pfnROMRegister */
    15051510static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
    15061511{
    15071512    PDMDEV_ASSERT_DEVINS(pDevIns);
    1508     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1513    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    15091514    LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvBinary=%p fShadow=%RTbool pszDesc=%p:{%s}\n",
    15101515             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc, pszDesc));
    15111516
    1512     int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
     1517    int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
    15131518
    15141519    LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    15171522
    15181523
    1519 /** @copydoc PDMDEVHLP::pfnSSMRegister */
     1524/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
    15201525static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
    15211526                                                 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
     
    15231528{
    15241529    PDMDEV_ASSERT_DEVINS(pDevIns);
    1525     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1530    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    15261531    LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
    15271532             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
    15281533
    1529     int rc = SSMR3Register(pDevIns->Internal.s.pVMHC, pDevIns, pszName, u32Instance, u32Version, cbGuess,
     1534    int rc = SSMR3Register(pDevIns->Internal.s.pVMR3, pDevIns, pszName, u32Instance, u32Version, cbGuess,
    15301535                           pfnSavePrep, pfnSaveExec, pfnSaveDone,
    15311536                           pfnLoadPrep, pfnLoadExec, pfnLoadDone);
     
    15361541
    15371542
    1538 /** @copydoc PDMDEVHLP::pfnTMTimerCreate */
     1543/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
    15391544static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
    15401545{
    15411546    PDMDEV_ASSERT_DEVINS(pDevIns);
    1542     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     1547    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    15431548    LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
    15441549             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
    15451550
    1546     int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMHC, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
     1551    int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
    15471552
    15481553    LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    15511556
    15521557
    1553 /** @copydoc PDMDEVHLP::pfnTMTimerCreateExternal */
     1558/** @copydoc PDMDEVHLPR3::pfnTMTimerCreateExternal */
    15541559static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)
    15551560{
    15561561    PDMDEV_ASSERT_DEVINS(pDevIns);
    1557     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
    1558 
    1559     return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMHC, enmClock, pfnCallback, pvUser, pszDesc);
    1560 }
    1561 
    1562 /** @copydoc PDMDEVHLP::pfnPCIRegister */
     1562    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
     1563
     1564    return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMR3, enmClock, pfnCallback, pvUser, pszDesc);
     1565}
     1566
     1567/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
    15631568static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
    15641569{
    15651570    PDMDEV_ASSERT_DEVINS(pDevIns);
    1566     PVM pVM = pDevIns->Internal.s.pVMHC;
     1571    PVM pVM = pDevIns->Internal.s.pVMR3;
    15671572    VM_ASSERT_EMT(pVM);
    15681573    LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Vhxs}\n",
     
    15841589        return VERR_INVALID_PARAMETER;
    15851590    }
    1586     if (pDevIns->Internal.s.pPciDeviceHC)
     1591    if (pDevIns->Internal.s.pPciDeviceR3)
    15871592    {
    15881593        /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
     
    15991604     * already have one. If not, we'll just take the first one.
    16001605     */
    1601     PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
     1606    PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
    16021607    if (!pBus)
    1603         pBus = pDevIns->Internal.s.pPciBusHC = &pVM->pdm.s.aPciBuses[0];
     1608        pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[0];
    16041609    int rc;
    16051610    if (pBus)
    16061611    {
    16071612        if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
    1608             pDevIns->Internal.s.pPciBusGC = MMHyperHC2GC(pVM, pDevIns->Internal.s.pPciBusHC);
     1613            pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
     1614        else
     1615            pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
     1616
     1617        if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
     1618            pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
     1619        else
     1620            pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
    16091621
    16101622        /*
     
    16541666        if (VBOX_SUCCESS(rc))
    16551667        {
    1656             pDevIns->Internal.s.pPciDeviceHC = pPciDev;
     1668            pPciDev->pDevIns = pDevIns;
     1669
     1670            pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
     1671            if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
     1672                pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
     1673            else
     1674                pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
     1675
    16571676            if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
    1658                 pDevIns->Internal.s.pPciDeviceGC = MMHyperHC2GC(pVM, pPciDev);
     1677                pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
    16591678            else
    1660                 pDevIns->Internal.s.pPciDeviceGC = 0;
    1661             pPciDev->pDevIns = pDevIns;
     1679                pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
     1680
    16621681            Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
    1663                  pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusHC->iBus));
     1682                 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
    16641683        }
    16651684    }
     
    16751694
    16761695
    1677 /** @copydoc PDMDEVHLP::pfnPCIIORegionRegister */
     1696/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
    16781697static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
    16791698{
    16801699    PDMDEV_ASSERT_DEVINS(pDevIns);
    1681     PVM pVM = pDevIns->Internal.s.pVMHC;
     1700    PVM pVM = pDevIns->Internal.s.pVMR3;
    16821701    VM_ASSERT_EMT(pVM);
    16831702    LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
     
    17161735     */
    17171736    int rc;
    1718     PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
     1737    PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
    17191738    if (pPciDev)
    17201739    {
     
    17301749        }
    17311750
    1732         PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
     1751        PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
    17331752        Assert(pBus);
    17341753        pdmLock(pVM);
     
    17471766
    17481767
    1749 /** @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks */
     1768/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
    17501769static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
    17511770                                                            PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
    17521771{
    17531772    PDMDEV_ASSERT_DEVINS(pDevIns);
    1754     PVM pVM = pDevIns->Internal.s.pVMHC;
     1773    PVM pVM = pDevIns->Internal.s.pVMR3;
    17551774    VM_ASSERT_EMT(pVM);
    17561775    LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
     
    17671786
    17681787    if (!pPciDev)
    1769         pPciDev = pDevIns->Internal.s.pPciDeviceHC;
     1788        pPciDev = pDevIns->Internal.s.pPciDeviceR3;
    17701789    AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
    1771     PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
     1790    PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
    17721791    AssertRelease(pBus);
    17731792    AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
     
    17841803
    17851804
    1786 /** @copydoc PDMDEVHLP::pfnPCISetIrq */
     1805/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
    17871806static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    17881807{
     
    17981817     * Must have a PCI device registered!
    17991818     */
    1800     PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
     1819    PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
    18011820    if (pPciDev)
    18021821    {
    1803         PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC; /** @todo the bus should be associated with the PCI device not the PDM device. */
     1822        PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
    18041823        Assert(pBus);
    1805         PVM pVM = pDevIns->Internal.s.pVMHC;
     1824        PVM pVM = pDevIns->Internal.s.pVMR3;
    18061825        pdmLock(pVM);
    18071826        pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
     
    18151834
    18161835
    1817 /** @copydoc PDMDEVHLP::pfnPCISetIrqNoWait */
     1836/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
    18181837static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    18191838{
     
    18221841
    18231842
    1824 /** @copydoc PDMDEVHLP::pfnISASetIrq */
     1843/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
    18251844static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    18261845{
     
    18331852    /** @todo iIrq and iLevel checks. */
    18341853
    1835     PVM pVM = pDevIns->Internal.s.pVMHC;
     1854    PVM pVM = pDevIns->Internal.s.pVMR3;
    18361855    PDMIsaSetIrq(pVM, iIrq, iLevel);    /* (The API takes the lock.) */
    18371856
     
    18401859
    18411860
    1842 /** @copydoc PDMDEVHLP::pfnISASetIrqNoWait */
     1861/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
    18431862static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    18441863{
     
    18471866
    18481867
    1849 /** @copydoc PDMDEVHLP::pfnDriverAttach */
     1868/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
    18501869static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
    18511870{
    18521871    PDMDEV_ASSERT_DEVINS(pDevIns);
    1853     PVM pVM = pDevIns->Internal.s.pVMHC;
     1872    PVM pVM = pDevIns->Internal.s.pVMR3;
    18541873    VM_ASSERT_EMT(pVM);
    18551874    LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
     
    18601879     */
    18611880    PPDMLUN pLunPrev = NULL;
    1862     PPDMLUN pLun = pDevIns->Internal.s.pLunsHC;
     1881    PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
    18631882    for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
    18641883        if (pLun->iLun == iLun)
     
    18911910        pLun->pBase     = pBaseInterface;
    18921911        if (!pLunPrev)
    1893             pDevIns->Internal.s.pLunsHC = pLun;
     1912            pDevIns->Internal.s.pLunsR3 = pLun;
    18941913        else
    18951914            pLunPrev->pNext = pLun;
     
    20182037
    20192038
    2020 /** @copydoc PDMDEVHLP::pfnMMHeapAlloc */
     2039/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
    20212040static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
    20222041{
     
    20242043    LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
    20252044
    2026     void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE_USER, cb);
     2045    void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
    20272046
    20282047    LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
     
    20312050
    20322051
    2033 /** @copydoc PDMDEVHLP::pfnMMHeapAllocZ */
     2052/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
    20342053static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
    20352054{
     
    20372056    LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
    20382057
    2039     void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE_USER, cb);
     2058    void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
    20402059
    20412060    LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
     
    20442063
    20452064
    2046 /** @copydoc PDMDEVHLP::pfnMMHeapFree */
     2065/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
    20472066static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
    20482067{
     
    20562075
    20572076
    2058 /** @copydoc PDMDEVHLP::pfnVMSetError */
     2077/** @copydoc PDMDEVHLPR3::pfnVMSetError */
    20592078static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
    20602079{
     
    20622081    va_list args;
    20632082    va_start(args, pszFormat);
    2064     int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
     2083    int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
    20652084    va_end(args);
    20662085    return rc;
     
    20682087
    20692088
    2070 /** @copydoc PDMDEVHLP::pfnVMSetErrorV */
     2089/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
    20712090static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
    20722091{
    20732092    PDMDEV_ASSERT_DEVINS(pDevIns);
    2074     int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
    2075     return rc;
    2076 }
    2077 
    2078 
    2079 /** @copydoc PDMDEVHLP::pfnVMSetRuntimeError */
     2093    int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
     2094    return rc;
     2095}
     2096
     2097
     2098/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
    20802099static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
    20812100{
     
    20832102    va_list args;
    20842103    va_start(args, pszFormat);
    2085     int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, args);
     2104    int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, args);
    20862105    va_end(args);
    20872106    return rc;
     
    20892108
    20902109
    2091 /** @copydoc PDMDEVHLP::pfnVMSetRuntimeErrorV */
     2110/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
    20922111static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
    20932112{
    20942113    PDMDEV_ASSERT_DEVINS(pDevIns);
    2095     int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, va);
    2096     return rc;
    2097 }
    2098 
    2099 
    2100 /** @copydoc PDMDEVHLP::pfnAssertEMT */
     2114    int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFatal, pszErrorID, pszFormat, va);
     2115    return rc;
     2116}
     2117
     2118
     2119/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
    21012120static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
    21022121{
    21032122    PDMDEV_ASSERT_DEVINS(pDevIns);
    2104     if (VM_IS_EMT(pDevIns->Internal.s.pVMHC))
     2123    if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
    21052124        return true;
    21062125
     
    21132132
    21142133
    2115 /** @copydoc PDMDEVHLP::pfnAssertOther */
     2134/** @copydoc PDMDEVHLPR3::pfnAssertOther */
    21162135static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
    21172136{
    21182137    PDMDEV_ASSERT_DEVINS(pDevIns);
    2119     if (!VM_IS_EMT(pDevIns->Internal.s.pVMHC))
     2138    if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
    21202139        return true;
    21212140
     
    21282147
    21292148
    2130 /** @copydoc PDMDEVHLP::pfnDBGFStopV */
     2149/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
    21312150static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
    21322151{
     
    21402159#endif
    21412160
    2142     PVM pVM = pDevIns->Internal.s.pVMHC;
     2161    PVM pVM = pDevIns->Internal.s.pVMR3;
    21432162    VM_ASSERT_EMT(pVM);
    21442163    int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
     
    21492168
    21502169
    2151 /** @copydoc PDMDEVHLP::pfnDBGFInfoRegister */
     2170/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
    21522171static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
    21532172{
     
    21562175             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
    21572176
    2158     PVM pVM = pDevIns->Internal.s.pVMHC;
     2177    PVM pVM = pDevIns->Internal.s.pVMR3;
    21592178    VM_ASSERT_EMT(pVM);
    21602179    int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
     
    21652184
    21662185
    2167 /** @copydoc PDMDEVHLP::pfnSTAMRegister */
     2186/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
    21682187static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
    21692188{
    21702189    PDMDEV_ASSERT_DEVINS(pDevIns);
    2171     PVM pVM = pDevIns->Internal.s.pVMHC;
     2190    PVM pVM = pDevIns->Internal.s.pVMR3;
    21722191    VM_ASSERT_EMT(pVM);
    21732192
     
    21782197
    21792198
    2180 /** @copydoc PDMDEVHLP::pfnSTAMRegisterF */
     2199/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
    21812200static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
    21822201                                                    STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
    21832202{
    21842203    PDMDEV_ASSERT_DEVINS(pDevIns);
    2185     PVM pVM = pDevIns->Internal.s.pVMHC;
     2204    PVM pVM = pDevIns->Internal.s.pVMR3;
    21862205    VM_ASSERT_EMT(pVM);
    21872206
     
    21962215
    21972216
    2198 /** @copydoc PDMDEVHLP::pfnSTAMRegisterV */
     2217/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
    21992218static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
    22002219                                                    STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
    22012220{
    22022221    PDMDEV_ASSERT_DEVINS(pDevIns);
    2203     PVM pVM = pDevIns->Internal.s.pVMHC;
     2222    PVM pVM = pDevIns->Internal.s.pVMR3;
    22042223    VM_ASSERT_EMT(pVM);
    22052224
     
    22112230
    22122231
    2213 /** @copydoc PDMDEVHLP::pfnRTCRegister */
     2232/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
    22142233static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
    22152234{
    22162235    PDMDEV_ASSERT_DEVINS(pDevIns);
    2217     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     2236    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    22182237    LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
    22192238             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
     
    22522271     * Only one DMA device.
    22532272     */
    2254     PVM pVM = pDevIns->Internal.s.pVMHC;
     2273    PVM pVM = pDevIns->Internal.s.pVMR3;
    22552274    if (pVM->pdm.s.pRtc)
    22562275    {
     
    22652284     */
    22662285    int rc = VINF_SUCCESS;
    2267     PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
     2286    PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
    22682287    if (pRtc)
    22692288    {
     
    22862305
    22872306
    2288 /** @copydoc PDMDEVHLP::pfnPDMQueueCreate */
     2307/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
    22892308static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
    22902309                                                    PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
     
    22942313             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
    22952314
    2296     PVM pVM = pDevIns->Internal.s.pVMHC;
     2315    PVM pVM = pDevIns->Internal.s.pVMR3;
    22972316    VM_ASSERT_EMT(pVM);
    22982317    int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
     
    23032322
    23042323
    2305 /** @copydoc PDMDEVHLP::pfnCritSectInit */
     2324/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
    23062325static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
    23072326{
     
    23102329             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
    23112330
    2312     PVM pVM = pDevIns->Internal.s.pVMHC;
     2331    PVM pVM = pDevIns->Internal.s.pVMR3;
    23132332    VM_ASSERT_EMT(pVM);
    23142333    int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
     
    23192338
    23202339
    2321 /** @copydoc PDMDEVHLP::pfnUTCNow */
     2340/** @copydoc PDMDEVHLPR3::pfnUTCNow */
    23222341static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
    23232342{
     
    23262345             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
    23272346
    2328     pTime = TMR3UTCNow(pDevIns->Internal.s.pVMHC, pTime);
     2347    pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
    23292348
    23302349    LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
     
    23332352
    23342353
    2335 /** @copydoc PDMDEVHLP::pfnPDMThreadCreate */
     2354/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
    23362355static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
    23372356                                                     PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
    23382357{
    23392358    PDMDEV_ASSERT_DEVINS(pDevIns);
    2340     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     2359    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    23412360    LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
    23422361             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
    23432362
    2344     int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMHC, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
     2363    int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
    23452364
    23462365    LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Vrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
     
    23502369
    23512370
    2352 /** @copydoc PDMDEVHLP::pfnGetVM */
     2371/** @copydoc PDMDEVHLPR3::pfnGetVM */
    23532372static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
    23542373{
    23552374    PDMDEV_ASSERT_DEVINS(pDevIns);
    2356     LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMHC));
    2357     return pDevIns->Internal.s.pVMHC;
    2358 }
    2359 
    2360 
    2361 /** @copydoc PDMDEVHLP::pfnPCIBusRegister */
     2375    LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
     2376    return pDevIns->Internal.s.pVMR3;
     2377}
     2378
     2379
     2380/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
    23622381static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
    23632382{
    23642383    PDMDEV_ASSERT_DEVINS(pDevIns);
    2365     PVM pVM = pDevIns->Internal.s.pVMHC;
     2384    PVM pVM = pDevIns->Internal.s.pVMR3;
    23662385    VM_ASSERT_EMT(pVM);
    23672386    LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
     
    24942513
    24952514
    2496 /** @copydoc PDMDEVHLP::pfnPICRegister */
     2515/** @copydoc PDMDEVHLPR3::pfnPICRegister */
    24972516static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
    24982517{
    24992518    PDMDEV_ASSERT_DEVINS(pDevIns);
    2500     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     2519    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    25012520    LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
    25022521             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
     
    25572576     * Only one PIC device.
    25582577     */
    2559     PVM pVM = pDevIns->Internal.s.pVMHC;
     2578    PVM pVM = pDevIns->Internal.s.pVMR3;
    25602579    if (pVM->pdm.s.Pic.pDevInsR3)
    25612580    {
     
    26332652
    26342653
    2635 /** @copydoc PDMDEVHLP::pfnAPICRegister */
     2654/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
    26362655static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
    26372656{
    26382657    PDMDEV_ASSERT_DEVINS(pDevIns);
    2639     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     2658    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    26402659    LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
    26412660             ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
     
    27362755     * Only one APIC device. (malc: only in UP case actually)
    27372756     */
    2738     PVM pVM = pDevIns->Internal.s.pVMHC;
     2757    PVM pVM = pDevIns->Internal.s.pVMR3;
    27392758    if (pVM->pdm.s.Apic.pDevInsR3)
    27402759    {
     
    28772896
    28782897
    2879 /** @copydoc PDMDEVHLP::pfnIOAPICRegister */
     2898/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
    28802899static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
    28812900{
    28822901    PDMDEV_ASSERT_DEVINS(pDevIns);
    2883     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     2902    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    28842903    LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
    28852904             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
     
    29262945     * If the I/O APIC does GC stuff so must the APIC.
    29272946     */
    2928     PVM pVM = pDevIns->Internal.s.pVMHC;
     2947    PVM pVM = pDevIns->Internal.s.pVMR3;
    29292948    if (!pVM->pdm.s.Apic.pDevInsR3)
    29302949    {
     
    30063025
    30073026
    3008 /** @copydoc PDMDEVHLP::pfnDMACRegister */
     3027/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
    30093028static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
    30103029{
    30113030    PDMDEV_ASSERT_DEVINS(pDevIns);
    3012     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3031    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    30133032    LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
    30143033             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
     
    30553074     * Only one DMA device.
    30563075     */
    3057     PVM pVM = pDevIns->Internal.s.pVMHC;
     3076    PVM pVM = pDevIns->Internal.s.pVMR3;
    30583077    if (pVM->pdm.s.pDmac)
    30593078    {
     
    30683087     */
    30693088    int rc = VINF_SUCCESS;
    3070     PPDMDMAC  pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
     3089    PPDMDMAC  pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
    30713090    if (pDmac)
    30723091    {
     
    30893108
    30903109
    3091 /** @copydoc PDMDEVHLP::pfnPhysRead */
     3110/** @copydoc PDMDEVHLPR3::pfnPhysRead */
    30923111static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    30933112{
     
    31013120     */
    31023121#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
    3103     PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
     3122    PGMPhysRead(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
    31043123#else
    3105     if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
    3106         PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
     3124    if (VM_IS_EMT(pDevIns->Internal.s.pVMR3) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMR3))
     3125        PGMPhysRead(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
    31073126    else
    31083127    {
     
    31103129        PVMREQ pReq;
    31113130        AssertCompileSize(RTGCPHYS, 4);
    3112         int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
    3113                                  (PFNRT)PGMPhysRead, 4, pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
     3131        int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMR3, &pReq, RT_INDEFINITE_WAIT,
     3132                                 (PFNRT)PGMPhysRead, 4, pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbRead);
    31143133        while (rc == VERR_TIMEOUT)
    31153134            rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
     
    31223141
    31233142
    3124 /** @copydoc PDMDEVHLP::pfnPhysWrite */
     3143/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
    31253144static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    31263145{
     
    31343153     */
    31353154#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
    3136     PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
     3155    PGMPhysWrite(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
    31373156#else
    3138     if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
    3139         PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
     3157    if (VM_IS_EMT(pDevIns->Internal.s.pVMR3) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMR3))
     3158        PGMPhysWrite(pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
    31403159    else
    31413160    {
     
    31433162        PVMREQ pReq;
    31443163        AssertCompileSize(RTGCPHYS, 4);
    3145         int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
    3146                                  (PFNRT)PGMPhysWrite, 4, pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
     3164        int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMR3, &pReq, RT_INDEFINITE_WAIT,
     3165                                 (PFNRT)PGMPhysWrite, 4, pDevIns->Internal.s.pVMR3, GCPhys, pvBuf, cbWrite);
    31473166        while (rc == VERR_TIMEOUT)
    31483167            rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
     
    31553174
    31563175
    3157 /** @copydoc PDMDEVHLP::pfnPhysReadGCVirt */
     3176/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
    31583177static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
    31593178{
    31603179    PDMDEV_ASSERT_DEVINS(pDevIns);
    3161     PVM pVM = pDevIns->Internal.s.pVMHC;
     3180    PVM pVM = pDevIns->Internal.s.pVMR3;
    31623181    VM_ASSERT_EMT(pVM);
    31633182    LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%VGv cb=%#x\n",
     
    31753194
    31763195
    3177 /** @copydoc PDMDEVHLP::pfnPhysWriteGCVirt */
     3196/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
    31783197static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
    31793198{
    31803199    PDMDEV_ASSERT_DEVINS(pDevIns);
    3181     PVM pVM = pDevIns->Internal.s.pVMHC;
     3200    PVM pVM = pDevIns->Internal.s.pVMR3;
    31823201    VM_ASSERT_EMT(pVM);
    31833202    LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%VGv pvSrc=%p cb=%#x\n",
     
    31953214
    31963215
    3197 /** @copydoc PDMDEVHLP::pfnPhysReserve */
     3216/** @copydoc PDMDEVHLPR3::pfnPhysReserve */
    31983217static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
    31993218{
    32003219    PDMDEV_ASSERT_DEVINS(pDevIns);
    3201     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3220    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    32023221    LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: GCPhys=%VGp cbRange=%#x pszDesc=%p:{%s}\n",
    32033222             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, pszDesc, pszDesc));
    32043223
    3205     int rc = MMR3PhysReserve(pDevIns->Internal.s.pVMHC, GCPhys, cbRange, pszDesc);
     3224    int rc = MMR3PhysReserve(pDevIns->Internal.s.pVMR3, GCPhys, cbRange, pszDesc);
    32063225
    32073226    LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    32113230
    32123231
    3213 /** @copydoc PDMDEVHLP::pfnPhysGCPtr2GCPhys */
     3232/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
    32143233static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
    32153234{
    32163235    PDMDEV_ASSERT_DEVINS(pDevIns);
    3217     PVM pVM = pDevIns->Internal.s.pVMHC;
     3236    PVM pVM = pDevIns->Internal.s.pVMR3;
    32183237    VM_ASSERT_EMT(pVM);
    32193238    LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%VGv pGCPhys=%p\n",
     
    32313250
    32323251
    3233 /** @copydoc PDMDEVHLP::pfnVMState */
     3252/** @copydoc PDMDEVHLPR3::pfnVMState */
    32343253static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
    32353254{
    32363255    PDMDEV_ASSERT_DEVINS(pDevIns);
    32373256
    3238     VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMHC);
     3257    VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
    32393258
    32403259    LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
     
    32443263
    32453264
    3246 /** @copydoc PDMDEVHLP::pfnA20IsEnabled */
     3265/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
    32473266static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
    32483267{
    32493268    PDMDEV_ASSERT_DEVINS(pDevIns);
    3250     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
    3251 
    3252     bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMHC);
     3269    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
     3270
     3271    bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMR3);
    32533272
    32543273    LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
     
    32573276
    32583277
    3259 /** @copydoc PDMDEVHLP::pfnA20Set */
     3278/** @copydoc PDMDEVHLPR3::pfnA20Set */
    32603279static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
    32613280{
    32623281    PDMDEV_ASSERT_DEVINS(pDevIns);
    3263     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3282    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    32643283    LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
    32653284    //Assert(*(unsigned *)&fEnable <= 1);
    3266     PGMR3PhysSetA20(pDevIns->Internal.s.pVMHC, fEnable);
    3267 }
    3268 
    3269 
    3270 /** @copydoc PDMDEVHLP::pfnVMReset */
     3285    PGMR3PhysSetA20(pDevIns->Internal.s.pVMR3, fEnable);
     3286}
     3287
     3288
     3289/** @copydoc PDMDEVHLPR3::pfnVMReset */
    32713290static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
    32723291{
    32733292    PDMDEV_ASSERT_DEVINS(pDevIns);
    3274     PVM pVM = pDevIns->Internal.s.pVMHC;
     3293    PVM pVM = pDevIns->Internal.s.pVMR3;
    32753294    VM_ASSERT_EMT(pVM);
    32763295    LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
     
    33003319
    33013320
    3302 /** @copydoc PDMDEVHLP::pfnVMSuspend */
     3321/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
    33033322static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
    33043323{
    33053324    PDMDEV_ASSERT_DEVINS(pDevIns);
    3306     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3325    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    33073326    LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
    33083327             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
    33093328
    3310     int rc = VMR3Suspend(pDevIns->Internal.s.pVMHC);
     3329    int rc = VMR3Suspend(pDevIns->Internal.s.pVMR3);
    33113330
    33123331    LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    33153334
    33163335
    3317 /** @copydoc PDMDEVHLP::pfnVMPowerOff */
     3336/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
    33183337static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
    33193338{
    33203339    PDMDEV_ASSERT_DEVINS(pDevIns);
    3321     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3340    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    33223341    LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
    33233342             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
    33243343
    3325     int rc = VMR3PowerOff(pDevIns->Internal.s.pVMHC);
     3344    int rc = VMR3PowerOff(pDevIns->Internal.s.pVMR3);
    33263345
    33273346    LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    33303349
    33313350
    3332 /** @copydoc PDMDEVHLP::pfnLockVM */
     3351/** @copydoc PDMDEVHLPR3::pfnLockVM */
    33333352static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
    33343353{
    3335     return VMMR3Lock(pDevIns->Internal.s.pVMHC);
    3336 }
    3337 
    3338 
    3339 /** @copydoc PDMDEVHLP::pfnUnlockVM */
     3354    return VMMR3Lock(pDevIns->Internal.s.pVMR3);
     3355}
     3356
     3357
     3358/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
    33403359static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
    33413360{
    3342     return VMMR3Unlock(pDevIns->Internal.s.pVMHC);
    3343 }
    3344 
    3345 
    3346 /** @copydoc PDMDEVHLP::pfnAssertVMLock */
     3361    return VMMR3Unlock(pDevIns->Internal.s.pVMR3);
     3362}
     3363
     3364
     3365/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
    33473366static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
    33483367{
    3349     PVM pVM = pDevIns->Internal.s.pVMHC;
     3368    PVM pVM = pDevIns->Internal.s.pVMR3;
    33503369    if (VMMR3LockIsOwner(pVM))
    33513370        return true;
     
    33623381}
    33633382
    3364 /** @copydoc PDMDEVHLP::pfnDMARegister */
     3383/** @copydoc PDMDEVHLPR3::pfnDMARegister */
    33653384static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
    33663385{
    33673386    PDMDEV_ASSERT_DEVINS(pDevIns);
    3368     PVM pVM = pDevIns->Internal.s.pVMHC;
     3387    PVM pVM = pDevIns->Internal.s.pVMR3;
    33693388    VM_ASSERT_EMT(pVM);
    33703389    LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
     
    33833402}
    33843403
    3385 /** @copydoc PDMDEVHLP::pfnDMAReadMemory */
     3404/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
    33863405static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
    33873406{
    33883407    PDMDEV_ASSERT_DEVINS(pDevIns);
    3389     PVM pVM = pDevIns->Internal.s.pVMHC;
     3408    PVM pVM = pDevIns->Internal.s.pVMR3;
    33903409    VM_ASSERT_EMT(pVM);
    33913410    LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
     
    34083427}
    34093428
    3410 /** @copydoc PDMDEVHLP::pfnDMAWriteMemory */
     3429/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
    34113430static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
    34123431{
    34133432    PDMDEV_ASSERT_DEVINS(pDevIns);
    3414     PVM pVM = pDevIns->Internal.s.pVMHC;
     3433    PVM pVM = pDevIns->Internal.s.pVMR3;
    34153434    VM_ASSERT_EMT(pVM);
    34163435    LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
     
    34333452}
    34343453
    3435 /** @copydoc PDMDEVHLP::pfnDMASetDREQ */
     3454/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
    34363455static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
    34373456{
    34383457    PDMDEV_ASSERT_DEVINS(pDevIns);
    3439     PVM pVM = pDevIns->Internal.s.pVMHC;
     3458    PVM pVM = pDevIns->Internal.s.pVMR3;
    34403459    VM_ASSERT_EMT(pVM);
    34413460    LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
     
    34543473}
    34553474
    3456 /** @copydoc PDMDEVHLP::pfnDMAGetChannelMode */
     3475/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
    34573476static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
    34583477{
    34593478    PDMDEV_ASSERT_DEVINS(pDevIns);
    3460     PVM pVM = pDevIns->Internal.s.pVMHC;
     3479    PVM pVM = pDevIns->Internal.s.pVMR3;
    34613480    VM_ASSERT_EMT(pVM);
    34623481    LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
     
    34753494}
    34763495
    3477 /** @copydoc PDMDEVHLP::pfnDMASchedule */
     3496/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
    34783497static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
    34793498{
    34803499    PDMDEV_ASSERT_DEVINS(pDevIns);
    3481     PVM pVM = pDevIns->Internal.s.pVMHC;
     3500    PVM pVM = pDevIns->Internal.s.pVMR3;
    34823501    VM_ASSERT_EMT(pVM);
    34833502    LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
     
    34913510
    34923511
    3493 /** @copydoc PDMDEVHLP::pfnCMOSWrite */
     3512/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
    34943513static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
    34953514{
    34963515    PDMDEV_ASSERT_DEVINS(pDevIns);
    3497     PVM pVM = pDevIns->Internal.s.pVMHC;
     3516    PVM pVM = pDevIns->Internal.s.pVMR3;
    34983517    VM_ASSERT_EMT(pVM);
    34993518
     
    35123531
    35133532
    3514 /** @copydoc PDMDEVHLP::pfnCMOSRead */
     3533/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
    35153534static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
    35163535{
    35173536    PDMDEV_ASSERT_DEVINS(pDevIns);
    3518     PVM pVM = pDevIns->Internal.s.pVMHC;
     3537    PVM pVM = pDevIns->Internal.s.pVMR3;
    35193538    VM_ASSERT_EMT(pVM);
    35203539
     
    35333552
    35343553
    3535 /** @copydoc PDMDEVHLP::pfnGetCpuId */
     3554/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
    35363555static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
    35373556                                               uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
     
    35423561    AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
    35433562
    3544     CPUMGetGuestCpuId(pDevIns->Internal.s.pVMHC, iLeaf, pEax, pEbx, pEcx, pEdx);
     3563    CPUMGetGuestCpuId(pDevIns->Internal.s.pVMR3, iLeaf, pEax, pEbx, pEcx, pEdx);
    35453564
    35463565    LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
     
    35493568
    35503569
    3551 /** @copydoc PDMDEVHLP::pfnROMProtectShadow */
     3570/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
    35523571static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
    35533572{
     
    35563575             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
    35573576
    3558     int rc = MMR3PhysRomProtect(pDevIns->Internal.s.pVMHC, GCPhysStart, cbRange);
     3577    int rc = MMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange);
    35593578
    35603579    LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    35643583
    35653584/**
    3566  * @copydoc PDMDEVHLP::pfnMMIO2Register
     3585 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
    35673586 */
    35683587static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
    35693588{
    35703589    PDMDEV_ASSERT_DEVINS(pDevIns);
    3571     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3590    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    35723591    LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
    35733592             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
    35743593
    3575     int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMHC, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
     3594    int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
    35763595
    35773596    LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    35813600
    35823601/**
    3583  * @copydoc PDMDEVHLP::pfnMMIO2Deregister
     3602 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
    35843603 */
    35853604static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
    35863605{
    35873606    PDMDEV_ASSERT_DEVINS(pDevIns);
    3588     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3607    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    35893608    LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
    35903609             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
     
    35923611    AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
    35933612
    3594     int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMHC, pDevIns, iRegion);
     3613    int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
    35953614
    35963615    LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    36003619
    36013620/**
    3602  * @copydoc PDMDEVHLP::pfnMMIO2Map
     3621 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
    36033622 */
    36043623static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
    36053624{
    36063625    PDMDEV_ASSERT_DEVINS(pDevIns);
    3607     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3626    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    36083627    LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
    36093628             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
    36103629
    3611     int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMHC, pDevIns, iRegion, GCPhys);
     3630    int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
    36123631
    36133632    LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    36173636
    36183637/**
    3619  * @copydoc PDMDEVHLP::pfnMMIO2Unmap
     3638 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
    36203639 */
    36213640static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
    36223641{
    36233642    PDMDEV_ASSERT_DEVINS(pDevIns);
    3624     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3643    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    36253644    LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
    36263645             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
    36273646
    3628     int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMHC, pDevIns, iRegion, GCPhys);
     3647    int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
    36293648
    36303649    LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
     
    36343653
    36353654/**
    3636  * @copydoc PDMDEVHLP::pfnMMHyperMapMMIO2
     3655 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
    36373656 */
    36383657static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
     
    36403659{
    36413660    PDMDEV_ASSERT_DEVINS(pDevIns);
    3642     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     3661    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    36433662    LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
    36443663             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
    36453664
    3646     int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMHC, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
     3665    int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
    36473666
    36483667    LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pRCPtr));
     
    36523671
    36533672/**
    3654  * @copydoc PDMDEVHLP::pfnRegisterVMMDevHeap
     3673 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
    36553674 */
    36563675static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
    36573676{
    36583677    PDMDEV_ASSERT_DEVINS(pDevIns);
    3659     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
    3660 
    3661     int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMHC, GCPhys, pvHeap, cbSize);
     3678    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
     3679
     3680    int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
    36623681    return rc;
    36633682}
     
    36653684
    36663685/**
    3667  * @copydoc PDMDEVHLP::pfnUnregisterVMMDevHeap
     3686 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
    36683687 */
    36693688static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
    36703689{
    36713690    PDMDEV_ASSERT_DEVINS(pDevIns);
    3672     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
    3673 
    3674     int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMHC, GCPhys);
    3675     return rc;
    3676 }
    3677 
    3678 
    3679 
    3680 
    3681 
    3682 /** @copydoc PDMDEVHLP::pfnGetVM */
     3691    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
     3692
     3693    int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
     3694    return rc;
     3695}
     3696
     3697
     3698
     3699
     3700
     3701/** @copydoc PDMDEVHLPR3::pfnGetVM */
    36833702static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
    36843703{
     
    36893708
    36903709
    3691 /** @copydoc PDMDEVHLP::pfnPCIBusRegister */
     3710/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
    36923711static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
    36933712{
     
    37003719
    37013720
    3702 /** @copydoc PDMDEVHLP::pfnPICRegister */
     3721/** @copydoc PDMDEVHLPR3::pfnPICRegister */
    37033722static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
    37043723{
     
    37113730
    37123731
    3713 /** @copydoc PDMDEVHLP::pfnAPICRegister */
     3732/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
    37143733static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
    37153734{
     
    37223741
    37233742
    3724 /** @copydoc PDMDEVHLP::pfnIOAPICRegister */
     3743/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
    37253744static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
    37263745{
     
    37333752
    37343753
    3735 /** @copydoc PDMDEVHLP::pfnDMACRegister */
     3754/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
    37363755static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
    37373756{
     
    37443763
    37453764
    3746 /** @copydoc PDMDEVHLP::pfnPhysRead */
     3765/** @copydoc PDMDEVHLPR3::pfnPhysRead */
    37473766static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    37483767{
     
    37553774
    37563775
    3757 /** @copydoc PDMDEVHLP::pfnPhysWrite */
     3776/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
    37583777static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    37593778{
     
    37663785
    37673786
    3768 /** @copydoc PDMDEVHLP::pfnPhysReadGCVirt */
     3787/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
    37693788static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
    37703789{
     
    37783797
    37793798
    3780 /** @copydoc PDMDEVHLP::pfnPhysWriteGCVirt */
     3799/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
    37813800static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
    37823801{
     
    37903809
    37913810
    3792 /** @copydoc PDMDEVHLP::pfnPhysReserve */
     3811/** @copydoc PDMDEVHLPR3::pfnPhysReserve */
    37933812static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
    37943813{
     
    38013820
    38023821
    3803 /** @copydoc PDMDEVHLP::pfnObsoletePhys2HCVirt */
     3822/** @copydoc PDMDEVHLPR3::pfnObsoletePhys2HCVirt */
    38043823static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
    38053824{
     
    38133832
    38143833
    3815 /** @copydoc PDMDEVHLP::pfnObsoletePhysGCPtr2HCPtr */
     3834/** @copydoc PDMDEVHLPR3::pfnObsoletePhysGCPtr2HCPtr */
    38163835static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
    38173836{
     
    38243843
    38253844
    3826 /** @copydoc PDMDEVHLP::pfnA20IsEnabled */
     3845/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
    38273846static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
    38283847{
     
    38333852
    38343853
    3835 /** @copydoc PDMDEVHLP::pfnA20Set */
     3854/** @copydoc PDMDEVHLPR3::pfnA20Set */
    38363855static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
    38373856{
     
    38423861
    38433862
    3844 /** @copydoc PDMDEVHLP::pfnVMReset */
     3863/** @copydoc PDMDEVHLPR3::pfnVMReset */
    38453864static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
    38463865{
     
    38513870
    38523871
    3853 /** @copydoc PDMDEVHLP::pfnVMSuspend */
     3872/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
    38543873static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
    38553874{
     
    38603879
    38613880
    3862 /** @copydoc PDMDEVHLP::pfnVMPowerOff */
     3881/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
    38633882static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
    38643883{
     
    38693888
    38703889
    3871 /** @copydoc PDMDEVHLP::pfnLockVM */
     3890/** @copydoc PDMDEVHLPR3::pfnLockVM */
    38723891static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
    38733892{
     
    38783897
    38793898
    3880 /** @copydoc PDMDEVHLP::pfnUnlockVM */
     3899/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
    38813900static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
    38823901{
     
    38873906
    38883907
    3889 /** @copydoc PDMDEVHLP::pfnAssertVMLock */
     3908/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
    38903909static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
    38913910{
     
    38963915
    38973916
    3898 /** @copydoc PDMDEVHLP::pfnDMARegister */
     3917/** @copydoc PDMDEVHLPR3::pfnDMARegister */
    38993918static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
    39003919{
     
    39053924
    39063925
    3907 /** @copydoc PDMDEVHLP::pfnDMAReadMemory */
     3926/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
    39083927static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
    39093928{
     
    39163935
    39173936
    3918 /** @copydoc PDMDEVHLP::pfnDMAWriteMemory */
     3937/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
    39193938static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
    39203939{
     
    39273946
    39283947
    3929 /** @copydoc PDMDEVHLP::pfnDMASetDREQ */
     3948/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
    39303949static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
    39313950{
     
    39363955
    39373956
    3938 /** @copydoc PDMDEVHLP::pfnDMAGetChannelMode */
     3957/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
    39393958static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
    39403959{
     
    39453964
    39463965
    3947 /** @copydoc PDMDEVHLP::pfnDMASchedule */
     3966/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
    39483967static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
    39493968{
     
    39533972
    39543973
    3955 /** @copydoc PDMDEVHLP::pfnCMOSWrite */
     3974/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
    39563975static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
    39573976{
     
    39623981
    39633982
    3964 /** @copydoc PDMDEVHLP::pfnCMOSRead */
     3983/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
    39653984static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
    39663985{
     
    39713990
    39723991
    3973 /** @copydoc PDMDEVHLP::pfnGetCpuId */
     3992/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
    39743993static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
    39753994                                                         uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
     
    39803999
    39814000
    3982 /** @copydoc PDMDEVHLP::pfnROMProtectShadow */
     4001/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
    39834002static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
    39844003{
     
    39894008
    39904009
    3991 /** @copydoc PDMDEVHLP::pfnMMIO2Register */
     4010/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
    39924011static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
    39934012{
     
    39984017
    39994018
    4000 /** @copydoc PDMDEVHLP::pfnMMIO2Deregister */
     4019/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
    40014020static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
    40024021{
     
    40074026
    40084027
    4009 /** @copydoc PDMDEVHLP::pfnMMIO2Map */
     4028/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
    40104029static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
    40114030{
     
    40164035
    40174036
    4018 /** @copydoc PDMDEVHLP::pfnMMIO2Unmap */
     4037/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
    40194038static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
    40204039{
     
    40254044
    40264045
    4027 /** @copydoc PDMDEVHLP::pfnMMHyperMapMMIO2 */
     4046/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
    40284047static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
    40294048{
     
    40344053
    40354054
    4036 /** @copydoc PDMDEVHLP::pfnRegisterVMMDevHeap */
     4055/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
    40374056static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
    40384057{
     
    40434062
    40444063
    4045 /** @copydoc PDMDEVHLP::pfnUnregisterVMMDevHeap */
     4064/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
    40464065static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
    40474066{
     
    40594078{
    40604079    PDMDEV_ASSERT_DEVINS(pDevIns);
    4061     PVM pVM = pDevIns->Internal.s.pVMHC;
     4080    PVM pVM = pDevIns->Internal.s.pVMR3;
    40624081    LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
    40634082             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVM, 0, VM_FF_INTERRUPT_PIC)));
     
    40744093    PDMDEV_ASSERT_DEVINS(pDevIns);
    40754094    LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
    4076              pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMHC, 0, VM_FF_INTERRUPT_PIC)));
     4095             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMR3, 0, VM_FF_INTERRUPT_PIC)));
    40774096    /* for PIC we always deliver to CPU 0, MP use APIC */
    4078     VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMHC, 0, VM_FF_INTERRUPT_PIC);
    4079     REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMHC);
     4097    VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMR3, 0, VM_FF_INTERRUPT_PIC);
     4098    REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMR3);
    40804099}
    40814100
     
    40854104{
    40864105    PDMDEV_ASSERT_DEVINS(pDevIns);
    4087     return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
     4106    return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
    40884107}
    40894108
     
    40934112{
    40944113    PDMDEV_ASSERT_DEVINS(pDevIns);
    4095     pdmUnlock(pDevIns->Internal.s.pVMHC);
     4114    pdmUnlock(pDevIns->Internal.s.pVMR3);
    40964115}
    40974116
     
    41014120{
    41024121    PDMDEV_ASSERT_DEVINS(pDevIns);
    4103     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     4122    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    41044123    RTRCPTR pRCHelpers = 0;
    4105     int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmRCPicHlp", &pRCHelpers);
     4124    int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPicHlp", &pRCHelpers);
    41064125    AssertReleaseRC(rc);
    41074126    AssertRelease(pRCHelpers);
     
    41164135{
    41174136    PDMDEV_ASSERT_DEVINS(pDevIns);
    4118     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     4137    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    41194138    PCPDMPICHLPR0 pR0Helpers = 0;
    4120     int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0PicHlp", &pR0Helpers);
     4139    int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PicHlp", &pR0Helpers);
    41214140    AssertReleaseRC(rc);
    41224141    AssertRelease(pR0Helpers);
     
    41314150{
    41324151    PDMDEV_ASSERT_DEVINS(pDevIns);
    4133     PVM pVM = pDevIns->Internal.s.pVMHC;
     4152    PVM pVM = pDevIns->Internal.s.pVMR3;
    41344153    LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT %d -> 1\n",
    41354154             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVM, idCpu, VM_FF_INTERRUPT_APIC)));
     
    41454164    PDMDEV_ASSERT_DEVINS(pDevIns);
    41464165    LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT %d -> 0\n",
    4147              pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMHC, idCpu, VM_FF_INTERRUPT_APIC)));
    4148     VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMHC, idCpu, VM_FF_INTERRUPT_APIC);
    4149     REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMHC);
     4166             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMR3, idCpu, VM_FF_INTERRUPT_APIC)));
     4167    VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMR3, idCpu, VM_FF_INTERRUPT_APIC);
     4168    REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMR3);
    41504169}
    41514170
     
    41584177             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnabled));
    41594178    if (fEnabled)
    4160         CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
     4179        CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
    41614180    else
    4162         CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
     4181        CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
    41634182}
    41644183
     
    41674186{
    41684187    PDMDEV_ASSERT_DEVINS(pDevIns);
    4169     return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
     4188    return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
    41704189}
    41714190
     
    41754194{
    41764195    PDMDEV_ASSERT_DEVINS(pDevIns);
    4177     pdmUnlock(pDevIns->Internal.s.pVMHC);
     4196    pdmUnlock(pDevIns->Internal.s.pVMR3);
    41784197}
    41794198
     
    41834202{
    41844203    PDMDEV_ASSERT_DEVINS(pDevIns);
    4185     return VMMGetCpuId(pDevIns->Internal.s.pVMHC);
     4204    return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
    41864205}
    41874206
     
    41914210{
    41924211    PDMDEV_ASSERT_DEVINS(pDevIns);
    4193     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     4212    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    41944213    RTRCPTR pRCHelpers = 0;
    4195     int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmRCApicHlp", &pRCHelpers);
     4214    int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCApicHlp", &pRCHelpers);
    41964215    AssertReleaseRC(rc);
    41974216    AssertRelease(pRCHelpers);
     
    42064225{
    42074226    PDMDEV_ASSERT_DEVINS(pDevIns);
    4208     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     4227    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    42094228    PCPDMAPICHLPR0 pR0Helpers = 0;
    4210     int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
     4229    int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
    42114230    AssertReleaseRC(rc);
    42124231    AssertRelease(pR0Helpers);
     
    42224241{
    42234242    PDMDEV_ASSERT_DEVINS(pDevIns);
    4224     PVM pVM = pDevIns->Internal.s.pVMHC;
     4243    PVM pVM = pDevIns->Internal.s.pVMR3;
    42254244    LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
    42264245             pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
     
    42344253{
    42354254    PDMDEV_ASSERT_DEVINS(pDevIns);
    4236     return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
     4255    return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
    42374256}
    42384257
     
    42424261{
    42434262    PDMDEV_ASSERT_DEVINS(pDevIns);
    4244     pdmUnlock(pDevIns->Internal.s.pVMHC);
     4263    pdmUnlock(pDevIns->Internal.s.pVMR3);
    42454264}
    42464265
     
    42504269{
    42514270    PDMDEV_ASSERT_DEVINS(pDevIns);
    4252     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     4271    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    42534272    RTRCPTR pRCHelpers = 0;
    4254     int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
     4273    int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
    42554274    AssertReleaseRC(rc);
    42564275    AssertRelease(pRCHelpers);
     
    42654284{
    42664285    PDMDEV_ASSERT_DEVINS(pDevIns);
    4267     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     4286    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    42684287    PCPDMIOAPICHLPR0 pR0Helpers = 0;
    4269     int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
     4288    int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
    42704289    AssertReleaseRC(rc);
    42714290    AssertRelease(pR0Helpers);
     
    42814300    PDMDEV_ASSERT_DEVINS(pDevIns);
    42824301    Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
    4283     PDMIsaSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
     4302    PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
    42844303}
    42854304
     
    42904309    PDMDEV_ASSERT_DEVINS(pDevIns);
    42914310    Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
    4292     PDMIoApicSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
     4311    PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
    42934312}
    42944313
     
    42984317{
    42994318    PDMDEV_ASSERT_DEVINS(pDevIns);
    4300     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
    4301     bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMHC, pOwner, GCPhys);
     4319    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
     4320    bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
    43024321    Log4(("pdmR3PciHlp_IsMMIO2Base: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
    43034322    return fRc;
     
    43094328{
    43104329    PDMDEV_ASSERT_DEVINS(pDevIns);
    4311     return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
     4330    return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
    43124331}
    43134332
     
    43174336{
    43184337    PDMDEV_ASSERT_DEVINS(pDevIns);
    4319     pdmUnlock(pDevIns->Internal.s.pVMHC);
     4338    pdmUnlock(pDevIns->Internal.s.pVMR3);
    43204339}
    43214340
     
    43254344{
    43264345    PDMDEV_ASSERT_DEVINS(pDevIns);
    4327     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     4346    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    43284347    RTRCPTR pRCHelpers = 0;
    4329     int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmRCPciHlp", &pRCHelpers);
     4348    int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPciHlp", &pRCHelpers);
    43304349    AssertReleaseRC(rc);
    43314350    AssertRelease(pRCHelpers);
     
    43404359{
    43414360    PDMDEV_ASSERT_DEVINS(pDevIns);
    4342     VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
     4361    VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    43434362    PCPDMPCIHLPR0 pR0Helpers = 0;
    4344     int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0PciHlp", &pR0Helpers);
     4363    int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PciHlp", &pR0Helpers);
    43454364    AssertReleaseRC(rc);
    43464365    AssertRelease(pR0Helpers);
     
    43764395             * Iterate device instances.
    43774396             */
    4378             for (PPDMDEVINS pDevIns = pDev->pInstances; pDevIns; pDevIns = pDevIns->Internal.s.pPerDeviceNextHC)
     4397            for (PPDMDEVINS pDevIns = pDev->pInstances; pDevIns; pDevIns = pDevIns->Internal.s.pPerDeviceNextR3)
    43794398            {
    43804399                if (pDevIns->iInstance == iInstance)
     
    43834402                     * Iterate luns.
    43844403                     */
    4385                     for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
     4404                    for (PPDMLUN pLun = pDevIns->Internal.s.pLunsR3; pLun; pLun = pLun->pNext)
    43864405                    {
    43874406                        if (pLun->iLun == iLun)
  • trunk/src/VBox/VMM/PDMDriver.cpp

    r11311 r12970  
    10871087
    10881088
    1089 /** @copydoc PDMDEVHLP::pfnVMState */
     1089/** @copydoc PDMDEVHLPR3::pfnVMState */
    10901090static DECLCALLBACK(VMSTATE) pdmR3DrvHlp_VMState(PPDMDRVINS pDrvIns)
    10911091{
  • trunk/src/VBox/VMM/PDMInternal.h

    r12807 r12970  
    8585    /** Pointer to the next instance (HC Ptr).
    8686     * (Head is pointed to by PDM::pDevInstances.) */
    87     R3PTRTYPE(PPDMDEVINS)           pNextHC;
     87    R3PTRTYPE(PPDMDEVINS)           pNextR3;
    8888    /** Pointer to the next per device instance (HC Ptr).
    8989     * (Head is pointed to by PDMDEV::pInstances.) */
    90     R3PTRTYPE(PPDMDEVINS)           pPerDeviceNextHC;
    91 
     90    R3PTRTYPE(PPDMDEVINS)           pPerDeviceNextR3;
    9291    /** Pointer to device structure - HC Ptr. */
    93     R3PTRTYPE(PPDMDEV)              pDevHC;
    94 
    95     /** Pointer to the VM this instance was created for - HC Ptr. */
    96     R3R0PTRTYPE(PVM)                pVMHC;
     92    R3PTRTYPE(PPDMDEV)              pDevR3;
    9793    /** Pointer to the list of logical units associated with the device. (FIFO) */
    98     R3PTRTYPE(PPDMLUN)              pLunsHC;
     94    R3PTRTYPE(PPDMLUN)              pLunsR3;
    9995    /** Configuration handle to the instance node. */
    10096    R3PTRTYPE(PCFGMNODE)            pCfgHandle;
    101     /** HC pointer to associated PCI device structure. */
    102     R3R0PTRTYPE(struct PCIDevice *) pPciDeviceHC;
    103     /** HC pointer to associated PCI bus structure. */
    104     R3R0PTRTYPE(PPDMPCIBUS)         pPciBusHC;
    105 
    106     /** GC pointer to associated PCI device structure. */
    107     RCPTRTYPE(struct PCIDevice *)   pPciDeviceGC;
    108     /** Pointer to the VM this instance was created for - GC Ptr. */
    109     RCPTRTYPE(PVM)                  pVMGC;
    110     /** GC pointer to associated PCI bus structure. */
    111     RCPTRTYPE(PPDMPCIBUS)           pPciBusGC;
     97
     98    /** R3 pointer to the VM this instance was created for. */
     99    PVMR3                           pVMR3;
     100    /** R3 pointer to associated PCI device structure. */
     101    R3PTRTYPE(struct PCIDevice *)   pPciDeviceR3;
     102    /** R3 pointer to associated PCI bus structure. */
     103    R3PTRTYPE(PPDMPCIBUS)           pPciBusR3;
     104
     105    /** R0 pointer to the VM this instance was created for. */
     106    PVMR0                           pVMR0;
     107    /** R0 pointer to associated PCI device structure. */
     108    R0PTRTYPE(struct PCIDevice *)   pPciDeviceR0;
     109    /** R0 pointer to associated PCI bus structure. */
     110    R0PTRTYPE(PPDMPCIBUS)           pPciBusR0;
    112111    /** Alignment padding. */
    113     uint32_t                        Alignment0;
     112    RTR0PTR                         Alignment0;
     113
     114    /** RC pointer to the VM this instance was created for. */
     115    PVMRC                           pVMRC;
     116    /** RC pointer to associated PCI device structure. */
     117    RCPTRTYPE(struct PCIDevice *)   pPciDeviceRC;
     118    /** RC pointer to associated PCI bus structure. */
     119    RCPTRTYPE(PPDMPCIBUS)           pPciBusRC;
     120    /** Alignment padding. */
     121    RTRCPTR                         Alignment1;
    114122} PDMDEVINSINT;
    115123
     
    161169    /** Pointer to the driver instance above.
    162170     * This is NULL for the topmost drive. */
    163     PPDMDRVINS          pUp;
     171    PPDMDRVINS                      pUp;
    164172    /** Pointer to the driver instance below.
    165173     * This is NULL for the bottommost driver. */
    166     PPDMDRVINS          pDown;
     174    PPDMDRVINS                      pDown;
    167175    /** Pointer to the logical unit this driver chained on. */
    168     PPDMLUN             pLun;
     176    PPDMLUN                         pLun;
    169177    /** Pointer to driver structure from which this was instantiated. */
    170     PPDMDRV             pDrv;
     178    PPDMDRV                         pDrv;
    171179    /** Pointer to the VM this instance was created for. */
    172     PVM                 pVM;
     180    PVM                             pVM;
    173181    /** Flag indicating that the driver is being detached and destroyed.
    174182     * (Helps detect potential recursive detaching.) */
    175     bool                fDetaching;
     183    bool                            fDetaching;
    176184    /** Configuration handle to the instance node. */
    177     PCFGMNODE           pCfgHandle;
     185    PCFGMNODE                       pCfgHandle;
    178186
    179187} PDMDRVINSINT;
     
    186194{
    187195    /** The critical section core which is shared with IPRT. */
    188     RTCRITSECT          Core;
     196    RTCRITSECT                      Core;
    189197    /** Pointer to the next critical section.
    190198     * This chain is used for relocating pVMGC and device cleanup. */
     
    193201     * This is pDevIns if the owner is a device. Similarily for a driver or service.
    194202     * PDMR3CritSectInit() sets this to point to the critsect itself. */
    195     RTR3PTR             pvKey;
     203    RTR3PTR                         pvKey;
    196204    /** Pointer to the VM - R3Ptr. */
    197     R3PTRTYPE(PVM)      pVMR3;
     205    R3PTRTYPE(PVM)                  pVMR3;
    198206    /** Pointer to the VM - R0Ptr. */
    199     R0PTRTYPE(PVM)      pVMR0;
     207    R0PTRTYPE(PVM)                  pVMR0;
    200208    /** Pointer to the VM - GCPtr. */
    201     RCPTRTYPE(PVM)      pVMGC;
     209    RCPTRTYPE(PVM)                  pVMGC;
    202210#if HC_ARCH_BITS == 64
    203211    uint32_t            padding;
     
    205213    /** Event semaphore that is scheduled to be signaled upon leaving the
    206214     * critical section. This is Ring-3 only of course. */
    207     RTSEMEVENT          EventToSignal;
     215    RTSEMEVENT                      EventToSignal;
    208216    /** R0/GC lock contention. */
    209     STAMCOUNTER         StatContentionR0GCLock;
     217    STAMCOUNTER                     StatContentionR0GCLock;
    210218    /** R0/GC unlock contention. */
    211     STAMCOUNTER         StatContentionR0GCUnlock;
     219    STAMCOUNTER                     StatContentionR0GCUnlock;
    212220    /** R3 lock contention. */
    213     STAMCOUNTER         StatContentionR3;
     221    STAMCOUNTER                     StatContentionR3;
    214222    /** Profiling the time the section is locked. */
    215     STAMPROFILEADV      StatLocked;
     223    STAMPROFILEADV                  StatLocked;
    216224} PDMCRITSECTINT, *PPDMCRITSECTINT;
    217225
     
    277285 * device, like for instance the PS/2 keyboard port on the
    278286 * keyboard controller device. The LUNs are chained on the
    279  * device the belong to (PDMDEVINSINT::pLunsHC).
     287 * device the belong to (PDMDEVINSINT::pLunsR3).
    280288 */
    281289typedef struct PDMLUN
  • trunk/src/VBox/VMM/VMMGC/PDMGCDevice.cpp

    r12799 r12970  
    4848# define PDMDEV_ASSERT_DEVINS(pDevIns)   do { Assert(VALID_PTR(pDevIns)); \
    4949                                              Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
    50                                               Assert(pDevIns->pvInstanceDataGC == (void *)&pDevIns->achInstanceData[0]); \
     50                                              Assert(pDevIns->pvInstanceDataRC == (void *)&pDevIns->achInstanceData[0]); \
    5151                                         } while (0)
    5252#else
     
    5959*******************************************************************************/
    6060__BEGIN_DECLS
    61 extern DECLEXPORT(const PDMDEVHLPGC)    g_pdmGCDevHlp;
     61extern DECLEXPORT(const PDMDEVHLPRC)    g_pdmRCDevHlp;
    6262extern DECLEXPORT(const PDMPICHLPRC)    g_pdmRCPicHlp;
    6363extern DECLEXPORT(const PDMAPICHLPRC)   g_pdmRCApicHlp;
     
    136136 * The Guest Context Device Helper Callbacks.
    137137 */
    138 extern DECLEXPORT(const PDMDEVHLPGC) g_pdmGCDevHlp =
    139 {
    140     PDM_DEVHLPGC_VERSION,
     138extern DECLEXPORT(const PDMDEVHLPRC) g_pdmRCDevHlp =
     139{
     140    PDM_DEVHLPRC_VERSION,
    141141    pdmGCDevHlp_PCISetIrq,
    142142    pdmGCDevHlp_ISASetIrq,
     
    149149    pdmGCDevHlp_VMSetRuntimeErrorV,
    150150    pdmGCDevHlp_PATMSetMMIOPatchInfo,
    151     PDM_DEVHLPGC_VERSION
     151    PDM_DEVHLPRC_VERSION
    152152};
    153153
     
    211211
    212212
    213 /** @copydoc PDMDEVHLPGC::pfnPCISetIrq */
     213/** @copydoc PDMDEVHLPRC::pfnPCISetIrq */
    214214static DECLCALLBACK(void) pdmGCDevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    215215{
     
    217217    LogFlow(("pdmGCDevHlp_PCISetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
    218218
    219     PVM         pVM     = pDevIns->Internal.s.pVMGC;
    220     PPCIDEVICE  pPciDev = pDevIns->Internal.s.pPciDeviceGC;
    221     PPDMPCIBUS  pPciBus = pDevIns->Internal.s.pPciBusGC;
     219    PVM         pVM     = pDevIns->Internal.s.pVMRC;
     220    PPCIDEVICE  pPciDev = pDevIns->Internal.s.pPciDeviceRC;
     221    PPDMPCIBUS  pPciBus = pDevIns->Internal.s.pPciBusRC;
    222222    if (    pPciDev
    223223        &&  pPciBus
     
    249249
    250250
    251 /** @copydoc PDMDEVHLPGC::pfnPCISetIrq */
     251/** @copydoc PDMDEVHLPRC::pfnPCISetIrq */
    252252static DECLCALLBACK(void) pdmGCDevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
    253253{
     
    255255    LogFlow(("pdmGCDevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
    256256
    257     pdmGCIsaSetIrq(pDevIns->Internal.s.pVMGC, iIrq, iLevel);
     257    pdmGCIsaSetIrq(pDevIns->Internal.s.pVMRC, iIrq, iLevel);
    258258
    259259    LogFlow(("pdmGCDevHlp_ISASetIrq: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
     
    261261
    262262
    263 /** @copydoc PDMDEVHLPGC::pfnPhysRead */
     263/** @copydoc PDMDEVHLPRC::pfnPhysRead */
    264264static DECLCALLBACK(void) pdmGCDevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    265265{
     
    268268             pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
    269269
    270     PGMPhysRead(pDevIns->Internal.s.pVMGC, GCPhys, pvBuf, cbRead);
     270    PGMPhysRead(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbRead);
    271271
    272272    Log(("pdmGCDevHlp_PhysRead: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
     
    274274
    275275
    276 /** @copydoc PDMDEVHLPGC::pfnPhysWrite */
     276/** @copydoc PDMDEVHLPRC::pfnPhysWrite */
    277277static DECLCALLBACK(void) pdmGCDevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    278278{
     
    281281             pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
    282282
    283     PGMPhysWrite(pDevIns->Internal.s.pVMGC, GCPhys, pvBuf, cbWrite);
     283    PGMPhysWrite(pDevIns->Internal.s.pVMRC, GCPhys, pvBuf, cbWrite);
    284284
    285285    Log(("pdmGCDevHlp_PhysWrite: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
     
    287287
    288288
    289 /** @copydoc PDMDEVHLPGC::pfnA20IsEnabled */
     289/** @copydoc PDMDEVHLPRC::pfnA20IsEnabled */
    290290static DECLCALLBACK(bool) pdmGCDevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
    291291{
     
    293293    LogFlow(("pdmGCDevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
    294294
    295     bool fEnabled = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMGC);
     295    bool fEnabled = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMRC);
    296296
    297297    Log(("pdmGCDevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
     
    300300
    301301
    302 /** @copydoc PDMDEVHLPGC::pfnVMSetError */
     302/** @copydoc PDMDEVHLPRC::pfnVMSetError */
    303303static DECLCALLBACK(int) pdmGCDevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
    304304{
     
    306306    va_list args;
    307307    va_start(args, pszFormat);
    308     int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMGC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
     308    int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
    309309    va_end(args);
    310310    return rc;
     
    312312
    313313
    314 /** @copydoc PDMDEVHLPGC::pfnVMSetErrorV */
     314/** @copydoc PDMDEVHLPRC::pfnVMSetErrorV */
    315315static DECLCALLBACK(int) pdmGCDevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
    316316{
    317317    PDMDEV_ASSERT_DEVINS(pDevIns);
    318     int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMGC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
     318    int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMRC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
    319319    return rc;
    320320}
    321321
    322322
    323 /** @copydoc PDMDEVHLPGC::pfnVMSetRuntimeError */
     323/** @copydoc PDMDEVHLPRC::pfnVMSetRuntimeError */
    324324static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
    325325{
     
    327327    va_list args;
    328328    va_start(args, pszFormat);
    329     int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMGC, fFatal, pszErrorID, pszFormat, args);
     329    int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMRC, fFatal, pszErrorID, pszFormat, args);
    330330    va_end(args);
    331331    return rc;
     
    333333
    334334
    335 /** @copydoc PDMDEVHLPGC::pfnVMSetErrorV */
     335/** @copydoc PDMDEVHLPRC::pfnVMSetErrorV */
    336336static DECLCALLBACK(int) pdmGCDevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
    337337{
    338338    PDMDEV_ASSERT_DEVINS(pDevIns);
    339     int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMGC, fFatal, pszErrorID, pszFormat, va);
     339    int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMRC, fFatal, pszErrorID, pszFormat, va);
    340340    return rc;
    341341}
    342342
    343343
    344 /** @copydoc PDMDEVHLPGC::pfnPATMSetMMIOPatchInfo */
     344/** @copydoc PDMDEVHLPRC::pfnPATMSetMMIOPatchInfo */
    345345static DECLCALLBACK(int) pdmGCDevHlp_PATMSetMMIOPatchInfo(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData)
    346346{
     
    348348    LogFlow(("pdmGCDevHlp_PATMSetMMIOPatchInfo: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
    349349
    350     return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMGC, GCPhys, (RTRCPTR)pCachedData);
     350    return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMRC, GCPhys, (RTRCPTR)pCachedData);
    351351}
    352352
     
    359359    PDMDEV_ASSERT_DEVINS(pDevIns);
    360360    LogFlow(("pdmRCPicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
    361              pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMGC, 0, VM_FF_INTERRUPT_PIC)));
     361             pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMRC, 0, VM_FF_INTERRUPT_PIC)));
    362362    /* for PIC we always deliver to CPU 0, MP use APIC */
    363     VMCPU_FF_SET(pDevIns->Internal.s.pVMGC, 0, VM_FF_INTERRUPT_PIC);
     363    VMCPU_FF_SET(pDevIns->Internal.s.pVMRC, 0, VM_FF_INTERRUPT_PIC);
    364364}
    365365
     
    370370    PDMDEV_ASSERT_DEVINS(pDevIns);
    371371    LogFlow(("pdmRCPicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
    372              pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMGC, 0, VM_FF_INTERRUPT_PIC)));
     372             pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMRC, 0, VM_FF_INTERRUPT_PIC)));
    373373    /* for PIC we always deliver to CPU 0, MP use APIC */
    374     VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMGC, 0, VM_FF_INTERRUPT_PIC);
     374    VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMRC, 0, VM_FF_INTERRUPT_PIC);
    375375}
    376376
     
    380380{
    381381    PDMDEV_ASSERT_DEVINS(pDevIns);
    382     return pdmLockEx(pDevIns->Internal.s.pVMGC, rc);
     382    return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
    383383}
    384384
     
    388388{
    389389    PDMDEV_ASSERT_DEVINS(pDevIns);
    390     pdmUnlock(pDevIns->Internal.s.pVMGC);
     390    pdmUnlock(pDevIns->Internal.s.pVMRC);
    391391}
    392392
     
    399399    PDMDEV_ASSERT_DEVINS(pDevIns);
    400400    LogFlow(("pdmRCApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",
    401              pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMGC, idCpu, VM_FF_INTERRUPT_APIC)));
    402     VMCPU_FF_SET(pDevIns->Internal.s.pVMGC, idCpu, VM_FF_INTERRUPT_APIC);
     401             pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMRC, idCpu, VM_FF_INTERRUPT_APIC)));
     402    VMCPU_FF_SET(pDevIns->Internal.s.pVMRC, idCpu, VM_FF_INTERRUPT_APIC);
    403403}
    404404
     
    409409    PDMDEV_ASSERT_DEVINS(pDevIns);
    410410    LogFlow(("pdmRCApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
    411              pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMGC, idCpu, VM_FF_INTERRUPT_APIC)));
    412     VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMGC, idCpu, VM_FF_INTERRUPT_APIC);
     411             pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMRC, idCpu, VM_FF_INTERRUPT_APIC)));
     412    VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMRC, idCpu, VM_FF_INTERRUPT_APIC);
    413413}
    414414
     
    420420    LogFlow(("pdmRCApicHlp_ChangeFeature: caller=%p/%d: fEnabled=%RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
    421421    if (fEnabled)
    422         CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMGC, CPUMCPUIDFEATURE_APIC);
     422        CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
    423423    else
    424         CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMGC, CPUMCPUIDFEATURE_APIC);
     424        CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMRC, CPUMCPUIDFEATURE_APIC);
    425425}
    426426
     
    430430{
    431431    PDMDEV_ASSERT_DEVINS(pDevIns);
    432     return pdmLockEx(pDevIns->Internal.s.pVMGC, rc);
     432    return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
    433433}
    434434
     
    438438{
    439439    PDMDEV_ASSERT_DEVINS(pDevIns);
    440     pdmUnlock(pDevIns->Internal.s.pVMGC);
     440    pdmUnlock(pDevIns->Internal.s.pVMRC);
    441441}
    442442
     
    446446{
    447447    PDMDEV_ASSERT_DEVINS(pDevIns);
    448     return VMMGetCpuId(pDevIns->Internal.s.pVMGC);
     448    return VMMGetCpuId(pDevIns->Internal.s.pVMRC);
    449449}
    450450
     
    454454{
    455455    PDMDEV_ASSERT_DEVINS(pDevIns);
    456     PVM pVM = pDevIns->Internal.s.pVMGC;
     456    PVM pVM = pDevIns->Internal.s.pVMRC;
    457457    LogFlow(("pdmRCIoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
    458458             pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
     
    466466{
    467467    PDMDEV_ASSERT_DEVINS(pDevIns);
    468     return pdmLockEx(pDevIns->Internal.s.pVMGC, rc);
     468    return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
    469469}
    470470
     
    474474{
    475475    PDMDEV_ASSERT_DEVINS(pDevIns);
    476     pdmUnlock(pDevIns->Internal.s.pVMGC);
     476    pdmUnlock(pDevIns->Internal.s.pVMRC);
    477477}
    478478
     
    485485    PDMDEV_ASSERT_DEVINS(pDevIns);
    486486    Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
    487     pdmGCIsaSetIrq(pDevIns->Internal.s.pVMGC, iIrq, iLevel);
     487    pdmGCIsaSetIrq(pDevIns->Internal.s.pVMRC, iIrq, iLevel);
    488488}
    489489
     
    494494    PDMDEV_ASSERT_DEVINS(pDevIns);
    495495    Log4(("pdmRCPciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
    496     pdmGCIoApicSetIrq(pDevIns->Internal.s.pVMGC, iIrq, iLevel);
     496    pdmGCIoApicSetIrq(pDevIns->Internal.s.pVMRC, iIrq, iLevel);
    497497}
    498498
     
    502502{
    503503    PDMDEV_ASSERT_DEVINS(pDevIns);
    504     return pdmLockEx(pDevIns->Internal.s.pVMGC, rc);
     504    return pdmLockEx(pDevIns->Internal.s.pVMRC, rc);
    505505}
    506506
     
    510510{
    511511    PDMDEV_ASSERT_DEVINS(pDevIns);
    512     pdmUnlock(pDevIns->Internal.s.pVMGC);
     512    pdmUnlock(pDevIns->Internal.s.pVMRC);
    513513}
    514514
  • trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp

    r12799 r12970  
    217217    LogFlow(("pdmR0DevHlp_PCISetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
    218218
    219     PVM          pVM     = pDevIns->Internal.s.pVMHC;
    220     PPCIDEVICE   pPciDev = pDevIns->Internal.s.pPciDeviceHC;
    221     PPDMPCIBUS   pPciBus = pDevIns->Internal.s.pPciBusHC;
     219    PVM          pVM     = pDevIns->Internal.s.pVMR0;
     220    PPCIDEVICE   pPciDev = pDevIns->Internal.s.pPciDeviceR0;
     221    PPDMPCIBUS   pPciBus = pDevIns->Internal.s.pPciBusR0;
    222222    if (    pPciDev
    223223        &&  pPciBus
     
    255255    LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: iIrq=%d iLevel=%d\n", pDevIns, pDevIns->iInstance, iIrq, iLevel));
    256256
    257     pdmR0IsaSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
     257    pdmR0IsaSetIrq(pDevIns->Internal.s.pVMR0, iIrq, iLevel);
    258258
    259259    LogFlow(("pdmR0DevHlp_ISASetIrq: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
     
    268268             pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
    269269
    270     PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
     270    PGMPhysRead(pDevIns->Internal.s.pVMR0, GCPhys, pvBuf, cbRead);
    271271
    272272    Log(("pdmR0DevHlp_PhysRead: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
     
    281281             pDevIns, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
    282282
    283     PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
     283    PGMPhysWrite(pDevIns->Internal.s.pVMR0, GCPhys, pvBuf, cbWrite);
    284284
    285285    Log(("pdmR0DevHlp_PhysWrite: caller=%p/%d: returns void\n", pDevIns, pDevIns->iInstance));
     
    293293    LogFlow(("pdmR0DevHlp_A20IsEnabled: caller=%p/%d:\n", pDevIns, pDevIns->iInstance));
    294294
    295     bool fEnabled = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMHC);
     295    bool fEnabled = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMR0);
    296296
    297297    Log(("pdmR0DevHlp_A20IsEnabled: caller=%p/%d: returns %RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
     
    306306    va_list args;
    307307    va_start(args, pszFormat);
    308     int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
     308    int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR0, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
    309309    va_end(args);
    310310    return rc;
     
    316316{
    317317    PDMDEV_ASSERT_DEVINS(pDevIns);
    318     int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
     318    int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR0, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
    319319    return rc;
    320320}
     
    327327    va_list args;
    328328    va_start(args, pszFormat);
    329     int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, args);
     329    int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR0, fFatal, pszErrorID, pszFormat, args);
    330330    va_end(args);
    331331    return rc;
     
    337337{
    338338    PDMDEV_ASSERT_DEVINS(pDevIns);
    339     int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, va);
     339    int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR0, fFatal, pszErrorID, pszFormat, va);
    340340    return rc;
    341341}
     
    350350    AssertFailed();
    351351
    352 /*    return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMHC, GCPhys, pCachedData); */
     352/*    return PATMSetMMIOPatchInfo(pDevIns->Internal.s.pVMR0, GCPhys, pCachedData); */
    353353    return VINF_SUCCESS;
    354354}
     
    363363    PDMDEV_ASSERT_DEVINS(pDevIns);
    364364    LogFlow(("pdmR0PicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
    365              pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMHC, 0, VM_FF_INTERRUPT_PIC)));
     365             pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMR0, 0, VM_FF_INTERRUPT_PIC)));
    366366    /* for PIC we always deliver to CPU 0, MP use APIC */
    367     VMCPU_FF_SET(pDevIns->Internal.s.pVMHC, 0, VM_FF_INTERRUPT_PIC);
     367    VMCPU_FF_SET(pDevIns->Internal.s.pVMR0, 0, VM_FF_INTERRUPT_PIC);
    368368}
    369369
     
    374374    PDMDEV_ASSERT_DEVINS(pDevIns);
    375375    LogFlow(("pdmR0PicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
    376              pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMHC, 0, VM_FF_INTERRUPT_PIC)));
     376             pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMR0, 0, VM_FF_INTERRUPT_PIC)));
    377377    /* for PIC we always deliver to CPU 0, MP use APIC */
    378     VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMHC, 0, VM_FF_INTERRUPT_PIC);
     378    VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMR0, 0, VM_FF_INTERRUPT_PIC);
    379379}
    380380
     
    384384{
    385385    PDMDEV_ASSERT_DEVINS(pDevIns);
    386     return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
     386    return pdmLockEx(pDevIns->Internal.s.pVMR0, rc);
    387387}
    388388
     
    392392{
    393393    PDMDEV_ASSERT_DEVINS(pDevIns);
    394     pdmUnlock(pDevIns->Internal.s.pVMHC);
     394    pdmUnlock(pDevIns->Internal.s.pVMR0);
    395395}
    396396
     
    403403
    404404    LogFlow(("pdmR0ApicHlp_SetInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 1\n",
    405              pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMHC, idCpu, VM_FF_INTERRUPT_APIC)));
    406     VMCPU_FF_SET(pDevIns->Internal.s.pVMHC, idCpu, VM_FF_INTERRUPT_APIC);
     405             pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMR0, idCpu, VM_FF_INTERRUPT_APIC)));
     406    VMCPU_FF_SET(pDevIns->Internal.s.pVMR0, idCpu, VM_FF_INTERRUPT_APIC);
    407407}
    408408
     
    414414
    415415    LogFlow(("pdmR0ApicHlp_ClearInterruptFF: caller=%p/%d: VM_FF_INTERRUPT %d -> 0\n",
    416              pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMHC, idCpu, VM_FF_INTERRUPT_APIC)));
    417     VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMHC, idCpu, VM_FF_INTERRUPT_APIC);
     416             pDevIns, pDevIns->iInstance, VMCPU_FF_ISSET(pDevIns->Internal.s.pVMR0, idCpu, VM_FF_INTERRUPT_APIC)));
     417    VMCPU_FF_CLEAR(pDevIns->Internal.s.pVMR0, idCpu, VM_FF_INTERRUPT_APIC);
    418418}
    419419
     
    425425    LogFlow(("pdmR0ApicHlp_ChangeFeature: caller=%p/%d: fEnabled=%RTbool\n", pDevIns, pDevIns->iInstance, fEnabled));
    426426    if (fEnabled)
    427         CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
     427        CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR0, CPUMCPUIDFEATURE_APIC);
    428428    else
    429         CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
     429        CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR0, CPUMCPUIDFEATURE_APIC);
    430430}
    431431
     
    435435{
    436436    PDMDEV_ASSERT_DEVINS(pDevIns);
    437     return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
     437    return pdmLockEx(pDevIns->Internal.s.pVMR0, rc);
    438438}
    439439
     
    443443{
    444444    PDMDEV_ASSERT_DEVINS(pDevIns);
    445     pdmUnlock(pDevIns->Internal.s.pVMHC);
     445    pdmUnlock(pDevIns->Internal.s.pVMR0);
    446446}
    447447
     
    451451{
    452452    PDMDEV_ASSERT_DEVINS(pDevIns);
    453     return VMMGetCpuId(pDevIns->Internal.s.pVMHC);
     453    return VMMGetCpuId(pDevIns->Internal.s.pVMR0);
    454454}
    455455
     
    460460{
    461461    PDMDEV_ASSERT_DEVINS(pDevIns);
    462     PVM pVM = pDevIns->Internal.s.pVMHC;
     462    PVM pVM = pDevIns->Internal.s.pVMR0;
    463463    LogFlow(("pdmR0IoApicHlp_ApicBusDeliver: caller=%p/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
    464464             pDevIns, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
     
    473473{
    474474    PDMDEV_ASSERT_DEVINS(pDevIns);
    475     return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
     475    return pdmLockEx(pDevIns->Internal.s.pVMR0, rc);
    476476}
    477477
     
    481481{
    482482    PDMDEV_ASSERT_DEVINS(pDevIns);
    483     pdmUnlock(pDevIns->Internal.s.pVMHC);
     483    pdmUnlock(pDevIns->Internal.s.pVMR0);
    484484}
    485485
     
    493493    PDMDEV_ASSERT_DEVINS(pDevIns);
    494494    Log4(("pdmR0PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
    495     pdmR0IsaSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
     495    pdmR0IsaSetIrq(pDevIns->Internal.s.pVMR0, iIrq, iLevel);
    496496}
    497497
     
    502502    PDMDEV_ASSERT_DEVINS(pDevIns);
    503503    Log4(("pdmR0PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
    504     pdmR0IoApicSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
     504    pdmR0IoApicSetIrq(pDevIns->Internal.s.pVMR0, iIrq, iLevel);
    505505}
    506506
     
    510510{
    511511    PDMDEV_ASSERT_DEVINS(pDevIns);
    512     return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
     512    return pdmLockEx(pDevIns->Internal.s.pVMR0, rc);
    513513}
    514514
     
    518518{
    519519    PDMDEV_ASSERT_DEVINS(pDevIns);
    520     pdmUnlock(pDevIns->Internal.s.pVMHC);
     520    pdmUnlock(pDevIns->Internal.s.pVMR0);
    521521}
    522522
  • trunk/src/VBox/VMM/testcase/tstVMStructGC.cpp

    r12815 r12970  
    318318    GEN_CHECK_OFF(PDM, StatQueuedCritSectLeaves);
    319319    GEN_CHECK_SIZE(PDMDEVINSINT);
    320     GEN_CHECK_OFF(PDMDEVINSINT, pNextHC);
    321     GEN_CHECK_OFF(PDMDEVINSINT, pPerDeviceNextHC);
    322     GEN_CHECK_OFF(PDMDEVINSINT, pDevHC);
    323     GEN_CHECK_OFF(PDMDEVINSINT, pVMHC);
    324     GEN_CHECK_OFF(PDMDEVINSINT, pVMGC);
    325     GEN_CHECK_OFF(PDMDEVINSINT, pLunsHC);
     320    GEN_CHECK_OFF(PDMDEVINSINT, pNextR3);
     321    GEN_CHECK_OFF(PDMDEVINSINT, pPerDeviceNextR3);
     322    GEN_CHECK_OFF(PDMDEVINSINT, pDevR3);
     323    GEN_CHECK_OFF(PDMDEVINSINT, pVMR3);
     324    GEN_CHECK_OFF(PDMDEVINSINT, pVMR0);
     325    GEN_CHECK_OFF(PDMDEVINSINT, pVMRC);
     326    GEN_CHECK_OFF(PDMDEVINSINT, pLunsR3);
    326327    GEN_CHECK_OFF(PDMDEVINSINT, pCfgHandle);
    327     GEN_CHECK_OFF(PDMDEVINSINT, pPciDeviceHC);
    328     GEN_CHECK_OFF(PDMDEVINSINT, pPciDeviceGC);
    329     GEN_CHECK_OFF(PDMDEVINSINT, pPciBusHC);
    330     GEN_CHECK_OFF(PDMDEVINSINT, pPciBusGC);
     328    GEN_CHECK_OFF(PDMDEVINSINT, pPciDeviceR3);
     329    GEN_CHECK_OFF(PDMDEVINSINT, pPciDeviceR0);
     330    GEN_CHECK_OFF(PDMDEVINSINT, pPciDeviceRC);
     331    GEN_CHECK_OFF(PDMDEVINSINT, pPciBusR3);
     332    GEN_CHECK_OFF(PDMDEVINSINT, pPciBusR0);
     333    GEN_CHECK_OFF(PDMDEVINSINT, pPciBusRC);
    331334    GEN_CHECK_SIZE(PDMCRITSECTINT);
    332335    GEN_CHECK_OFF(PDMCRITSECTINT, Core);
  • trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp

    r12702 r12970  
    224224
    225225    /* pdm */
    226     CHECK_MEMBER_ALIGNMENT(PDMDEVINS, achInstanceData, 16);
     226    CHECK_MEMBER_ALIGNMENT(PDMDEVINS, achInstanceData, 64);
    227227    CHECK_PADDING(PDMDEVINS, Internal);
    228228    CHECK_MEMBER_ALIGNMENT(PDMUSBINS, achInstanceData, 16);
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