Last change
on this file since 53425 was 43657, checked in by vboxsync, 12 years ago |
VMM: APIC refactor. Moved APIC base MSR to the VCPU (where it belongs) for lockless accesses.
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Author Date Id Revision
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1 | ;; @file
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2 | ; CPUM - CPU Monitor, Assembly header file.
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3 | ;
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4 |
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5 | ;
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6 | ; Copyright (C) 2006-2012 Oracle Corporation
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7 | ;
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8 | ; This file is part of VirtualBox Open Source Edition (OSE), as
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9 | ; available from http://www.virtualbox.org. This file is free software;
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10 | ; you can redistribute it and/or modify it under the terms of the GNU
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11 | ; General Public License (GPL) as published by the Free Software
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12 | ; Foundation, in version 2 as it comes in the "COPYING" file of the
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13 | ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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14 | ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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15 | ;
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16 | ; The contents of this file may alternatively be used under the terms
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17 | ; of the Common Development and Distribution License Version 1.0
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18 | ; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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19 | ; VirtualBox OSE distribution, in which case the provisions of the
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20 | ; CDDL are applicable instead of those of the GPL.
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21 | ;
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22 | ; You may elect to license modified versions of this file under the
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23 | ; terms and conditions of either the GPL or the CDDL or both.
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24 | ;
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25 |
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26 | %ifndef ___VBox_vmm_cpum_mac__
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27 | %define ___VBox_vmm_cpum_mac__
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28 |
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29 | ;;
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30 | ; Registers frame.
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31 | ; This is used internally in TRPM, VMMSwitcher_GuestToHost_GuestCtx
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32 | ; and other places.
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33 | struc CPUMCTXCORE
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34 | .eax resq 1
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35 | .ecx resq 1
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36 | .edx resq 1
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37 | .ebx resq 1
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38 | .esp resq 1
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39 | .ebp resq 1
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40 | .esi resq 1
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41 | .edi resq 1
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42 | .r8 resq 1
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43 | .r9 resq 1
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44 | .r10 resq 1
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45 | .r11 resq 1
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46 | .r12 resq 1
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47 | .r13 resq 1
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48 | .r14 resq 1
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49 | .r15 resq 1
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50 | .es.Sel resw 1
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51 | .es.PaddingSel resw 1
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52 | .es.ValidSel resw 1
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53 | .es.fFlags resw 1
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54 | .es.u64Base resq 1
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55 | .es.u32Limit resd 1
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56 | .es.Attr resd 1
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57 | .cs.Sel resw 1
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58 | .cs.PaddingSel resw 1
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59 | .cs.ValidSel resw 1
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60 | .cs.fFlags resw 1
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61 | .cs.u64Base resq 1
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62 | .cs.u32Limit resd 1
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63 | .cs.Attr resd 1
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64 | .ss.Sel resw 1
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65 | .ss.PaddingSel resw 1
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66 | .ss.ValidSel resw 1
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67 | .ss.fFlags resw 1
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68 | .ss.u64Base resq 1
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69 | .ss.u32Limit resd 1
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70 | .ss.Attr resd 1
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71 | .ds.Sel resw 1
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72 | .ds.PaddingSel resw 1
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73 | .ds.ValidSel resw 1
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74 | .ds.fFlags resw 1
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75 | .ds.u64Base resq 1
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76 | .ds.u32Limit resd 1
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77 | .ds.Attr resd 1
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78 | .fs.Sel resw 1
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79 | .fs.PaddingSel resw 1
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80 | .fs.ValidSel resw 1
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81 | .fs.fFlags resw 1
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82 | .fs.u64Base resq 1
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83 | .fs.u32Limit resd 1
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84 | .fs.Attr resd 1
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85 | .gs.Sel resw 1
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86 | .gs.PaddingSel resw 1
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87 | .gs.ValidSel resw 1
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88 | .gs.fFlags resw 1
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89 | .gs.u64Base resq 1
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90 | .gs.u32Limit resd 1
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91 | .gs.Attr resd 1
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92 | .eip resq 1
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93 | .eflags resq 1
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94 | endstruc
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95 |
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96 |
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97 | struc CPUMCTX
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98 | .fpu resb 512
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99 | .eax resq 1
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100 | .ecx resq 1
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101 | .edx resq 1
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102 | .ebx resq 1
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103 | .esp resq 1
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104 | .ebp resq 1
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105 | .esi resq 1
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106 | .edi resq 1
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107 | .r8 resq 1
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108 | .r9 resq 1
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109 | .r10 resq 1
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110 | .r11 resq 1
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111 | .r12 resq 1
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112 | .r13 resq 1
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113 | .r14 resq 1
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114 | .r15 resq 1
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115 | .es.Sel resw 1
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116 | .es.PaddingSel resw 1
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117 | .es.ValidSel resw 1
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118 | .es.fFlags resw 1
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119 | .es.u64Base resq 1
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120 | .es.u32Limit resd 1
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121 | .es.Attr resd 1
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122 | .cs.Sel resw 1
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123 | .cs.PaddingSel resw 1
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124 | .cs.ValidSel resw 1
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125 | .cs.fFlags resw 1
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126 | .cs.u64Base resq 1
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127 | .cs.u32Limit resd 1
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128 | .cs.Attr resd 1
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129 | .ss.Sel resw 1
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130 | .ss.PaddingSel resw 1
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131 | .ss.ValidSel resw 1
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132 | .ss.fFlags resw 1
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133 | .ss.u64Base resq 1
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134 | .ss.u32Limit resd 1
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135 | .ss.Attr resd 1
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136 | .ds.Sel resw 1
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137 | .ds.PaddingSel resw 1
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138 | .ds.ValidSel resw 1
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139 | .ds.fFlags resw 1
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140 | .ds.u64Base resq 1
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141 | .ds.u32Limit resd 1
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142 | .ds.Attr resd 1
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143 | .fs.Sel resw 1
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144 | .fs.PaddingSel resw 1
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145 | .fs.ValidSel resw 1
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146 | .fs.fFlags resw 1
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147 | .fs.u64Base resq 1
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148 | .fs.u32Limit resd 1
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149 | .fs.Attr resd 1
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150 | .gs.Sel resw 1
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151 | .gs.PaddingSel resw 1
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152 | .gs.ValidSel resw 1
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153 | .gs.fFlags resw 1
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154 | .gs.u64Base resq 1
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155 | .gs.u32Limit resd 1
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156 | .gs.Attr resd 1
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157 | .eip resq 1
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158 | .eflags resq 1
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159 | .cr0 resq 1
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160 | .cr2 resq 1
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161 | .cr3 resq 1
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162 | .cr4 resq 1
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163 | .dr resq 8
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164 | .gdtrPadding resw 3
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165 | .gdtr resw 0
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166 | .gdtr.cbGdt resw 1
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167 | .gdtr.pGdt resq 1
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168 | .idtrPadding resw 3
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169 | .idtr resw 0
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170 | .idtr.cbIdt resw 1
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171 | .idtr.pIdt resq 1
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172 | .ldtr.Sel resw 1
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173 | .ldtr.PaddingSel resw 1
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174 | .ldtr.ValidSel resw 1
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175 | .ldtr.fFlags resw 1
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176 | .ldtr.u64Base resq 1
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177 | .ldtr.u32Limit resd 1
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178 | .ldtr.Attr resd 1
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179 | .tr.Sel resw 1
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180 | .tr.PaddingSel resw 1
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181 | .tr.ValidSel resw 1
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182 | .tr.fFlags resw 1
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183 | .tr.u64Base resq 1
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184 | .tr.u32Limit resd 1
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185 | .tr.Attr resd 1
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186 | .SysEnter.cs resb 8
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187 | .SysEnter.eip resb 8
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188 | .SysEnter.esp resb 8
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189 | .msrEFER resb 8
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190 | .msrSTAR resb 8
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191 | .msrPAT resb 8
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192 | .msrLSTAR resb 8
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193 | .msrCSTAR resb 8
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194 | .msrSFMASK resb 8
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195 | .msrKERNELGSBASE resb 8
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196 | .msrApicBase resb 8
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197 | .au32SizePadding resb 24
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198 | endstruc
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199 |
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200 |
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201 | ;;
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202 | ; Guest MSR state.
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203 | struc CPUMCTXMSRS
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204 | .au64 resq 64
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205 | endstruc
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206 |
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207 |
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208 | %endif
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209 |
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