VirtualBox

source: vbox/trunk/include/VBox/vmm/hm.h@ 91271

Last change on this file since 91271 was 91271, checked in by vboxsync, 3 years ago

VMM: bugref:10092 Moved the PAE PDPTEs out of PGM into CPUMCTX.
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  • Property svn:keywords set to Author Date Id Revision
File size: 10.8 KB
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1/** @file
2 * HM - Intel/AMD VM Hardware Assisted Virtualization Manager (VMM)
3 */
4
5/*
6 * Copyright (C) 2006-2020 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef VBOX_INCLUDED_vmm_hm_h
27#define VBOX_INCLUDED_vmm_hm_h
28#ifndef RT_WITHOUT_PRAGMA_ONCE
29# pragma once
30#endif
31
32#include <VBox/vmm/pgm.h>
33#include <VBox/vmm/cpum.h>
34#include <VBox/vmm/vmm.h>
35#include <VBox/vmm/hm_svm.h>
36#include <VBox/vmm/hm_vmx.h>
37#include <VBox/vmm/trpm.h>
38#include <iprt/mp.h>
39
40
41/** @defgroup grp_hm The Hardware Assisted Virtualization Manager API
42 * @ingroup grp_vmm
43 * @{
44 */
45
46RT_C_DECLS_BEGIN
47
48/**
49 * Checks whether HM (VT-x/AMD-V) is being used by this VM.
50 *
51 * @retval true if used.
52 * @retval false if software virtualization (raw-mode) or NEM is used.
53 *
54 * @param a_pVM The cross context VM structure.
55 * @deprecated Please use VM_IS_RAW_MODE_ENABLED, VM_IS_HM_OR_NEM_ENABLED, or
56 * VM_IS_HM_ENABLED instead.
57 * @internal
58 */
59#if defined(VBOX_STRICT) && defined(IN_RING3)
60# define HMIsEnabled(a_pVM) HMIsEnabledNotMacro(a_pVM)
61#else
62# define HMIsEnabled(a_pVM) ((a_pVM)->fHMEnabled)
63#endif
64
65/**
66 * Checks whether raw-mode context is required for HM purposes
67 *
68 * @retval true if required by HM for doing switching the cpu to 64-bit mode.
69 * @retval false if not required by HM.
70 *
71 * @param a_pVM The cross context VM structure.
72 * @internal
73 */
74#if HC_ARCH_BITS == 64
75# define HMIsRawModeCtxNeeded(a_pVM) (false)
76#else
77# define HMIsRawModeCtxNeeded(a_pVM) ((a_pVM)->fHMNeedRawModeCtx)
78#endif
79
80/**
81 * Checks whether we're in the special hardware virtualization context.
82 * @returns true / false.
83 * @param a_pVCpu The caller's cross context virtual CPU structure.
84 * @thread EMT
85 */
86#ifdef IN_RING0
87# define HMIsInHwVirtCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_HM)
88#else
89# define HMIsInHwVirtCtx(a_pVCpu) (false)
90#endif
91
92/**
93 * Checks whether we're in the special hardware virtualization context and we
94 * cannot perform long jump without guru meditating and possibly messing up the
95 * host and/or guest state.
96 *
97 * This is after we've turned interrupts off and such.
98 *
99 * @returns true / false.
100 * @param a_pVCpu The caller's cross context virtual CPU structure.
101 * @thread EMT
102 */
103#ifdef IN_RING0
104# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (VMCPU_GET_STATE(a_pVCpu) == VMCPUSTATE_STARTED_EXEC)
105#else
106# define HMIsInHwVirtNoLongJmpCtx(a_pVCpu) (false)
107#endif
108
109/** @name All-context HM API.
110 * @{ */
111VMMDECL(bool) HMIsEnabledNotMacro(PVM pVM);
112VMMDECL(bool) HMCanExecuteGuest(PVMCC pVM, PVMCPUCC pVCpu, PCCPUMCTX pCtx);
113VMM_INT_DECL(int) HMInvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt);
114VMM_INT_DECL(bool) HMHasPendingIrq(PVMCC pVM);
115VMM_INT_DECL(bool) HMSetSingleInstruction(PVMCC pVM, PVMCPUCC pVCpu, bool fEnable);
116VMM_INT_DECL(bool) HMIsSvmActive(PVM pVM);
117VMM_INT_DECL(bool) HMIsVmxActive(PVM pVM);
118VMM_INT_DECL(const char *) HMGetVmxDiagDesc(VMXVDIAG enmDiag);
119VMM_INT_DECL(const char *) HMGetVmxExitName(uint32_t uExit);
120VMM_INT_DECL(const char *) HMGetSvmExitName(uint32_t uExit);
121VMM_INT_DECL(void) HMDumpHwvirtVmxState(PVMCPU pVCpu);
122VMM_INT_DECL(void) HMHCChangedPagingMode(PVM pVM, PVMCPUCC pVCpu, PGMMODE enmShadowMode, PGMMODE enmGuestMode);
123VMM_INT_DECL(void) HMGetVmxMsrsFromHwvirtMsrs(PCSUPHWVIRTMSRS pMsrs, PVMXMSRS pVmxMsrs);
124VMM_INT_DECL(void) HMGetSvmMsrsFromHwvirtMsrs(PCSUPHWVIRTMSRS pMsrs, PSVMMSRS pSvmMsrs);
125/** @} */
126
127/** @name All-context VMX helpers.
128 *
129 * These are hardware-assisted VMX functions (used by IEM/REM/CPUM and HM). Helpers
130 * based purely on the Intel VT-x specification (used by IEM/REM and HM) can be
131 * found in CPUM.
132 * @{ */
133VMM_INT_DECL(bool) HMIsSubjectToVmxPreemptTimerErratum(void);
134VMM_INT_DECL(bool) HMCanExecuteVmxGuest(PVMCC pVM, PVMCPUCC pVCpu, PCCPUMCTX pCtx);
135VMM_INT_DECL(TRPMEVENT) HMVmxEventTypeToTrpmEventType(uint32_t uIntInfo);
136VMM_INT_DECL(uint32_t) HMTrpmEventTypeToVmxEventType(uint8_t uVector, TRPMEVENT enmTrpmEvent, bool fIcebp);
137/** @} */
138
139/** @name All-context SVM helpers.
140 *
141 * These are hardware-assisted SVM functions (used by IEM/REM/CPUM and HM). Helpers
142 * based purely on the AMD SVM specification (used by IEM/REM and HM) can be found
143 * in CPUM.
144 * @{ */
145VMM_INT_DECL(TRPMEVENT) HMSvmEventToTrpmEventType(PCSVMEVENT pSvmEvent, uint8_t uVector);
146/** @} */
147
148#ifndef IN_RC
149
150/** @name R0, R3 HM (VMX/SVM agnostic) handlers.
151 * @{ */
152VMM_INT_DECL(int) HMFlushTlb(PVMCPU pVCpu);
153VMM_INT_DECL(int) HMFlushTlbOnAllVCpus(PVMCC pVM);
154VMM_INT_DECL(int) HMInvalidatePageOnAllVCpus(PVMCC pVM, RTGCPTR GCVirt);
155VMM_INT_DECL(int) HMInvalidatePhysPage(PVMCC pVM, RTGCPHYS GCPhys);
156VMM_INT_DECL(bool) HMAreNestedPagingAndFullGuestExecEnabled(PVMCC pVM);
157VMM_INT_DECL(bool) HMIsLongModeAllowed(PVMCC pVM);
158VMM_INT_DECL(bool) HMIsNestedPagingActive(PVMCC pVM);
159VMM_INT_DECL(bool) HMIsMsrBitmapActive(PVM pVM);
160# ifdef VBOX_WITH_NESTED_HWVIRT_VMX
161VMM_INT_DECL(void) HMNotifyVmxNstGstVmexit(PVMCPU pVCpu);
162VMM_INT_DECL(void) HMNotifyVmxNstGstCurrentVmcsChanged(PVMCPU pVCpu);
163# endif
164/** @} */
165
166/** @name R0, R3 SVM handlers.
167 * @{ */
168VMM_INT_DECL(bool) HMIsSvmVGifActive(PCVMCC pVM);
169# ifdef VBOX_WITH_NESTED_HWVIRT_SVM
170VMM_INT_DECL(void) HMNotifySvmNstGstVmexit(PVMCPUCC pVCpu, PCPUMCTX pCtx);
171# endif
172VMM_INT_DECL(int) HMIsSubjectToSvmErratum170(uint32_t *pu32Family, uint32_t *pu32Model, uint32_t *pu32Stepping);
173VMM_INT_DECL(int) HMHCMaybeMovTprSvmHypercall(PVMCC pVM, PVMCPUCC pVCpu);
174/** @} */
175
176#else /* Nops in RC: */
177
178/** @name RC HM (VMX/SVM agnostic) handlers.
179 * @{ */
180# define HMFlushTlb(pVCpu) do { } while (0)
181# define HMFlushTlbOnAllVCpus(pVM) do { } while (0)
182# define HMInvalidatePageOnAllVCpus(pVM, GCVirt) do { } while (0)
183# define HMInvalidatePhysPage(pVM, GCVirt) do { } while (0)
184# define HMAreNestedPagingAndFullGuestExecEnabled(pVM) false
185# define HMIsLongModeAllowed(pVM) false
186# define HMIsNestedPagingActive(pVM) false
187# define HMIsMsrBitmapsActive(pVM) false
188/** @} */
189
190/** @name RC SVM handlers.
191 * @{ */
192# define HMIsSvmVGifActive(pVM) false
193# define HMNotifySvmNstGstVmexit(pVCpu, pCtx) do { } while (0)
194# define HMIsSubjectToSvmErratum170(puFamily, puModel, puStepping) false
195# define HMHCMaybeMovTprSvmHypercall(pVM, pVCpu) do { } while (0)
196/** @} */
197
198#endif
199
200#ifdef IN_RING0
201/** @defgroup grp_hm_r0 The HM ring-0 Context API
202 * @{
203 */
204VMMR0_INT_DECL(int) HMR0Init(void);
205VMMR0_INT_DECL(int) HMR0Term(void);
206VMMR0_INT_DECL(int) HMR0InitVM(PVMCC pVM);
207VMMR0_INT_DECL(int) HMR0TermVM(PVMCC pVM);
208VMMR0_INT_DECL(int) HMR0EnableAllCpus(PVMCC pVM);
209# ifdef VBOX_WITH_RAW_MODE
210VMMR0_INT_DECL(int) HMR0EnterSwitcher(PVMCC pVM, VMMSWITCHER enmSwitcher, bool *pfVTxDisabled);
211VMMR0_INT_DECL(void) HMR0LeaveSwitcher(PVMCC pVM, bool fVTxDisabled);
212# endif
213
214VMMR0_INT_DECL(int) HMR0SetupVM(PVMCC pVM);
215VMMR0_INT_DECL(int) HMR0RunGuestCode(PVMCC pVM, PVMCPUCC pVCpu);
216VMMR0_INT_DECL(int) HMR0Enter(PVMCPUCC pVCpu);
217VMMR0_INT_DECL(int) HMR0LeaveCpu(PVMCPUCC pVCpu);
218VMMR0_INT_DECL(void) HMR0ThreadCtxCallback(RTTHREADCTXEVENT enmEvent, void *pvUser);
219VMMR0_INT_DECL(void) HMR0NotifyCpumUnloadedGuestFpuState(PVMCPUCC VCpu);
220VMMR0_INT_DECL(void) HMR0NotifyCpumModifiedHostCr0(PVMCPUCC VCpu);
221VMMR0_INT_DECL(bool) HMR0SuspendPending(void);
222VMMR0_INT_DECL(int) HMR0InvalidatePage(PVMCPUCC pVCpu, RTGCPTR GCVirt);
223VMMR0_INT_DECL(int) HMR0ImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat);
224
225/** @} */
226#endif /* IN_RING0 */
227
228
229#ifdef IN_RING3
230/** @defgroup grp_hm_r3 The HM ring-3 Context API
231 * @{
232 */
233VMMR3DECL(bool) HMR3IsEnabled(PUVM pUVM);
234VMMR3DECL(bool) HMR3IsNestedPagingActive(PUVM pUVM);
235VMMR3DECL(bool) HMR3AreVirtApicRegsEnabled(PUVM pUVM);
236VMMR3DECL(bool) HMR3IsPostedIntrsEnabled(PUVM pUVM);
237VMMR3DECL(bool) HMR3IsVpidActive(PUVM pUVM);
238VMMR3DECL(bool) HMR3IsUXActive(PUVM pUVM);
239VMMR3DECL(bool) HMR3IsSvmEnabled(PUVM pUVM);
240VMMR3DECL(bool) HMR3IsVmxEnabled(PUVM pUVM);
241
242VMMR3_INT_DECL(int) HMR3Init(PVM pVM);
243VMMR3_INT_DECL(int) HMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat);
244VMMR3_INT_DECL(void) HMR3Relocate(PVM pVM);
245VMMR3_INT_DECL(int) HMR3Term(PVM pVM);
246VMMR3_INT_DECL(void) HMR3Reset(PVM pVM);
247VMMR3_INT_DECL(void) HMR3ResetCpu(PVMCPU pVCpu);
248VMMR3_INT_DECL(void) HMR3CheckError(PVM pVM, int iStatusCode);
249VMMR3_INT_DECL(void) HMR3NotifyDebugEventChanged(PVM pVM);
250VMMR3_INT_DECL(void) HMR3NotifyDebugEventChangedPerCpu(PVM pVM, PVMCPU pVCpu);
251VMMR3_INT_DECL(bool) HMR3IsActive(PCVMCPU pVCpu);
252VMMR3_INT_DECL(int) HMR3EnablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
253VMMR3_INT_DECL(int) HMR3DisablePatching(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem);
254VMMR3_INT_DECL(int) HMR3PatchTprInstr(PVM pVM, PVMCPU pVCpu);
255VMMR3_INT_DECL(bool) HMR3IsRescheduleRequired(PVM pVM, PCCPUMCTX pCtx);
256VMMR3_INT_DECL(bool) HMR3IsVmxPreemptionTimerUsed(PVM pVM);
257/** @} */
258#endif /* IN_RING3 */
259
260/** @} */
261RT_C_DECLS_END
262
263
264#endif /* !VBOX_INCLUDED_vmm_hm_h */
265
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