VirtualBox

source: vbox/trunk/include/VBox/vmm/iom.h@ 60188

Last change on this file since 60188 was 58909, checked in by vboxsync, 9 years ago

DBGF: More groundwork for port I/O, MMIO, interrupt and generic event breakpoints.
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1/** @file
2 * IOM - Input / Output Monitor.
3 */
4
5/*
6 * Copyright (C) 2006-2015 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_iom_h
27#define ___VBox_vmm_iom_h
28
29#include <VBox/types.h>
30#include <VBox/dis.h>
31#include <VBox/vmm/dbgf.h>
32
33RT_C_DECLS_BEGIN
34
35
36/** @defgroup grp_iom The Input / Ouput Monitor API
37 * @ingroup grp_vmm
38 * @{
39 */
40
41/** @def IOM_NO_PDMINS_CHECKS
42 * Until all devices have been fully adjusted to PDM style, the pPdmIns
43 * parameter is not checked by IOM.
44 * @todo Check this again, now.
45 */
46#define IOM_NO_PDMINS_CHECKS
47
48/**
49 * Macro for checking if an I/O or MMIO emulation call succeeded.
50 *
51 * This macro shall only be used with the IOM APIs where it's mentioned
52 * in the return value description. And there it must be used to correctly
53 * determine if the call succeeded and things like the RIP needs updating.
54 *
55 *
56 * @returns Success indicator (true/false).
57 *
58 * @param rc The status code. This may be evaluated
59 * more than once!
60 *
61 * @remark To avoid making assumptions about the layout of the
62 * VINF_EM_FIRST...VINF_EM_LAST range we're checking explicitly for
63 * each exact exception. However, for efficiency we ASSUME that the
64 * VINF_EM_LAST is smaller than most of the relevant status codes. We
65 * also ASSUME that the VINF_EM_RESCHEDULE_REM status code is the
66 * most frequent status code we'll enounter in this range.
67 *
68 * @todo Will have to add VINF_EM_DBG_HYPER_BREAKPOINT if the
69 * I/O port and MMIO breakpoints should trigger before
70 * the I/O is done. Currently, we don't implement these
71 * kind of breakpoints.
72 */
73#define IOM_SUCCESS(rc) ( (rc) == VINF_SUCCESS \
74 || ( (rc) <= VINF_EM_LAST \
75 && (rc) != VINF_EM_RESCHEDULE_REM \
76 && (rc) >= VINF_EM_FIRST \
77 && (rc) != VINF_EM_RESCHEDULE_RAW \
78 && (rc) != VINF_EM_RESCHEDULE_HM \
79 ) \
80 )
81
82/** @name IOMMMIO_FLAGS_XXX
83 * @{ */
84/** Pass all reads thru unmodified. */
85#define IOMMMIO_FLAGS_READ_PASSTHRU UINT32_C(0x00000000)
86/** All read accesses are DWORD sized (32-bit). */
87#define IOMMMIO_FLAGS_READ_DWORD UINT32_C(0x00000001)
88/** All read accesses are DWORD (32-bit) or QWORD (64-bit) sized.
89 * Only accesses that are both QWORD sized and aligned are performed as QWORD.
90 * All other access will be done DWORD fashion (because it is way simpler). */
91#define IOMMMIO_FLAGS_READ_DWORD_QWORD UINT32_C(0x00000002)
92/** The read access mode mask. */
93#define IOMMMIO_FLAGS_READ_MODE UINT32_C(0x00000003)
94
95/** Pass all writes thru unmodified. */
96#define IOMMMIO_FLAGS_WRITE_PASSTHRU UINT32_C(0x00000000)
97/** All write accesses are DWORD (32-bit) sized and unspecified bytes are
98 * written as zero. */
99#define IOMMMIO_FLAGS_WRITE_DWORD_ZEROED UINT32_C(0x00000010)
100/** All write accesses are either DWORD (32-bit) or QWORD (64-bit) sized,
101 * missing bytes will be written as zero. Only accesses that are both QWORD
102 * sized and aligned are performed as QWORD, all other accesses will be done
103 * DWORD fashion (because it's way simpler). */
104#define IOMMMIO_FLAGS_WRITE_DWORD_QWORD_ZEROED UINT32_C(0x00000020)
105/** All write accesses are DWORD (32-bit) sized and unspecified bytes are
106 * read from the device first as DWORDs.
107 * @remarks This isn't how it happens on real hardware, but it allows
108 * simplifications of devices where reads doesn't change the device
109 * state in any way. */
110#define IOMMMIO_FLAGS_WRITE_DWORD_READ_MISSING UINT32_C(0x00000030)
111/** All write accesses are DWORD (32-bit) or QWORD (64-bit) sized and
112 * unspecified bytes are read from the device first as DWORDs. Only accesses
113 * that are both QWORD sized and aligned are performed as QWORD, all other
114 * accesses will be done DWORD fashion (because it's way simpler).
115 * @remarks This isn't how it happens on real hardware, but it allows
116 * simplifications of devices where reads doesn't change the device
117 * state in any way. */
118#define IOMMMIO_FLAGS_WRITE_DWORD_QWORD_READ_MISSING UINT32_C(0x00000040)
119/** All write accesses are DWORD (32-bit) sized and aligned, attempts at other
120 * accesses are ignored.
121 * @remarks E1000, APIC */
122#define IOMMMIO_FLAGS_WRITE_ONLY_DWORD UINT32_C(0x00000050)
123/** All write accesses are DWORD (32-bit) or QWORD (64-bit) sized and aligned,
124 * attempts at other accesses are ignored.
125 * @remarks Seemingly required by AHCI (although I doubt it's _really_
126 * required as EM/REM doesn't do the right thing in ring-3 anyway,
127 * esp. not in raw-mode). */
128#define IOMMMIO_FLAGS_WRITE_ONLY_DWORD_QWORD UINT32_C(0x00000060)
129/** The read access mode mask. */
130#define IOMMMIO_FLAGS_WRITE_MODE UINT32_C(0x00000070)
131
132/** Whether to do a DBGSTOP on complicated reads.
133 * What this includes depends on the read mode, but generally all misaligned
134 * reads as well as word and byte reads and maybe qword reads. */
135#define IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_READ UINT32_C(0x00000100)
136/** Whether to do a DBGSTOP on complicated writes.
137 * This depends on the write mode, but generally all writes where we have to
138 * supply bytes (zero them or read them). */
139#define IOMMMIO_FLAGS_DBGSTOP_ON_COMPLICATED_WRITE UINT32_C(0x00000200)
140
141/** Mask of valid flags. */
142#define IOMMMIO_FLAGS_VALID_MASK UINT32_C(0x00000373)
143/** @} */
144
145/**
146 * Checks whether the write mode allows aligned QWORD accesses to be passed
147 * thru to the device handler.
148 * @param a_fFlags The MMIO handler flags.
149 * @remarks The current implementation makes ASSUMPTIONS about the mode values!
150 */
151#define IOMMMIO_DOES_WRITE_MODE_ALLOW_QWORD(a_fFlags) RT_BOOL((a_fFlags) & UINT32_C(0x00000020))
152
153
154/**
155 * Port I/O Handler for IN operations.
156 *
157 * @returns VINF_SUCCESS or VINF_EM_*.
158 * @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
159 *
160 * @param pDevIns The device instance.
161 * @param pvUser User argument.
162 * @param uPort Port number used for the IN operation.
163 * @param pu32 Where to store the result. This is always a 32-bit
164 * variable regardless of what @a cb might say.
165 * @param cb Number of bytes read.
166 * @remarks Caller enters the device critical section.
167 */
168typedef DECLCALLBACK(int) FNIOMIOPORTIN(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb);
169/** Pointer to a FNIOMIOPORTIN(). */
170typedef FNIOMIOPORTIN *PFNIOMIOPORTIN;
171
172/**
173 * Port I/O Handler for string IN operations.
174 *
175 * @returns VINF_SUCCESS or VINF_EM_*.
176 * @returns VERR_IOM_IOPORT_UNUSED if the port is really unused and a ~0 value should be returned.
177 *
178 * @param pDevIns The device instance.
179 * @param pvUser User argument.
180 * @param uPort Port number used for the IN operation.
181 * @param pbDst Pointer to the destination buffer.
182 * @param pcTransfers Pointer to the number of transfer units to read, on
183 * return remaining transfer units.
184 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
185 * @remarks Caller enters the device critical section.
186 */
187typedef DECLCALLBACK(int) FNIOMIOPORTINSTRING(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint8_t *pbDst,
188 uint32_t *pcTransfers, unsigned cb);
189/** Pointer to a FNIOMIOPORTINSTRING(). */
190typedef FNIOMIOPORTINSTRING *PFNIOMIOPORTINSTRING;
191
192/**
193 * Port I/O Handler for OUT operations.
194 *
195 * @returns VINF_SUCCESS or VINF_EM_*.
196 *
197 * @param pDevIns The device instance.
198 * @param pvUser User argument.
199 * @param uPort Port number used for the OUT operation.
200 * @param u32 The value to output.
201 * @param cb The value size in bytes.
202 * @remarks Caller enters the device critical section.
203 */
204typedef DECLCALLBACK(int) FNIOMIOPORTOUT(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb);
205/** Pointer to a FNIOMIOPORTOUT(). */
206typedef FNIOMIOPORTOUT *PFNIOMIOPORTOUT;
207
208/**
209 * Port I/O Handler for string OUT operations.
210 *
211 * @returns VINF_SUCCESS or VINF_EM_*.
212 *
213 * @param pDevIns The device instance.
214 * @param pvUser User argument.
215 * @param uPort Port number used for the OUT operation.
216 * @param pbSrc Pointer to the source buffer.
217 * @param pcTransfers Pointer to the number of transfer units to write, on
218 * return remaining transfer units.
219 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
220 * @remarks Caller enters the device critical section.
221 */
222typedef DECLCALLBACK(int) FNIOMIOPORTOUTSTRING(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, const uint8_t *pbSrc,
223 uint32_t *pcTransfers, unsigned cb);
224/** Pointer to a FNIOMIOPORTOUTSTRING(). */
225typedef FNIOMIOPORTOUTSTRING *PFNIOMIOPORTOUTSTRING;
226
227
228/**
229 * Memory mapped I/O Handler for read operations.
230 *
231 * @returns VBox status code.
232 *
233 * @param pDevIns The device instance.
234 * @param pvUser User argument.
235 * @param GCPhysAddr Physical address (in GC) where the read starts.
236 * @param pv Where to store the result.
237 * @param cb Number of bytes read.
238 * @remarks Caller enters the device critical section.
239 */
240typedef DECLCALLBACK(int) FNIOMMMIOREAD(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb);
241/** Pointer to a FNIOMMMIOREAD(). */
242typedef FNIOMMMIOREAD *PFNIOMMMIOREAD;
243
244/**
245 * Memory mapped I/O Handler for write operations.
246 *
247 * @returns VBox status code.
248 *
249 * @param pDevIns The device instance.
250 * @param pvUser User argument.
251 * @param GCPhysAddr Physical address (in GC) where the read starts.
252 * @param pv Where to fetch the result.
253 * @param cb Number of bytes to write.
254 * @remarks Caller enters the device critical section.
255 */
256typedef DECLCALLBACK(int) FNIOMMMIOWRITE(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb);
257/** Pointer to a FNIOMMMIOWRITE(). */
258typedef FNIOMMMIOWRITE *PFNIOMMMIOWRITE;
259
260/**
261 * Memory mapped I/O Handler for memset operations, actually for REP STOS* instructions handling.
262 *
263 * @returns VBox status code.
264 *
265 * @param pDevIns The device instance.
266 * @param pvUser User argument.
267 * @param GCPhysAddr Physical address (in GC) where the write starts.
268 * @param u32Item Byte/Word/Dword data to fill.
269 * @param cbItem Size of data in u32Item parameter, restricted to 1/2/4 bytes.
270 * @param cItems Number of iterations.
271 * @remarks Caller enters the device critical section.
272 */
273typedef DECLCALLBACK(int) FNIOMMMIOFILL(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems);
274/** Pointer to a FNIOMMMIOFILL(). */
275typedef FNIOMMMIOFILL *PFNIOMMMIOFILL;
276
277VMMDECL(VBOXSTRICTRC) IOMIOPortRead(PVM pVM, PVMCPU pVCpu, RTIOPORT Port, uint32_t *pu32Value, size_t cbValue);
278VMMDECL(VBOXSTRICTRC) IOMIOPortWrite(PVM pVM, PVMCPU pVCpu, RTIOPORT Port, uint32_t u32Value, size_t cbValue);
279VMM_INT_DECL(VBOXSTRICTRC) IOMIOPortReadString(PVM pVM, PVMCPU pVCpu, RTIOPORT Port, void *pvDst,
280 uint32_t *pcTransfers, unsigned cb);
281VMM_INT_DECL(VBOXSTRICTRC) IOMIOPortWriteString(PVM pVM, PVMCPU pVCpu, RTIOPORT uPort, void const *pvSrc,
282 uint32_t *pcTransfers, unsigned cb);
283VMMDECL(VBOXSTRICTRC) IOMInterpretINSEx(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, DISCPUMODE enmAddrMode, uint32_t cbTransfer);
284VMMDECL(VBOXSTRICTRC) IOMInterpretOUTSEx(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, uint32_t uPort, uint32_t uPrefix, DISCPUMODE enmAddrMode, uint32_t cbTransfer);
285VMMDECL(VBOXSTRICTRC) IOMMMIORead(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue);
286VMMDECL(VBOXSTRICTRC) IOMMMIOWrite(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue);
287VMMDECL(VBOXSTRICTRC) IOMMMIOPhysHandler(PVM pVM, PVMCPU pVCpu, RTGCUINT uErrorCode, PCPUMCTXCORE pCtxCore, RTGCPHYS GCPhysFault);
288VMMDECL(VBOXSTRICTRC) IOMInterpretCheckPortIOAccess(PVM pVM, PCPUMCTXCORE pCtxCore, RTIOPORT Port, unsigned cb);
289VMMDECL(int) IOMMMIOMapMMIO2Page(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags);
290VMMDECL(int) IOMMMIOMapMMIOHCPage(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags);
291VMMDECL(int) IOMMMIOResetRegion(PVM pVM, RTGCPHYS GCPhys);
292VMMDECL(bool) IOMIsLockWriteOwner(PVM pVM);
293
294#ifdef IN_RC
295/** @defgroup grp_iom_rc The IOM Raw-Mode Context API
296 * @{
297 */
298VMMRCDECL(VBOXSTRICTRC) IOMRCIOPortHandler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, PDISCPUSTATE pCpu);
299/** @} */
300#endif /* IN_RC */
301
302
303
304#ifdef IN_RING3
305/** @defgroup grp_iom_r3 The IOM Host Context Ring-3 API
306 * @{
307 */
308VMMR3_INT_DECL(int) IOMR3Init(PVM pVM);
309VMMR3_INT_DECL(void) IOMR3Reset(PVM pVM);
310VMMR3_INT_DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta);
311VMMR3_INT_DECL(int) IOMR3Term(PVM pVM);
312VMMR3_INT_DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
313 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
314 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStringCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStringCallback,
315 const char *pszDesc);
316VMMR3_INT_DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
317 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
318 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
319 const char *pszDesc);
320VMMR3_INT_DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
321 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
322 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
323 const char *pszDesc);
324VMMR3_INT_DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts);
325
326VMMR3_INT_DECL(int) IOMR3MmioRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
327 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
328 R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
329 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback,
330 uint32_t fFlags, const char *pszDesc);
331VMMR3_INT_DECL(int) IOMR3MmioRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
332 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
333 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
334 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback);
335VMMR3_INT_DECL(int) IOMR3MmioRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTGCPTR pvUser,
336 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
337 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
338 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback);
339VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange);
340
341VMMR3_INT_DECL(void) IOMR3NotifyBreakpointCountChange(PVM pVM, bool fPortIo, bool fMmio);
342VMMR3_INT_DECL(void) IOMR3NotifyDebugEventChange(PVM pVM, DBGFEVENT enmEvent, bool fEnabled);
343
344/** @} */
345#endif /* IN_RING3 */
346
347
348/** @} */
349
350RT_C_DECLS_END
351
352#endif
353
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