Changeset 58909 in vbox

Timestamp:

Nov 29, 2015 7:23:46 PM (9 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

104409

Message:

DBGF: More groundwork for port I/O, MMIO, interrupt and generic event breakpoints.

Location:

trunk

Files:

• include/VBox/vmm/dbgf.h (modified) (4 diffs)
• include/VBox/vmm/iom.h (modified) (1 diff)
• include/VBox/vmm/vm.h (modified) (4 diffs)
• include/VBox/vmm/vm.mac (modified) (1 diff)
• src/VBox/Debugger/DBGConsole.cpp (modified) (1 diff)
• src/VBox/VMM/VMMAll/DBGFAll.cpp (modified) (4 diffs)
• src/VBox/VMM/VMMR3/DBGF.cpp (modified) (1 diff)
• src/VBox/VMM/VMMR3/DBGFBp.cpp (modified) (36 diffs)
• src/VBox/VMM/VMMR3/HM.cpp (modified) (2 diffs)
• src/VBox/VMM/VMMR3/IOM.cpp (modified) (1 diff)
• src/VBox/VMM/VMMRZ/DBGFRZ.cpp (modified) (4 diffs)
• src/VBox/VMM/include/DBGFInternal.h (modified) (7 diffs)
• src/VBox/VMM/testcase/tstVMStruct.h (modified) (3 diffs)

trunk/include/VBox/vmm/dbgf.h

@@ -189 +189 @@
      */
     DBGFEVENT_POWERING_OFF,
+
+    /** Hardware Interrupt break.
+     * @todo not yet implemented. */
+    DBGFEVENT_INTERRUPT_HARDWARE,
+    /** Software Interrupt break.
+     * @todo not yet implemented. */
+    DBGFEVENT_INTERRUPT_SOFTWARE,
 
     /** The first selectable event.
@@ -435 +442 @@
     } u;
 } DBGFEVENT;
+AssertCompileSizeAlignment(DBGFEVENT, 8);
 /** Pointer to VMM Debug Event. */
 typedef DBGFEVENT *PDBGFEVENT;
@@ -478 +486 @@
 VMMR3DECL(int)          DBGFR3InjectNMI(PUVM pUVM, VMCPUID idCpu);
 
+/**
+ * Event configuration array element, see DBGFR3EventConfigEx.
+ */
+typedef struct DBGFEVENTCONFIG
+{
+    /** The event to configure */
+    DBGFEVENTTYPE   enmType;
+    /** The new state. */
+    bool            fEnabled;
+} DBGFEVENTCONFIG;
+/** Pointer to an event config. */
+typedef DBGFEVENTCONFIG *PDBGFEVENTCONFIG;
+/** Pointer to a const event config. */
+typedef const DBGFEVENTCONFIG *PCDBGFEVENTCONFIG;
+
+VMMR3DECL(int)          DBGFR3EventConfigEx(PUVM pUVM, PCDBGFEVENTCONFIG paConfigs, size_t cConfigs);
+VMMR3DECL(int)          DBGFR3EventConfig(PUVM pUVM, DBGFEVENTTYPE enmEvent, bool fEnabled);
+VMMR3DECL(bool)         DBGFR3EventIsEnabled(PUVM pUVM, DBGFEVENTTYPE enmEvent);
+VMMR3DECL(int)          DBGFR3EventQuery(PUVM pUVM, PDBGFEVENTCONFIG paConfigs, size_t cConfigs);
+
+/** @name DBGFINTERRUPTSTATE_XXX - interrupt break state.
+ * @{ */
+#define DBGFINTERRUPTSTATE_DISABLED     0
+#define DBGFINTERRUPTSTATE_ENABLED      1
+#define DBGFINTERRUPTSTATE_DONT_TOUCH   2
+/** @} */
+
+/**
+ * Interrupt break state configuration entry.
+ */
+typedef struct DBGFINTERRUPTCONFIG
+{
+    /** The interrupt number. */
+    uint8_t     iInterrupt;
+    /** The hardware interrupt state (DBGFINTERRUPTSTATE_XXX). */
+    uint8_t     enmHardState;
+    /** The software interrupt state (DBGFINTERRUPTSTATE_XXX). */
+    uint8_t     enmSoftState;
+} DBGFINTERRUPTCONFIG;
+/** Pointer to an interrupt break state config entyr. */
+typedef DBGFINTERRUPTCONFIG *PDBGFINTERRUPTCONFIG;
+/** Pointer to a const interrupt break state config entyr. */
+typedef DBGFINTERRUPTCONFIG const *PCDBGFINTERRUPTCONFIG;
+
+VMMR3DECL(int) DBGFR3InterruptConfigEx(PUVM pUVM, PCDBGFINTERRUPTCONFIG paConfigs, size_t cConfigs);
+VMMR3DECL(int) DBGFR3InterruptHardwareConfig(PUVM pUVM, uint8_t iInterrupt, bool fEnabled);
+VMMR3DECL(int) DBGFR3InterruptSoftwareConfig(PUVM pUVM, uint8_t iInterrupt, bool fEnabled);
+VMMR3DECL(int) DBGFR3InterruptHardwareIsEnabled(PUVM pUVM, uint8_t iInterrupt);
+VMMR3DECL(int) DBGFR3InterruptSoftwareIsEnabled(PUVM pUVM, uint8_t iInterrupt);
+
 #endif /* IN_RING3 */
+
+/** @def DBGF_IS_EVENT_ENABLED
+ * Checks if a selectable debug event is enabled or not (fast).
+ *
+ * @returns true/false.
+ * @param   a_pVM       Pointer to the cross context VM structure.
+ * @param   a_enmEvent  The selectable event to check.
+ * @remarks Only for use internally in the VMM. Use DBGFR3EventIsEnabled elsewhere.
+ */
+#if defined(VBOX_STRICT) && defined(RT_COMPILER_SUPPORTS_LAMBDA)
+# define DBGF_IS_EVENT_ENABLED(a_pVM, a_enmEvent) \
+    ([](PVM a_pLambdaVM, DBGFEVENTTYPE a_enmLambdaEvent) -> bool { \
+        Assert(a_enmLambdaEvent >= DBGFEVENT_FIRST_SELECTABLE); \
+        Assert(a_enmLambdaEvent < DBGFEVENT_END); \
+        return ASMBitTest(&a_pLambdaVM->dbgf.ro.bmSelectedEvents, a_enmLambdaEvent); \
+    }(a_pVM, a_enmEvent))
+#elif defined(VBOX_STRICT) && defined(__GNUC__)
+# define DBGF_IS_EVENT_ENABLED(a_pVM, a_enmEvent) \
+    __extension__ ({ \
+        Assert((a_enmEvent) >= DBGFEVENT_FIRST_SELECTABLE); \
+        Assert((a_enmEvent) < DBGFEVENT_END); \
+        ASMBitTest(&(a_pVM)->dbgf.ro.bmSelectedEvents, (a_enmEvent)); \
+    })
+#else
+# define DBGF_IS_EVENT_ENABLED(a_pVM, a_enmEvent) \
+        ASMBitTest(&(a_pVM)->dbgf.ro.bmSelectedEvents, (a_enmEvent))
+#endif
+
+
+/** @def DBGF_IS_HARDWARE_INT_ENABLED
+ * Checks if hardware interrupt interception is enabled or not for an interrupt.
+ *
+ * @returns true/false.
+ * @param   a_pVM           Pointer to the cross context VM structure.
+ * @param   a_iInterrupt    Interrupt to check.
+ * @remarks Only for use internally in the VMM.  Use
+ *          DBGFR3InterruptHardwareIsEnabled elsewhere.
+ */
+#define DBGF_IS_HARDWARE_INT_ENABLED(a_pVM, a_iInterrupt) \
+        ASMBitTest(&(a_pVM)->dbgf.ro.bmHardIntBreakpoints, (uint8_t)(a_iInterrupt))
+
+/** @def DBGF_IS_SOFTWARE_INT_ENABLED
+ * Checks if software interrupt interception is enabled or not for an interrupt.
+ *
+ * @returns true/false.
+ * @param   a_pVM           Pointer to the cross context VM structure.
+ * @param   a_iInterrupt    Interrupt to check.
+ * @remarks Only for use internally in the VMM.  Use
+ *          DBGFR3InterruptSoftwareIsEnabled elsewhere.
+ */
+#define DBGF_IS_SOFTWARE_INT_ENABLED(a_pVM, a_iInterrupt) \
+        ASMBitTest(&(a_pVM)->dbgf.ro.bmSoftIntBreakpoints, (uint8_t)(a_iInterrupt))
 
 
@@ -644 +754 @@
  * Breakpoint enumeration callback function.
  *
- * @returns VBox status code. Any failure will stop the enumeration.
+ * @returns VBox status code.
+ *          The enumeration stops on failure status and VINF_CALLBACK_RETURN.
  * @param   pUVM        The user mode VM handle.
  * @param   pvUser      The user argument.

trunk/include/VBox/vmm/iom.h

@@ -339 +339 @@
 VMMR3_INT_DECL(int)  IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange);
 
-VMMR3_INT_DECL(void) IOMR3NotifyBreakpointCountChange(PVM pVM, unsigned cPortIo, unsigned cMmio);
+VMMR3_INT_DECL(void) IOMR3NotifyBreakpointCountChange(PVM pVM, bool fPortIo, bool fMmio);
 VMMR3_INT_DECL(void) IOMR3NotifyDebugEventChange(PVM pVM, DBGFEVENT enmEvent, bool fEnabled);
 

trunk/include/VBox/vmm/vm.h

@@ -217 +217 @@
         struct DBGFCPU      s;
 #endif
-        uint8_t             padding[64];        /* multiple of 64 */
+        uint8_t             padding[256];       /* multiple of 64 */
     } dbgf;
 
@@ -230 +230 @@
 
     /** Align the following members on page boundary. */
-    uint8_t                 abAlignment2[3584];
+    uint8_t                 abAlignment2[3392];
 
     /** PGM part. */
@@ -983 +983 @@
 #endif
 #ifdef ___VBox_vmm_cpum_h
-        /** Read only info exposed about the host and guest CPUs.   */
+        /** Read only info exposed about the host and guest CPUs. */
         struct
         {
@@ -1111 +1111 @@
         struct DBGF s;
 #endif
+#ifdef ___VBox_vmm_dbgf_h
+        /** Read only info exposed about interrupt breakpoints and selected events. */
+        struct
+        {
+            /** Bitmap of enabled hardware interrupt breakpoints. */
+            uint32_t                    bmHardIntBreakpoints[256 / 32];
+            /** Bitmap of enabled software interrupt breakpoints. */
+            uint32_t                    bmSoftIntBreakpoints[256 / 32];
+            /** Bitmap of selected events.
+             * This includes non-selectable events too for simplicity, we maintain the
+             * state for some of these, as it may come in handy. */
+            uint32_t                    bmSelectedEvents[(DBGFEVENT_END + 31) / 32];
+            /** Enabled hardware interrupt breakpoints. */
+            uint32_t                    cHardIntBreakpoints;
+            /** Enabled software interrupt breakpoints. */
+            uint32_t                    cSoftIntBreakpoints;
+            /** Number of selected events. */
+            uint32_t                    cSelectedEvents;
+        } const     ro;
+#endif
         uint8_t     padding[2368];      /* multiple of 64 */
     } dbgf;

trunk/include/VBox/vmm/vm.mac

@@ -142 +142 @@
     .pdm                    resb 256
     .iom                    resb 512
-    .dbgf                   resb 64
+    .dbgf                   resb 256
     .gim                    resb 64
 

trunk/src/VBox/Debugger/DBGConsole.cpp

@@ -657 +657 @@
 
         case DBGFEVENT_BREAKPOINT:
+        case DBGFEVENT_BREAKPOINT_IO:
+        case DBGFEVENT_BREAKPOINT_MMIO:
         case DBGFEVENT_BREAKPOINT_HYPER:
         {
             bool fRegCtxGuest = pDbgc->fRegCtxGuest;
-            pDbgc->fRegCtxGuest = pEvent->enmType == DBGFEVENT_BREAKPOINT;
+            pDbgc->fRegCtxGuest = pEvent->enmType != DBGFEVENT_BREAKPOINT_HYPER;
 
             rc = dbgcBpExec(pDbgc, pEvent->u.Bp.iBp);

trunk/src/VBox/VMM/VMMAll/DBGFAll.cpp

@@ -26 +26 @@
 #include <VBox/err.h>
 #include <iprt/assert.h>
+
+
+/*
+ * Check the read-only VM members.
+ */
+AssertCompileMembersSameSizeAndOffset(VM, dbgf.s.bmSoftIntBreakpoints,  VM, dbgf.ro.bmSoftIntBreakpoints);
+AssertCompileMembersSameSizeAndOffset(VM, dbgf.s.bmHardIntBreakpoints,  VM, dbgf.ro.bmHardIntBreakpoints);
+AssertCompileMembersSameSizeAndOffset(VM, dbgf.s.bmSelectedEvents,      VM, dbgf.ro.bmSelectedEvents);
+AssertCompileMembersSameSizeAndOffset(VM, dbgf.s.cHardIntBreakpoints,   VM, dbgf.ro.cHardIntBreakpoints);
+AssertCompileMembersSameSizeAndOffset(VM, dbgf.s.cSoftIntBreakpoints,   VM, dbgf.ro.cSoftIntBreakpoints);
+AssertCompileMembersSameSizeAndOffset(VM, dbgf.s.cSelectedEvents,       VM, dbgf.ro.cSelectedEvents);
 
 
@@ -120 +131 @@
  * @returns true if armed, false if not.
  * @param   pVM        The cross context VM structure.
+ * @remarks Don't call this from CPUMRecalcHyperDRx!
  */
 VMM_INT_DECL(bool) DBGFBpIsHwArmed(PVM pVM)
 {
-    Assert(RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints) == 4);
-    return (pVM->dbgf.s.aHwBreakpoints[0].fEnabled && pVM->dbgf.s.aHwBreakpoints[0].enmType == DBGFBPTYPE_REG)
-        || (pVM->dbgf.s.aHwBreakpoints[1].fEnabled && pVM->dbgf.s.aHwBreakpoints[1].enmType == DBGFBPTYPE_REG)
-        || (pVM->dbgf.s.aHwBreakpoints[2].fEnabled && pVM->dbgf.s.aHwBreakpoints[2].enmType == DBGFBPTYPE_REG)
-        || (pVM->dbgf.s.aHwBreakpoints[3].fEnabled && pVM->dbgf.s.aHwBreakpoints[3].enmType == DBGFBPTYPE_REG);
+    return pVM->dbgf.s.cEnabledHwBreakpoints > 0;
 }
 
@@ -136 +144 @@
  * @returns true if armed, false if not.
  * @param   pVM        The cross context VM structure.
+ * @remarks Don't call this from CPUMRecalcHyperDRx!
  */
 VMM_INT_DECL(bool) DBGFBpIsHwIoArmed(PVM pVM)
 {
-    Assert(RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints) == 4);
-    /** @todo cache this! */
-    return (   pVM->dbgf.s.aHwBreakpoints[0].u.Reg.fType == X86_DR7_RW_IO
-            && pVM->dbgf.s.aHwBreakpoints[0].fEnabled
-            && pVM->dbgf.s.aHwBreakpoints[0].enmType     == DBGFBPTYPE_REG
-           )
-        || (   pVM->dbgf.s.aHwBreakpoints[1].u.Reg.fType == X86_DR7_RW_IO
-            && pVM->dbgf.s.aHwBreakpoints[1].fEnabled
-            && pVM->dbgf.s.aHwBreakpoints[1].enmType     == DBGFBPTYPE_REG
-           )
-        || (   pVM->dbgf.s.aHwBreakpoints[2].u.Reg.fType == X86_DR7_RW_IO
-            && pVM->dbgf.s.aHwBreakpoints[2].fEnabled
-            && pVM->dbgf.s.aHwBreakpoints[2].enmType     == DBGFBPTYPE_REG
-           )
-        || (   pVM->dbgf.s.aHwBreakpoints[3].u.Reg.fType == X86_DR7_RW_IO
-            && pVM->dbgf.s.aHwBreakpoints[3].fEnabled
-            && pVM->dbgf.s.aHwBreakpoints[3].enmType     == DBGFBPTYPE_REG
-           );
+    return pVM->dbgf.s.cEnabledHwIoBreakpoints > 0;
 }
 
@@ -185 +177 @@
      * the guest.
      */
-    for (unsigned iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
+    if (pVM->dbgf.s.cEnabledHwIoBreakpoints > 0)
     {
-        if (   pVM->dbgf.s.aHwBreakpoints[iBp].u.Reg.fType == X86_DR7_RW_IO
-            && pVM->dbgf.s.aHwBreakpoints[iBp].fEnabled
-            && pVM->dbgf.s.aHwBreakpoints[iBp].enmType     == DBGFBPTYPE_REG )
+        for (unsigned iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
         {
-            uint8_t  cbReg      = pVM->dbgf.s.aHwBreakpoints[iBp].u.Reg.cb; Assert(RT_IS_POWER_OF_TWO(cbReg));
-            uint64_t uDrXFirst  = pVM->dbgf.s.aHwBreakpoints[iBp].u.Reg.GCPtr & ~(uint64_t)(cbReg - 1);
-            uint64_t uDrXLast   = uDrXFirst + cbReg - 1;
-            if (uDrXFirst <= uIoPortLast && uDrXLast >= uIoPortFirst)
+            if (   pVM->dbgf.s.aHwBreakpoints[iBp].u.Reg.fType == X86_DR7_RW_IO
+                && pVM->dbgf.s.aHwBreakpoints[iBp].fEnabled
+                && pVM->dbgf.s.aHwBreakpoints[iBp].enmType     == DBGFBPTYPE_REG )
             {
-                /* (See also DBGFRZTrap01Handler.) */
-                pVCpu->dbgf.s.iActiveBp = pVM->dbgf.s.aHwBreakpoints[iBp].iBp;
-                pVCpu->dbgf.s.fSingleSteppingRaw = false;
-
-                LogFlow(("DBGFBpCheckIo: hit hw breakpoint %d at %04x:%RGv (iop %#x)\n",
-                         pVM->dbgf.s.aHwBreakpoints[iBp].iBp, pCtx->cs.Sel, pCtx->rip, uIoPort));
-                return VINF_EM_DBG_BREAKPOINT;
+                uint8_t  cbReg      = pVM->dbgf.s.aHwBreakpoints[iBp].u.Reg.cb; Assert(RT_IS_POWER_OF_TWO(cbReg));
+                uint64_t uDrXFirst  = pVM->dbgf.s.aHwBreakpoints[iBp].u.Reg.GCPtr & ~(uint64_t)(cbReg - 1);
+                uint64_t uDrXLast   = uDrXFirst + cbReg - 1;
+                if (uDrXFirst <= uIoPortLast && uDrXLast >= uIoPortFirst)
+                {
+                    /* (See also DBGFRZTrap01Handler.) */
+                    pVCpu->dbgf.s.iActiveBp = pVM->dbgf.s.aHwBreakpoints[iBp].iBp;
+                    pVCpu->dbgf.s.fSingleSteppingRaw = false;
+
+                    LogFlow(("DBGFBpCheckIo: hit hw breakpoint %d at %04x:%RGv (iop %#x)\n",
+                             pVM->dbgf.s.aHwBreakpoints[iBp].iBp, pCtx->cs.Sel, pCtx->rip, uIoPort));
+                    return VINF_EM_DBG_BREAKPOINT;
+                }
             }
         }

trunk/src/VBox/VMM/VMMR3/DBGF.cpp

@@ -1218 +1218 @@
 
 /**
+ * @callback_method_impl{FNVMMEMTRENDEZVOUS}
+ */
+static DECLCALLBACK(VBOXSTRICTRC) dbgfR3EventConfigNotifyAllCpus(PVM pVM, PVMCPU pVCpu, void *pvUser)
+{
+    /* Don't do anything, just make sure all CPUs goes thru EM. */
+    NOREF(pVM); NOREF(pVCpu); NOREF(pvUser);
+    return VINF_SUCCESS;
+}
+
+
+/**
+ * Worker for DBGFR3EventConfigEx.
+ *
+ * @returns VBox status code. Will not return VBOX_INTERRUPTED.
+ * @param   pUVM        The user mode VM handle.
+ * @param   paConfigs   The event to configure and their new state.
+ * @param   cConfigs    Number of entries in @a paConfigs.
+ */
+static DECLCALLBACK(int) dbgfR3EventConfigEx(PUVM pUVM, DBGFEVENTCONFIG volatile const *paConfigs, size_t cConfigs)
+{
+    PVM pVM = pUVM->pVM;
+    VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
+
+    /*
+     * Apply the changes.
+     */
+    unsigned cChanges = 0;
+    for (uint32_t i = 0; i < cConfigs; i++)
+    {
+        DBGFEVENTTYPE enmType = paConfigs[i].enmType;
+        AssertReturn(enmType >= DBGFEVENT_FIRST_SELECTABLE && enmType < DBGFEVENT_END, VERR_INVALID_PARAMETER);
+        if (paConfigs[i].fEnabled)
+            cChanges += ASMAtomicBitTestAndSet(&pVM->dbgf.s.bmSelectedEvents, enmType) == false;
+        else
+            cChanges += ASMAtomicBitTestAndClear(&pVM->dbgf.s.bmSelectedEvents, enmType) == true;
+    }
+
+    /*
+     * If this is an SMP setup, we must interrupt the other CPUs if there were
+     * changes just to make sure their execution engines are aware of them.
+     */
+    int rc = VINF_SUCCESS;
+    if (cChanges > 0 && pVM->cCpus > 1)
+        rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE, dbgfR3EventConfigNotifyAllCpus, NULL);
+    return rc;
+}
+
+
+/**
+ * Configures (enables/disables) multiple selectable debug events.
+ *
+ * @returns VBox status code.
+ * @param   pUVM        The user mode VM handle.
+ * @param   paConfigs   The event to configure and their new state.
+ * @param   cConfigs    Number of entries in @a paConfigs.
+ */
+VMMR3DECL(int) DBGFR3EventConfigEx(PUVM pUVM, PCDBGFEVENTCONFIG paConfigs, size_t cConfigs)
+{
+    /*
+     * Validate input.
+     */
+    UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
+    size_t i = cConfigs;
+    while (i-- > 0)
+    {
+        AssertReturn(paConfigs[i].enmType >= DBGFEVENT_FIRST_SELECTABLE, VERR_INVALID_PARAMETER);
+        AssertReturn(paConfigs[i].enmType <  DBGFEVENT_END, VERR_INVALID_PARAMETER);
+    }
+
+    /*
+     * Apply the changes in EMT(0).
+     */
+    return VMR3ReqPriorityCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3EventConfigEx, 3, pUVM, paConfigs, cConfigs);
+}
+
+
+/**
+ * Enables or disables a selectable debug event.
+ *
+ * @returns VBox status code.
+ * @param   pUVM        The user mode VM handle.
+ * @param   enmEvent    The selectable debug event.
+ * @param   fEnabled    The new state.
+ */
+VMMR3DECL(int) DBGFR3EventConfig(PUVM pUVM, DBGFEVENTTYPE enmEvent, bool fEnabled)
+{
+    /*
+     * Convert to an array call.
+     */
+    DBGFEVENTCONFIG EvtCfg = { enmEvent, fEnabled };
+    return DBGFR3EventConfigEx(pUVM, &EvtCfg, 1);
+}
+
+
+/**
+ * Checks if the given selectable event is enabled.
+ *
+ * @returns true if enabled, false if not or invalid input.
+ * @param   pUVM        The user mode VM handle.
+ * @param   enmEvent    The selectable debug event.
+ * @sa      DBGFR3EventQuery
+ */
+VMMR3DECL(bool) DBGFR3EventIsEnabled(PUVM pUVM, DBGFEVENTTYPE enmEvent)
+{
+    /*
+     * Validate input.
+     */
+    AssertReturn(   enmEvent >= DBGFEVENT_HALT_DONE
+                 && enmEvent <  DBGFEVENT_END, false);
+    Assert(   enmEvent >= DBGFEVENT_FIRST_SELECTABLE
+           || enmEvent == DBGFEVENT_BREAKPOINT
+           || enmEvent == DBGFEVENT_BREAKPOINT_IO
+           || enmEvent == DBGFEVENT_BREAKPOINT_MMIO);
+
+    UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
+    PVM pVM = pUVM->pVM;
+    VM_ASSERT_VALID_EXT_RETURN(pVM, false);
+
+    /*
+     * Check the event status.
+     */
+    return ASMBitTest(&pVM->dbgf.s.bmSelectedEvents, enmEvent);
+}
+
+
+/**
+ * Queries the status of a set of events.
+ *
+ * @returns VBox status code.
+ * @param   pUVM        The user mode VM handle.
+ * @param   paConfigs   The events to query and where to return the state.
+ * @param   cConfigs    The number of elements in @a paConfigs.
+ * @sa      DBGFR3EventIsEnabled, DBGF_IS_EVENT_ENABLED
+ */
+VMMR3DECL(int) DBGFR3EventQuery(PUVM pUVM, PDBGFEVENTCONFIG paConfigs, size_t cConfigs)
+{
+    /*
+     * Validate input.
+     */
+    UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
+    PVM pVM = pUVM->pVM;
+    VM_ASSERT_VALID_EXT_RETURN(pVM, false);
+
+    for (size_t i = 0; i < cConfigs; i++)
+    {
+        DBGFEVENTTYPE enmType = paConfigs[i].enmType;
+        AssertReturn(   enmType >= DBGFEVENT_HALT_DONE
+                     && enmType <  DBGFEVENT_END, VERR_INVALID_PARAMETER);
+        Assert(   enmType >= DBGFEVENT_FIRST_SELECTABLE
+               || enmType == DBGFEVENT_BREAKPOINT
+               || enmType == DBGFEVENT_BREAKPOINT_IO
+               || enmType == DBGFEVENT_BREAKPOINT_MMIO);
+        paConfigs[i].fEnabled = ASMBitTest(&pVM->dbgf.s.bmSelectedEvents, paConfigs[i].enmType);
+    }
+
+    return VINF_SUCCESS;
+}
+
+
+/**
+ * Worker for DBGFR3InterruptConfigEx.
+ *
+ * @returns VBox status code. Will not return VBOX_INTERRUPTED.
+ * @param   pUVM        The user mode VM handle.
+ * @param   paConfigs   The event to configure and their new state.
+ * @param   cConfigs    Number of entries in @a paConfigs.
+ */
+static DECLCALLBACK(int) dbgfR3InterruptConfigEx(PUVM pUVM, PCDBGFINTERRUPTCONFIG paConfigs, size_t cConfigs)
+{
+    PVM pVM = pUVM->pVM;
+    VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
+
+    /*
+     * Apply the changes.
+     */
+    bool fChanged;
+    for (uint32_t i = 0; i < cConfigs; i++)
+    {
+        /*
+         * Hardware interrupts.
+         */
+        if (paConfigs[i].enmHardState == DBGFINTERRUPTSTATE_ENABLED)
+        {
+            fChanged = ASMAtomicBitTestAndSet(&pVM->dbgf.s.bmHardIntBreakpoints, paConfigs[i].iInterrupt) == false;
+            if (fChanged)
+            {
+                Assert(pVM->dbgf.s.cHardIntBreakpoints < 256);
+                pVM->dbgf.s.cHardIntBreakpoints++;
+            }
+        }
+        else if (paConfigs[i].enmHardState == DBGFINTERRUPTSTATE_DISABLED)
+        {
+            fChanged = ASMAtomicBitTestAndClear(&pVM->dbgf.s.bmHardIntBreakpoints, paConfigs[i].iInterrupt) == true;
+            if (fChanged)
+            {
+                Assert(pVM->dbgf.s.cHardIntBreakpoints > 0);
+                pVM->dbgf.s.cHardIntBreakpoints--;
+            }
+        }
+
+        /*
+         * Software interrupts.
+         */
+        if (paConfigs[i].enmHardState == DBGFINTERRUPTSTATE_ENABLED)
+        {
+            fChanged = ASMAtomicBitTestAndSet(&pVM->dbgf.s.bmSoftIntBreakpoints, paConfigs[i].iInterrupt) == false;
+            if (fChanged)
+            {
+                Assert(pVM->dbgf.s.cSoftIntBreakpoints < 256);
+                pVM->dbgf.s.cSoftIntBreakpoints++;
+            }
+        }
+        else if (paConfigs[i].enmSoftState == DBGFINTERRUPTSTATE_DISABLED)
+        {
+            fChanged = ASMAtomicBitTestAndClear(&pVM->dbgf.s.bmSoftIntBreakpoints, paConfigs[i].iInterrupt) == true;
+            if (fChanged)
+            {
+                Assert(pVM->dbgf.s.cSoftIntBreakpoints > 0);
+                pVM->dbgf.s.cSoftIntBreakpoints--;
+            }
+        }
+    }
+
+    /*
+     * Update the event bitmap entries and see if we need to notify other CPUs.
+     */
+    fChanged = false;
+    if (pVM->dbgf.s.cHardIntBreakpoints > 0)
+        fChanged |= ASMAtomicBitTestAndSet(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_INTERRUPT_HARDWARE) == false;
+    else
+        fChanged |= ASMAtomicBitTestAndClear(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_INTERRUPT_HARDWARE) == true;
+
+    if (pVM->dbgf.s.cSoftIntBreakpoints > 0)
+        fChanged |= ASMAtomicBitTestAndSet(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_INTERRUPT_SOFTWARE) == false;
+    else
+        fChanged |= ASMAtomicBitTestAndClear(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_INTERRUPT_SOFTWARE) == true;
+
+    int rc = VINF_SUCCESS;
+    if (fChanged && pVM->cCpus > 1)
+        rc = VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE, dbgfR3EventConfigNotifyAllCpus, NULL);
+    return rc;
+}
+
+
+/**
+ * Changes
+ *
+ * @returns VBox status code.
+ * @param   pUVM        The user mode VM handle.
+ * @param   paConfigs   The events to query and where to return the state.
+ * @param   cConfigs    The number of elements in @a paConfigs.
+ * @sa      DBGFR3InterruptConfigHardware, DBGFR3InterruptConfigSoftware
+ */
+VMMR3DECL(int) DBGFR3InterruptConfigEx(PUVM pUVM, PCDBGFINTERRUPTCONFIG paConfigs, size_t cConfigs)
+{
+    /*
+     * Validate input.
+     */
+    UVM_ASSERT_VALID_EXT_RETURN(pUVM, VERR_INVALID_VM_HANDLE);
+    size_t i = cConfigs;
+    while (i-- > 0)
+    {
+        AssertReturn(paConfigs[i].enmHardState <= DBGFINTERRUPTSTATE_DONT_TOUCH, VERR_INVALID_PARAMETER);
+        AssertReturn(paConfigs[i].enmSoftState <= DBGFINTERRUPTSTATE_DONT_TOUCH, VERR_INVALID_PARAMETER);
+    }
+
+    /*
+     * Apply the changes in EMT(0).
+     */
+    return VMR3ReqPriorityCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3InterruptConfigEx, 3, pUVM, paConfigs, cConfigs);
+}
+
+
+/**
+ * Configures interception of a hardware interrupt.
+ *
+ * @returns VBox status code.
+ * @param   pUVM        The user mode VM handle.
+ * @param   iInterrupt  The interrupt number.
+ * @param   fEnabled    Whether interception is enabled or not.
+ * @sa      DBGFR3InterruptSoftwareConfig, DBGFR3InterruptConfigEx
+ */
+VMMR3DECL(int) DBGFR3InterruptHardwareConfig(PUVM pUVM, uint8_t iInterrupt, bool fEnabled)
+{
+    /*
+     * Convert to DBGFR3InterruptConfigEx call.
+     */
+    DBGFINTERRUPTCONFIG IntCfg = { iInterrupt, (uint8_t)fEnabled, DBGFINTERRUPTSTATE_DONT_TOUCH };
+    return DBGFR3InterruptConfigEx(pUVM, &IntCfg, 1);
+}
+
+
+/**
+ * Configures interception of a software interrupt.
+ *
+ * @returns VBox status code.
+ * @param   pUVM        The user mode VM handle.
+ * @param   iInterrupt  The interrupt number.
+ * @param   fEnabled    Whether interception is enabled or not.
+ * @sa      DBGFR3InterruptHardwareConfig, DBGFR3InterruptConfigEx
+ */
+VMMR3DECL(int) DBGFR3InterruptSoftwareConfig(PUVM pUVM, uint8_t iInterrupt, bool fEnabled)
+{
+    /*
+     * Convert to DBGFR3InterruptConfigEx call.
+     */
+    DBGFINTERRUPTCONFIG IntCfg = { iInterrupt, DBGFINTERRUPTSTATE_DONT_TOUCH, (uint8_t)fEnabled };
+    return DBGFR3InterruptConfigEx(pUVM, &IntCfg, 1);
+}
+
+
+/**
+ * Checks whether interception is enabled for a hardware interrupt.
+ *
+ * @returns true if enabled, false if not or invalid input.
+ * @param   pUVM        The user mode VM handle.
+ * @param   iInterrupt  The interrupt number.
+ * @sa      DBGFR3InterruptSoftwareIsEnabled, DBGF_IS_HARDWARE_INT_ENABLED,
+ *          DBGF_IS_SOFTWARE_INT_ENABLED
+ */
+VMMR3DECL(int) DBGFR3InterruptHardwareIsEnabled(PUVM pUVM, uint8_t iInterrupt)
+{
+    /*
+     * Validate input.
+     */
+    UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
+    PVM pVM = pUVM->pVM;
+    VM_ASSERT_VALID_EXT_RETURN(pVM, false);
+
+    /*
+     * Check it.
+     */
+    return ASMBitTest(&pVM->dbgf.s.bmHardIntBreakpoints, iInterrupt);
+}
+
+
+/**
+ * Checks whether interception is enabled for a software interrupt.
+ *
+ * @returns true if enabled, false if not or invalid input.
+ * @param   pUVM        The user mode VM handle.
+ * @param   iInterrupt  The interrupt number.
+ * @sa      DBGFR3InterruptHardwareIsEnabled, DBGF_IS_SOFTWARE_INT_ENABLED,
+ *          DBGF_IS_HARDWARE_INT_ENABLED,
+ */
+VMMR3DECL(int) DBGFR3InterruptSoftwareIsEnabled(PUVM pUVM, uint8_t iInterrupt)
+{
+    /*
+     * Validate input.
+     */
+    UVM_ASSERT_VALID_EXT_RETURN(pUVM, false);
+    PVM pVM = pUVM->pVM;
+    VM_ASSERT_VALID_EXT_RETURN(pVM, false);
+
+    /*
+     * Check it.
+     */
+    return ASMBitTest(&pVM->dbgf.s.bmSoftIntBreakpoints, iInterrupt);
+}
+
+
+
+/**
  * Call this to single step programmatically.
  *

trunk/src/VBox/VMM/VMMR3/DBGFBp.cpp

@@ -103 +103 @@
 {
     /*
-     * Determine which array to search.
-     */
+     * Determine which array to search and where in the array to start
+     * searching (latter for grouping similar BPs, reducing runtime overhead).
+     */
+    unsigned    iStart;
     unsigned    cBps;
-    uint32_t   *pcBpsCur;
     PDBGFBP     paBps;
     switch (enmType)
@@ -113 +114 @@
             cBps = RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints);
             paBps = &pVM->dbgf.s.aHwBreakpoints[0];
-            pcBpsCur = &pVM->dbgf.s.cHwBreakpoints;
+            iStart = 0;
             break;
 
         case DBGFBPTYPE_INT3:
         case DBGFBPTYPE_REM:
+        case DBGFBPTYPE_PORT_IO:
+        case DBGFBPTYPE_MMIO:
             cBps = RT_ELEMENTS(pVM->dbgf.s.aBreakpoints);
             paBps = &pVM->dbgf.s.aBreakpoints[0];
-            pcBpsCur = &pVM->dbgf.s.cBreakpoints;
+            if (enmType == DBGFBPTYPE_PORT_IO)
+                iStart = cBps / 4 * 2;
+            else if (enmType == DBGFBPTYPE_MMIO)
+                iStart = cBps / 4 * 1;
+            else if (enmType == DBGFBPTYPE_REM)
+                iStart = cBps / 4 * 3;
+            else
+                iStart = 0;
             break;
 
@@ -129 +139 @@
 
     /*
-     * Search.
-     */
-    for (unsigned iBp = 0; iBp < cBps; iBp++)
+     * Search for a free breakpoint entry.
+     */
+    unsigned iBp;
+    for (iBp = iStart; iBp < cBps; iBp++)
         if (paBps[iBp].enmType == DBGFBPTYPE_FREE)
+            break;
+    if (iBp >= cBps && iStart != 0)
+        for (iBp = 0; iBp < cBps; iBp++)
+            if (paBps[iBp].enmType == DBGFBPTYPE_FREE)
+                break;
+    if (iBp < cBps)
+    {
+        /*
+         * Return what we found.
+         */
+        paBps[iBp].fEnabled = false;
+        paBps[iBp].cHits    = 0;
+        paBps[iBp].enmType  = enmType;
+        return &paBps[iBp];
+    }
+
+    LogFlow(("dbgfR3BpAlloc: returns NULL - we're out of breakpoint slots! cBps=%u\n", cBps));
+    return NULL;
+}
+
+
+/**
+ * Updates IOM on whether we've got any armed I/O port or MMIO breakpoints.
+ *
+ * @returns VINF_SUCCESS
+ * @param   pVM         The cross context VM structure.
+ * @param   enmType     The breakpoint type.
+ * @param   pOpt        The breakpoint optimization structure to update.
+ */
+static int dbgfR3BpUpdateSearchOptimizations(PVM pVM, DBGFBPTYPE enmType, PDBGFBPSEARCHOPT pOpt)
+{
+    DBGFBPSEARCHOPT Opt  = { UINT32_MAX, 0 };
+
+    for (uint32_t iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++)
+        if (   pVM->dbgf.s.aBreakpoints[iBp].enmType == enmType
+            && pVM->dbgf.s.aBreakpoints[iBp].fEnabled)
         {
-            ++*pcBpsCur;
-            paBps[iBp].cHits   = 0;
-            paBps[iBp].enmType = enmType;
-            return &paBps[iBp];
+            if (Opt.iStartSearch > iBp)
+                Opt.iStartSearch = iBp;
+            Opt.cToSearch = iBp - Opt.iStartSearch + 1;
         }
 
-    LogFlow(("dbgfR3BpAlloc: returns NULL - we're out of breakpoint slots! %u/%u\n", *pcBpsCur, cBps));
-    return NULL;
+    *pOpt = Opt;
+    return VINF_SUCCESS;
 }
 
@@ -176 +222 @@
         case DBGFBPTYPE_INT3:
         case DBGFBPTYPE_REM:
+        case DBGFBPTYPE_PORT_IO:
+        case DBGFBPTYPE_MMIO:
             break;
 
@@ -248 +296 @@
 
         case DBGFBPTYPE_REG:
-            Assert(pVM->dbgf.s.cHwBreakpoints > 0);
-            pVM->dbgf.s.cHwBreakpoints--;
+            Assert(pBp - &pVM->dbgf.s.aHwBreakpoints[0] < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints));
             break;
 
         case DBGFBPTYPE_INT3:
         case DBGFBPTYPE_REM:
-            Assert(pVM->dbgf.s.cBreakpoints > 0);
-            pVM->dbgf.s.cBreakpoints--;
+        case DBGFBPTYPE_PORT_IO:
+        case DBGFBPTYPE_MMIO:
+            Assert(pBp - &pVM->dbgf.s.aBreakpoints[0] < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints));
             break;
 
@@ -264 +312 @@
     }
     pBp->enmType = DBGFBPTYPE_FREE;
+    NOREF(pVM);
 }
 
@@ -325 +374 @@
     ASMCompilerBarrier();
     pBp->fEnabled       = true;
+    dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_INT3, &pVM->dbgf.s.Int3);
 
     /*
@@ -360 +410 @@
      * This must be done on EMT.
      */
-    /** @todo SMP? */
-    int rc = VMR3ReqCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpSetInt3, 5,
+    int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetInt3, 5,
                               pUVM, pAddress, &iHitTrigger, &iHitDisable, piBp);
     LogFlow(("DBGFR3BpSet: returns %Rrc\n", rc));
@@ -556 +605 @@
      * This must be done on EMT.
      */
-    int rc = VMR3ReqCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpSetReg, 7,
+    int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetReg, 7,
                               pUVM, pAddress, &iHitTrigger, &iHitDisable, fType, cb, piBp);
     LogFlow(("DBGFR3BpSetReg: returns %Rrc\n", rc));
@@ -567 +616 @@
  * @callback_method_impl{FNVMMEMTRENDEZVOUS}
  */
-DECLCALLBACK(VBOXSTRICTRC) dbgfR3BpRegRecalcOnCpu(PVM pVM, PVMCPU pVCpu, void *pvUser)
+static DECLCALLBACK(VBOXSTRICTRC) dbgfR3BpRegRecalcOnCpu(PVM pVM, PVMCPU pVCpu, void *pvUser)
 {
     NOREF(pVM); NOREF(pvUser);
+
+    /*
+     * CPU 0 updates the enabled hardware breakpoint counts.
+     */
+    if (pVCpu->idCpu == 0)
+    {
+        pVM->dbgf.s.cEnabledHwBreakpoints   = 0;
+        pVM->dbgf.s.cEnabledHwIoBreakpoints = 0;
+
+        for (uint32_t iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
+            if (   pVM->dbgf.s.aHwBreakpoints[iBp].fEnabled
+                && pVM->dbgf.s.aHwBreakpoints[iBp].enmType == DBGFBPTYPE_REG)
+            {
+                pVM->dbgf.s.cEnabledHwBreakpoints   += 1;
+                pVM->dbgf.s.cEnabledHwIoBreakpoints += pVM->dbgf.s.aHwBreakpoints[iBp].u.Reg.fType == X86_DR7_RW_IO;
+            }
+    }
+
     return CPUMRecalcHyperDRx(pVCpu, UINT8_MAX, false);
 }
@@ -576 +643 @@
 /**
  * Arms a debug register breakpoint.
+ *
  * This is used to implement both DBGFR3BpSetReg() and DBGFR3BpEnable().
  *
@@ -581 +649 @@
  * @param   pVM         The cross context VM structure.
  * @param   pBp         The breakpoint.
+ * @thread  EMT(0)
  */
 static int dbgfR3BpRegArm(PVM pVM, PDBGFBP pBp)
@@ -591 +660 @@
 /**
  * Disarms a debug register breakpoint.
+ *
  * This is used to implement both DBGFR3BpClear() and DBGFR3BpDisable().
  *
@@ -596 +666 @@
  * @param   pVM         The cross context VM structure.
  * @param   pBp         The breakpoint.
+ * @thread  EMT(0)
  */
 static int dbgfR3BpRegDisarm(PVM pVM, PDBGFBP pBp)
@@ -615 +686 @@
  *                          Use ~(uint64_t) if it's never gonna be disabled.
  * @param   piBp            Where to store the breakpoint id. (optional)
- * @thread  EMT
+ * @thread  EMT(0)
  * @internal
  */
@@ -707 +778 @@
      * This must be done on EMT.
      */
-    int rc = VMR3ReqCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpSetREM, 5,
+    int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetREM, 5,
                               pUVM, pAddress, &iHitTrigger, &iHitDisable, piBp);
     LogFlow(("DBGFR3BpSetREM: returns %Rrc\n", rc));
@@ -714 +785 @@
 
 
-
 /**
  * Updates IOM on whether we've got any armed I/O port or MMIO breakpoints.
@@ -720 +790 @@
  * @returns VINF_SUCCESS
  * @param   pVM         The cross context VM structure.
+ * @thread  EMT(0)
  */
 static int dbgfR3BpUpdateIom(PVM pVM)
 {
-    unsigned cPortIo = 0;
-    unsigned cMmio = 0;
-    for (uint32_t iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++)
-        if (pVM->dbgf.s.aBreakpoints[iBp].fEnabled)
-        {
-            if (pVM->dbgf.s.aBreakpoints[iBp].enmType == DBGFBPTYPE_PORT_IO)
-                cPortIo++;
-            else if (pVM->dbgf.s.aBreakpoints[iBp].enmType == DBGFBPTYPE_MMIO)
-                cMmio++;
-        }
-
-    pVM->dbgf.s.fHasPortIoBps = cPortIo != 0;
-    pVM->dbgf.s.fHasMmioBps   = cMmio   != 0;
-
-    IOMR3NotifyBreakpointCountChange(pVM, cPortIo, cMmio);
+    dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_PORT_IO, &pVM->dbgf.s.PortIo);
+    if (pVM->dbgf.s.PortIo.cToSearch)
+        ASMAtomicBitSet(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_BREAKPOINT_IO);
+    else
+        ASMAtomicBitClear(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_BREAKPOINT_IO);
+
+    dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_MMIO, &pVM->dbgf.s.Mmio);
+    if (pVM->dbgf.s.Mmio.cToSearch)
+        ASMAtomicBitSet(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_BREAKPOINT_MMIO);
+    else
+        ASMAtomicBitClear(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_BREAKPOINT_MMIO);
+
+    IOMR3NotifyBreakpointCountChange(pVM, pVM->dbgf.s.PortIo.cToSearch != 0, pVM->dbgf.s.Mmio.cToSearch != 0);
     return VINF_SUCCESS;
 }
@@ -755 +824 @@
  *                          Use ~(uint64_t) if it's never gonna be disabled.
  * @param   piBp            Where to store the breakpoint ID.
+ * @thread  EMT(0)
  */
 static DECLCALLBACK(int) dbgfR3BpSetPortIo(PUVM pUVM, RTIOPORT uPort, RTIOPORT cPorts, uint32_t fAccess,
@@ -821 +891 @@
  *                          Use ~(uint64_t) if it's never gonna be disabled.
  * @param   piBp            Where to store the breakpoint ID. Optional.
+ * @thread  Any thread.
  */
 VMMR3DECL(int)  DBGFR3BpSetPortIo(PUVM pUVM, RTIOPORT uPort, RTIOPORT cPorts, uint32_t fAccess,
@@ -837 +908 @@
      */
     uint32_t iBp = -1;
-    int rc = VMR3ReqCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpSetPortIo, 7,
+    int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetPortIo, 7,
                               pUVM, uPort, cPorts, fAccess, &iHitTrigger, &iHitDisable, piBp);
     if (piBp)
         *piBp = iBp;
-    LogFlow(("DBGFR3BpSetPortIo: returns %Rrc *piBp=%d\n", rc, iBp));
+    LogFlow(("DBGFR3BpSetPortIo: returns %Rrc iBp=%d\n", rc, iBp));
     return rc;
 }
@@ -859 +930 @@
  *                          Use ~(uint64_t) if it's never gonna be disabled.
  * @param   piBp            Where to store the breakpoint ID.
+ * @thread  EMT(0)
  */
 static DECLCALLBACK(int) dbgfR3BpSetMmio(PUVM pUVM, PCRTGCPHYS pGCPhys, uint32_t cb, uint32_t fAccess,
@@ -927 +999 @@
  *                          Use ~(uint64_t) if it's never gonna be disabled.
  * @param   piBp            Where to store the breakpoint ID. Optional.
+ * @thread  Any thread.
  */
 VMMR3DECL(int)  DBGFR3BpSetMmio(PUVM pUVM, RTGCPHYS GCPhys, uint32_t cb, uint32_t fAccess,
@@ -943 +1016 @@
      */
     uint32_t iBp = -1;
-    int rc = VMR3ReqCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpSetMmio, 7,
+    int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetMmio, 7,
                               pUVM, &GCPhys, cb, fAccess, &iHitTrigger, &iHitDisable, piBp);
     if (piBp)
         *piBp = iBp;
-    LogFlow(("DBGFR3BpSetMmio: returns %Rrc *piBp=%d\n", rc, iBp));
+    LogFlow(("DBGFR3BpSetMmio: returns %Rrc iBp=%d\n", rc, iBp));
     return rc;
 }
@@ -958 +1031 @@
  * @param   pUVM        The user mode VM handle.
  * @param   iBp         The id of the breakpoint which should be removed (cleared).
- * @thread  EMT
+ * @thread  EMT(0)
  * @internal
  */
@@ -987 +1060 @@
             case DBGFBPTYPE_INT3:
                 rc = dbgfR3BpInt3Disarm(pUVM, pBp);
+                dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_INT3, &pVM->dbgf.s.Int3);
                 break;
 
@@ -1029 +1103 @@
      * This must be done on EMT.
      */
-    int rc = VMR3ReqCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpClear, 2, pUVM, iBp);
+    int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpClear, 2, pUVM, iBp);
     LogFlow(("DBGFR3BpClear: returns %Rrc\n", rc));
     return rc;
@@ -1041 +1115 @@
  * @param   pUVM        The user mode VM handle.
  * @param   iBp         The id of the breakpoint which should be enabled.
- * @thread  EMT
+ * @thread  EMT(0)
  * @internal
  */
@@ -1073 +1147 @@
 
         case DBGFBPTYPE_INT3:
+            dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_INT3, &pVM->dbgf.s.Int3);
             rc = dbgfR3BpInt3Arm(pUVM, pBp);
             break;
@@ -1112 +1187 @@
      * This must be done on EMT.
      */
-    int rc = VMR3ReqCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpEnable, 2, pUVM, iBp);
+    int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpEnable, 2, pUVM, iBp);
     LogFlow(("DBGFR3BpEnable: returns %Rrc\n", rc));
     return rc;
@@ -1124 +1199 @@
  * @param   pUVM        The user mode VM handle.
  * @param   iBp         The id of the breakpoint which should be disabled.
- * @thread  EMT
+ * @thread  EMT(0)
  * @internal
  */
@@ -1157 +1232 @@
         case DBGFBPTYPE_INT3:
             rc = dbgfR3BpInt3Disarm(pUVM, pBp);
+            dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_INT3, &pVM->dbgf.s.Int3);
             break;
 
@@ -1193 +1269 @@
      * This must be done on EMT.
      */
-    int rc = VMR3ReqCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpDisable, 2, pUVM, iBp);
+    int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpDisable, 2, pUVM, iBp);
     LogFlow(("DBGFR3BpDisable: returns %Rrc\n", rc));
     return rc;
@@ -1226 +1302 @@
         {
             int rc = pfnCallback(pUVM, pvUser, &pVM->dbgf.s.aHwBreakpoints[i]);
-            if (RT_FAILURE(rc))
+            if (RT_FAILURE(rc) || rc == VINF_CALLBACK_RETURN)
                 return rc;
         }
@@ -1237 +1313 @@
         {
             int rc = pfnCallback(pUVM, pvUser, &pVM->dbgf.s.aBreakpoints[i]);
-            if (RT_FAILURE(rc))
+            if (RT_FAILURE(rc) || rc == VINF_CALLBACK_RETURN)
                 return rc;
         }
@@ -1259 +1335 @@
      * This must be done on EMT.
      */
-    int rc = VMR3ReqPriorityCallWaitU(pUVM, VMCPUID_ANY, (PFNRT)dbgfR3BpEnum, 3, pUVM, pfnCallback, pvUser);
+    int rc = VMR3ReqPriorityCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpEnum, 3, pUVM, pfnCallback, pvUser);
     LogFlow(("DBGFR3BpClear: returns %Rrc\n", rc));
     return rc;

trunk/src/VBox/VMM/VMMR3/HM.cpp

@@ -252 +252 @@
     EXIT_REASON(SVM_EXIT_LDTR_READ          ,104, "Read LDTR."),
     EXIT_REASON(SVM_EXIT_TR_READ            ,105, "Read TR."),
-    EXIT_REASON(SVM_EXIT_TR_READ            ,106, "Write IDTR."),
-    EXIT_REASON(SVM_EXIT_TR_READ            ,107, "Write GDTR."),
-    EXIT_REASON(SVM_EXIT_TR_READ            ,108, "Write LDTR."),
-    EXIT_REASON(SVM_EXIT_TR_READ            ,109, "Write TR."),
+    EXIT_REASON(SVM_EXIT_IDTR_WRITE         ,106, "Write IDTR."),
+    EXIT_REASON(SVM_EXIT_GDTR_WRITE         ,107, "Write GDTR."),
+    EXIT_REASON(SVM_EXIT_LDTR_WRITE         ,108, "Write LDTR."),
+    EXIT_REASON(SVM_EXIT_TR_WRITE           ,109, "Write TR."),
     EXIT_REASON(SVM_EXIT_RDTSC              ,110, "RDTSC instruction."),
     EXIT_REASON(SVM_EXIT_RDPMC              ,111, "RDPMC instruction."),
@@ -287 +287 @@
     EXIT_REASON(SVM_EXIT_MWAIT              ,139, "MWAIT instruction."),
     EXIT_REASON(SVM_EXIT_MWAIT_ARMED        ,140, "MWAIT instruction when armed."),
+    EXIT_REASON(SVM_EXIT_XSETBV             ,141, "XSETBV instruction."),
     EXIT_REASON(SVM_EXIT_NPF                ,1024, "Nested paging fault."),
+    EXIT_REASON(SVM_EXIT_AVIC_INCOMPLETE_IPI,1025, "AVIC incomplete IPI delivery."),
+    EXIT_REASON(SVM_EXIT_AVIC_NOACCEL       ,1026, "AVIC unaccelerated register."),
     EXIT_REASON_NIL()
 };

trunk/src/VBox/VMM/VMMR3/IOM.cpp

@@ -1653 +1653 @@
  *
  * @param   pVM         The cross context VM structure.
- * @param   cPortIo     Number of armed I/O port breakpoints.
- * @param   cMmio       Number of armed MMIO breakpoints.
- */
-VMMR3_INT_DECL(void) IOMR3NotifyBreakpointCountChange(PVM pVM, unsigned cPortIo, unsigned cMmio)
+ * @param   fPortIo     True if there are armed I/O port breakpoints.
+ * @param   fMmio       True if there are armed MMIO breakpoints.
+ */
+VMMR3_INT_DECL(void) IOMR3NotifyBreakpointCountChange(PVM pVM, bool fPortIo, bool fMmio)
 {
     /** @todo I/O breakpoints. */

trunk/src/VBox/VMM/VMMRZ/DBGFRZ.cpp

@@ -57 +57 @@
      * A breakpoint?
      */
-    if (uDr6 & (X86_DR6_B0 | X86_DR6_B1 | X86_DR6_B2 | X86_DR6_B3))
+    AssertCompile(X86_DR6_B0 == 1 && X86_DR6_B1 == 2 && X86_DR6_B2 == 4 && X86_DR6_B3 == 8);
+    if (   (uDr6 & (X86_DR6_B0 | X86_DR6_B1 | X86_DR6_B2 | X86_DR6_B3))
+        && pVM->dbgf.s.cEnabledHwBreakpoints > 0)
     {
-        Assert(X86_DR6_B0 == 1 && X86_DR6_B1 == 2 && X86_DR6_B2 == 4 && X86_DR6_B3 == 8);
         for (unsigned iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
         {
@@ -125 +126 @@
      * Don't bother if we don't have any breakpoints.
      */
-    if (pVM->dbgf.s.cBreakpoints > 0)
+    unsigned cToSearch = pVM->dbgf.s.Int3.cToSearch;
+    if (cToSearch > 0)
     {
         RTGCPTR pPc;
@@ -137 +139 @@
         AssertRCReturn(rc, rc);
 
-        for (unsigned iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++)
+        unsigned iBp = pVM->dbgf.s.Int3.iStartSearch;
+        while (cToSearch-- > 0)
         {
-            if (    pVM->dbgf.s.aBreakpoints[iBp].u.GCPtr == (RTGCUINTPTR)pPc
-                &&  pVM->dbgf.s.aBreakpoints[iBp].enmType == DBGFBPTYPE_INT3)
+            if (   pVM->dbgf.s.aBreakpoints[iBp].u.GCPtr == (RTGCUINTPTR)pPc
+                && pVM->dbgf.s.aBreakpoints[iBp].enmType == DBGFBPTYPE_INT3)
             {
                 pVM->dbgf.s.aBreakpoints[iBp].cHits++;
@@ -152 +155 @@
                      : VINF_EM_DBG_BREAKPOINT;
             }
+            iBp++;
         }
     }

trunk/src/VBox/VMM/include/DBGFInternal.h

@@ -170 +170 @@
 
 
-
-/**
- * Converts a DBGF pointer into a VM pointer.
- * @returns Pointer to the VM structure the CPUM is part of.
- * @param   pDBGF   Pointer to DBGF instance data.
- */
-#define DBGF2VM(pDBGF)  ( (PVM)((char*)pDBGF - pDBGF->offVM) )
+/**
+ * Breakpoint search optimization.
+ */
+typedef struct DBGFBPSEARCHOPT
+{
+    /** Where to start searching for hits.
+     * (First enabled is #DBGF::aBreakpoints[iStartSearch]). */
+    uint32_t volatile       iStartSearch;
+    /** The number of aBreakpoints entries to search.
+     * (Last enabled is #DBGF::aBreakpoints[iStartSearch + cToSearch - 1])  */
+    uint32_t volatile       cToSearch;
+} DBGFBPSEARCHOPT;
+/** Pointer to a breakpoint search optimziation structure. */
+typedef DBGFBPSEARCHOPT *PDBGFBPSEARCHOPT;
+
 
 
@@ -184 +192 @@
 typedef struct DBGF
 {
-    /** Offset to the VM structure. */
-    int32_t                     offVM;
-
-    /** Set if we've got armed port I/O breakpoints. */
-    bool                        fHasPortIoBps : 1;
-    /** Set if we've got armed memory mapped I/O breakpoints. */
-    bool                        fHasMmioBps : 1;
+    /** Bitmap of enabled hardware interrupt breakpoints. */
+    uint32_t                    bmHardIntBreakpoints[256 / 32];
+    /** Bitmap of enabled software interrupt breakpoints. */
+    uint32_t                    bmSoftIntBreakpoints[256 / 32];
+    /** Bitmap of selected events.
+     * This includes non-selectable events too for simplicity, we maintain the
+     * state for some of these, as it may come in handy. */
+    uint32_t                    bmSelectedEvents[(DBGFEVENT_END + 31) / 32];
+
+    /** Enabled hardware interrupt breakpoints. */
+    uint32_t                    cHardIntBreakpoints;
+    /** Enabled software interrupt breakpoints. */
+    uint32_t                    cSoftIntBreakpoints;
+
+    /** Number of selected events. */
+    uint32_t                    cSelectedEvents;
 
     /** Debugger Attached flag.
@@ -208 +225 @@
      */
     RTPINGPONG                  PingPong;
+    RTHCUINTPTR                 uPtrPadding; /**< Alignment padding. */
 
     /** The Event to the debugger.
@@ -227 +245 @@
     DBGFCMDDATA                 VMMCmdData;
 
-    /** The number of hardware breakpoints. */
-    uint32_t                    cHwBreakpoints;
-    /** The number of active breakpoints. */
-    uint32_t                    cBreakpoints;
+    uint32_t                    u32Padding; /**< Alignment padding. */
+
+    /** The number of enabled hardware breakpoints. */
+    uint8_t                     cEnabledHwBreakpoints;
+    /** The number of enabled hardware I/O breakpoints. */
+    uint8_t                     cEnabledHwIoBreakpoints;
+    uint8_t                     abPadding[2]; /**< Unused padding space up for grabs. */
+
     /** Array of hardware breakpoints. (0..3)
      * This is shared among all the CPUs because life is much simpler that way. */
@@ -238 +260 @@
     DBGFBP                      aBreakpoints[32];
 
+    /** MMIO breakpoint search optimizations. */
+    DBGFBPSEARCHOPT             Mmio;
+    /** I/O port breakpoint search optimizations. */
+    DBGFBPSEARCHOPT             PortIo;
+    /** INT3 breakpoint search optimizations. */
+    DBGFBPSEARCHOPT             Int3;
 } DBGF;
+AssertCompileMemberAlignment(DBGF, DbgEvent, 8);
+AssertCompileMemberAlignment(DBGF, aHwBreakpoints, 8);
+AssertCompileMemberAlignment(DBGF, bmHardIntBreakpoints, 8);
 /** Pointer to DBGF Data. */
 typedef DBGF *PDBGF;
+
+
+/**
+ * Event state (for DBGFCPU::aEvents).
+ */
+typedef enum DBGFEVENTSTATE
+{
+    /** Invalid event stack entry. */
+    DBGFEVENTSTATE_INVALID = 0,
+    /** The current event stack entry. */
+    DBGFEVENTSTATE_CURRENT,
+    /** Event that should be ignored but hasn't yet actually been ignored. */
+    DBGFEVENTSTATE_IGNORE,
+    /** Event that has been ignored but may be restored to IGNORE should another
+     * debug event fire before the instruction is completed. */
+    DBGFEVENTSTATE_RESTORABLE,
+    /** End of valid events.   */
+    DBGFEVENTSTATE_END,
+    /** Make sure we've got a 32-bit type. */
+    DBGFEVENTSTATE_32BIT_HACK = 0x7fffffff
+} DBGFEVENTSTATE;
 
 
@@ -259 +311 @@
      * encounters a breakpoint and returns VINF_EM_DBG_BREAKPOINT. This is
      * currently not used for REM breakpoints because of the lazy coupling
-     * between VBox and REM. */
+     * between VBox and REM.
+     *
+     * @todo drop this in favor of aEvents!  */
     uint32_t                iActiveBp;
     /** Set if we're singlestepping in raw mode.
@@ -265 +319 @@
     bool                    fSingleSteppingRaw;
 
-    /** Padding the structure to 16 bytes. */
-    bool                    afReserved[7];
+    /** Alignment padding. */
+    bool                    afPadding[3];
+
+    /** The number of events on the stack (aEvents).
+     * The pending event is the last one (aEvents[cEvents - 1]), but only when
+     * enmState is DBGFEVENTSTATE_CURRENT. */
+    uint32_t                cEvents;
+    /** Events - current, ignoring and ignored.
+     *
+     * We maintain a stack of events in order to try avoid ending up in an infinit
+     * loop when resuming after an event fired.  There are cases where we may end
+     * generating additional events before the instruction can be executed
+     * successfully.  Like for instance an XCHG on MMIO with separate read and write
+     * breakpoints, or a MOVSB instruction working on breakpointed MMIO as both
+     * source and destination.
+     *
+     * So, when resuming after dropping into the debugger for an event, we convert
+     * the DBGFEVENTSTATE_CURRENT event into a DBGFEVENTSTATE_IGNORE event, leaving
+     * cEvents unchanged.  If the event is reported again, we will ignore it and
+     * tell the reporter to continue executing.  The event change to the
+     * DBGFEVENTSTATE_RESTORABLE state.
+     *
+     * Currently, the event reporter has to figure out that it is a nested event and
+     * tell DBGF to restore DBGFEVENTSTATE_RESTORABLE events (and keep
+     * DBGFEVENTSTATE_IGNORE, should they happen out of order for some weird
+     * reason).
+     */
+    struct
+    {
+        /** The event details. */
+        DBGFEVENT           Event;
+        /** The RIP at which this happend (for validating ignoring). */
+        uint64_t            rip;
+        /** The event state. */
+        DBGFEVENTSTATE      enmState;
+        /** Alignment padding. */
+        uint32_t            u32Alignment;
+    } aEvents[3];
 } DBGFCPU;
+AssertCompileMemberAlignment(DBGFCPU, aEvents, 8);
+AssertCompileMemberSizeAlignment(DBGFCPU, aEvents[0], 8);
 /** Pointer to DBGFCPU data. */
 typedef DBGFCPU *PDBGFCPU;

trunk/src/VBox/VMM/testcase/tstVMStruct.h

@@ -209 +209 @@
 
     GEN_CHECK_SIZE(DBGF);
-    GEN_CHECK_OFF(DBGF, offVM);
+    GEN_CHECK_OFF(DBGF, bmHardIntBreakpoints);
+    GEN_CHECK_OFF(DBGF, bmSoftIntBreakpoints);
+    GEN_CHECK_OFF(DBGF, bmSelectedEvents);
+    GEN_CHECK_OFF(DBGF, cHardIntBreakpoints);
+    GEN_CHECK_OFF(DBGF, cSoftIntBreakpoints);
+    GEN_CHECK_OFF(DBGF, cSelectedEvents);
     GEN_CHECK_OFF(DBGF, fAttached);
     GEN_CHECK_OFF(DBGF, fStoppedInHyper);
@@ -218 +223 @@
     //GEN_CHECK_OFF(DBGF, pInfoFirst);
     //GEN_CHECK_OFF(DBGF, InfoCritSect);
-    GEN_CHECK_OFF(DBGF, cHwBreakpoints);
-    GEN_CHECK_OFF(DBGF, cBreakpoints);
+    GEN_CHECK_OFF(DBGF, cEnabledHwBreakpoints);
+    GEN_CHECK_OFF(DBGF, cEnabledHwIoBreakpoints);
     GEN_CHECK_OFF(DBGF, aHwBreakpoints);
     GEN_CHECK_OFF(DBGF, aBreakpoints);
+    GEN_CHECK_OFF(DBGF, Mmio);
+    GEN_CHECK_OFF(DBGF, PortIo);
+    GEN_CHECK_OFF(DBGF, Int3);
     //GEN_CHECK_OFF(DBGF, hAsDbLock);
     //GEN_CHECK_OFF(DBGF, hRegDbLock);
@@ -231 +239 @@
     GEN_CHECK_OFF(DBGFCPU, iActiveBp);
     GEN_CHECK_OFF(DBGFCPU, fSingleSteppingRaw);
+    GEN_CHECK_OFF(DBGFCPU, cEvents);
+    GEN_CHECK_OFF(DBGFCPU, aEvents);
+    GEN_CHECK_OFF(DBGFCPU, aEvents[1]);
+    GEN_CHECK_OFF(DBGFCPU, aEvents[1].Event);
+    GEN_CHECK_OFF(DBGFCPU, aEvents[1].Event.enmCtx);
+    GEN_CHECK_OFF(DBGFCPU, aEvents[1].Event.enmType);
+    GEN_CHECK_OFF(DBGFCPU, aEvents[1].Event.u.Bp.iBp);
+    GEN_CHECK_OFF(DBGFCPU, aEvents[1].rip);
+    GEN_CHECK_OFF(DBGFCPU, aEvents[1].enmState);
     //GEN_CHECK_OFF(DBGFCPU, pGuestRegSet);
     //GEN_CHECK_OFF(DBGFCPU, pHyperRegSet);