VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 39135

Last change on this file since 39135 was 39135, checked in by vboxsync, 13 years ago

Changed PDMDevHlpMMIORegister to take flags and drop pfnFill. Added PDMDevHlpMMIORegisterEx for the one user of pfnFill.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 184.4 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2011 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44
45RT_C_DECLS_BEGIN
46
47/** @defgroup grp_pdm_device The PDM Devices API
48 * @ingroup grp_pdm
49 * @{
50 */
51
52/**
53 * Construct a device instance for a VM.
54 *
55 * @returns VBox status.
56 * @param pDevIns The device instance data. If the registration structure
57 * is needed, it can be accessed thru pDevIns->pReg.
58 * @param iInstance Instance number. Use this to figure out which registers
59 * and such to use. The instance number is also found in
60 * pDevIns->iInstance, but since it's likely to be
61 * frequently used PDM passes it as parameter.
62 * @param pCfg Configuration node handle for the driver. This is
63 * expected to be in high demand in the constructor and is
64 * therefore passed as an argument. When using it at other
65 * times, it can be found in pDrvIns->pCfg.
66 */
67typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
68/** Pointer to a FNPDMDEVCONSTRUCT() function. */
69typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
70
71/**
72 * Destruct a device instance.
73 *
74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
75 * resources can be freed correctly.
76 *
77 * @returns VBox status.
78 * @param pDevIns The device instance data.
79 *
80 * @remarks The device critical section is not entered. The routine may delete
81 * the critical section, so the caller cannot exit it.
82 */
83typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
84/** Pointer to a FNPDMDEVDESTRUCT() function. */
85typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
86
87/**
88 * Device relocation callback.
89 *
90 * This is called when the instance data has been relocated in raw-mode context
91 * (RC). It is also called when the RC hypervisor selects changes. The device
92 * must fixup all necessary pointers and re-query all interfaces to other RC
93 * devices and drivers.
94 *
95 * Before the RC code is executed the first time, this function will be called
96 * with a 0 delta so RC pointer calculations can be one in one place.
97 *
98 * @param pDevIns Pointer to the device instance.
99 * @param offDelta The relocation delta relative to the old location.
100 *
101 * @remarks A relocation CANNOT fail.
102 *
103 * @remarks The device critical section is not entered. The relocations should
104 * not normally require any locking.
105 */
106typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
107/** Pointer to a FNPDMDEVRELOCATE() function. */
108typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
109
110/**
111 * Device I/O Control interface.
112 *
113 * This is used by external components, such as the COM interface, to
114 * communicate with devices using a class wide interface or a device
115 * specific interface.
116 *
117 * @returns VBox status code.
118 * @param pDevIns Pointer to the device instance.
119 * @param uFunction Function to perform.
120 * @param pvIn Pointer to input data.
121 * @param cbIn Size of input data.
122 * @param pvOut Pointer to output data.
123 * @param cbOut Size of output data.
124 * @param pcbOut Where to store the actual size of the output data.
125 *
126 * @remarks Not used.
127 */
128typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, RTUINT uFunction,
129 void *pvIn, RTUINT cbIn,
130 void *pvOut, RTUINT cbOut, PRTUINT pcbOut);
131/** Pointer to a FNPDMDEVIOCTL() function. */
132typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
133
134/**
135 * Power On notification.
136 *
137 * @returns VBox status.
138 * @param pDevIns The device instance data.
139 *
140 * @remarks Caller enters the device critical section.
141 */
142typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
143/** Pointer to a FNPDMDEVPOWERON() function. */
144typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
145
146/**
147 * Reset notification.
148 *
149 * @returns VBox status.
150 * @param pDevIns The device instance data.
151 *
152 * @remarks Caller enters the device critical section.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVRESET() function. */
156typedef FNPDMDEVRESET *PFNPDMDEVRESET;
157
158/**
159 * Suspend notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 * @thread EMT(0)
164 *
165 * @remarks Caller enters the device critical section.
166 */
167typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
168/** Pointer to a FNPDMDEVSUSPEND() function. */
169typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
170
171/**
172 * Resume notification.
173 *
174 * @returns VBox status.
175 * @param pDevIns The device instance data.
176 *
177 * @remarks Caller enters the device critical section.
178 */
179typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
180/** Pointer to a FNPDMDEVRESUME() function. */
181typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
182
183/**
184 * Power Off notification.
185 *
186 * This is only called when the VMR3PowerOff call is made on a running VM. This
187 * means that there is no notification if the VM was suspended before being
188 * powered of. There will also be no callback when hot plugging devices.
189 *
190 * @param pDevIns The device instance data.
191 * @thread EMT(0)
192 *
193 * @remarks Caller enters the device critical section.
194 */
195typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
196/** Pointer to a FNPDMDEVPOWEROFF() function. */
197typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
198
199/**
200 * Attach command.
201 *
202 * This is called to let the device attach to a driver for a specified LUN
203 * at runtime. This is not called during VM construction, the device
204 * constructor have to attach to all the available drivers.
205 *
206 * This is like plugging in the keyboard or mouse after turning on the PC.
207 *
208 * @returns VBox status code.
209 * @param pDevIns The device instance.
210 * @param iLUN The logical unit which is being detached.
211 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
212 *
213 * @remarks Caller enters the device critical section.
214 */
215typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
216/** Pointer to a FNPDMDEVATTACH() function. */
217typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
218
219/**
220 * Detach notification.
221 *
222 * This is called when a driver is detaching itself from a LUN of the device.
223 * The device should adjust it's state to reflect this.
224 *
225 * This is like unplugging the network cable to use it for the laptop or
226 * something while the PC is still running.
227 *
228 * @param pDevIns The device instance.
229 * @param iLUN The logical unit which is being detached.
230 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
231 *
232 * @remarks Caller enters the device critical section.
233 */
234typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
235/** Pointer to a FNPDMDEVDETACH() function. */
236typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
237
238/**
239 * Query the base interface of a logical unit.
240 *
241 * @returns VBOX status code.
242 * @param pDevIns The device instance.
243 * @param iLUN The logicial unit to query.
244 * @param ppBase Where to store the pointer to the base interface of the LUN.
245 *
246 * @remarks The device critical section is not entered.
247 */
248typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
249/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
250typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
251
252/**
253 * Init complete notification.
254 * This can be done to do communication with other devices and other
255 * initialization which requires everything to be in place.
256 *
257 * @returns VBOX status code.
258 * @param pDevIns The device instance.
259 *
260 * @remarks Caller enters the device critical section.
261 */
262typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
263/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
264typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
265
266
267
268/**
269 * PDM Device Registration Structure.
270 *
271 * This structure is used when registering a device from VBoxInitDevices() in HC
272 * Ring-3. PDM will continue use till the VM is terminated.
273 */
274typedef struct PDMDEVREG
275{
276 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
277 uint32_t u32Version;
278 /** Device name. */
279 char szName[32];
280 /** Name of the raw-mode context module (no path).
281 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
282 char szRCMod[32];
283 /** Name of the ring-0 module (no path).
284 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
285 char szR0Mod[32];
286 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
287 * remain unchanged from registration till VM destruction. */
288 const char *pszDescription;
289
290 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
291 uint32_t fFlags;
292 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
293 uint32_t fClass;
294 /** Maximum number of instances (per VM). */
295 uint32_t cMaxInstances;
296 /** Size of the instance data. */
297 uint32_t cbInstance;
298
299 /** Construct instance - required. */
300 PFNPDMDEVCONSTRUCT pfnConstruct;
301 /** Destruct instance - optional.
302 * Critical section NOT entered (will be destroyed). */
303 PFNPDMDEVDESTRUCT pfnDestruct;
304 /** Relocation command - optional.
305 * Critical section NOT entered. */
306 PFNPDMDEVRELOCATE pfnRelocate;
307 /** I/O Control interface - optional.
308 * Not used. */
309 PFNPDMDEVIOCTL pfnIOCtl;
310 /** Power on notification - optional.
311 * Critical section is entered. */
312 PFNPDMDEVPOWERON pfnPowerOn;
313 /** Reset notification - optional.
314 * Critical section is entered. */
315 PFNPDMDEVRESET pfnReset;
316 /** Suspend notification - optional.
317 * Critical section is entered. */
318 PFNPDMDEVSUSPEND pfnSuspend;
319 /** Resume notification - optional.
320 * Critical section is entered. */
321 PFNPDMDEVRESUME pfnResume;
322 /** Attach command - optional.
323 * Critical section is entered. */
324 PFNPDMDEVATTACH pfnAttach;
325 /** Detach notification - optional.
326 * Critical section is entered. */
327 PFNPDMDEVDETACH pfnDetach;
328 /** Query a LUN base interface - optional.
329 * Critical section is NOT entered. */
330 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
331 /** Init complete notification - optional.
332 * Critical section is entered. */
333 PFNPDMDEVINITCOMPLETE pfnInitComplete;
334 /** Power off notification - optional.
335 * Critical section is entered. */
336 PFNPDMDEVPOWEROFF pfnPowerOff;
337 /** @todo */
338 PFNRT pfnSoftReset;
339 /** Initialization safty marker. */
340 uint32_t u32VersionEnd;
341} PDMDEVREG;
342/** Pointer to a PDM Device Structure. */
343typedef PDMDEVREG *PPDMDEVREG;
344/** Const pointer to a PDM Device Structure. */
345typedef PDMDEVREG const *PCPDMDEVREG;
346
347/** Current DEVREG version number. */
348#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
349
350/** PDM Device Flags.
351 * @{ */
352/** This flag is used to indicate that the device has a RC component. */
353#define PDM_DEVREG_FLAGS_RC 0x00000001
354/** This flag is used to indicate that the device has a R0 component. */
355#define PDM_DEVREG_FLAGS_R0 0x00000002
356
357/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
358 * The bit count for the current host. */
359#if HC_ARCH_BITS == 32
360# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
361#elif HC_ARCH_BITS == 64
362# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
363#else
364# error Unsupported HC_ARCH_BITS value.
365#endif
366/** The host bit count mask. */
367#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
368
369/** The device support only 32-bit guests. */
370#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
371/** The device support only 64-bit guests. */
372#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
373/** The device support both 32-bit & 64-bit guests. */
374#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
375/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
376 * The guest bit count for the current compilation. */
377#if GC_ARCH_BITS == 32
378# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
379#elif GC_ARCH_BITS == 64
380# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
381#else
382# error Unsupported GC_ARCH_BITS value.
383#endif
384/** The guest bit count mask. */
385#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
386
387/** A convenience. */
388#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
389
390/** Indicates that the devices support PAE36 on a 32-bit guest. */
391#define PDM_DEVREG_FLAGS_PAE36 0x00001000
392
393/** Indicates that the device needs to be notified before the drivers when suspending. */
394#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
395
396/** Indicates that the device needs to be notified before the drivers when powering off. */
397#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
398/** @} */
399
400
401/** PDM Device Classes.
402 * The order is important, lower bit earlier instantiation.
403 * @{ */
404/** Architecture device. */
405#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
406/** Architecture BIOS device. */
407#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
408/** PCI bus brigde. */
409#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
410/** ISA bus brigde. */
411#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
412/** Input device (mouse, keyboard, joystick, HID, ...). */
413#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
414/** Interrupt controller (PIC). */
415#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
416/** Interval controoler (PIT). */
417#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
418/** RTC/CMOS. */
419#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
420/** DMA controller. */
421#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
422/** VMM Device. */
423#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
424/** Graphics device, like VGA. */
425#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
426/** Storage controller device. */
427#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
428/** Network interface controller. */
429#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
430/** Audio. */
431#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
432/** USB HIC. */
433#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
434/** ACPI. */
435#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
436/** Serial controller device. */
437#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
438/** Parallel controller device */
439#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
440/** Host PCI pass-through device */
441#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
442/** Misc devices (always last). */
443#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
444/** @} */
445
446
447/** @name IRQ Level for use with the *SetIrq APIs.
448 * @{
449 */
450/** Assert the IRQ (can assume value 1). */
451#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
452/** Deassert the IRQ (can assume value 0). */
453#define PDM_IRQ_LEVEL_LOW 0
454/** flip-flop - deassert and then assert the IRQ again immediately. */
455#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
456/** @} */
457
458/**
459 * Registration record for MSI.
460 */
461typedef struct PDMMSIREG
462{
463 /** Number of MSI interrupt vectors, 0 if MSI not supported */
464 uint16_t cMsiVectors;
465 /** Offset of MSI capability */
466 uint8_t iMsiCapOffset;
467 /** Offset of next capability to MSI */
468 uint8_t iMsiNextOffset;
469 /** If we support 64-bit MSI addressing */
470 bool fMsi64bit;
471
472 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
473 uint16_t cMsixVectors;
474 /** Offset of MSI-X capability */
475 uint8_t iMsixCapOffset;
476 /** Offset of next capability to MSI-X */
477 uint8_t iMsixNextOffset;
478 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
479 uint8_t iMsixBar;
480} PDMMSIREG;
481typedef PDMMSIREG *PPDMMSIREG;
482
483/**
484 * PCI Bus registration structure.
485 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
486 */
487typedef struct PDMPCIBUSREG
488{
489 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
490 uint32_t u32Version;
491
492 /**
493 * Registers the device with the default PCI bus.
494 *
495 * @returns VBox status code.
496 * @param pDevIns Device instance of the PCI Bus.
497 * @param pPciDev The PCI device structure.
498 * Any PCI enabled device must keep this in it's instance data!
499 * Fill in the PCI data config before registration, please.
500 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
501 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
502 * If negative, the pci bus device will assign one.
503 */
504 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
505
506 /**
507 * Initialize MSI support in a PCI device.
508 *
509 * @returns VBox status code.
510 * @param pDevIns Device instance of the PCI Bus.
511 * @param pPciDev The PCI device structure.
512 * @param pMsiReg MSI registration structure
513 */
514 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
515
516 /**
517 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
518 *
519 * @returns VBox status code.
520 * @param pDevIns Device instance of the PCI Bus.
521 * @param pPciDev The PCI device structure.
522 * @param iRegion The region number.
523 * @param cbRegion Size of the region.
524 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
525 * @param pfnCallback Callback for doing the mapping.
526 */
527 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
528
529 /**
530 * Register PCI configuration space read/write callbacks.
531 *
532 * @param pDevIns Device instance of the PCI Bus.
533 * @param pPciDev The PCI device structure.
534 * @param pfnRead Pointer to the user defined PCI config read function.
535 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
536 * PCI config read function. This way, user can decide when (and if)
537 * to call default PCI config read function. Can be NULL.
538 * @param pfnWrite Pointer to the user defined PCI config write function.
539 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
540 * PCI config write function. This way, user can decide when (and if)
541 * to call default PCI config write function. Can be NULL.
542 * @thread EMT
543 */
544 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
545 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
546
547 /**
548 * Set the IRQ for a PCI device.
549 *
550 * @param pDevIns Device instance of the PCI Bus.
551 * @param pPciDev The PCI device structure.
552 * @param iIrq IRQ number to set.
553 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
554 */
555 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
556
557 /**
558 * Saves a state of the PCI device.
559 *
560 * @returns VBox status code.
561 * @param pDevIns Device instance of the PCI Bus.
562 * @param pPciDev Pointer to PCI device.
563 * @param pSSMHandle The handle to save the state to.
564 */
565 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
566
567 /**
568 * Loads a saved PCI device state.
569 *
570 * @returns VBox status code.
571 * @param pDevIns Device instance of the PCI Bus.
572 * @param pPciDev Pointer to PCI device.
573 * @param pSSMHandle The handle to the saved state.
574 */
575 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
576
577 /**
578 * Called to perform the job of the bios.
579 * This is only called for the first PCI Bus - it is expected to
580 * service all the PCI buses.
581 *
582 * @returns VBox status.
583 * @param pDevIns Device instance of the first bus.
584 */
585 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
586
587 /** The name of the SetIrq RC entry point. */
588 const char *pszSetIrqRC;
589
590 /** The name of the SetIrq R0 entry point. */
591 const char *pszSetIrqR0;
592
593} PDMPCIBUSREG;
594/** Pointer to a PCI bus registration structure. */
595typedef PDMPCIBUSREG *PPDMPCIBUSREG;
596
597/** Current PDMPCIBUSREG version number. */
598#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 2, 0)
599
600/**
601 * PCI Bus RC helpers.
602 */
603typedef struct PDMPCIHLPRC
604{
605 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
606 uint32_t u32Version;
607
608 /**
609 * Set an ISA IRQ.
610 *
611 * @param pDevIns PCI device instance.
612 * @param iIrq IRQ number to set.
613 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
614 * @thread EMT only.
615 */
616 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
617
618 /**
619 * Set an I/O-APIC IRQ.
620 *
621 * @param pDevIns PCI device instance.
622 * @param iIrq IRQ number to set.
623 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
624 * @thread EMT only.
625 */
626 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
627
628 /**
629 * Send an MSI.
630 *
631 * @param pDevIns PCI device instance.
632 * @param GCAddr Physical address MSI request was written.
633 * @param uValue Value written.
634 * @thread EMT only.
635 */
636 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
637
638
639 /**
640 * Acquires the PDM lock.
641 *
642 * @returns VINF_SUCCESS on success.
643 * @returns rc if we failed to acquire the lock.
644 * @param pDevIns The PCI device instance.
645 * @param rc What to return if we fail to acquire the lock.
646 */
647 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
648
649 /**
650 * Releases the PDM lock.
651 *
652 * @param pDevIns The PCI device instance.
653 */
654 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
655
656 /** Just a safety precaution. */
657 uint32_t u32TheEnd;
658} PDMPCIHLPRC;
659/** Pointer to PCI helpers. */
660typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
661/** Pointer to const PCI helpers. */
662typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
663
664/** Current PDMPCIHLPRC version number. */
665#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 2, 0)
666
667
668/**
669 * PCI Bus R0 helpers.
670 */
671typedef struct PDMPCIHLPR0
672{
673 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
674 uint32_t u32Version;
675
676 /**
677 * Set an ISA IRQ.
678 *
679 * @param pDevIns PCI device instance.
680 * @param iIrq IRQ number to set.
681 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
682 * @thread EMT only.
683 */
684 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
685
686 /**
687 * Set an I/O-APIC IRQ.
688 *
689 * @param pDevIns PCI device instance.
690 * @param iIrq IRQ number to set.
691 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
692 * @thread EMT only.
693 */
694 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
695
696 /**
697 * Send an MSI.
698 *
699 * @param pDevIns PCI device instance.
700 * @param GCAddr Physical address MSI request was written.
701 * @param uValue Value written.
702 * @thread EMT only.
703 */
704 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
705
706
707 /**
708 * Acquires the PDM lock.
709 *
710 * @returns VINF_SUCCESS on success.
711 * @returns rc if we failed to acquire the lock.
712 * @param pDevIns The PCI device instance.
713 * @param rc What to return if we fail to acquire the lock.
714 */
715 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
716
717 /**
718 * Releases the PDM lock.
719 *
720 * @param pDevIns The PCI device instance.
721 */
722 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
723
724 /** Just a safety precaution. */
725 uint32_t u32TheEnd;
726} PDMPCIHLPR0;
727/** Pointer to PCI helpers. */
728typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
729/** Pointer to const PCI helpers. */
730typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
731
732/** Current PDMPCIHLPR0 version number. */
733#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 2, 0)
734
735/**
736 * PCI device helpers.
737 */
738typedef struct PDMPCIHLPR3
739{
740 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
741 uint32_t u32Version;
742
743 /**
744 * Set an ISA IRQ.
745 *
746 * @param pDevIns The PCI device instance.
747 * @param iIrq IRQ number to set.
748 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
749 * @thread EMT only.
750 */
751 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
752
753 /**
754 * Set an I/O-APIC IRQ.
755 *
756 * @param pDevIns The PCI device instance.
757 * @param iIrq IRQ number to set.
758 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
759 * @thread EMT only.
760 */
761 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
762
763 /**
764 * Send an MSI.
765 *
766 * @param pDevIns PCI device instance.
767 * @param GCAddr Physical address MSI request was written.
768 * @param uValue Value written.
769 * @thread EMT only.
770 */
771 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
772
773 /**
774 * Checks if the given address is an MMIO2 base address or not.
775 *
776 * @returns true/false accordingly.
777 * @param pDevIns The PCI device instance.
778 * @param pOwner The owner of the memory, optional.
779 * @param GCPhys The address to check.
780 */
781 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
782
783 /**
784 * Gets the address of the RC PCI Bus helpers.
785 *
786 * This should be called at both construction and relocation time
787 * to obtain the correct address of the RC helpers.
788 *
789 * @returns RC pointer to the PCI Bus helpers.
790 * @param pDevIns Device instance of the PCI Bus.
791 * @thread EMT only.
792 */
793 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
794
795 /**
796 * Gets the address of the R0 PCI Bus helpers.
797 *
798 * This should be called at both construction and relocation time
799 * to obtain the correct address of the R0 helpers.
800 *
801 * @returns R0 pointer to the PCI Bus helpers.
802 * @param pDevIns Device instance of the PCI Bus.
803 * @thread EMT only.
804 */
805 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
806
807 /**
808 * Acquires the PDM lock.
809 *
810 * @returns VINF_SUCCESS on success.
811 * @returns Fatal error on failure.
812 * @param pDevIns The PCI device instance.
813 * @param rc Dummy for making the interface identical to the RC and R0 versions.
814 */
815 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
816
817 /**
818 * Releases the PDM lock.
819 *
820 * @param pDevIns The PCI device instance.
821 */
822 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
823
824 /** Just a safety precaution. */
825 uint32_t u32TheEnd;
826} PDMPCIHLPR3;
827/** Pointer to PCI helpers. */
828typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
829/** Pointer to const PCI helpers. */
830typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
831
832/** Current PDMPCIHLPR3 version number. */
833#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 2, 0)
834
835
836/**
837 * Programmable Interrupt Controller registration structure.
838 */
839typedef struct PDMPICREG
840{
841 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
842 uint32_t u32Version;
843
844 /**
845 * Set the an IRQ.
846 *
847 * @param pDevIns Device instance of the PIC.
848 * @param iIrq IRQ number to set.
849 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
850 */
851 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
852
853 /**
854 * Get a pending interrupt.
855 *
856 * @returns Pending interrupt number.
857 * @param pDevIns Device instance of the PIC.
858 */
859 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
860
861 /** The name of the RC SetIrq entry point. */
862 const char *pszSetIrqRC;
863 /** The name of the RC GetInterrupt entry point. */
864 const char *pszGetInterruptRC;
865
866 /** The name of the R0 SetIrq entry point. */
867 const char *pszSetIrqR0;
868 /** The name of the R0 GetInterrupt entry point. */
869 const char *pszGetInterruptR0;
870} PDMPICREG;
871/** Pointer to a PIC registration structure. */
872typedef PDMPICREG *PPDMPICREG;
873
874/** Current PDMPICREG version number. */
875#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 1, 0)
876
877/**
878 * PIC RC helpers.
879 */
880typedef struct PDMPICHLPRC
881{
882 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
883 uint32_t u32Version;
884
885 /**
886 * Set the interrupt force action flag.
887 *
888 * @param pDevIns Device instance of the PIC.
889 */
890 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
891
892 /**
893 * Clear the interrupt force action flag.
894 *
895 * @param pDevIns Device instance of the PIC.
896 */
897 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
898
899 /**
900 * Acquires the PDM lock.
901 *
902 * @returns VINF_SUCCESS on success.
903 * @returns rc if we failed to acquire the lock.
904 * @param pDevIns The PIC device instance.
905 * @param rc What to return if we fail to acquire the lock.
906 */
907 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
908
909 /**
910 * Releases the PDM lock.
911 *
912 * @param pDevIns The PIC device instance.
913 */
914 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
915
916 /** Just a safety precaution. */
917 uint32_t u32TheEnd;
918} PDMPICHLPRC;
919
920/** Pointer to PIC RC helpers. */
921typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
922/** Pointer to const PIC RC helpers. */
923typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
924
925/** Current PDMPICHLPRC version number. */
926#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 1, 0)
927
928
929/**
930 * PIC R0 helpers.
931 */
932typedef struct PDMPICHLPR0
933{
934 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
935 uint32_t u32Version;
936
937 /**
938 * Set the interrupt force action flag.
939 *
940 * @param pDevIns Device instance of the PIC.
941 */
942 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
943
944 /**
945 * Clear the interrupt force action flag.
946 *
947 * @param pDevIns Device instance of the PIC.
948 */
949 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
950
951 /**
952 * Acquires the PDM lock.
953 *
954 * @returns VINF_SUCCESS on success.
955 * @returns rc if we failed to acquire the lock.
956 * @param pDevIns The PIC device instance.
957 * @param rc What to return if we fail to acquire the lock.
958 */
959 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
960
961 /**
962 * Releases the PDM lock.
963 *
964 * @param pDevIns The PCI device instance.
965 */
966 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
967
968 /** Just a safety precaution. */
969 uint32_t u32TheEnd;
970} PDMPICHLPR0;
971
972/** Pointer to PIC R0 helpers. */
973typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
974/** Pointer to const PIC R0 helpers. */
975typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
976
977/** Current PDMPICHLPR0 version number. */
978#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
979
980/**
981 * PIC R3 helpers.
982 */
983typedef struct PDMPICHLPR3
984{
985 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
986 uint32_t u32Version;
987
988 /**
989 * Set the interrupt force action flag.
990 *
991 * @param pDevIns Device instance of the PIC.
992 */
993 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
994
995 /**
996 * Clear the interrupt force action flag.
997 *
998 * @param pDevIns Device instance of the PIC.
999 */
1000 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1001
1002 /**
1003 * Acquires the PDM lock.
1004 *
1005 * @returns VINF_SUCCESS on success.
1006 * @returns Fatal error on failure.
1007 * @param pDevIns The PIC device instance.
1008 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1009 */
1010 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1011
1012 /**
1013 * Releases the PDM lock.
1014 *
1015 * @param pDevIns The PIC device instance.
1016 */
1017 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1018
1019 /**
1020 * Gets the address of the RC PIC helpers.
1021 *
1022 * This should be called at both construction and relocation time
1023 * to obtain the correct address of the RC helpers.
1024 *
1025 * @returns RC pointer to the PIC helpers.
1026 * @param pDevIns Device instance of the PIC.
1027 */
1028 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1029
1030 /**
1031 * Gets the address of the R0 PIC helpers.
1032 *
1033 * This should be called at both construction and relocation time
1034 * to obtain the correct address of the R0 helpers.
1035 *
1036 * @returns R0 pointer to the PIC helpers.
1037 * @param pDevIns Device instance of the PIC.
1038 */
1039 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1040
1041 /** Just a safety precaution. */
1042 uint32_t u32TheEnd;
1043} PDMPICHLPR3;
1044
1045/** Pointer to PIC R3 helpers. */
1046typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1047/** Pointer to const PIC R3 helpers. */
1048typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1049
1050/** Current PDMPICHLPR3 version number. */
1051#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1052
1053
1054
1055/**
1056 * Advanced Programmable Interrupt Controller registration structure.
1057 */
1058typedef struct PDMAPICREG
1059{
1060 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1061 uint32_t u32Version;
1062
1063 /**
1064 * Get a pending interrupt.
1065 *
1066 * @returns Pending interrupt number.
1067 * @param pDevIns Device instance of the APIC.
1068 */
1069 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
1070
1071 /**
1072 * Check if the APIC has a pending interrupt/if a TPR change would active one
1073 *
1074 * @returns Pending interrupt yes/no
1075 * @param pDevIns Device instance of the APIC.
1076 */
1077 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
1078
1079 /**
1080 * Set the APIC base.
1081 *
1082 * @param pDevIns Device instance of the APIC.
1083 * @param u64Base The new base.
1084 */
1085 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
1086
1087 /**
1088 * Get the APIC base.
1089 *
1090 * @returns Current base.
1091 * @param pDevIns Device instance of the APIC.
1092 */
1093 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
1094
1095 /**
1096 * Set the TPR (task priority register).
1097 *
1098 * @param pDevIns Device instance of the APIC.
1099 * @param idCpu VCPU id
1100 * @param u8TPR The new TPR.
1101 */
1102 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1103
1104 /**
1105 * Get the TPR (task priority register).
1106 *
1107 * @returns The current TPR.
1108 * @param pDevIns Device instance of the APIC.
1109 * @param idCpu VCPU id
1110 */
1111 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1112
1113 /**
1114 * Write to a MSR in APIC range.
1115 *
1116 * @returns VBox status code.
1117 * @param pDevIns Device instance of the APIC.
1118 * @param idCpu Target CPU.
1119 * @param u32Reg The MSR begin written to.
1120 * @param u64Value The value to write.
1121 *
1122 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1123 * calling this method.
1124 */
1125 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1126
1127 /**
1128 * Read from a MSR in APIC range.
1129 *
1130 * @returns VBox status code.
1131 * @param pDevIns Device instance of the APIC.
1132 * @param idCpu Target CPU.
1133 * @param u32Reg MSR to read.
1134 * @param pu64Value Where to return the read value.
1135 *
1136 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1137 * calling this method.
1138 */
1139 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1140
1141 /**
1142 * Private interface between the IOAPIC and APIC.
1143 *
1144 * This is a low-level, APIC/IOAPIC implementation specific interface which
1145 * is registered with PDM only because it makes life so much simpler right
1146 * now (GC bits). This is a bad bad hack! The correct way of doing this
1147 * would involve some way of querying GC interfaces and relocating them.
1148 * Perhaps doing some kind of device init in GC...
1149 *
1150 * @returns status code.
1151 * @param pDevIns Device instance of the APIC.
1152 * @param u8Dest See APIC implementation.
1153 * @param u8DestMode See APIC implementation.
1154 * @param u8DeliveryMode See APIC implementation.
1155 * @param iVector See APIC implementation.
1156 * @param u8Polarity See APIC implementation.
1157 * @param u8TriggerMode See APIC implementation.
1158 */
1159 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1160 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1161
1162 /**
1163 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1). Used for
1164 * virtual wire mode when interrupts from the PIC are passed through LAPIC.
1165 *
1166 * @returns status code.
1167 * @param pDevIns Device instance of the APIC.
1168 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1169 */
1170 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1171
1172 /** The name of the RC GetInterrupt entry point. */
1173 const char *pszGetInterruptRC;
1174 /** The name of the RC HasPendingIrq entry point. */
1175 const char *pszHasPendingIrqRC;
1176 /** The name of the RC SetBase entry point. */
1177 const char *pszSetBaseRC;
1178 /** The name of the RC GetBase entry point. */
1179 const char *pszGetBaseRC;
1180 /** The name of the RC SetTPR entry point. */
1181 const char *pszSetTPRRC;
1182 /** The name of the RC GetTPR entry point. */
1183 const char *pszGetTPRRC;
1184 /** The name of the RC WriteMSR entry point. */
1185 const char *pszWriteMSRRC;
1186 /** The name of the RC ReadMSR entry point. */
1187 const char *pszReadMSRRC;
1188 /** The name of the RC BusDeliver entry point. */
1189 const char *pszBusDeliverRC;
1190 /** The name of the RC LocalInterrupt entry point. */
1191 const char *pszLocalInterruptRC;
1192
1193 /** The name of the R0 GetInterrupt entry point. */
1194 const char *pszGetInterruptR0;
1195 /** The name of the R0 HasPendingIrq entry point. */
1196 const char *pszHasPendingIrqR0;
1197 /** The name of the R0 SetBase entry point. */
1198 const char *pszSetBaseR0;
1199 /** The name of the R0 GetBase entry point. */
1200 const char *pszGetBaseR0;
1201 /** The name of the R0 SetTPR entry point. */
1202 const char *pszSetTPRR0;
1203 /** The name of the R0 GetTPR entry point. */
1204 const char *pszGetTPRR0;
1205 /** The name of the R0 WriteMSR entry point. */
1206 const char *pszWriteMSRR0;
1207 /** The name of the R0 ReadMSR entry point. */
1208 const char *pszReadMSRR0;
1209 /** The name of the R0 BusDeliver entry point. */
1210 const char *pszBusDeliverR0;
1211 /** The name of the R0 LocalInterrupt entry point. */
1212 const char *pszLocalInterruptR0;
1213
1214} PDMAPICREG;
1215/** Pointer to an APIC registration structure. */
1216typedef PDMAPICREG *PPDMAPICREG;
1217
1218/** Current PDMAPICREG version number. */
1219#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 1, 0)
1220
1221
1222/**
1223 * APIC version argument for pfnChangeFeature.
1224 */
1225typedef enum PDMAPICVERSION
1226{
1227 /** Invalid 0 entry. */
1228 PDMAPICVERSION_INVALID = 0,
1229 /** No APIC. */
1230 PDMAPICVERSION_NONE,
1231 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1232 PDMAPICVERSION_APIC,
1233 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1234 PDMAPICVERSION_X2APIC,
1235 /** The usual 32-bit paranoia. */
1236 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1237} PDMAPICVERSION;
1238
1239/**
1240 * APIC irq argument for SetInterruptFF.
1241 */
1242typedef enum PDMAPICIRQ
1243{
1244 /** Invalid 0 entry. */
1245 PDMAPICIRQ_INVALID = 0,
1246 /** Normal hardware interrupt. */
1247 PDMAPICIRQ_HARDWARE,
1248 /** NMI. */
1249 PDMAPICIRQ_NMI,
1250 /** SMI. */
1251 PDMAPICIRQ_SMI,
1252 /** ExtINT (HW interrupt via PIC). */
1253 PDMAPICIRQ_EXTINT,
1254 /** The usual 32-bit paranoia. */
1255 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1256} PDMAPICIRQ;
1257
1258
1259/**
1260 * APIC RC helpers.
1261 */
1262typedef struct PDMAPICHLPRC
1263{
1264 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1265 uint32_t u32Version;
1266
1267 /**
1268 * Set the interrupt force action flag.
1269 *
1270 * @param pDevIns Device instance of the APIC.
1271 * @param enmType IRQ type.
1272 * @param idCpu Virtual CPU to set flag upon.
1273 */
1274 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1275
1276 /**
1277 * Clear the interrupt force action flag.
1278 *
1279 * @param pDevIns Device instance of the APIC.
1280 * @param enmType IRQ type.
1281 * @param idCpu Virtual CPU to clear flag upon.
1282 */
1283 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1284
1285 /**
1286 * Modifies APIC-related bits in the CPUID feature mask.
1287 *
1288 * @param pDevIns Device instance of the APIC.
1289 * @param enmVersion Supported APIC version.
1290 */
1291 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1292
1293 /**
1294 * Acquires the PDM lock.
1295 *
1296 * @returns VINF_SUCCESS on success.
1297 * @returns rc if we failed to acquire the lock.
1298 * @param pDevIns The APIC device instance.
1299 * @param rc What to return if we fail to acquire the lock.
1300 */
1301 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1302
1303 /**
1304 * Releases the PDM lock.
1305 *
1306 * @param pDevIns The APIC device instance.
1307 */
1308 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1309
1310 /**
1311 * Get the virtual CPU id corresponding to the current EMT.
1312 *
1313 * @param pDevIns The APIC device instance.
1314 */
1315 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1316
1317 /** Just a safety precaution. */
1318 uint32_t u32TheEnd;
1319} PDMAPICHLPRC;
1320/** Pointer to APIC GC helpers. */
1321typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1322/** Pointer to const APIC helpers. */
1323typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1324
1325/** Current PDMAPICHLPRC version number. */
1326#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 1, 0)
1327
1328
1329/**
1330 * APIC R0 helpers.
1331 */
1332typedef struct PDMAPICHLPR0
1333{
1334 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1335 uint32_t u32Version;
1336
1337 /**
1338 * Set the interrupt force action flag.
1339 *
1340 * @param pDevIns Device instance of the APIC.
1341 * @param enmType IRQ type.
1342 * @param idCpu Virtual CPU to set flag upon.
1343 */
1344 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1345
1346 /**
1347 * Clear the interrupt force action flag.
1348 *
1349 * @param pDevIns Device instance of the APIC.
1350 * @param enmType IRQ type.
1351 * @param idCpu Virtual CPU to clear flag upon.
1352 */
1353 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1354
1355 /**
1356 * Modifies APIC-related bits in the CPUID feature mask.
1357 *
1358 * @param pDevIns Device instance of the APIC.
1359 * @param enmVersion Supported APIC version.
1360 */
1361 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1362
1363 /**
1364 * Acquires the PDM lock.
1365 *
1366 * @returns VINF_SUCCESS on success.
1367 * @returns rc if we failed to acquire the lock.
1368 * @param pDevIns The APIC device instance.
1369 * @param rc What to return if we fail to acquire the lock.
1370 */
1371 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1372
1373 /**
1374 * Releases the PDM lock.
1375 *
1376 * @param pDevIns The APIC device instance.
1377 */
1378 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1379
1380 /**
1381 * Get the virtual CPU id corresponding to the current EMT.
1382 *
1383 * @param pDevIns The APIC device instance.
1384 */
1385 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1386
1387 /** Just a safety precaution. */
1388 uint32_t u32TheEnd;
1389} PDMAPICHLPR0;
1390/** Pointer to APIC GC helpers. */
1391typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1392/** Pointer to const APIC helpers. */
1393typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1394
1395/** Current PDMAPICHLPR0 version number. */
1396#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 1, 0)
1397
1398/**
1399 * APIC R3 helpers.
1400 */
1401typedef struct PDMAPICHLPR3
1402{
1403 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1404 uint32_t u32Version;
1405
1406 /**
1407 * Set the interrupt force action flag.
1408 *
1409 * @param pDevIns Device instance of the APIC.
1410 * @param enmType IRQ type.
1411 * @param idCpu Virtual CPU to set flag upon.
1412 */
1413 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1414
1415 /**
1416 * Clear the interrupt force action flag.
1417 *
1418 * @param pDevIns Device instance of the APIC.
1419 * @param enmType IRQ type.
1420 * @param idCpu Virtual CPU to clear flag upon.
1421 */
1422 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1423
1424 /**
1425 * Modifies APIC-related bits in the CPUID feature mask.
1426 *
1427 * @param pDevIns Device instance of the APIC.
1428 * @param enmVersion Supported APIC version.
1429 */
1430 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1431
1432 /**
1433 * Get the virtual CPU id corresponding to the current EMT.
1434 *
1435 * @param pDevIns The APIC device instance.
1436 */
1437 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1438
1439 /**
1440 * Sends SIPI to given virtual CPU.
1441 *
1442 * @param pDevIns The APIC device instance.
1443 * @param idCpu Virtual CPU to perform SIPI on
1444 * @param iVector SIPI vector
1445 */
1446 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1447
1448 /**
1449 * Sends init IPI to given virtual CPU, should result in reset and
1450 * halting till SIPI.
1451 *
1452 * @param pDevIns The APIC device instance.
1453 * @param idCpu Virtual CPU to perform SIPI on
1454 */
1455 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1456
1457 /**
1458 * Gets the address of the RC APIC helpers.
1459 *
1460 * This should be called at both construction and relocation time
1461 * to obtain the correct address of the RC helpers.
1462 *
1463 * @returns GC pointer to the APIC helpers.
1464 * @param pDevIns Device instance of the APIC.
1465 */
1466 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1467
1468 /**
1469 * Gets the address of the R0 APIC helpers.
1470 *
1471 * This should be called at both construction and relocation time
1472 * to obtain the correct address of the R0 helpers.
1473 *
1474 * @returns R0 pointer to the APIC helpers.
1475 * @param pDevIns Device instance of the APIC.
1476 */
1477 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1478
1479 /**
1480 * Get the critical section used to synchronize the PICs, PCI and stuff.
1481 *
1482 * @returns Ring-3 pointer to the critical section.
1483 * @param pDevIns The APIC device instance.
1484 */
1485 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1486
1487 /**
1488 * Get the critical section used to synchronize the PICs, PCI and stuff.
1489 *
1490 * @returns Raw-mode context pointer to the critical section.
1491 * @param pDevIns The APIC device instance.
1492 */
1493 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1494
1495 /**
1496 * Get the critical section used to synchronize the PICs, PCI and stuff.
1497 *
1498 * @returns Ring-0 pointer to the critical section.
1499 * @param pDevIns The APIC device instance.
1500 */
1501 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1502
1503 /** Just a safety precaution. */
1504 uint32_t u32TheEnd;
1505} PDMAPICHLPR3;
1506/** Pointer to APIC helpers. */
1507typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1508/** Pointer to const APIC helpers. */
1509typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1510
1511/** Current PDMAPICHLP version number. */
1512#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 1, 0)
1513
1514
1515/**
1516 * I/O APIC registration structure.
1517 */
1518typedef struct PDMIOAPICREG
1519{
1520 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1521 uint32_t u32Version;
1522
1523 /**
1524 * Set the an IRQ.
1525 *
1526 * @param pDevIns Device instance of the I/O APIC.
1527 * @param iIrq IRQ number to set.
1528 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1529 */
1530 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1531
1532 /** The name of the GC SetIrq entry point. */
1533 const char *pszSetIrqRC;
1534
1535 /** The name of the R0 SetIrq entry point. */
1536 const char *pszSetIrqR0;
1537
1538 /**
1539 * Send a MSI.
1540 *
1541 * @param pDevIns Device instance of the I/O APIC.
1542 * @param GCPhys Request address.
1543 * @param uValue Request value.
1544 */
1545 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
1546
1547 /** The name of the GC SendMsi entry point. */
1548 const char *pszSendMsiRC;
1549
1550 /** The name of the R0 SendMsi entry point. */
1551 const char *pszSendMsiR0;
1552} PDMIOAPICREG;
1553/** Pointer to an APIC registration structure. */
1554typedef PDMIOAPICREG *PPDMIOAPICREG;
1555
1556/** Current PDMAPICREG version number. */
1557#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 2, 0)
1558
1559
1560/**
1561 * IOAPIC RC helpers.
1562 */
1563typedef struct PDMIOAPICHLPRC
1564{
1565 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1566 uint32_t u32Version;
1567
1568 /**
1569 * Private interface between the IOAPIC and APIC.
1570 *
1571 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1572 *
1573 * @returns status code.
1574 * @param pDevIns Device instance of the IOAPIC.
1575 * @param u8Dest See APIC implementation.
1576 * @param u8DestMode See APIC implementation.
1577 * @param u8DeliveryMode See APIC implementation.
1578 * @param iVector See APIC implementation.
1579 * @param u8Polarity See APIC implementation.
1580 * @param u8TriggerMode See APIC implementation.
1581 */
1582 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1583 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1584
1585 /**
1586 * Acquires the PDM lock.
1587 *
1588 * @returns VINF_SUCCESS on success.
1589 * @returns rc if we failed to acquire the lock.
1590 * @param pDevIns The IOAPIC device instance.
1591 * @param rc What to return if we fail to acquire the lock.
1592 */
1593 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1594
1595 /**
1596 * Releases the PDM lock.
1597 *
1598 * @param pDevIns The IOAPIC device instance.
1599 */
1600 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1601
1602 /** Just a safety precaution. */
1603 uint32_t u32TheEnd;
1604} PDMIOAPICHLPRC;
1605/** Pointer to IOAPIC RC helpers. */
1606typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1607/** Pointer to const IOAPIC helpers. */
1608typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1609
1610/** Current PDMIOAPICHLPRC version number. */
1611#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 1, 0)
1612
1613
1614/**
1615 * IOAPIC R0 helpers.
1616 */
1617typedef struct PDMIOAPICHLPR0
1618{
1619 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1620 uint32_t u32Version;
1621
1622 /**
1623 * Private interface between the IOAPIC and APIC.
1624 *
1625 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1626 *
1627 * @returns status code.
1628 * @param pDevIns Device instance of the IOAPIC.
1629 * @param u8Dest See APIC implementation.
1630 * @param u8DestMode See APIC implementation.
1631 * @param u8DeliveryMode See APIC implementation.
1632 * @param iVector See APIC implementation.
1633 * @param u8Polarity See APIC implementation.
1634 * @param u8TriggerMode See APIC implementation.
1635 */
1636 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1637 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1638
1639 /**
1640 * Acquires the PDM lock.
1641 *
1642 * @returns VINF_SUCCESS on success.
1643 * @returns rc if we failed to acquire the lock.
1644 * @param pDevIns The IOAPIC device instance.
1645 * @param rc What to return if we fail to acquire the lock.
1646 */
1647 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1648
1649 /**
1650 * Releases the PDM lock.
1651 *
1652 * @param pDevIns The IOAPIC device instance.
1653 */
1654 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1655
1656 /** Just a safety precaution. */
1657 uint32_t u32TheEnd;
1658} PDMIOAPICHLPR0;
1659/** Pointer to IOAPIC R0 helpers. */
1660typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1661/** Pointer to const IOAPIC helpers. */
1662typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1663
1664/** Current PDMIOAPICHLPR0 version number. */
1665#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 1, 0)
1666
1667/**
1668 * IOAPIC R3 helpers.
1669 */
1670typedef struct PDMIOAPICHLPR3
1671{
1672 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1673 uint32_t u32Version;
1674
1675 /**
1676 * Private interface between the IOAPIC and APIC.
1677 *
1678 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1679 *
1680 * @returns status code
1681 * @param pDevIns Device instance of the IOAPIC.
1682 * @param u8Dest See APIC implementation.
1683 * @param u8DestMode See APIC implementation.
1684 * @param u8DeliveryMode See APIC implementation.
1685 * @param iVector See APIC implementation.
1686 * @param u8Polarity See APIC implementation.
1687 * @param u8TriggerMode See APIC implementation.
1688 */
1689 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1690 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
1691
1692 /**
1693 * Acquires the PDM lock.
1694 *
1695 * @returns VINF_SUCCESS on success.
1696 * @returns Fatal error on failure.
1697 * @param pDevIns The IOAPIC device instance.
1698 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1699 */
1700 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1701
1702 /**
1703 * Releases the PDM lock.
1704 *
1705 * @param pDevIns The IOAPIC device instance.
1706 */
1707 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1708
1709 /**
1710 * Gets the address of the RC IOAPIC helpers.
1711 *
1712 * This should be called at both construction and relocation time
1713 * to obtain the correct address of the RC helpers.
1714 *
1715 * @returns RC pointer to the IOAPIC helpers.
1716 * @param pDevIns Device instance of the IOAPIC.
1717 */
1718 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1719
1720 /**
1721 * Gets the address of the R0 IOAPIC helpers.
1722 *
1723 * This should be called at both construction and relocation time
1724 * to obtain the correct address of the R0 helpers.
1725 *
1726 * @returns R0 pointer to the IOAPIC helpers.
1727 * @param pDevIns Device instance of the IOAPIC.
1728 */
1729 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1730
1731 /** Just a safety precaution. */
1732 uint32_t u32TheEnd;
1733} PDMIOAPICHLPR3;
1734/** Pointer to IOAPIC R3 helpers. */
1735typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1736/** Pointer to const IOAPIC helpers. */
1737typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1738
1739/** Current PDMIOAPICHLPR3 version number. */
1740#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 1, 0)
1741
1742
1743/**
1744 * HPET registration structure.
1745 */
1746typedef struct PDMHPETREG
1747{
1748 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1749 uint32_t u32Version;
1750
1751} PDMHPETREG;
1752/** Pointer to an HPET registration structure. */
1753typedef PDMHPETREG *PPDMHPETREG;
1754
1755/** Current PDMHPETREG version number. */
1756#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1757
1758/**
1759 * HPET RC helpers.
1760 *
1761 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1762 * at some later point.
1763 */
1764typedef struct PDMHPETHLPRC
1765{
1766 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1767 uint32_t u32Version;
1768
1769 /** Just a safety precaution. */
1770 uint32_t u32TheEnd;
1771} PDMHPETHLPRC;
1772
1773/** Pointer to HPET RC helpers. */
1774typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1775/** Pointer to const HPET RC helpers. */
1776typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1777
1778/** Current PDMHPETHLPRC version number. */
1779#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1780
1781
1782/**
1783 * HPET R0 helpers.
1784 *
1785 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1786 * at some later point.
1787 */
1788typedef struct PDMHPETHLPR0
1789{
1790 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1791 uint32_t u32Version;
1792
1793 /** Just a safety precaution. */
1794 uint32_t u32TheEnd;
1795} PDMHPETHLPR0;
1796
1797/** Pointer to HPET R0 helpers. */
1798typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1799/** Pointer to const HPET R0 helpers. */
1800typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1801
1802/** Current PDMHPETHLPR0 version number. */
1803#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1804
1805/**
1806 * HPET R3 helpers.
1807 */
1808typedef struct PDMHPETHLPR3
1809{
1810 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1811 uint32_t u32Version;
1812
1813 /**
1814 * Gets the address of the RC HPET helpers.
1815 *
1816 * This should be called at both construction and relocation time
1817 * to obtain the correct address of the RC helpers.
1818 *
1819 * @returns RC pointer to the HPET helpers.
1820 * @param pDevIns Device instance of the HPET.
1821 */
1822 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1823
1824 /**
1825 * Gets the address of the R0 HPET helpers.
1826 *
1827 * This should be called at both construction and relocation time
1828 * to obtain the correct address of the R0 helpers.
1829 *
1830 * @returns R0 pointer to the HPET helpers.
1831 * @param pDevIns Device instance of the HPET.
1832 */
1833 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1834
1835 /**
1836 * Set legacy mode on PIT and RTC.
1837 *
1838 * @returns VINF_SUCCESS on success.
1839 * @returns rc if we failed to set legacy mode.
1840 * @param pDevIns Device instance of the HPET.
1841 * @param fActivated Whether legacy mode is activated or deactivated.
1842 */
1843 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1844
1845
1846 /**
1847 * Set IRQ, bypassing ISA bus override rules.
1848 *
1849 * @returns VINF_SUCCESS on success.
1850 * @returns rc if we failed to set legacy mode.
1851 * @param pDevIns Device instance of the HPET.
1852 * @param fActivate Activate or deactivate legacy mode.
1853 */
1854 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1855
1856 /** Just a safety precaution. */
1857 uint32_t u32TheEnd;
1858} PDMHPETHLPR3;
1859
1860/** Pointer to HPET R3 helpers. */
1861typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1862/** Pointer to const HPET R3 helpers. */
1863typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1864
1865/** Current PDMHPETHLPR3 version number. */
1866#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1867
1868
1869/**
1870 * Raw PCI device registration structure.
1871 */
1872typedef struct PDMPCIRAWREG
1873{
1874 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1875 uint32_t u32Version;
1876 /** Just a safety precaution. */
1877 uint32_t u32TheEnd;
1878} PDMPCIRAWREG;
1879/** Pointer to a raw PCI registration structure. */
1880typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1881
1882/** Current PDMPCIRAWREG version number. */
1883#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1884
1885/**
1886 * Raw PCI device raw-mode context helpers.
1887 */
1888typedef struct PDMPCIRAWHLPRC
1889{
1890 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1891 uint32_t u32Version;
1892 /** Just a safety precaution. */
1893 uint32_t u32TheEnd;
1894} PDMPCIRAWHLPRC;
1895/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1896typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1897/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1898typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1899
1900/** Current PDMPCIRAWHLPRC version number. */
1901#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1902
1903/**
1904 * Raw PCI device ring-0 context helpers.
1905 */
1906typedef struct PDMPCIRAWHLPR0
1907{
1908 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1909 uint32_t u32Version;
1910 /** Just a safety precaution. */
1911 uint32_t u32TheEnd;
1912} PDMPCIRAWHLPR0;
1913/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1914typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1915/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1916typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1917
1918/** Current PDMPCIRAWHLPR0 version number. */
1919#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1920
1921
1922/**
1923 * Raw PCI device ring-3 context helpers.
1924 */
1925typedef struct PDMPCIRAWHLPR3
1926{
1927 /** Undefined structure version and magic number. */
1928 uint32_t u32Version;
1929
1930 /**
1931 * Gets the address of the RC raw PCI device helpers.
1932 *
1933 * This should be called at both construction and relocation time to obtain
1934 * the correct address of the RC helpers.
1935 *
1936 * @returns RC pointer to the raw PCI device helpers.
1937 * @param pDevIns Device instance of the raw PCI device.
1938 */
1939 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1940
1941 /**
1942 * Gets the address of the R0 raw PCI device helpers.
1943 *
1944 * This should be called at both construction and relocation time to obtain
1945 * the correct address of the R0 helpers.
1946 *
1947 * @returns R0 pointer to the raw PCI device helpers.
1948 * @param pDevIns Device instance of the raw PCI device.
1949 */
1950 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1951
1952 /** Just a safety precaution. */
1953 uint32_t u32TheEnd;
1954} PDMPCIRAWHLPR3;
1955/** Pointer to raw PCI R3 helpers. */
1956typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
1957/** Pointer to const raw PCI R3 helpers. */
1958typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
1959
1960/** Current PDMPCIRAWHLPR3 version number. */
1961#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
1962
1963
1964#ifdef IN_RING3
1965
1966/**
1967 * DMA Transfer Handler.
1968 *
1969 * @returns Number of bytes transferred.
1970 * @param pDevIns Device instance of the DMA.
1971 * @param pvUser User pointer.
1972 * @param uChannel Channel number.
1973 * @param off DMA position.
1974 * @param cb Block size.
1975 */
1976typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
1977/** Pointer to a FNDMATRANSFERHANDLER(). */
1978typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
1979
1980/**
1981 * DMA Controller registration structure.
1982 */
1983typedef struct PDMDMAREG
1984{
1985 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
1986 uint32_t u32Version;
1987
1988 /**
1989 * Execute pending transfers.
1990 *
1991 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
1992 * @param pDevIns Device instance of the DMAC.
1993 */
1994 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
1995
1996 /**
1997 * Register transfer function for DMA channel.
1998 *
1999 * @param pDevIns Device instance of the DMAC.
2000 * @param uChannel Channel number.
2001 * @param pfnTransferHandler Device specific transfer function.
2002 * @param pvUSer User pointer to be passed to the callback.
2003 */
2004 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2005
2006 /**
2007 * Read memory
2008 *
2009 * @returns Number of bytes read.
2010 * @param pDevIns Device instance of the DMAC.
2011 * @param pvBuffer Pointer to target buffer.
2012 * @param off DMA position.
2013 * @param cbBlock Block size.
2014 */
2015 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2016
2017 /**
2018 * Write memory
2019 *
2020 * @returns Number of bytes written.
2021 * @param pDevIns Device instance of the DMAC.
2022 * @param pvBuffer Memory to write.
2023 * @param off DMA position.
2024 * @param cbBlock Block size.
2025 */
2026 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2027
2028 /**
2029 * Set the DREQ line.
2030 *
2031 * @param pDevIns Device instance of the DMAC.
2032 * @param uChannel Channel number.
2033 * @param uLevel Level of the line.
2034 */
2035 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2036
2037 /**
2038 * Get channel mode
2039 *
2040 * @returns Channel mode.
2041 * @param pDevIns Device instance of the DMAC.
2042 * @param uChannel Channel number.
2043 */
2044 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2045
2046} PDMDMACREG;
2047/** Pointer to a DMAC registration structure. */
2048typedef PDMDMACREG *PPDMDMACREG;
2049
2050/** Current PDMDMACREG version number. */
2051#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2052
2053
2054/**
2055 * DMA Controller device helpers.
2056 */
2057typedef struct PDMDMACHLP
2058{
2059 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2060 uint32_t u32Version;
2061
2062 /* to-be-defined */
2063
2064} PDMDMACHLP;
2065/** Pointer to DMAC helpers. */
2066typedef PDMDMACHLP *PPDMDMACHLP;
2067/** Pointer to const DMAC helpers. */
2068typedef const PDMDMACHLP *PCPDMDMACHLP;
2069
2070/** Current PDMDMACHLP version number. */
2071#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2072
2073#endif /* IN_RING3 */
2074
2075
2076
2077/**
2078 * RTC registration structure.
2079 */
2080typedef struct PDMRTCREG
2081{
2082 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2083 uint32_t u32Version;
2084 uint32_t u32Alignment; /**< structure size alignment. */
2085
2086 /**
2087 * Write to a CMOS register and update the checksum if necessary.
2088 *
2089 * @returns VBox status code.
2090 * @param pDevIns Device instance of the RTC.
2091 * @param iReg The CMOS register index.
2092 * @param u8Value The CMOS register value.
2093 */
2094 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2095
2096 /**
2097 * Read a CMOS register.
2098 *
2099 * @returns VBox status code.
2100 * @param pDevIns Device instance of the RTC.
2101 * @param iReg The CMOS register index.
2102 * @param pu8Value Where to store the CMOS register value.
2103 */
2104 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2105
2106} PDMRTCREG;
2107/** Pointer to a RTC registration structure. */
2108typedef PDMRTCREG *PPDMRTCREG;
2109/** Pointer to a const RTC registration structure. */
2110typedef const PDMRTCREG *PCPDMRTCREG;
2111
2112/** Current PDMRTCREG version number. */
2113#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
2114
2115
2116/**
2117 * RTC device helpers.
2118 */
2119typedef struct PDMRTCHLP
2120{
2121 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2122 uint32_t u32Version;
2123
2124 /* to-be-defined */
2125
2126} PDMRTCHLP;
2127/** Pointer to RTC helpers. */
2128typedef PDMRTCHLP *PPDMRTCHLP;
2129/** Pointer to const RTC helpers. */
2130typedef const PDMRTCHLP *PCPDMRTCHLP;
2131
2132/** Current PDMRTCHLP version number. */
2133#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2134
2135
2136
2137#ifdef IN_RING3
2138
2139/**
2140 * PDM Device API.
2141 */
2142typedef struct PDMDEVHLPR3
2143{
2144 /** Structure version. PDM_DEVHLP_VERSION defines the current version. */
2145 uint32_t u32Version;
2146
2147 /**
2148 * Register a number of I/O ports with a device.
2149 *
2150 * These callbacks are of course for the host context (HC).
2151 * Register HC handlers before guest context (GC) handlers! There must be a
2152 * HC handler for every GC handler!
2153 *
2154 * @returns VBox status.
2155 * @param pDevIns The device instance to register the ports with.
2156 * @param Port First port number in the range.
2157 * @param cPorts Number of ports to register.
2158 * @param pvUser User argument.
2159 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2160 * @param pfnIn Pointer to function which is gonna handle IN operations.
2161 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2162 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2163 * @param pszDesc Pointer to description string. This must not be freed.
2164 */
2165 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
2166 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2167 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2168
2169 /**
2170 * Register a number of I/O ports with a device for RC.
2171 *
2172 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2173 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2174 * for every RC handler!
2175 *
2176 * @returns VBox status.
2177 * @param pDevIns The device instance to register the ports with
2178 * and which RC module to resolve the names
2179 * against.
2180 * @param Port First port number in the range.
2181 * @param cPorts Number of ports to register.
2182 * @param pvUser User argument.
2183 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2184 * @param pszIn Name of the RC function which is gonna handle IN operations.
2185 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2186 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2187 * @param pszDesc Pointer to description string. This must not be freed.
2188 */
2189 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
2190 const char *pszOut, const char *pszIn,
2191 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2192
2193 /**
2194 * Register a number of I/O ports with a device.
2195 *
2196 * These callbacks are of course for the ring-0 host context (R0).
2197 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2198 *
2199 * @returns VBox status.
2200 * @param pDevIns The device instance to register the ports with.
2201 * @param Port First port number in the range.
2202 * @param cPorts Number of ports to register.
2203 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2204 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2205 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2206 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2207 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2208 * @param pszDesc Pointer to description string. This must not be freed.
2209 */
2210 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
2211 const char *pszOut, const char *pszIn,
2212 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2213
2214 /**
2215 * Deregister I/O ports.
2216 *
2217 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2218 *
2219 * @returns VBox status.
2220 * @param pDevIns The device instance owning the ports.
2221 * @param Port First port number in the range.
2222 * @param cPorts Number of ports to deregister.
2223 */
2224 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts));
2225
2226 /**
2227 * Register a Memory Mapped I/O (MMIO) region.
2228 *
2229 * These callbacks are of course for the ring-3 context (R3). Register HC
2230 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2231 * must be a R3 handler for every RC and R0 handler!
2232 *
2233 * @returns VBox status.
2234 * @param pDevIns The device instance to register the MMIO with.
2235 * @param GCPhysStart First physical address in the range.
2236 * @param cbRange The size of the range (in bytes).
2237 * @param pvUser User argument.
2238 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2239 * @param pfnRead Pointer to function which is gonna handle Read operations.
2240 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2241 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2242 * @param pszDesc Pointer to description string. This must not be freed.
2243 */
2244 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
2245 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2246 uint32_t fFlags, const char *pszDesc));
2247
2248 /**
2249 * Register a Memory Mapped I/O (MMIO) region for GC.
2250 *
2251 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2252 * (R3) handlers before guest context handlers! There must be a R3 handler for
2253 * every RC handler!
2254 *
2255 * @returns VBox status.
2256 * @param pDevIns The device instance to register the MMIO with.
2257 * @param GCPhysStart First physical address in the range.
2258 * @param cbRange The size of the range (in bytes).
2259 * @param pvUser User argument.
2260 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2261 * @param pszRead Name of the RC function which is gonna handle Read operations.
2262 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2263 */
2264 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
2265 const char *pszWrite, const char *pszRead, const char *pszFill));
2266
2267 /**
2268 * Register a Memory Mapped I/O (MMIO) region for R0.
2269 *
2270 * These callbacks are for the ring-0 host context (R0). Register ring-3
2271 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2272 * every R0 handler!
2273 *
2274 * @returns VBox status.
2275 * @param pDevIns The device instance to register the MMIO with.
2276 * @param GCPhysStart First physical address in the range.
2277 * @param cbRange The size of the range (in bytes).
2278 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2279 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2280 * @param pszRead Name of the RC function which is gonna handle Read operations.
2281 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2282 * @param pszDesc Obsolete. NULL is fine.
2283 */
2284 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
2285 const char *pszWrite, const char *pszRead, const char *pszFill));
2286
2287 /**
2288 * Deregister a Memory Mapped I/O (MMIO) region.
2289 *
2290 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2291 *
2292 * @returns VBox status.
2293 * @param pDevIns The device instance owning the MMIO region(s).
2294 * @param GCPhysStart First physical address in the range.
2295 * @param cbRange The size of the range (in bytes).
2296 */
2297 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange));
2298
2299 /**
2300 * Allocate and register a MMIO2 region.
2301 *
2302 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2303 * RAM associated with a device. It is also non-shared memory with a
2304 * permanent ring-3 mapping and page backing (presently).
2305 *
2306 * @returns VBox status.
2307 * @param pDevIns The device instance.
2308 * @param iRegion The region number. Use the PCI region number as
2309 * this must be known to the PCI bus device too. If
2310 * it's not associated with the PCI device, then
2311 * any number up to UINT8_MAX is fine.
2312 * @param cb The size (in bytes) of the region.
2313 * @param fFlags Reserved for future use, must be zero.
2314 * @param ppv Where to store the address of the ring-3 mapping
2315 * of the memory.
2316 * @param pszDesc Pointer to description string. This must not be
2317 * freed.
2318 * @thread EMT.
2319 */
2320 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2321
2322 /**
2323 * Deregisters and frees a MMIO2 region.
2324 *
2325 * Any physical (and virtual) access handlers registered for the region must
2326 * be deregistered before calling this function.
2327 *
2328 * @returns VBox status code.
2329 * @param pDevIns The device instance.
2330 * @param iRegion The region number used during registration.
2331 * @thread EMT.
2332 */
2333 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2334
2335 /**
2336 * Maps a MMIO2 region into the physical memory space.
2337 *
2338 * A MMIO2 range may overlap with base memory if a lot of RAM
2339 * is configured for the VM, in which case we'll drop the base
2340 * memory pages. Presently we will make no attempt to preserve
2341 * anything that happens to be present in the base memory that
2342 * is replaced, this is of course incorrectly but it's too much
2343 * effort.
2344 *
2345 * @returns VBox status code.
2346 * @param pDevIns The device instance.
2347 * @param iRegion The region number used during registration.
2348 * @param GCPhys The physical address to map it at.
2349 * @thread EMT.
2350 */
2351 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2352
2353 /**
2354 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2355 *
2356 * @returns VBox status code.
2357 * @param pDevIns The device instance.
2358 * @param iRegion The region number used during registration.
2359 * @param GCPhys The physical address it's currently mapped at.
2360 * @thread EMT.
2361 */
2362 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2363
2364 /**
2365 * Maps a portion of an MMIO2 region into the hypervisor region.
2366 *
2367 * Callers of this API must never deregister the MMIO2 region before the
2368 * VM is powered off.
2369 *
2370 * @return VBox status code.
2371 * @param pDevIns The device owning the MMIO2 memory.
2372 * @param iRegion The region.
2373 * @param off The offset into the region. Will be rounded down
2374 * to closest page boundary.
2375 * @param cb The number of bytes to map. Will be rounded up
2376 * to the closest page boundary.
2377 * @param pszDesc Mapping description.
2378 * @param pRCPtr Where to store the RC address.
2379 */
2380 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2381 const char *pszDesc, PRTRCPTR pRCPtr));
2382
2383 /**
2384 * Maps a portion of an MMIO2 region into kernel space (host).
2385 *
2386 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2387 * or the VM is terminated.
2388 *
2389 * @return VBox status code.
2390 * @param pDevIns The device owning the MMIO2 memory.
2391 * @param iRegion The region.
2392 * @param off The offset into the region. Must be page
2393 * aligned.
2394 * @param cb The number of bytes to map. Must be page
2395 * aligned.
2396 * @param pszDesc Mapping description.
2397 * @param pR0Ptr Where to store the R0 address.
2398 */
2399 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2400 const char *pszDesc, PRTR0PTR pR0Ptr));
2401
2402 /**
2403 * Register a ROM (BIOS) region.
2404 *
2405 * It goes without saying that this is read-only memory. The memory region must be
2406 * in unassigned memory. I.e. from the top of the address space or on the PC in
2407 * the 0xa0000-0xfffff range.
2408 *
2409 * @returns VBox status.
2410 * @param pDevIns The device instance owning the ROM region.
2411 * @param GCPhysStart First physical address in the range.
2412 * Must be page aligned!
2413 * @param cbRange The size of the range (in bytes).
2414 * Must be page aligned!
2415 * @param pvBinary Pointer to the binary data backing the ROM image.
2416 * @param cbBinary The size of the binary pointer. This must
2417 * be equal or smaller than @a cbRange.
2418 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2419 * @param pszDesc Pointer to description string. This must not be freed.
2420 *
2421 * @remark There is no way to remove the rom, automatically on device cleanup or
2422 * manually from the device yet. At present I doubt we need such features...
2423 */
2424 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange,
2425 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2426
2427 /**
2428 * Changes the protection of shadowed ROM mapping.
2429 *
2430 * This is intented for use by the system BIOS, chipset or device in question to
2431 * change the protection of shadowed ROM code after init and on reset.
2432 *
2433 * @param pDevIns The device instance.
2434 * @param GCPhysStart Where the mapping starts.
2435 * @param cbRange The size of the mapping.
2436 * @param enmProt The new protection type.
2437 */
2438 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt));
2439
2440 /**
2441 * Register a save state data unit.
2442 *
2443 * @returns VBox status.
2444 * @param pDevIns The device instance.
2445 * @param pszName Data unit name.
2446 * @param uInstance The instance identifier of the data unit.
2447 * This must together with the name be unique.
2448 * @param uVersion Data layout version number.
2449 * @param cbGuess The approximate amount of data in the unit.
2450 * Only for progress indicators.
2451 * @param pszBefore Name of data unit which we should be put in
2452 * front of. Optional (NULL).
2453 *
2454 * @param pfnLivePrep Prepare live save callback, optional.
2455 * @param pfnLiveExec Execute live save callback, optional.
2456 * @param pfnLiveVote Vote live save callback, optional.
2457 *
2458 * @param pfnSavePrep Prepare save callback, optional.
2459 * @param pfnSaveExec Execute save callback, optional.
2460 * @param pfnSaveDone Done save callback, optional.
2461 *
2462 * @param pfnLoadPrep Prepare load callback, optional.
2463 * @param pfnLoadExec Execute load callback, optional.
2464 * @param pfnLoadDone Done load callback, optional.
2465 */
2466 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2467 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2468 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2469 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2470
2471 /**
2472 * Creates a timer.
2473 *
2474 * @returns VBox status.
2475 * @param pDevIns The device instance.
2476 * @param enmClock The clock to use on this timer.
2477 * @param pfnCallback Callback function.
2478 * @param pvUser User argument for the callback.
2479 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2480 * @param pszDesc Pointer to description string which must stay around
2481 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2482 * @param ppTimer Where to store the timer on success.
2483 */
2484 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2485
2486 /**
2487 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2488 *
2489 * @returns pTime.
2490 * @param pDevIns The device instance.
2491 * @param pTime Where to store the time.
2492 */
2493 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2494
2495 /**
2496 * Read physical memory.
2497 *
2498 * @returns VINF_SUCCESS (for now).
2499 * @param pDevIns The device instance.
2500 * @param GCPhys Physical address start reading from.
2501 * @param pvBuf Where to put the read bits.
2502 * @param cbRead How many bytes to read.
2503 * @thread Any thread, but the call may involve the emulation thread.
2504 */
2505 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2506
2507 /**
2508 * Write to physical memory.
2509 *
2510 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2511 * @param pDevIns The device instance.
2512 * @param GCPhys Physical address to write to.
2513 * @param pvBuf What to write.
2514 * @param cbWrite How many bytes to write.
2515 * @thread Any thread, but the call may involve the emulation thread.
2516 */
2517 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2518
2519 /**
2520 * Requests the mapping of a guest page into ring-3.
2521 *
2522 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2523 * release it.
2524 *
2525 * This API will assume your intention is to write to the page, and will
2526 * therefore replace shared and zero pages. If you do not intend to modify the
2527 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2528 *
2529 * @returns VBox status code.
2530 * @retval VINF_SUCCESS on success.
2531 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2532 * backing or if the page has any active access handlers. The caller
2533 * must fall back on using PGMR3PhysWriteExternal.
2534 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2535 *
2536 * @param pVM The VM handle.
2537 * @param GCPhys The guest physical address of the page that
2538 * should be mapped.
2539 * @param fFlags Flags reserved for future use, MBZ.
2540 * @param ppv Where to store the address corresponding to
2541 * GCPhys.
2542 * @param pLock Where to store the lock information that
2543 * pfnPhysReleasePageMappingLock needs.
2544 *
2545 * @remark Avoid calling this API from within critical sections (other than the
2546 * PGM one) because of the deadlock risk when we have to delegating the
2547 * task to an EMT.
2548 * @thread Any.
2549 */
2550 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2551
2552 /**
2553 * Requests the mapping of a guest page into ring-3, external threads.
2554 *
2555 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2556 * release it.
2557 *
2558 * @returns VBox status code.
2559 * @retval VINF_SUCCESS on success.
2560 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2561 * backing or if the page as an active ALL access handler. The caller
2562 * must fall back on using PGMPhysRead.
2563 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2564 *
2565 * @param pDevIns The device instance.
2566 * @param GCPhys The guest physical address of the page that
2567 * should be mapped.
2568 * @param fFlags Flags reserved for future use, MBZ.
2569 * @param ppv Where to store the address corresponding to
2570 * GCPhys.
2571 * @param pLock Where to store the lock information that
2572 * pfnPhysReleasePageMappingLock needs.
2573 *
2574 * @remark Avoid calling this API from within critical sections.
2575 * @thread Any.
2576 */
2577 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2578
2579 /**
2580 * Release the mapping of a guest page.
2581 *
2582 * This is the counter part of pfnPhysGCPhys2CCPtr and
2583 * pfnPhysGCPhys2CCPtrReadOnly.
2584 *
2585 * @param pDevIns The device instance.
2586 * @param pLock The lock structure initialized by the mapping
2587 * function.
2588 */
2589 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2590
2591 /**
2592 * Read guest physical memory by virtual address.
2593 *
2594 * @param pDevIns The device instance.
2595 * @param pvDst Where to put the read bits.
2596 * @param GCVirtSrc Guest virtual address to start reading from.
2597 * @param cb How many bytes to read.
2598 * @thread The emulation thread.
2599 */
2600 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2601
2602 /**
2603 * Write to guest physical memory by virtual address.
2604 *
2605 * @param pDevIns The device instance.
2606 * @param GCVirtDst Guest virtual address to write to.
2607 * @param pvSrc What to write.
2608 * @param cb How many bytes to write.
2609 * @thread The emulation thread.
2610 */
2611 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2612
2613 /**
2614 * Convert a guest virtual address to a guest physical address.
2615 *
2616 * @returns VBox status code.
2617 * @param pDevIns The device instance.
2618 * @param GCPtr Guest virtual address.
2619 * @param pGCPhys Where to store the GC physical address
2620 * corresponding to GCPtr.
2621 * @thread The emulation thread.
2622 * @remark Careful with page boundaries.
2623 */
2624 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2625
2626 /**
2627 * Allocate memory which is associated with current VM instance
2628 * and automatically freed on it's destruction.
2629 *
2630 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2631 * @param pDevIns The device instance.
2632 * @param cb Number of bytes to allocate.
2633 */
2634 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2635
2636 /**
2637 * Allocate memory which is associated with current VM instance
2638 * and automatically freed on it's destruction. The memory is ZEROed.
2639 *
2640 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2641 * @param pDevIns The device instance.
2642 * @param cb Number of bytes to allocate.
2643 */
2644 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2645
2646 /**
2647 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2648 *
2649 * @param pDevIns The device instance.
2650 * @param pv Pointer to the memory to free.
2651 */
2652 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2653
2654 /**
2655 * Gets the VM state.
2656 *
2657 * @returns VM state.
2658 * @param pDevIns The device instance.
2659 * @thread Any thread (just keep in mind that it's volatile info).
2660 */
2661 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2662
2663 /**
2664 * Checks if the VM was teleported and hasn't been fully resumed yet.
2665 *
2666 * @returns true / false.
2667 * @param pDevIns The device instance.
2668 * @thread Any thread.
2669 */
2670 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2671
2672 /**
2673 * Set the VM error message
2674 *
2675 * @returns rc.
2676 * @param pDevIns The device instance.
2677 * @param rc VBox status code.
2678 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2679 * @param pszFormat Error message format string.
2680 * @param ... Error message arguments.
2681 */
2682 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2683
2684 /**
2685 * Set the VM error message
2686 *
2687 * @returns rc.
2688 * @param pDevIns The device instance.
2689 * @param rc VBox status code.
2690 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2691 * @param pszFormat Error message format string.
2692 * @param va Error message arguments.
2693 */
2694 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2695
2696 /**
2697 * Set the VM runtime error message
2698 *
2699 * @returns VBox status code.
2700 * @param pDevIns The device instance.
2701 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2702 * @param pszErrorId Error ID string.
2703 * @param pszFormat Error message format string.
2704 * @param ... Error message arguments.
2705 */
2706 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2707
2708 /**
2709 * Set the VM runtime error message
2710 *
2711 * @returns VBox status code.
2712 * @param pDevIns The device instance.
2713 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2714 * @param pszErrorId Error ID string.
2715 * @param pszFormat Error message format string.
2716 * @param va Error message arguments.
2717 */
2718 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2719
2720 /**
2721 * Stops the VM and enters the debugger to look at the guest state.
2722 *
2723 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2724 * invoking this function directly.
2725 *
2726 * @returns VBox status code which must be passed up to the VMM.
2727 * @param pDevIns The device instance.
2728 * @param pszFile Filename of the assertion location.
2729 * @param iLine The linenumber of the assertion location.
2730 * @param pszFunction Function of the assertion location.
2731 * @param pszFormat Message. (optional)
2732 * @param args Message parameters.
2733 */
2734 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2735
2736 /**
2737 * Register a info handler with DBGF,
2738 *
2739 * @returns VBox status code.
2740 * @param pDevIns The device instance.
2741 * @param pszName The identifier of the info.
2742 * @param pszDesc The description of the info and any arguments
2743 * the handler may take.
2744 * @param pfnHandler The handler function to be called to display the
2745 * info.
2746 */
2747 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2748
2749 /**
2750 * Gets the trace buffer handle.
2751 *
2752 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2753 * really inteded for direct usage, thus no inline wrapper function.
2754 *
2755 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2756 * @param pDevIns The device instance.
2757 */
2758 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2759
2760 /**
2761 * Registers a statistics sample if statistics are enabled.
2762 *
2763 * @param pDevIns Device instance of the DMA.
2764 * @param pvSample Pointer to the sample.
2765 * @param enmType Sample type. This indicates what pvSample is
2766 * pointing at.
2767 * @param pszName Sample name. The name is on this form
2768 * "/<component>/<sample>". Further nesting is
2769 * possible.
2770 * @param enmUnit Sample unit.
2771 * @param pszDesc Sample description.
2772 */
2773 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2774
2775 /**
2776 * Same as pfnSTAMRegister except that the name is specified in a
2777 * RTStrPrintf like fashion.
2778 *
2779 * @returns VBox status.
2780 * @param pDevIns Device instance of the DMA.
2781 * @param pvSample Pointer to the sample.
2782 * @param enmType Sample type. This indicates what pvSample is
2783 * pointing at.
2784 * @param enmVisibility Visibility type specifying whether unused
2785 * statistics should be visible or not.
2786 * @param enmUnit Sample unit.
2787 * @param pszDesc Sample description.
2788 * @param pszName The sample name format string.
2789 * @param ... Arguments to the format string.
2790 */
2791 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2792 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2793
2794 /**
2795 * Same as pfnSTAMRegister except that the name is specified in a
2796 * RTStrPrintfV like fashion.
2797 *
2798 * @returns VBox status.
2799 * @param pDevIns Device instance of the DMA.
2800 * @param pvSample Pointer to the sample.
2801 * @param enmType Sample type. This indicates what pvSample is
2802 * pointing at.
2803 * @param enmVisibility Visibility type specifying whether unused
2804 * statistics should be visible or not.
2805 * @param enmUnit Sample unit.
2806 * @param pszDesc Sample description.
2807 * @param pszName The sample name format string.
2808 * @param args Arguments to the format string.
2809 */
2810 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2811 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2812
2813 /**
2814 * Registers the device with the default PCI bus.
2815 *
2816 * @returns VBox status code.
2817 * @param pDevIns The device instance.
2818 * @param pPciDev The PCI device structure.
2819 * Any PCI enabled device must keep this in it's instance data!
2820 * Fill in the PCI data config before registration, please.
2821 * @remark This is the simple interface, a Ex interface will be created if
2822 * more features are needed later.
2823 */
2824 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2825
2826 /**
2827 * Initialize MSI support in a PCI device.
2828 *
2829 * @returns VBox status code.
2830 * @param pDevIns The device instance.
2831 * @param pMsiReg MSI registartion structure.
2832 */
2833 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2834
2835 /**
2836 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2837 *
2838 * @returns VBox status code.
2839 * @param pDevIns The device instance.
2840 * @param iRegion The region number.
2841 * @param cbRegion Size of the region.
2842 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2843 * @param pfnCallback Callback for doing the mapping.
2844 */
2845 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2846
2847 /**
2848 * Register PCI configuration space read/write callbacks.
2849 *
2850 * @param pDevIns The device instance.
2851 * @param pPciDev The PCI device structure.
2852 * If NULL the default PCI device for this device instance is used.
2853 * @param pfnRead Pointer to the user defined PCI config read function.
2854 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2855 * PCI config read function. This way, user can decide when (and if)
2856 * to call default PCI config read function. Can be NULL.
2857 * @param pfnWrite Pointer to the user defined PCI config write function.
2858 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2859 * PCI config write function. This way, user can decide when (and if)
2860 * to call default PCI config write function. Can be NULL.
2861 * @thread EMT
2862 */
2863 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2864 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2865
2866 /**
2867 * Set the IRQ for a PCI device.
2868 *
2869 * @param pDevIns The device instance.
2870 * @param iIrq IRQ number to set.
2871 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2872 * @thread Any thread, but will involve the emulation thread.
2873 */
2874 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2875
2876 /**
2877 * Set the IRQ for a PCI device, but don't wait for EMT to process
2878 * the request when not called from EMT.
2879 *
2880 * @param pDevIns The device instance.
2881 * @param iIrq IRQ number to set.
2882 * @param iLevel IRQ level.
2883 * @thread Any thread, but will involve the emulation thread.
2884 */
2885 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2886
2887 /**
2888 * Set ISA IRQ for a device.
2889 *
2890 * @param pDevIns The device instance.
2891 * @param iIrq IRQ number to set.
2892 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2893 * @thread Any thread, but will involve the emulation thread.
2894 */
2895 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2896
2897 /**
2898 * Set the ISA IRQ for a device, but don't wait for EMT to process
2899 * the request when not called from EMT.
2900 *
2901 * @param pDevIns The device instance.
2902 * @param iIrq IRQ number to set.
2903 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2904 * @thread Any thread, but will involve the emulation thread.
2905 */
2906 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2907
2908 /**
2909 * Attaches a driver (chain) to the device.
2910 *
2911 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2912 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2913 *
2914 * @returns VBox status code.
2915 * @param pDevIns The device instance.
2916 * @param iLun The logical unit to attach.
2917 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2918 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2919 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2920 * for the live of the device instance.
2921 */
2922 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2923
2924 /**
2925 * Create a queue.
2926 *
2927 * @returns VBox status code.
2928 * @param pDevIns The device instance.
2929 * @param cbItem The size of a queue item.
2930 * @param cItems The number of items in the queue.
2931 * @param cMilliesInterval The number of milliseconds between polling the queue.
2932 * If 0 then the emulation thread will be notified whenever an item arrives.
2933 * @param pfnCallback The consumer function.
2934 * @param fRZEnabled Set if the queue should work in RC and R0.
2935 * @param pszName The queue base name. The instance number will be
2936 * appended automatically.
2937 * @param ppQueue Where to store the queue handle on success.
2938 * @thread The emulation thread.
2939 */
2940 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2941 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
2942
2943 /**
2944 * Initializes a PDM critical section.
2945 *
2946 * The PDM critical sections are derived from the IPRT critical sections, but
2947 * works in RC and R0 as well.
2948 *
2949 * @returns VBox status code.
2950 * @param pDevIns The device instance.
2951 * @param pCritSect Pointer to the critical section.
2952 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2953 * @param pszNameFmt Format string for naming the critical section.
2954 * For statistics and lock validation.
2955 * @param va Arguments for the format string.
2956 */
2957 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
2958 const char *pszNameFmt, va_list va));
2959
2960 /**
2961 * Gets the NOP critical section.
2962 *
2963 * @returns The ring-3 address of the NOP critical section.
2964 * @param pDevIns The device instance.
2965 */
2966 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
2967
2968 /**
2969 * Gets the NOP critical section.
2970 *
2971 * @returns The ring-0 address of the NOP critical section.
2972 * @param pDevIns The device instance.
2973 */
2974 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
2975
2976 /**
2977 * Gets the NOP critical section.
2978 *
2979 * @returns The raw-mode context address of the NOP critical section.
2980 * @param pDevIns The device instance.
2981 */
2982 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
2983
2984 /**
2985 * Changes the device level critical section from the automatically created
2986 * default to one desired by the device constructor.
2987 *
2988 * @returns VBox status code.
2989 * @param pDevIns The device instance.
2990 * @param pCritSect The critical section to use. NULL is not
2991 * valid, instead use the NOP critical
2992 * section.
2993 */
2994 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
2995
2996 /**
2997 * Creates a PDM thread.
2998 *
2999 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3000 * resuming, and destroying the thread as the VM state changes.
3001 *
3002 * @returns VBox status code.
3003 * @param pDevIns The device instance.
3004 * @param ppThread Where to store the thread 'handle'.
3005 * @param pvUser The user argument to the thread function.
3006 * @param pfnThread The thread function.
3007 * @param pfnWakeup The wakup callback. This is called on the EMT
3008 * thread when a state change is pending.
3009 * @param cbStack See RTThreadCreate.
3010 * @param enmType See RTThreadCreate.
3011 * @param pszName See RTThreadCreate.
3012 */
3013 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3014 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3015
3016 /**
3017 * Set up asynchronous handling of a suspend, reset or power off notification.
3018 *
3019 * This shall only be called when getting the notification. It must be called
3020 * for each one.
3021 *
3022 * @returns VBox status code.
3023 * @param pDevIns The device instance.
3024 * @param pfnAsyncNotify The callback.
3025 * @thread EMT(0)
3026 */
3027 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3028
3029 /**
3030 * Notify EMT(0) that the device has completed the asynchronous notification
3031 * handling.
3032 *
3033 * This can be called at any time, spurious calls will simply be ignored.
3034 *
3035 * @param pDevIns The device instance.
3036 * @thread Any
3037 */
3038 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3039
3040 /**
3041 * Register the RTC device.
3042 *
3043 * @returns VBox status code.
3044 * @param pDevIns The device instance.
3045 * @param pRtcReg Pointer to a RTC registration structure.
3046 * @param ppRtcHlp Where to store the pointer to the helper
3047 * functions.
3048 */
3049 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3050
3051 /**
3052 * Register the PCI Bus.
3053 *
3054 * @returns VBox status code.
3055 * @param pDevIns The device instance.
3056 * @param pPciBusReg Pointer to PCI bus registration structure.
3057 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3058 * helpers.
3059 */
3060 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3061
3062 /**
3063 * Register the PIC device.
3064 *
3065 * @returns VBox status code.
3066 * @param pDevIns The device instance.
3067 * @param pPicReg Pointer to a PIC registration structure.
3068 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3069 * helpers.
3070 */
3071 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3072
3073 /**
3074 * Register the APIC device.
3075 *
3076 * @returns VBox status code.
3077 * @param pDevIns The device instance.
3078 * @param pApicReg Pointer to a APIC registration structure.
3079 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3080 */
3081 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3082
3083 /**
3084 * Register the I/O APIC device.
3085 *
3086 * @returns VBox status code.
3087 * @param pDevIns The device instance.
3088 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3089 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3090 * helpers.
3091 */
3092 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3093
3094 /**
3095 * Register the HPET device.
3096 *
3097 * @returns VBox status code.
3098 * @param pDevIns The device instance.
3099 * @param pHpetReg Pointer to a HPET registration structure.
3100 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3101 * helpers.
3102 */
3103 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3104
3105 /**
3106 * Register a raw PCI device.
3107 *
3108 * @returns VBox status code.
3109 * @param pDevIns The device instance.
3110 * @param pHpetReg Pointer to a raw PCI registration structure.
3111 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3112 * device helpers.
3113 */
3114 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3115
3116 /**
3117 * Register the DMA device.
3118 *
3119 * @returns VBox status code.
3120 * @param pDevIns The device instance.
3121 * @param pDmacReg Pointer to a DMAC registration structure.
3122 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3123 */
3124 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3125
3126 /**
3127 * Register transfer function for DMA channel.
3128 *
3129 * @returns VBox status code.
3130 * @param pDevIns The device instance.
3131 * @param uChannel Channel number.
3132 * @param pfnTransferHandler Device specific transfer callback function.
3133 * @param pvUser User pointer to pass to the callback.
3134 * @thread EMT
3135 */
3136 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3137
3138 /**
3139 * Read memory.
3140 *
3141 * @returns VBox status code.
3142 * @param pDevIns The device instance.
3143 * @param uChannel Channel number.
3144 * @param pvBuffer Pointer to target buffer.
3145 * @param off DMA position.
3146 * @param cbBlock Block size.
3147 * @param pcbRead Where to store the number of bytes which was
3148 * read. optional.
3149 * @thread EMT
3150 */
3151 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3152
3153 /**
3154 * Write memory.
3155 *
3156 * @returns VBox status code.
3157 * @param pDevIns The device instance.
3158 * @param uChannel Channel number.
3159 * @param pvBuffer Memory to write.
3160 * @param off DMA position.
3161 * @param cbBlock Block size.
3162 * @param pcbWritten Where to store the number of bytes which was
3163 * written. optional.
3164 * @thread EMT
3165 */
3166 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3167
3168 /**
3169 * Set the DREQ line.
3170 *
3171 * @returns VBox status code.
3172 * @param pDevIns Device instance.
3173 * @param uChannel Channel number.
3174 * @param uLevel Level of the line.
3175 * @thread EMT
3176 */
3177 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3178
3179 /**
3180 * Get channel mode.
3181 *
3182 * @returns Channel mode. See specs.
3183 * @param pDevIns The device instance.
3184 * @param uChannel Channel number.
3185 * @thread EMT
3186 */
3187 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3188
3189 /**
3190 * Schedule DMA execution.
3191 *
3192 * @param pDevIns The device instance.
3193 * @thread Any thread.
3194 */
3195 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3196
3197 /**
3198 * Write CMOS value and update the checksum(s).
3199 *
3200 * @returns VBox status code.
3201 * @param pDevIns The device instance.
3202 * @param iReg The CMOS register index.
3203 * @param u8Value The CMOS register value.
3204 * @thread EMT
3205 */
3206 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3207
3208 /**
3209 * Read CMOS value.
3210 *
3211 * @returns VBox status code.
3212 * @param pDevIns The device instance.
3213 * @param iReg The CMOS register index.
3214 * @param pu8Value Where to store the CMOS register value.
3215 * @thread EMT
3216 */
3217 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3218
3219 /**
3220 * Assert that the current thread is the emulation thread.
3221 *
3222 * @returns True if correct.
3223 * @returns False if wrong.
3224 * @param pDevIns The device instance.
3225 * @param pszFile Filename of the assertion location.
3226 * @param iLine The linenumber of the assertion location.
3227 * @param pszFunction Function of the assertion location.
3228 */
3229 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3230
3231 /**
3232 * Assert that the current thread is NOT the emulation thread.
3233 *
3234 * @returns True if correct.
3235 * @returns False if wrong.
3236 * @param pDevIns The device instance.
3237 * @param pszFile Filename of the assertion location.
3238 * @param iLine The linenumber of the assertion location.
3239 * @param pszFunction Function of the assertion location.
3240 */
3241 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3242
3243 /**
3244 * Resolves the symbol for a raw-mode context interface.
3245 *
3246 * @returns VBox status code.
3247 * @param pDevIns The device instance.
3248 * @param pvInterface The interface structure.
3249 * @param cbInterface The size of the interface structure.
3250 * @param pszSymPrefix What to prefix the symbols in the list with
3251 * before resolving them. This must start with
3252 * 'dev' and contain the driver name.
3253 * @param pszSymList List of symbols corresponding to the interface.
3254 * There is generally a there is generally a define
3255 * holding this list associated with the interface
3256 * definition (INTERFACE_SYM_LIST). For more
3257 * details see PDMR3LdrGetInterfaceSymbols.
3258 * @thread EMT
3259 */
3260 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3261 const char *pszSymPrefix, const char *pszSymList));
3262
3263 /**
3264 * Resolves the symbol for a ring-0 context interface.
3265 *
3266 * @returns VBox status code.
3267 * @param pDevIns The device instance.
3268 * @param pvInterface The interface structure.
3269 * @param cbInterface The size of the interface structure.
3270 * @param pszSymPrefix What to prefix the symbols in the list with
3271 * before resolving them. This must start with
3272 * 'dev' and contain the driver name.
3273 * @param pszSymList List of symbols corresponding to the interface.
3274 * There is generally a there is generally a define
3275 * holding this list associated with the interface
3276 * definition (INTERFACE_SYM_LIST). For more
3277 * details see PDMR3LdrGetInterfaceSymbols.
3278 * @thread EMT
3279 */
3280 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3281 const char *pszSymPrefix, const char *pszSymList));
3282
3283 /**
3284 * Call the ring-0 request handler routine of the device.
3285 *
3286 * For this to work, the device must be ring-0 enabled and export a request
3287 * handler function. The name of the function must be the device name in
3288 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3289 * 'ReqHandler'. The device name will be captialized. It shall take the
3290 * exact same arguments as this function and be declared using
3291 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3292 *
3293 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3294 * or two as the handler address will be resolved on each invocation. This
3295 * is the reason for the EMT only restriction as well.
3296 *
3297 * @returns VBox status code.
3298 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3299 * handler function.
3300 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3301 *
3302 * @param pDevIns The device instance.
3303 * @param uOperation The operation to perform.
3304 * @param u64Arg 64-bit integer argument.
3305 * @thread EMT
3306 */
3307 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3308
3309 /** Space reserved for future members.
3310 * @{ */
3311 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3312 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3313 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3314 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3315 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3316 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3317 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3318 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3319 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3320 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3321 /** @} */
3322
3323
3324 /** API available to trusted devices only.
3325 *
3326 * These APIs are providing unrestricted access to the guest and the VM,
3327 * or they are interacting intimately with PDM.
3328 *
3329 * @{
3330 */
3331 /**
3332 * Gets the VM handle. Restricted API.
3333 *
3334 * @returns VM Handle.
3335 * @param pDevIns The device instance.
3336 */
3337 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3338
3339 /**
3340 * Gets the VMCPU handle. Restricted API.
3341 *
3342 * @returns VMCPU Handle.
3343 * @param pDevIns The device instance.
3344 */
3345 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3346
3347 /**
3348 * Registers the VMM device heap
3349 *
3350 * @returns VBox status code.
3351 * @param pDevIns The device instance.
3352 * @param GCPhys The physical address.
3353 * @param pvHeap Ring 3 heap pointer.
3354 * @param cbSize Size of the heap.
3355 * @thread EMT.
3356 */
3357 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3358
3359 /**
3360 * Unregisters the VMM device heap
3361 *
3362 * @returns VBox status code.
3363 * @param pDevIns The device instance.
3364 * @param GCPhys The physical address.
3365 * @thread EMT.
3366 */
3367 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3368
3369 /**
3370 * Resets the VM.
3371 *
3372 * @returns The appropriate VBox status code to pass around on reset.
3373 * @param pDevIns The device instance.
3374 * @thread The emulation thread.
3375 */
3376 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3377
3378 /**
3379 * Suspends the VM.
3380 *
3381 * @returns The appropriate VBox status code to pass around on suspend.
3382 * @param pDevIns The device instance.
3383 * @thread The emulation thread.
3384 */
3385 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3386
3387 /**
3388 * Suspends, saves and powers off the VM.
3389 *
3390 * @returns The appropriate VBox status code to pass around.
3391 * @param pDevIns The device instance.
3392 * @thread An emulation thread.
3393 */
3394 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3395
3396 /**
3397 * Power off the VM.
3398 *
3399 * @returns The appropriate VBox status code to pass around on power off.
3400 * @param pDevIns The device instance.
3401 * @thread The emulation thread.
3402 */
3403 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3404
3405 /**
3406 * Checks if the Gate A20 is enabled or not.
3407 *
3408 * @returns true if A20 is enabled.
3409 * @returns false if A20 is disabled.
3410 * @param pDevIns The device instance.
3411 * @thread The emulation thread.
3412 */
3413 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3414
3415 /**
3416 * Enables or disables the Gate A20.
3417 *
3418 * @param pDevIns The device instance.
3419 * @param fEnable Set this flag to enable the Gate A20; clear it
3420 * to disable.
3421 * @thread The emulation thread.
3422 */
3423 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3424
3425 /**
3426 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3427 * thread.
3428 *
3429 * @param pDevIns The device instance.
3430 * @param iLeaf The CPUID leaf to get.
3431 * @param pEax Where to store the EAX value.
3432 * @param pEbx Where to store the EBX value.
3433 * @param pEcx Where to store the ECX value.
3434 * @param pEdx Where to store the EDX value.
3435 * @thread EMT.
3436 */
3437 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3438
3439 /**
3440 * Get the current virtual clock time in a VM. The clock frequency must be
3441 * queried separately.
3442 *
3443 * @returns Current clock time.
3444 * @param pDevIns The device instance.
3445 */
3446 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3447
3448 /**
3449 * Get the frequency of the virtual clock.
3450 *
3451 * @returns The clock frequency (not variable at run-time).
3452 * @param pDevIns The device instance.
3453 */
3454 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3455
3456 /**
3457 * Get the current virtual clock time in a VM, in nanoseconds.
3458 *
3459 * @returns Current clock time (in ns).
3460 * @param pDevIns The device instance.
3461 */
3462 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3463
3464 /** @} */
3465
3466 /** Just a safety precaution. (PDM_DEVHLP_VERSION) */
3467 uint32_t u32TheEnd;
3468} PDMDEVHLPR3;
3469#endif /* !IN_RING3 */
3470/** Pointer to the R3 PDM Device API. */
3471typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3472/** Pointer to the R3 PDM Device API, const variant. */
3473typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3474
3475/** Current PDMDEVHLPR3 version number. */
3476#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 8, 0)
3477
3478
3479/**
3480 * PDM Device API - RC Variant.
3481 */
3482typedef struct PDMDEVHLPRC
3483{
3484 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3485 uint32_t u32Version;
3486
3487 /**
3488 * Set the IRQ for a PCI device.
3489 *
3490 * @param pDevIns Device instance.
3491 * @param iIrq IRQ number to set.
3492 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3493 * @thread Any thread, but will involve the emulation thread.
3494 */
3495 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3496
3497 /**
3498 * Set ISA IRQ for a device.
3499 *
3500 * @param pDevIns Device instance.
3501 * @param iIrq IRQ number to set.
3502 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3503 * @thread Any thread, but will involve the emulation thread.
3504 */
3505 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3506
3507 /**
3508 * Read physical memory.
3509 *
3510 * @returns VINF_SUCCESS (for now).
3511 * @param pDevIns Device instance.
3512 * @param GCPhys Physical address start reading from.
3513 * @param pvBuf Where to put the read bits.
3514 * @param cbRead How many bytes to read.
3515 */
3516 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3517
3518 /**
3519 * Write to physical memory.
3520 *
3521 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3522 * @param pDevIns Device instance.
3523 * @param GCPhys Physical address to write to.
3524 * @param pvBuf What to write.
3525 * @param cbWrite How many bytes to write.
3526 */
3527 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3528
3529 /**
3530 * Checks if the Gate A20 is enabled or not.
3531 *
3532 * @returns true if A20 is enabled.
3533 * @returns false if A20 is disabled.
3534 * @param pDevIns Device instance.
3535 * @thread The emulation thread.
3536 */
3537 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3538
3539 /**
3540 * Gets the VM state.
3541 *
3542 * @returns VM state.
3543 * @param pDevIns The device instance.
3544 * @thread Any thread (just keep in mind that it's volatile info).
3545 */
3546 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3547
3548 /**
3549 * Set the VM error message
3550 *
3551 * @returns rc.
3552 * @param pDrvIns Driver instance.
3553 * @param rc VBox status code.
3554 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3555 * @param pszFormat Error message format string.
3556 * @param ... Error message arguments.
3557 */
3558 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3559
3560 /**
3561 * Set the VM error message
3562 *
3563 * @returns rc.
3564 * @param pDrvIns Driver instance.
3565 * @param rc VBox status code.
3566 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3567 * @param pszFormat Error message format string.
3568 * @param va Error message arguments.
3569 */
3570 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3571
3572 /**
3573 * Set the VM runtime error message
3574 *
3575 * @returns VBox status code.
3576 * @param pDevIns Device instance.
3577 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3578 * @param pszErrorId Error ID string.
3579 * @param pszFormat Error message format string.
3580 * @param ... Error message arguments.
3581 */
3582 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3583
3584 /**
3585 * Set the VM runtime error message
3586 *
3587 * @returns VBox status code.
3588 * @param pDevIns Device instance.
3589 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3590 * @param pszErrorId Error ID string.
3591 * @param pszFormat Error message format string.
3592 * @param va Error message arguments.
3593 */
3594 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3595
3596 /**
3597 * Set parameters for pending MMIO patch operation
3598 *
3599 * @returns VBox status code.
3600 * @param pDevIns Device instance.
3601 * @param GCPhys MMIO physical address
3602 * @param pCachedData GC pointer to cached data
3603 */
3604 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3605
3606 /**
3607 * Gets the VM handle. Restricted API.
3608 *
3609 * @returns VM Handle.
3610 * @param pDevIns Device instance.
3611 */
3612 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3613
3614 /**
3615 * Gets the VMCPU handle. Restricted API.
3616 *
3617 * @returns VMCPU Handle.
3618 * @param pDevIns The device instance.
3619 */
3620 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3621
3622 /**
3623 * Get the current virtual clock time in a VM. The clock frequency must be
3624 * queried separately.
3625 *
3626 * @returns Current clock time.
3627 * @param pDevIns The device instance.
3628 */
3629 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3630
3631 /**
3632 * Get the frequency of the virtual clock.
3633 *
3634 * @returns The clock frequency (not variable at run-time).
3635 * @param pDevIns The device instance.
3636 */
3637 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3638
3639 /**
3640 * Get the current virtual clock time in a VM, in nanoseconds.
3641 *
3642 * @returns Current clock time (in ns).
3643 * @param pDevIns The device instance.
3644 */
3645 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3646
3647 /**
3648 * Gets the trace buffer handle.
3649 *
3650 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3651 * really inteded for direct usage, thus no inline wrapper function.
3652 *
3653 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3654 * @param pDevIns The device instance.
3655 */
3656 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3657
3658 /** Just a safety precaution. */
3659 uint32_t u32TheEnd;
3660} PDMDEVHLPRC;
3661/** Pointer PDM Device RC API. */
3662typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3663/** Pointer PDM Device RC API. */
3664typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3665
3666/** Current PDMDEVHLP version number. */
3667#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 2, 0)
3668
3669
3670/**
3671 * PDM Device API - R0 Variant.
3672 */
3673typedef struct PDMDEVHLPR0
3674{
3675 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3676 uint32_t u32Version;
3677
3678 /**
3679 * Set the IRQ for a PCI device.
3680 *
3681 * @param pDevIns Device instance.
3682 * @param iIrq IRQ number to set.
3683 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3684 * @thread Any thread, but will involve the emulation thread.
3685 */
3686 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3687
3688 /**
3689 * Set ISA IRQ for a device.
3690 *
3691 * @param pDevIns Device instance.
3692 * @param iIrq IRQ number to set.
3693 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3694 * @thread Any thread, but will involve the emulation thread.
3695 */
3696 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3697
3698 /**
3699 * Read physical memory.
3700 *
3701 * @returns VINF_SUCCESS (for now).
3702 * @param pDevIns Device instance.
3703 * @param GCPhys Physical address start reading from.
3704 * @param pvBuf Where to put the read bits.
3705 * @param cbRead How many bytes to read.
3706 */
3707 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3708
3709 /**
3710 * Write to physical memory.
3711 *
3712 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3713 * @param pDevIns Device instance.
3714 * @param GCPhys Physical address to write to.
3715 * @param pvBuf What to write.
3716 * @param cbWrite How many bytes to write.
3717 */
3718 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3719
3720 /**
3721 * Checks if the Gate A20 is enabled or not.
3722 *
3723 * @returns true if A20 is enabled.
3724 * @returns false if A20 is disabled.
3725 * @param pDevIns Device instance.
3726 * @thread The emulation thread.
3727 */
3728 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3729
3730 /**
3731 * Gets the VM state.
3732 *
3733 * @returns VM state.
3734 * @param pDevIns The device instance.
3735 * @thread Any thread (just keep in mind that it's volatile info).
3736 */
3737 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3738
3739 /**
3740 * Set the VM error message
3741 *
3742 * @returns rc.
3743 * @param pDrvIns Driver instance.
3744 * @param rc VBox status code.
3745 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3746 * @param pszFormat Error message format string.
3747 * @param ... Error message arguments.
3748 */
3749 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3750
3751 /**
3752 * Set the VM error message
3753 *
3754 * @returns rc.
3755 * @param pDrvIns Driver instance.
3756 * @param rc VBox status code.
3757 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3758 * @param pszFormat Error message format string.
3759 * @param va Error message arguments.
3760 */
3761 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3762
3763 /**
3764 * Set the VM runtime error message
3765 *
3766 * @returns VBox status code.
3767 * @param pDevIns Device instance.
3768 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3769 * @param pszErrorId Error ID string.
3770 * @param pszFormat Error message format string.
3771 * @param ... Error message arguments.
3772 */
3773 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3774
3775 /**
3776 * Set the VM runtime error message
3777 *
3778 * @returns VBox status code.
3779 * @param pDevIns Device instance.
3780 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3781 * @param pszErrorId Error ID string.
3782 * @param pszFormat Error message format string.
3783 * @param va Error message arguments.
3784 */
3785 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3786
3787 /**
3788 * Set parameters for pending MMIO patch operation
3789 *
3790 * @returns rc.
3791 * @param pDevIns Device instance.
3792 * @param GCPhys MMIO physical address
3793 * @param pCachedData GC pointer to cached data
3794 */
3795 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3796
3797 /**
3798 * Gets the VM handle. Restricted API.
3799 *
3800 * @returns VM Handle.
3801 * @param pDevIns Device instance.
3802 */
3803 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3804
3805 /**
3806 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3807 *
3808 * @returns true = yes, false = no
3809 * @param pDevIns Device instance.
3810 */
3811 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3812
3813 /**
3814 * Gets the VMCPU handle. Restricted API.
3815 *
3816 * @returns VMCPU Handle.
3817 * @param pDevIns The device instance.
3818 */
3819 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3820
3821 /**
3822 * Get the current virtual clock time in a VM. The clock frequency must be
3823 * queried separately.
3824 *
3825 * @returns Current clock time.
3826 * @param pDevIns The device instance.
3827 */
3828 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3829
3830 /**
3831 * Get the frequency of the virtual clock.
3832 *
3833 * @returns The clock frequency (not variable at run-time).
3834 * @param pDevIns The device instance.
3835 */
3836 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3837
3838 /**
3839 * Get the current virtual clock time in a VM, in nanoseconds.
3840 *
3841 * @returns Current clock time (in ns).
3842 * @param pDevIns The device instance.
3843 */
3844 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3845
3846 /**
3847 * Gets the trace buffer handle.
3848 *
3849 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3850 * really inteded for direct usage, thus no inline wrapper function.
3851 *
3852 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3853 * @param pDevIns The device instance.
3854 */
3855 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3856
3857 /** Just a safety precaution. */
3858 uint32_t u32TheEnd;
3859} PDMDEVHLPR0;
3860/** Pointer PDM Device R0 API. */
3861typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3862/** Pointer PDM Device GC API. */
3863typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3864
3865/** Current PDMDEVHLP version number. */
3866#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 2, 0)
3867
3868
3869
3870/**
3871 * PDM Device Instance.
3872 */
3873typedef struct PDMDEVINS
3874{
3875 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3876 uint32_t u32Version;
3877 /** Device instance number. */
3878 uint32_t iInstance;
3879
3880 /** Pointer the GC PDM Device API. */
3881 PCPDMDEVHLPRC pHlpRC;
3882 /** Pointer to device instance data. */
3883 RTRCPTR pvInstanceDataRC;
3884 /** The critical section for the device, see pCritSectXR3. */
3885 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
3886 /** Alignment padding. */
3887 RTRCPTR pAlignmentRC;
3888
3889 /** Pointer the R0 PDM Device API. */
3890 PCPDMDEVHLPR0 pHlpR0;
3891 /** Pointer to device instance data (R0). */
3892 RTR0PTR pvInstanceDataR0;
3893 /** The critical section for the device, see pCritSectXR3. */
3894 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
3895
3896 /** Pointer the HC PDM Device API. */
3897 PCPDMDEVHLPR3 pHlpR3;
3898 /** Pointer to device instance data. */
3899 RTR3PTR pvInstanceDataR3;
3900 /** The critical section for the device.
3901 *
3902 * TM and IOM will enter this critical section before calling into the device
3903 * code. PDM will when doing power on, power off, reset, suspend and resume
3904 * notifications. SSM will currently not, but this will be changed later on.
3905 *
3906 * The device gets a critical section automatically assigned to it before
3907 * the constructor is called. If the constructor wishes to use a different
3908 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
3909 * very early on.
3910 */
3911 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
3912
3913 /** Pointer to device registration structure. */
3914 R3PTRTYPE(PCPDMDEVREG) pReg;
3915 /** Configuration handle. */
3916 R3PTRTYPE(PCFGMNODE) pCfg;
3917
3918 /** The base interface of the device.
3919 *
3920 * The device constructor initializes this if it has any
3921 * device level interfaces to export. To obtain this interface
3922 * call PDMR3QueryDevice(). */
3923 PDMIBASE IBase;
3924 /** Align the internal data more naturally. */
3925 RTR3PTR R3PtrPadding;
3926
3927 /** Internal data. */
3928 union
3929 {
3930#ifdef PDMDEVINSINT_DECLARED
3931 PDMDEVINSINT s;
3932#endif
3933 uint8_t padding[HC_ARCH_BITS == 32 ? 64 + 0 : 112 + 0x28];
3934 } Internal;
3935
3936 /** Device instance data. The size of this area is defined
3937 * in the PDMDEVREG::cbInstanceData field. */
3938 char achInstanceData[8];
3939} PDMDEVINS;
3940
3941/** Current PDMDEVINS version number. */
3942#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 2, 0)
3943
3944/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
3945#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
3946
3947/**
3948 * Checks the structure versions of the device instance and device helpers,
3949 * returning if they are incompatible.
3950 *
3951 * This is for use in the constructor.
3952 *
3953 * @param pDevIns The device instance pointer.
3954 */
3955#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
3956 do \
3957 { \
3958 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3959 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3960 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
3961 VERR_PDM_DEVINS_VERSION_MISMATCH); \
3962 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3963 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
3964 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
3965 } while (0)
3966
3967/**
3968 * Quietly checks the structure versions of the device instance and device
3969 * helpers, returning if they are incompatible.
3970 *
3971 * This is for use in the destructor.
3972 *
3973 * @param pDevIns The device instance pointer.
3974 */
3975#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
3976 do \
3977 { \
3978 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
3979 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
3980 return VERR_PDM_DEVINS_VERSION_MISMATCH; \
3981 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
3982 return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
3983 } while (0)
3984
3985/**
3986 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
3987 * constructor - returns on failure.
3988 *
3989 * This should be invoked after having initialized the instance data
3990 * sufficiently for the correct operation of the destructor. The destructor is
3991 * always called!
3992 *
3993 * @param pDevIns Pointer to the PDM device instance.
3994 * @param pszValidValues Patterns describing the valid value names. See
3995 * RTStrSimplePatternMultiMatch for details on the
3996 * pattern syntax.
3997 * @param pszValidNodes Patterns describing the valid node (key) names.
3998 * Pass empty string if no valid nodes.
3999 */
4000#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4001 do \
4002 { \
4003 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4004 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4005 if (RT_FAILURE(rcValCfg)) \
4006 return rcValCfg; \
4007 } while (0)
4008
4009/** @def PDMDEV_ASSERT_EMT
4010 * Assert that the current thread is the emulation thread.
4011 */
4012#ifdef VBOX_STRICT
4013# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4014#else
4015# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4016#endif
4017
4018/** @def PDMDEV_ASSERT_OTHER
4019 * Assert that the current thread is NOT the emulation thread.
4020 */
4021#ifdef VBOX_STRICT
4022# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4023#else
4024# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4025#endif
4026
4027/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4028 * Assert that the current thread is owner of the VM lock.
4029 */
4030#ifdef VBOX_STRICT
4031# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4032#else
4033# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4034#endif
4035
4036/** @def PDMDEV_SET_ERROR
4037 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4038 */
4039#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4040 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4041
4042/** @def PDMDEV_SET_RUNTIME_ERROR
4043 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4044 */
4045#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4046 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4047
4048/** @def PDMDEVINS_2_RCPTR
4049 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4050 */
4051#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4052
4053/** @def PDMDEVINS_2_R3PTR
4054 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4055 */
4056#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4057
4058/** @def PDMDEVINS_2_R0PTR
4059 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4060 */
4061#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4062
4063
4064#ifdef IN_RING3
4065
4066/**
4067 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4068 */
4069DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser,
4070 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4071 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4072{
4073 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4074}
4075
4076/**
4077 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4078 */
4079DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
4080 const char *pszOut, const char *pszIn, const char *pszOutStr,
4081 const char *pszInStr, const char *pszDesc)
4082{
4083 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4084}
4085
4086/**
4087 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4088 */
4089DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
4090 const char *pszOut, const char *pszIn, const char *pszOutStr,
4091 const char *pszInStr, const char *pszDesc)
4092{
4093 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4094}
4095
4096/**
4097 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4098 */
4099DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
4100{
4101 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4102}
4103
4104/**
4105 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4106 */
4107DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
4108 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4109{
4110 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4111 fFlags, pszDesc);
4112}
4113
4114/**
4115 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4116 */
4117DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
4118 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4119 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4120{
4121 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4122 fFlags, pszDesc);
4123}
4124
4125/**
4126 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4127 */
4128DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
4129 const char *pszWrite, const char *pszRead, const char *pszFill)
4130{
4131 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4132}
4133
4134/**
4135 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4136 */
4137DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
4138 const char *pszWrite, const char *pszRead, const char *pszFill)
4139{
4140 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4141}
4142
4143/**
4144 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4145 */
4146DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
4147{
4148 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4149}
4150
4151/**
4152 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4153 */
4154DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4155{
4156 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4157}
4158
4159/**
4160 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4161 */
4162DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4163{
4164 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4165}
4166
4167/**
4168 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4169 */
4170DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4171{
4172 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4173}
4174
4175/**
4176 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4177 */
4178DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4179{
4180 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4181}
4182
4183/**
4184 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4185 */
4186DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4187 const char *pszDesc, PRTRCPTR pRCPtr)
4188{
4189 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4190}
4191
4192/**
4193 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4194 */
4195DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4196 const char *pszDesc, PRTR0PTR pR0Ptr)
4197{
4198 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4199}
4200
4201/**
4202 * @copydoc PDMDEVHLPR3::pfnROMRegister
4203 */
4204DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange,
4205 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4206{
4207 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4208}
4209
4210/**
4211 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4212 */
4213DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
4214{
4215 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4216}
4217
4218/**
4219 * Register a save state data unit.
4220 *
4221 * @returns VBox status.
4222 * @param pDevIns The device instance.
4223 * @param uVersion Data layout version number.
4224 * @param cbGuess The approximate amount of data in the unit.
4225 * Only for progress indicators.
4226 * @param pfnSaveExec Execute save callback, optional.
4227 * @param pfnLoadExec Execute load callback, optional.
4228 */
4229DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4230 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4231{
4232 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4233 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4234 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4235 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4236}
4237
4238/**
4239 * Register a save state data unit with a live save callback as well.
4240 *
4241 * @returns VBox status.
4242 * @param pDevIns The device instance.
4243 * @param uVersion Data layout version number.
4244 * @param cbGuess The approximate amount of data in the unit.
4245 * Only for progress indicators.
4246 * @param pfnLiveExec Execute live callback, optional.
4247 * @param pfnSaveExec Execute save callback, optional.
4248 * @param pfnLoadExec Execute load callback, optional.
4249 */
4250DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4251 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4252{
4253 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4254 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4255 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4256 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4257}
4258
4259/**
4260 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4261 */
4262DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4263 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4264 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4265 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4266{
4267 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4268 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4269 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4270 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4271}
4272
4273/**
4274 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4275 */
4276DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4277 const char *pszDesc, PPTMTIMERR3 ppTimer)
4278{
4279 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4280}
4281
4282/**
4283 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4284 */
4285DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4286{
4287 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4288}
4289
4290#endif /* IN_RING3 */
4291
4292/**
4293 * @copydoc PDMDEVHLPR3::pfnPhysRead
4294 */
4295DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4296{
4297 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4298}
4299
4300/**
4301 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4302 */
4303DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4304{
4305 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4306}
4307
4308#ifdef IN_RING3
4309
4310/**
4311 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4312 */
4313DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4314{
4315 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4316}
4317
4318/**
4319 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4320 */
4321DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4322{
4323 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4324}
4325
4326/**
4327 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4328 */
4329DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4330{
4331 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4332}
4333
4334/**
4335 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4336 */
4337DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4338{
4339 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4340}
4341
4342/**
4343 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4344 */
4345DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4346{
4347 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4348}
4349
4350/**
4351 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4352 */
4353DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4354{
4355 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4356}
4357
4358/**
4359 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4360 */
4361DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4362{
4363 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4364}
4365
4366/**
4367 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4368 */
4369DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4370{
4371 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4372}
4373
4374/**
4375 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4376 */
4377DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4378{
4379 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4380}
4381#endif /* IN_RING3 */
4382
4383/**
4384 * @copydoc PDMDEVHLPR3::pfnVMState
4385 */
4386DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4387{
4388 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4389}
4390
4391#ifdef IN_RING3
4392/**
4393 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4394 */
4395DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4396{
4397 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4398}
4399#endif /* IN_RING3 */
4400
4401/**
4402 * @copydoc PDMDEVHLPR3::pfnVMSetError
4403 */
4404DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4405{
4406 va_list va;
4407 va_start(va, pszFormat);
4408 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4409 va_end(va);
4410 return rc;
4411}
4412
4413/**
4414 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4415 */
4416DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4417{
4418 va_list va;
4419 int rc;
4420 va_start(va, pszFormat);
4421 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4422 va_end(va);
4423 return rc;
4424}
4425
4426/**
4427 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4428 *
4429 * @returns VBox status code which must be passed up to the VMM. This will be
4430 * VINF_SUCCESS in non-strict builds.
4431 * @param pDevIns The device instance.
4432 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4433 * @param pszFormat Message. (optional)
4434 * @param ... Message parameters.
4435 */
4436DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4437{
4438#ifdef VBOX_STRICT
4439# ifdef IN_RING3
4440 int rc;
4441 va_list args;
4442 va_start(args, pszFormat);
4443 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4444 va_end(args);
4445 return rc;
4446# else
4447 NOREF(pDevIns);
4448 NOREF(pszFile);
4449 NOREF(iLine);
4450 NOREF(pszFunction);
4451 NOREF(pszFormat);
4452 return VINF_EM_DBG_STOP;
4453# endif
4454#else
4455 NOREF(pDevIns);
4456 NOREF(pszFile);
4457 NOREF(iLine);
4458 NOREF(pszFunction);
4459 NOREF(pszFormat);
4460 return VINF_SUCCESS;
4461#endif
4462}
4463
4464#ifdef IN_RING3
4465
4466/**
4467 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4468 */
4469DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4470{
4471 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4472}
4473
4474/**
4475 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4476 */
4477DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4478{
4479 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4480}
4481
4482/**
4483 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4484 */
4485DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4486 const char *pszDesc, const char *pszName, ...)
4487{
4488 va_list va;
4489 va_start(va, pszName);
4490 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4491 va_end(va);
4492}
4493
4494/**
4495 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4496 */
4497DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4498{
4499 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4500}
4501
4502/**
4503 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4504 */
4505DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4506{
4507 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4508}
4509
4510/**
4511 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4512 */
4513DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4514{
4515 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4516}
4517
4518
4519/**
4520 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4521 */
4522DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4523 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4524{
4525 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4526}
4527
4528#endif /* IN_RING3 */
4529
4530/**
4531 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4532 */
4533DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4534{
4535 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4536}
4537
4538/**
4539 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4540 */
4541DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4542{
4543 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4544}
4545
4546/**
4547 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4548 */
4549DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4550{
4551 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4552}
4553
4554/**
4555 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4556 */
4557DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4558{
4559 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4560}
4561
4562#ifdef IN_RING3
4563
4564/**
4565 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4566 */
4567DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4568{
4569 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4570}
4571
4572/**
4573 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4574 */
4575DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
4576 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4577{
4578 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
4579}
4580
4581/**
4582 * Initializes a PDM critical section.
4583 *
4584 * The PDM critical sections are derived from the IPRT critical sections, but
4585 * works in RC and R0 as well.
4586 *
4587 * @returns VBox status code.
4588 * @param pDevIns The device instance.
4589 * @param pCritSect Pointer to the critical section.
4590 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4591 * @param pszNameFmt Format string for naming the critical section.
4592 * For statistics and lock validation.
4593 * @param ... Arguments for the format string.
4594 */
4595DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4596{
4597 int rc;
4598 va_list va;
4599 va_start(va, pszNameFmt);
4600 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4601 va_end(va);
4602 return rc;
4603}
4604
4605/**
4606 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4607 */
4608DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4609{
4610 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4611}
4612
4613/**
4614 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
4615 */
4616DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
4617{
4618 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
4619}
4620
4621/**
4622 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
4623 */
4624DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
4625{
4626 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
4627}
4628
4629/**
4630 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
4631 */
4632DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
4633{
4634 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
4635}
4636
4637/**
4638 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4639 */
4640DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4641 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4642{
4643 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4644}
4645
4646/**
4647 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4648 */
4649DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4650{
4651 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4652}
4653
4654/**
4655 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4656 */
4657DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4658{
4659 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4660}
4661
4662/**
4663 * @copydoc PDMDEVHLPR3::pfnA20Set
4664 */
4665DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4666{
4667 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4668}
4669
4670/**
4671 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4672 */
4673DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4674{
4675 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4676}
4677
4678/**
4679 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4680 */
4681DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4682{
4683 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4684}
4685
4686/**
4687 * @copydoc PDMDEVHLPR3::pfnPICRegister
4688 */
4689DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4690{
4691 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4692}
4693
4694/**
4695 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4696 */
4697DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4698{
4699 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4700}
4701
4702/**
4703 * @copydoc PDMDEVHLPR3::pfn
4704 */
4705DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4706{
4707 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4708}
4709
4710/**
4711 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4712 */
4713DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4714{
4715 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4716}
4717
4718/**
4719 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
4720 */
4721DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
4722{
4723 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
4724}
4725
4726/**
4727 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4728 */
4729DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4730{
4731 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4732}
4733
4734/**
4735 * @copydoc PDMDEVHLPR3::pfnDMARegister
4736 */
4737DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4738{
4739 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4740}
4741
4742/**
4743 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4744 */
4745DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4746{
4747 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4748}
4749
4750/**
4751 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4752 */
4753DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4754{
4755 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4756}
4757
4758/**
4759 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4760 */
4761DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4762{
4763 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4764}
4765
4766/**
4767 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4768 */
4769DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4770{
4771 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4772}
4773
4774/**
4775 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4776 */
4777DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4778{
4779 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4780}
4781
4782/**
4783 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4784 */
4785DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4786{
4787 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4788}
4789
4790/**
4791 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4792 */
4793DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4794{
4795 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4796}
4797
4798/**
4799 * @copydoc PDMDEVHLP::pfnCallR0
4800 */
4801DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
4802{
4803 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
4804}
4805
4806#endif /* IN_RING3 */
4807
4808/**
4809 * @copydoc PDMDEVHLPR3::pfnGetVM
4810 */
4811DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
4812{
4813 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
4814}
4815
4816/**
4817 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
4818 */
4819DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
4820{
4821 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
4822}
4823
4824/**
4825 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
4826 */
4827DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
4828{
4829 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
4830}
4831
4832/**
4833 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
4834 */
4835DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
4836{
4837 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
4838}
4839
4840/**
4841 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
4842 */
4843DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
4844{
4845 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
4846}
4847
4848#ifdef IN_RING3
4849
4850/**
4851 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
4852 */
4853DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
4854{
4855 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
4856}
4857
4858/**
4859 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
4860 */
4861DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
4862{
4863 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
4864}
4865
4866/**
4867 * @copydoc PDMDEVHLPR3::pfnVMReset
4868 */
4869DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
4870{
4871 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
4872}
4873
4874/**
4875 * @copydoc PDMDEVHLPR3::pfnVMSuspend
4876 */
4877DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
4878{
4879 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
4880}
4881
4882/**
4883 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
4884 */
4885DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
4886{
4887 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
4888}
4889
4890/**
4891 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
4892 */
4893DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
4894{
4895 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
4896}
4897
4898#endif /* IN_RING3 */
4899
4900/**
4901 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
4902 */
4903DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
4904{
4905 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
4906}
4907
4908#ifdef IN_RING3
4909
4910/**
4911 * @copydoc PDMDEVHLPR3::pfnGetCpuId
4912 */
4913DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
4914{
4915 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
4916}
4917
4918#endif /* IN_RING3 */
4919#ifdef IN_RING0
4920
4921/**
4922 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
4923 */
4924DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
4925{
4926 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
4927}
4928
4929#endif /* IN_RING0 */
4930
4931
4932
4933
4934/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
4935typedef struct PDMDEVREGCB *PPDMDEVREGCB;
4936
4937/**
4938 * Callbacks for VBoxDeviceRegister().
4939 */
4940typedef struct PDMDEVREGCB
4941{
4942 /** Interface version.
4943 * This is set to PDM_DEVREG_CB_VERSION. */
4944 uint32_t u32Version;
4945
4946 /**
4947 * Registers a device with the current VM instance.
4948 *
4949 * @returns VBox status code.
4950 * @param pCallbacks Pointer to the callback table.
4951 * @param pReg Pointer to the device registration record.
4952 * This data must be permanent and readonly.
4953 */
4954 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
4955} PDMDEVREGCB;
4956
4957/** Current version of the PDMDEVREGCB structure. */
4958#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
4959
4960
4961/**
4962 * The VBoxDevicesRegister callback function.
4963 *
4964 * PDM will invoke this function after loading a device module and letting
4965 * the module decide which devices to register and how to handle conflicts.
4966 *
4967 * @returns VBox status code.
4968 * @param pCallbacks Pointer to the callback table.
4969 * @param u32Version VBox version number.
4970 */
4971typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
4972
4973/** @} */
4974
4975RT_C_DECLS_END
4976
4977#endif
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