Changeset 39135 in vbox
- Timestamp:
- Oct 28, 2011 9:47:55 AM (13 years ago)
- Location:
- trunk
- Files:
-
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/pdmdev.h
r39111 r39135 4106 4106 */ 4107 4107 DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser, 4108 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill, 4109 const char *pszDesc) 4108 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc) 4109 { 4110 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/, 4111 fFlags, pszDesc); 4112 } 4113 4114 /** 4115 * @copydoc PDMDEVHLPR3::pfnMMIORegister 4116 */ 4117 DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser, 4118 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, 4119 PFNIOMMMIOFILL pfnFill, const char *pszDesc) 4110 4120 { 4111 4121 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, 4112 IOMMMIO_FLAGS_WRITE_PASSTHRU | IOMMMIO_FLAGS_READ_PASSTHRU, pszDesc);4122 fFlags, pszDesc); 4113 4123 } 4114 4124 -
trunk/src/VBox/Devices/Audio/DevIchIntelHDA.cpp
r37654 r39135 2041 2041 2042 2042 Assert(enmType == PCI_ADDRESS_SPACE_MEM); 2043 rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, 0, 2044 hdaMMIOWrite, hdaMMIORead, NULL, "ICH6_HDA"); 2043 rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, NULL /*pvUser*/, 2044 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 2045 hdaMMIOWrite, hdaMMIORead, "ICH6_HDA"); 2045 2046 2046 2047 if (RT_FAILURE(rc)) -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r39091 r39135 112 112 uint8_t uBus; 113 113 #endif 114 /* Physical address of PCI config space MMIO region*/114 /** Physical address of PCI config space MMIO region. */ 115 115 uint64_t u64PciConfigMMioAddress; 116 /* Length of PCI config space MMIO region*/116 /** Length of PCI config space MMIO region. */ 117 117 uint64_t u64PciConfigMMioLength; 118 118 … … 2514 2514 if (pGlobals->u64PciConfigMMioAddress != 0) 2515 2515 { 2516 rc = PDMDevHlpMMIORegister(pDevIns, 2517 pGlobals->u64PciConfigMMioAddress, 2518 pGlobals->u64PciConfigMMioLength, 2519 0, 2520 ich9pciMcfgMMIOWrite, 2521 ich9pciMcfgMMIORead, 2522 NULL /* fill */, 2523 "MCFG ranges"); 2524 if (RT_FAILURE(rc)) 2525 { 2526 AssertMsgRC(rc, ("Cannot register MCFG MMIO: %Rrc\n", rc)); 2527 return rc; 2528 } 2516 rc = PDMDevHlpMMIORegister(pDevIns, pGlobals->u64PciConfigMMioAddress, pGlobals->u64PciConfigMMioLength, NULL /*pvUser*/, 2517 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 2518 ich9pciMcfgMMIOWrite, ich9pciMcfgMMIORead, "MCFG ranges"); 2519 AssertMsgRCReturn(rc, ("rc=%Rrc %#llx/%#llx\n", rc, pGlobals->u64PciConfigMMioAddress, pGlobals->u64PciConfigMMioLength), rc); 2529 2520 2530 2521 if (fGCEnabled) -
trunk/src/VBox/Devices/Bus/MsixCommon.cpp
r39091 r39135 157 157 158 158 int rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, pPciDev, 159 msixMMIOWrite, msixMMIORead, NULL, "MSI-X tables"); 159 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 160 msixMMIOWrite, msixMMIORead, "MSI-X tables"); 160 161 161 162 if (RT_FAILURE(rc)) -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r39091 r39135 5983 5983 5984 5984 /* vga mmio */ 5985 rc = PDMDevHlpMMIORegister(pDevIns, 0x000a0000, 0x00020000, 0, vgaMMIOWrite, vgaMMIORead, vgaMMIOFill, "VGA - VGA Video Buffer"); 5985 rc = PDMDevHlpMMIORegisterEx(pDevIns, 0x000a0000, 0x00020000, NULL /*pvUser*/, 5986 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 5987 vgaMMIOWrite, vgaMMIORead, vgaMMIOFill, "VGA - VGA Video Buffer"); 5986 5988 if (RT_FAILURE(rc)) 5987 5989 return rc; -
trunk/src/VBox/Devices/Network/DevE1000.cpp
r39011 r39135 4635 4635 case PCI_ADDRESS_SPACE_MEM: 4636 4636 pState->addrMMReg = GCPhysAddress; 4637 rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, 0, 4638 e1kMMIOWrite, e1kMMIORead, NULL, "E1000"); 4637 rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, NULL /*pvUser*/, 4638 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 4639 e1kMMIOWrite, e1kMMIORead, "E1000"); 4639 4640 if (pState->fR0Enabled) 4640 4641 { -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r37636 r39135 4052 4052 /* We use the assigned size here, because we currently only support page aligned MMIO ranges. */ 4053 4053 rc = PDMDevHlpMMIORegister(pPciDev->pDevIns, GCPhysAddress, cb, pThis, 4054 pcnetMMIOWrite, pcnetMMIORead, NULL, "PCNet"); 4054 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 4055 pcnetMMIOWrite, pcnetMMIORead, "PCNet"); 4055 4056 if (RT_FAILURE(rc)) 4056 4057 return rc; -
trunk/src/VBox/Devices/PC/DevAPIC.cpp
r39060 r39135 2280 2280 uint32_t ApicBase = pDev->paLapicsR3[0].apicbase & ~0xfff; 2281 2281 rc = PDMDevHlpMMIORegister(pDevIns, ApicBase, 0x1000, pDev, 2282 apicMMIOWrite, apicMMIORead, NULL, "APIC Memory"); 2282 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 2283 apicMMIOWrite, apicMMIORead, "APIC Memory"); 2283 2284 if (RT_FAILURE(rc)) 2284 2285 return rc; -
trunk/src/VBox/Devices/PC/DevHPET.cpp
r39091 r39135 1444 1444 */ 1445 1445 rc = PDMDevHlpMMIORegister(pDevIns, HPET_BASE, 0x1000, pThis, 1446 hpetMMIOWrite, hpetMMIORead, NULL, "HPET Memory"); 1446 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 1447 hpetMMIOWrite, hpetMMIORead, "HPET Memory"); 1447 1448 AssertRCReturn(rc, rc); 1448 1449 -
trunk/src/VBox/Devices/PC/DevIoApic.cpp
r39059 r39135 629 629 */ 630 630 rc = PDMDevHlpMMIORegister(pDevIns, 0xfec00000, 0x1000, s, 631 ioapicMMIOWrite, ioapicMMIORead, NULL, "I/O APIC Memory"); 631 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 632 ioapicMMIOWrite, ioapicMMIORead, "I/O APIC Memory"); 632 633 if (RT_FAILURE(rc)) 633 634 return rc; -
trunk/src/VBox/Devices/PC/DevLPC.cpp
r37636 r39135 337 337 */ 338 338 rc = PDMDevHlpMMIORegister(pDevIns, RCBA_BASE, 0x4000, pThis, 339 lpcMMIOWrite, lpcMMIORead, NULL, "LPC Memory"); 339 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 340 lpcMMIOWrite, lpcMMIORead, "LPC Memory"); 340 341 if (RT_FAILURE(rc)) 341 342 return rc; -
trunk/src/VBox/Devices/Storage/DevAHCI.cpp
r38970 r39135 2506 2506 2507 2507 /* We use the assigned size here, because we currently only support page aligned MMIO ranges. */ 2508 rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL, 2509 ahciMMIOWrite, ahciMMIORead, NULL, "AHCI"); 2508 rc = PDMDevHlpMMIORegisterEx(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/, 2509 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 2510 ahciMMIOWrite, ahciMMIORead, NULL, "AHCI"); 2510 2511 if (RT_FAILURE(rc)) 2511 2512 return rc; … … 6117 6118 /* 6118 6119 * Count the number of valid ranges in the buffer. 6119 * A length of 0 is invalid and is only used for padding 6120 * A length of 0 is invalid and is only used for padding 6120 6121 */ 6121 6122 for (unsigned i = 0; i < RT_ELEMENTS(aRanges); i++) -
trunk/src/VBox/Devices/Storage/DevBusLogic.cpp
r38782 r39135 2074 2074 { 2075 2075 /* We use the assigned size here, because we currently only support page aligned MMIO ranges. */ 2076 rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL, 2077 buslogicMMIOWrite, buslogicMMIORead, NULL, "BusLogic"); 2076 rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/, 2077 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 2078 buslogicMMIOWrite, buslogicMMIORead, "BusLogic"); 2078 2079 if (RT_FAILURE(rc)) 2079 2080 return rc; -
trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.cpp
r37636 r39135 3841 3841 { 3842 3842 /* We use the assigned size here, because we currently only support page aligned MMIO ranges. */ 3843 rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL, 3844 lsilogicMMIOWrite, lsilogicMMIORead, NULL, pcszCtrl); 3843 rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/, 3844 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 3845 lsilogicMMIOWrite, lsilogicMMIORead, pcszCtrl); 3845 3846 if (RT_FAILURE(rc)) 3846 3847 return rc; … … 3864 3865 pThis->GCPhysMMIOBase = GCPhysAddress; 3865 3866 } 3866 else if ( (enmType == PCI_ADDRESS_SPACE_MEM) && (iRegion == 2))3867 else if (enmType == PCI_ADDRESS_SPACE_MEM && iRegion == 2) 3867 3868 { 3868 3869 /* We use the assigned size here, because we currently only support page aligned MMIO ranges. */ 3869 rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL, 3870 lsilogicDiagnosticWrite, lsilogicDiagnosticRead, NULL, pcszDiag); 3870 rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/, 3871 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 3872 lsilogicDiagnosticWrite, lsilogicDiagnosticRead, pcszDiag); 3871 3873 if (RT_FAILURE(rc)) 3872 3874 return rc; -
trunk/src/VBox/Devices/USB/DevOHCI.cpp
r38350 r39135 4877 4877 { 4878 4878 POHCI pOhci = (POHCI)pPciDev; 4879 int rc = PDMDevHlpMMIORegister(pOhci->CTX_SUFF(pDevIns), 4880 GCPhysAddress, 4881 cb, 4882 NULL, 4883 ohciWrite, 4884 ohciRead, 4885 NULL, 4886 "USB OHCI"); 4879 int rc = PDMDevHlpMMIORegister(pOhci->CTX_SUFF(pDevIns), GCPhysAddress, cb, NULL /*pvUser*/, 4880 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 4881 ohciWrite, ohciRead, "USB OHCI"); 4887 4882 if (RT_FAILURE(rc)) 4888 4883 return rc; -
trunk/src/VBox/Devices/VMMDev/VMMDevTesting.cpp
r37636 r39135 337 337 */ 338 338 int rc = PDMDevHlpMMIORegister(pDevIns, VMMDEV_TESTING_MMIO_BASE, VMMDEV_TESTING_MMIO_SIZE, NULL /*pvUser*/, 339 vmmdevTestingMmioWrite, 340 vmmdevTestingMmioRead, 341 NULL /*pfnFill*/, 342 "VMMDev Testing"); 339 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, 340 vmmdevTestingMmioWrite, vmmdevTestingMmioRead, "VMMDev Testing"); 343 341 AssertRCReturn(rc, rc); 344 342 if (pThis->fRZEnabled)
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