VirtualBox

source: vbox/trunk/include/VBox/vmm/pdmdev.h@ 43131

Last change on this file since 43131 was 41847, checked in by vboxsync, 12 years ago

PDM/PCI: Added pdm*DevHlp_PCIPhysRead/Write callbacks, renamed VINF_PGM_PCI_PHYS_*_BM_DISABLED to VINF_PDM_PCI_PHYS_*_BM_DISABLED.

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File size: 193.2 KB
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1/** @file
2 * PDM - Pluggable Device Manager, Devices.
3 */
4
5/*
6 * Copyright (C) 2006-2011 Oracle Corporation
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_vmm_pdmdev_h
27#define ___VBox_vmm_pdmdev_h
28
29#include <VBox/vmm/pdmqueue.h>
30#include <VBox/vmm/pdmcritsect.h>
31#include <VBox/vmm/pdmthread.h>
32#include <VBox/vmm/pdmifs.h>
33#include <VBox/vmm/pdmins.h>
34#include <VBox/vmm/pdmcommon.h>
35#include <VBox/vmm/iom.h>
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/ssm.h>
38#include <VBox/vmm/cfgm.h>
39#include <VBox/vmm/dbgf.h>
40#include <VBox/err.h>
41#include <VBox/pci.h>
42#include <iprt/stdarg.h>
43
44
45RT_C_DECLS_BEGIN
46
47/** @defgroup grp_pdm_device The PDM Devices API
48 * @ingroup grp_pdm
49 * @{
50 */
51
52/**
53 * Construct a device instance for a VM.
54 *
55 * @returns VBox status.
56 * @param pDevIns The device instance data. If the registration structure
57 * is needed, it can be accessed thru pDevIns->pReg.
58 * @param iInstance Instance number. Use this to figure out which registers
59 * and such to use. The instance number is also found in
60 * pDevIns->iInstance, but since it's likely to be
61 * frequently used PDM passes it as parameter.
62 * @param pCfg Configuration node handle for the driver. This is
63 * expected to be in high demand in the constructor and is
64 * therefore passed as an argument. When using it at other
65 * times, it can be found in pDrvIns->pCfg.
66 */
67typedef DECLCALLBACK(int) FNPDMDEVCONSTRUCT(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg);
68/** Pointer to a FNPDMDEVCONSTRUCT() function. */
69typedef FNPDMDEVCONSTRUCT *PFNPDMDEVCONSTRUCT;
70
71/**
72 * Destruct a device instance.
73 *
74 * Most VM resources are freed by the VM. This callback is provided so that any non-VM
75 * resources can be freed correctly.
76 *
77 * @returns VBox status.
78 * @param pDevIns The device instance data.
79 *
80 * @remarks The device critical section is not entered. The routine may delete
81 * the critical section, so the caller cannot exit it.
82 */
83typedef DECLCALLBACK(int) FNPDMDEVDESTRUCT(PPDMDEVINS pDevIns);
84/** Pointer to a FNPDMDEVDESTRUCT() function. */
85typedef FNPDMDEVDESTRUCT *PFNPDMDEVDESTRUCT;
86
87/**
88 * Device relocation callback.
89 *
90 * This is called when the instance data has been relocated in raw-mode context
91 * (RC). It is also called when the RC hypervisor selects changes. The device
92 * must fixup all necessary pointers and re-query all interfaces to other RC
93 * devices and drivers.
94 *
95 * Before the RC code is executed the first time, this function will be called
96 * with a 0 delta so RC pointer calculations can be one in one place.
97 *
98 * @param pDevIns Pointer to the device instance.
99 * @param offDelta The relocation delta relative to the old location.
100 *
101 * @remarks A relocation CANNOT fail.
102 *
103 * @remarks The device critical section is not entered. The relocations should
104 * not normally require any locking.
105 */
106typedef DECLCALLBACK(void) FNPDMDEVRELOCATE(PPDMDEVINS pDevIns, RTGCINTPTR offDelta);
107/** Pointer to a FNPDMDEVRELOCATE() function. */
108typedef FNPDMDEVRELOCATE *PFNPDMDEVRELOCATE;
109
110/**
111 * Device I/O Control interface.
112 *
113 * This is used by external components, such as the COM interface, to
114 * communicate with devices using a class wide interface or a device
115 * specific interface.
116 *
117 * @returns VBox status code.
118 * @param pDevIns Pointer to the device instance.
119 * @param uFunction Function to perform.
120 * @param pvIn Pointer to input data.
121 * @param cbIn Size of input data.
122 * @param pvOut Pointer to output data.
123 * @param cbOut Size of output data.
124 * @param pcbOut Where to store the actual size of the output data.
125 *
126 * @remarks Not used.
127 */
128typedef DECLCALLBACK(int) FNPDMDEVIOCTL(PPDMDEVINS pDevIns, uint32_t uFunction,
129 void *pvIn, uint32_t cbIn,
130 void *pvOut, uint32_t cbOut, PRTUINT pcbOut);
131/** Pointer to a FNPDMDEVIOCTL() function. */
132typedef FNPDMDEVIOCTL *PFNPDMDEVIOCTL;
133
134/**
135 * Power On notification.
136 *
137 * @returns VBox status.
138 * @param pDevIns The device instance data.
139 *
140 * @remarks Caller enters the device critical section.
141 */
142typedef DECLCALLBACK(void) FNPDMDEVPOWERON(PPDMDEVINS pDevIns);
143/** Pointer to a FNPDMDEVPOWERON() function. */
144typedef FNPDMDEVPOWERON *PFNPDMDEVPOWERON;
145
146/**
147 * Reset notification.
148 *
149 * @returns VBox status.
150 * @param pDevIns The device instance data.
151 *
152 * @remarks Caller enters the device critical section.
153 */
154typedef DECLCALLBACK(void) FNPDMDEVRESET(PPDMDEVINS pDevIns);
155/** Pointer to a FNPDMDEVRESET() function. */
156typedef FNPDMDEVRESET *PFNPDMDEVRESET;
157
158/**
159 * Suspend notification.
160 *
161 * @returns VBox status.
162 * @param pDevIns The device instance data.
163 * @thread EMT(0)
164 *
165 * @remarks Caller enters the device critical section.
166 */
167typedef DECLCALLBACK(void) FNPDMDEVSUSPEND(PPDMDEVINS pDevIns);
168/** Pointer to a FNPDMDEVSUSPEND() function. */
169typedef FNPDMDEVSUSPEND *PFNPDMDEVSUSPEND;
170
171/**
172 * Resume notification.
173 *
174 * @returns VBox status.
175 * @param pDevIns The device instance data.
176 *
177 * @remarks Caller enters the device critical section.
178 */
179typedef DECLCALLBACK(void) FNPDMDEVRESUME(PPDMDEVINS pDevIns);
180/** Pointer to a FNPDMDEVRESUME() function. */
181typedef FNPDMDEVRESUME *PFNPDMDEVRESUME;
182
183/**
184 * Power Off notification.
185 *
186 * This is only called when the VMR3PowerOff call is made on a running VM. This
187 * means that there is no notification if the VM was suspended before being
188 * powered of. There will also be no callback when hot plugging devices.
189 *
190 * @param pDevIns The device instance data.
191 * @thread EMT(0)
192 *
193 * @remarks Caller enters the device critical section.
194 */
195typedef DECLCALLBACK(void) FNPDMDEVPOWEROFF(PPDMDEVINS pDevIns);
196/** Pointer to a FNPDMDEVPOWEROFF() function. */
197typedef FNPDMDEVPOWEROFF *PFNPDMDEVPOWEROFF;
198
199/**
200 * Attach command.
201 *
202 * This is called to let the device attach to a driver for a specified LUN
203 * at runtime. This is not called during VM construction, the device
204 * constructor have to attach to all the available drivers.
205 *
206 * This is like plugging in the keyboard or mouse after turning on the PC.
207 *
208 * @returns VBox status code.
209 * @param pDevIns The device instance.
210 * @param iLUN The logical unit which is being detached.
211 * @param fFlags Flags, combination of the PDM_TACH_FLAGS_* \#defines.
212 *
213 * @remarks Caller enters the device critical section.
214 */
215typedef DECLCALLBACK(int) FNPDMDEVATTACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
216/** Pointer to a FNPDMDEVATTACH() function. */
217typedef FNPDMDEVATTACH *PFNPDMDEVATTACH;
218
219/**
220 * Detach notification.
221 *
222 * This is called when a driver is detaching itself from a LUN of the device.
223 * The device should adjust it's state to reflect this.
224 *
225 * This is like unplugging the network cable to use it for the laptop or
226 * something while the PC is still running.
227 *
228 * @param pDevIns The device instance.
229 * @param iLUN The logical unit which is being detached.
230 * @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
231 *
232 * @remarks Caller enters the device critical section.
233 */
234typedef DECLCALLBACK(void) FNPDMDEVDETACH(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags);
235/** Pointer to a FNPDMDEVDETACH() function. */
236typedef FNPDMDEVDETACH *PFNPDMDEVDETACH;
237
238/**
239 * Query the base interface of a logical unit.
240 *
241 * @returns VBOX status code.
242 * @param pDevIns The device instance.
243 * @param iLUN The logicial unit to query.
244 * @param ppBase Where to store the pointer to the base interface of the LUN.
245 *
246 * @remarks The device critical section is not entered.
247 */
248typedef DECLCALLBACK(int) FNPDMDEVQUERYINTERFACE(PPDMDEVINS pDevIns, unsigned iLUN, PPDMIBASE *ppBase);
249/** Pointer to a FNPDMDEVQUERYINTERFACE() function. */
250typedef FNPDMDEVQUERYINTERFACE *PFNPDMDEVQUERYINTERFACE;
251
252/**
253 * Init complete notification.
254 * This can be done to do communication with other devices and other
255 * initialization which requires everything to be in place.
256 *
257 * @returns VBOX status code.
258 * @param pDevIns The device instance.
259 *
260 * @remarks Caller enters the device critical section.
261 */
262typedef DECLCALLBACK(int) FNPDMDEVINITCOMPLETE(PPDMDEVINS pDevIns);
263/** Pointer to a FNPDMDEVINITCOMPLETE() function. */
264typedef FNPDMDEVINITCOMPLETE *PFNPDMDEVINITCOMPLETE;
265
266
267
268/**
269 * PDM Device Registration Structure.
270 *
271 * This structure is used when registering a device from VBoxInitDevices() in HC
272 * Ring-3. PDM will continue use till the VM is terminated.
273 */
274typedef struct PDMDEVREG
275{
276 /** Structure version. PDM_DEVREG_VERSION defines the current version. */
277 uint32_t u32Version;
278 /** Device name. */
279 char szName[32];
280 /** Name of the raw-mode context module (no path).
281 * Only evalutated if PDM_DEVREG_FLAGS_RC is set. */
282 char szRCMod[32];
283 /** Name of the ring-0 module (no path).
284 * Only evalutated if PDM_DEVREG_FLAGS_R0 is set. */
285 char szR0Mod[32];
286 /** The description of the device. The UTF-8 string pointed to shall, like this structure,
287 * remain unchanged from registration till VM destruction. */
288 const char *pszDescription;
289
290 /** Flags, combination of the PDM_DEVREG_FLAGS_* \#defines. */
291 uint32_t fFlags;
292 /** Device class(es), combination of the PDM_DEVREG_CLASS_* \#defines. */
293 uint32_t fClass;
294 /** Maximum number of instances (per VM). */
295 uint32_t cMaxInstances;
296 /** Size of the instance data. */
297 uint32_t cbInstance;
298
299 /** Construct instance - required. */
300 PFNPDMDEVCONSTRUCT pfnConstruct;
301 /** Destruct instance - optional.
302 * Critical section NOT entered (will be destroyed). */
303 PFNPDMDEVDESTRUCT pfnDestruct;
304 /** Relocation command - optional.
305 * Critical section NOT entered. */
306 PFNPDMDEVRELOCATE pfnRelocate;
307 /** I/O Control interface - optional.
308 * Not used. */
309 PFNPDMDEVIOCTL pfnIOCtl;
310 /** Power on notification - optional.
311 * Critical section is entered. */
312 PFNPDMDEVPOWERON pfnPowerOn;
313 /** Reset notification - optional.
314 * Critical section is entered. */
315 PFNPDMDEVRESET pfnReset;
316 /** Suspend notification - optional.
317 * Critical section is entered. */
318 PFNPDMDEVSUSPEND pfnSuspend;
319 /** Resume notification - optional.
320 * Critical section is entered. */
321 PFNPDMDEVRESUME pfnResume;
322 /** Attach command - optional.
323 * Critical section is entered. */
324 PFNPDMDEVATTACH pfnAttach;
325 /** Detach notification - optional.
326 * Critical section is entered. */
327 PFNPDMDEVDETACH pfnDetach;
328 /** Query a LUN base interface - optional.
329 * Critical section is NOT entered. */
330 PFNPDMDEVQUERYINTERFACE pfnQueryInterface;
331 /** Init complete notification - optional.
332 * Critical section is entered. */
333 PFNPDMDEVINITCOMPLETE pfnInitComplete;
334 /** Power off notification - optional.
335 * Critical section is entered. */
336 PFNPDMDEVPOWEROFF pfnPowerOff;
337 /** @todo */
338 PFNRT pfnSoftReset;
339 /** Initialization safty marker. */
340 uint32_t u32VersionEnd;
341} PDMDEVREG;
342/** Pointer to a PDM Device Structure. */
343typedef PDMDEVREG *PPDMDEVREG;
344/** Const pointer to a PDM Device Structure. */
345typedef PDMDEVREG const *PCPDMDEVREG;
346
347/** Current DEVREG version number. */
348#define PDM_DEVREG_VERSION PDM_VERSION_MAKE(0xffff, 1, 0)
349
350/** PDM Device Flags.
351 * @{ */
352/** This flag is used to indicate that the device has a RC component. */
353#define PDM_DEVREG_FLAGS_RC 0x00000001
354/** This flag is used to indicate that the device has a R0 component. */
355#define PDM_DEVREG_FLAGS_R0 0x00000002
356
357/** @def PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT
358 * The bit count for the current host. */
359#if HC_ARCH_BITS == 32
360# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000010
361#elif HC_ARCH_BITS == 64
362# define PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT 0x00000020
363#else
364# error Unsupported HC_ARCH_BITS value.
365#endif
366/** The host bit count mask. */
367#define PDM_DEVREG_FLAGS_HOST_BITS_MASK 0x00000030
368
369/** The device support only 32-bit guests. */
370#define PDM_DEVREG_FLAGS_GUEST_BITS_32 0x00000100
371/** The device support only 64-bit guests. */
372#define PDM_DEVREG_FLAGS_GUEST_BITS_64 0x00000200
373/** The device support both 32-bit & 64-bit guests. */
374#define PDM_DEVREG_FLAGS_GUEST_BITS_32_64 0x00000300
375/** @def PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT
376 * The guest bit count for the current compilation. */
377#if GC_ARCH_BITS == 32
378# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32
379#elif GC_ARCH_BITS == 64
380# define PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT PDM_DEVREG_FLAGS_GUEST_BITS_32_64
381#else
382# error Unsupported GC_ARCH_BITS value.
383#endif
384/** The guest bit count mask. */
385#define PDM_DEVREG_FLAGS_GUEST_BITS_MASK 0x00000300
386
387/** A convenience. */
388#define PDM_DEVREG_FLAGS_DEFAULT_BITS (PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT | PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
389
390/** Indicates that the devices support PAE36 on a 32-bit guest. */
391#define PDM_DEVREG_FLAGS_PAE36 0x00001000
392
393/** Indicates that the device needs to be notified before the drivers when suspending. */
394#define PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION 0x00002000
395
396/** Indicates that the device needs to be notified before the drivers when powering off. */
397#define PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION 0x00004000
398/** @} */
399
400
401/** PDM Device Classes.
402 * The order is important, lower bit earlier instantiation.
403 * @{ */
404/** Architecture device. */
405#define PDM_DEVREG_CLASS_ARCH RT_BIT(0)
406/** Architecture BIOS device. */
407#define PDM_DEVREG_CLASS_ARCH_BIOS RT_BIT(1)
408/** PCI bus brigde. */
409#define PDM_DEVREG_CLASS_BUS_PCI RT_BIT(2)
410/** ISA bus brigde. */
411#define PDM_DEVREG_CLASS_BUS_ISA RT_BIT(3)
412/** Input device (mouse, keyboard, joystick, HID, ...). */
413#define PDM_DEVREG_CLASS_INPUT RT_BIT(4)
414/** Interrupt controller (PIC). */
415#define PDM_DEVREG_CLASS_PIC RT_BIT(5)
416/** Interval controoler (PIT). */
417#define PDM_DEVREG_CLASS_PIT RT_BIT(6)
418/** RTC/CMOS. */
419#define PDM_DEVREG_CLASS_RTC RT_BIT(7)
420/** DMA controller. */
421#define PDM_DEVREG_CLASS_DMA RT_BIT(8)
422/** VMM Device. */
423#define PDM_DEVREG_CLASS_VMM_DEV RT_BIT(9)
424/** Graphics device, like VGA. */
425#define PDM_DEVREG_CLASS_GRAPHICS RT_BIT(10)
426/** Storage controller device. */
427#define PDM_DEVREG_CLASS_STORAGE RT_BIT(11)
428/** Network interface controller. */
429#define PDM_DEVREG_CLASS_NETWORK RT_BIT(12)
430/** Audio. */
431#define PDM_DEVREG_CLASS_AUDIO RT_BIT(13)
432/** USB HIC. */
433#define PDM_DEVREG_CLASS_BUS_USB RT_BIT(14)
434/** ACPI. */
435#define PDM_DEVREG_CLASS_ACPI RT_BIT(15)
436/** Serial controller device. */
437#define PDM_DEVREG_CLASS_SERIAL RT_BIT(16)
438/** Parallel controller device */
439#define PDM_DEVREG_CLASS_PARALLEL RT_BIT(17)
440/** Host PCI pass-through device */
441#define PDM_DEVREG_CLASS_HOST_DEV RT_BIT(18)
442/** Misc devices (always last). */
443#define PDM_DEVREG_CLASS_MISC RT_BIT(31)
444/** @} */
445
446
447/** @name IRQ Level for use with the *SetIrq APIs.
448 * @{
449 */
450/** Assert the IRQ (can assume value 1). */
451#define PDM_IRQ_LEVEL_HIGH RT_BIT(0)
452/** Deassert the IRQ (can assume value 0). */
453#define PDM_IRQ_LEVEL_LOW 0
454/** flip-flop - deassert and then assert the IRQ again immediately. */
455#define PDM_IRQ_LEVEL_FLIP_FLOP (RT_BIT(1) | PDM_IRQ_LEVEL_HIGH)
456/** @} */
457
458/**
459 * Registration record for MSI.
460 */
461typedef struct PDMMSIREG
462{
463 /** Number of MSI interrupt vectors, 0 if MSI not supported */
464 uint16_t cMsiVectors;
465 /** Offset of MSI capability */
466 uint8_t iMsiCapOffset;
467 /** Offset of next capability to MSI */
468 uint8_t iMsiNextOffset;
469 /** If we support 64-bit MSI addressing */
470 bool fMsi64bit;
471
472 /** Number of MSI-X interrupt vectors, 0 if MSI-X not supported */
473 uint16_t cMsixVectors;
474 /** Offset of MSI-X capability */
475 uint8_t iMsixCapOffset;
476 /** Offset of next capability to MSI-X */
477 uint8_t iMsixNextOffset;
478 /** Value of PCI BAR (base addresss register) assigned by device for MSI-X page access */
479 uint8_t iMsixBar;
480} PDMMSIREG;
481typedef PDMMSIREG *PPDMMSIREG;
482
483/**
484 * PCI Bus registration structure.
485 * All the callbacks, except the PCIBIOS hack, are working on PCI devices.
486 */
487typedef struct PDMPCIBUSREG
488{
489 /** Structure version number. PDM_PCIBUSREG_VERSION defines the current version. */
490 uint32_t u32Version;
491
492 /**
493 * Registers the device with the default PCI bus.
494 *
495 * @returns VBox status code.
496 * @param pDevIns Device instance of the PCI Bus.
497 * @param pPciDev The PCI device structure.
498 * Any PCI enabled device must keep this in it's instance data!
499 * Fill in the PCI data config before registration, please.
500 * @param pszName Pointer to device name (permanent, readonly). For debugging, not unique.
501 * @param iDev The device number ((dev << 3) | function) the device should have on the bus.
502 * If negative, the pci bus device will assign one.
503 */
504 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
505
506 /**
507 * Initialize MSI support in a PCI device.
508 *
509 * @returns VBox status code.
510 * @param pDevIns Device instance of the PCI Bus.
511 * @param pPciDev The PCI device structure.
512 * @param pMsiReg MSI registration structure
513 */
514 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
515
516 /**
517 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
518 *
519 * @returns VBox status code.
520 * @param pDevIns Device instance of the PCI Bus.
521 * @param pPciDev The PCI device structure.
522 * @param iRegion The region number.
523 * @param cbRegion Size of the region.
524 * @param iType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
525 * @param pfnCallback Callback for doing the mapping.
526 */
527 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
528
529 /**
530 * Register PCI configuration space read/write callbacks.
531 *
532 * @param pDevIns Device instance of the PCI Bus.
533 * @param pPciDev The PCI device structure.
534 * @param pfnRead Pointer to the user defined PCI config read function.
535 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
536 * PCI config read function. This way, user can decide when (and if)
537 * to call default PCI config read function. Can be NULL.
538 * @param pfnWrite Pointer to the user defined PCI config write function.
539 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
540 * PCI config write function. This way, user can decide when (and if)
541 * to call default PCI config write function. Can be NULL.
542 * @thread EMT
543 */
544 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
545 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
546
547 /**
548 * Set the IRQ for a PCI device.
549 *
550 * @param pDevIns Device instance of the PCI Bus.
551 * @param pPciDev The PCI device structure.
552 * @param iIrq IRQ number to set.
553 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
554 * @param uTagSrc The IRQ tag and source (for tracing).
555 */
556 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
557
558 /**
559 * Saves a state of the PCI device.
560 *
561 * @returns VBox status code.
562 * @param pDevIns Device instance of the PCI Bus.
563 * @param pPciDev Pointer to PCI device.
564 * @param pSSMHandle The handle to save the state to.
565 */
566 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
567
568 /**
569 * Loads a saved PCI device state.
570 *
571 * @returns VBox status code.
572 * @param pDevIns Device instance of the PCI Bus.
573 * @param pPciDev Pointer to PCI device.
574 * @param pSSMHandle The handle to the saved state.
575 */
576 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
577
578 /**
579 * Called to perform the job of the bios.
580 * This is only called for the first PCI Bus - it is expected to
581 * service all the PCI buses.
582 *
583 * @returns VBox status.
584 * @param pDevIns Device instance of the first bus.
585 */
586 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
587
588 /** The name of the SetIrq RC entry point. */
589 const char *pszSetIrqRC;
590
591 /** The name of the SetIrq R0 entry point. */
592 const char *pszSetIrqR0;
593
594} PDMPCIBUSREG;
595/** Pointer to a PCI bus registration structure. */
596typedef PDMPCIBUSREG *PPDMPCIBUSREG;
597
598/** Current PDMPCIBUSREG version number. */
599#define PDM_PCIBUSREG_VERSION PDM_VERSION_MAKE(0xfffe, 3, 0)
600
601/**
602 * PCI Bus RC helpers.
603 */
604typedef struct PDMPCIHLPRC
605{
606 /** Structure version. PDM_PCIHLPRC_VERSION defines the current version. */
607 uint32_t u32Version;
608
609 /**
610 * Set an ISA IRQ.
611 *
612 * @param pDevIns PCI device instance.
613 * @param iIrq IRQ number to set.
614 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
615 * @param uTagSrc The IRQ tag and source (for tracing).
616 * @thread EMT only.
617 */
618 DECLRCCALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
619
620 /**
621 * Set an I/O-APIC IRQ.
622 *
623 * @param pDevIns PCI device instance.
624 * @param iIrq IRQ number to set.
625 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
626 * @param uTagSrc The IRQ tag and source (for tracing).
627 * @thread EMT only.
628 */
629 DECLRCCALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
630
631 /**
632 * Send an MSI.
633 *
634 * @param pDevIns PCI device instance.
635 * @param GCPhys Physical address MSI request was written.
636 * @param uValue Value written.
637 * @param uTagSrc The IRQ tag and source (for tracing).
638 * @thread EMT only.
639 */
640 DECLRCCALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
641
642
643 /**
644 * Acquires the PDM lock.
645 *
646 * @returns VINF_SUCCESS on success.
647 * @returns rc if we failed to acquire the lock.
648 * @param pDevIns The PCI device instance.
649 * @param rc What to return if we fail to acquire the lock.
650 */
651 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
652
653 /**
654 * Releases the PDM lock.
655 *
656 * @param pDevIns The PCI device instance.
657 */
658 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
659
660 /** Just a safety precaution. */
661 uint32_t u32TheEnd;
662} PDMPCIHLPRC;
663/** Pointer to PCI helpers. */
664typedef RCPTRTYPE(PDMPCIHLPRC *) PPDMPCIHLPRC;
665/** Pointer to const PCI helpers. */
666typedef RCPTRTYPE(const PDMPCIHLPRC *) PCPDMPCIHLPRC;
667
668/** Current PDMPCIHLPRC version number. */
669#define PDM_PCIHLPRC_VERSION PDM_VERSION_MAKE(0xfffd, 3, 0)
670
671
672/**
673 * PCI Bus R0 helpers.
674 */
675typedef struct PDMPCIHLPR0
676{
677 /** Structure version. PDM_PCIHLPR0_VERSION defines the current version. */
678 uint32_t u32Version;
679
680 /**
681 * Set an ISA IRQ.
682 *
683 * @param pDevIns PCI device instance.
684 * @param iIrq IRQ number to set.
685 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
686 * @param uTagSrc The IRQ tag and source (for tracing).
687 * @thread EMT only.
688 */
689 DECLR0CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
690
691 /**
692 * Set an I/O-APIC IRQ.
693 *
694 * @param pDevIns PCI device instance.
695 * @param iIrq IRQ number to set.
696 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
697 * @param uTagSrc The IRQ tag and source (for tracing).
698 * @thread EMT only.
699 */
700 DECLR0CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
701
702 /**
703 * Send an MSI.
704 *
705 * @param pDevIns PCI device instance.
706 * @param GCPhys Physical address MSI request was written.
707 * @param uValue Value written.
708 * @param uTagSrc The IRQ tag and source (for tracing).
709 * @thread EMT only.
710 */
711 DECLR0CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
712
713
714 /**
715 * Acquires the PDM lock.
716 *
717 * @returns VINF_SUCCESS on success.
718 * @returns rc if we failed to acquire the lock.
719 * @param pDevIns The PCI device instance.
720 * @param rc What to return if we fail to acquire the lock.
721 */
722 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
723
724 /**
725 * Releases the PDM lock.
726 *
727 * @param pDevIns The PCI device instance.
728 */
729 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
730
731 /** Just a safety precaution. */
732 uint32_t u32TheEnd;
733} PDMPCIHLPR0;
734/** Pointer to PCI helpers. */
735typedef R0PTRTYPE(PDMPCIHLPR0 *) PPDMPCIHLPR0;
736/** Pointer to const PCI helpers. */
737typedef R0PTRTYPE(const PDMPCIHLPR0 *) PCPDMPCIHLPR0;
738
739/** Current PDMPCIHLPR0 version number. */
740#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 3, 0)
741
742/**
743 * PCI device helpers.
744 */
745typedef struct PDMPCIHLPR3
746{
747 /** Structure version. PDM_PCIHLPR3_VERSION defines the current version. */
748 uint32_t u32Version;
749
750 /**
751 * Set an ISA IRQ.
752 *
753 * @param pDevIns The PCI device instance.
754 * @param iIrq IRQ number to set.
755 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
756 * @param uTagSrc The IRQ tag and source (for tracing).
757 */
758 DECLR3CALLBACKMEMBER(void, pfnIsaSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
759
760 /**
761 * Set an I/O-APIC IRQ.
762 *
763 * @param pDevIns The PCI device instance.
764 * @param iIrq IRQ number to set.
765 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
766 * @param uTagSrc The IRQ tag and source (for tracing).
767 */
768 DECLR3CALLBACKMEMBER(void, pfnIoApicSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
769
770 /**
771 * Send an MSI.
772 *
773 * @param pDevIns PCI device instance.
774 * @param GCPhys Physical address MSI request was written.
775 * @param uValue Value written.
776 * @param uTagSrc The IRQ tag and source (for tracing).
777 */
778 DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
779
780 /**
781 * Checks if the given address is an MMIO2 base address or not.
782 *
783 * @returns true/false accordingly.
784 * @param pDevIns The PCI device instance.
785 * @param pOwner The owner of the memory, optional.
786 * @param GCPhys The address to check.
787 */
788 DECLR3CALLBACKMEMBER(bool, pfnIsMMIO2Base,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
789
790 /**
791 * Gets the address of the RC PCI Bus helpers.
792 *
793 * This should be called at both construction and relocation time
794 * to obtain the correct address of the RC helpers.
795 *
796 * @returns RC pointer to the PCI Bus helpers.
797 * @param pDevIns Device instance of the PCI Bus.
798 * @thread EMT only.
799 */
800 DECLR3CALLBACKMEMBER(PCPDMPCIHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
801
802 /**
803 * Gets the address of the R0 PCI Bus helpers.
804 *
805 * This should be called at both construction and relocation time
806 * to obtain the correct address of the R0 helpers.
807 *
808 * @returns R0 pointer to the PCI Bus helpers.
809 * @param pDevIns Device instance of the PCI Bus.
810 * @thread EMT only.
811 */
812 DECLR3CALLBACKMEMBER(PCPDMPCIHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
813
814 /**
815 * Acquires the PDM lock.
816 *
817 * @returns VINF_SUCCESS on success.
818 * @returns Fatal error on failure.
819 * @param pDevIns The PCI device instance.
820 * @param rc Dummy for making the interface identical to the RC and R0 versions.
821 */
822 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
823
824 /**
825 * Releases the PDM lock.
826 *
827 * @param pDevIns The PCI device instance.
828 */
829 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
830
831 /** Just a safety precaution. */
832 uint32_t u32TheEnd;
833} PDMPCIHLPR3;
834/** Pointer to PCI helpers. */
835typedef R3PTRTYPE(PDMPCIHLPR3 *) PPDMPCIHLPR3;
836/** Pointer to const PCI helpers. */
837typedef R3PTRTYPE(const PDMPCIHLPR3 *) PCPDMPCIHLPR3;
838
839/** Current PDMPCIHLPR3 version number. */
840#define PDM_PCIHLPR3_VERSION PDM_VERSION_MAKE(0xfffb, 3, 0)
841
842
843/**
844 * Programmable Interrupt Controller registration structure.
845 */
846typedef struct PDMPICREG
847{
848 /** Structure version number. PDM_PICREG_VERSION defines the current version. */
849 uint32_t u32Version;
850
851 /**
852 * Set the an IRQ.
853 *
854 * @param pDevIns Device instance of the PIC.
855 * @param iIrq IRQ number to set.
856 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
857 * @param uTagSrc The IRQ tag and source (for tracing).
858 */
859 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
860
861 /**
862 * Get a pending interrupt.
863 *
864 * @returns Pending interrupt number.
865 * @param pDevIns Device instance of the PIC.
866 * @param puTagSrc Where to return the IRQ tag and source.
867 */
868 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
869
870 /** The name of the RC SetIrq entry point. */
871 const char *pszSetIrqRC;
872 /** The name of the RC GetInterrupt entry point. */
873 const char *pszGetInterruptRC;
874
875 /** The name of the R0 SetIrq entry point. */
876 const char *pszSetIrqR0;
877 /** The name of the R0 GetInterrupt entry point. */
878 const char *pszGetInterruptR0;
879} PDMPICREG;
880/** Pointer to a PIC registration structure. */
881typedef PDMPICREG *PPDMPICREG;
882
883/** Current PDMPICREG version number. */
884#define PDM_PICREG_VERSION PDM_VERSION_MAKE(0xfffa, 2, 0)
885
886/**
887 * PIC RC helpers.
888 */
889typedef struct PDMPICHLPRC
890{
891 /** Structure version. PDM_PICHLPRC_VERSION defines the current version. */
892 uint32_t u32Version;
893
894 /**
895 * Set the interrupt force action flag.
896 *
897 * @param pDevIns Device instance of the PIC.
898 */
899 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
900
901 /**
902 * Clear the interrupt force action flag.
903 *
904 * @param pDevIns Device instance of the PIC.
905 */
906 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
907
908 /**
909 * Acquires the PDM lock.
910 *
911 * @returns VINF_SUCCESS on success.
912 * @returns rc if we failed to acquire the lock.
913 * @param pDevIns The PIC device instance.
914 * @param rc What to return if we fail to acquire the lock.
915 */
916 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
917
918 /**
919 * Releases the PDM lock.
920 *
921 * @param pDevIns The PIC device instance.
922 */
923 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
924
925 /** Just a safety precaution. */
926 uint32_t u32TheEnd;
927} PDMPICHLPRC;
928
929/** Pointer to PIC RC helpers. */
930typedef RCPTRTYPE(PDMPICHLPRC *) PPDMPICHLPRC;
931/** Pointer to const PIC RC helpers. */
932typedef RCPTRTYPE(const PDMPICHLPRC *) PCPDMPICHLPRC;
933
934/** Current PDMPICHLPRC version number. */
935#define PDM_PICHLPRC_VERSION PDM_VERSION_MAKE(0xfff9, 2, 0)
936
937
938/**
939 * PIC R0 helpers.
940 */
941typedef struct PDMPICHLPR0
942{
943 /** Structure version. PDM_PICHLPR0_VERSION defines the current version. */
944 uint32_t u32Version;
945
946 /**
947 * Set the interrupt force action flag.
948 *
949 * @param pDevIns Device instance of the PIC.
950 */
951 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
952
953 /**
954 * Clear the interrupt force action flag.
955 *
956 * @param pDevIns Device instance of the PIC.
957 */
958 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
959
960 /**
961 * Acquires the PDM lock.
962 *
963 * @returns VINF_SUCCESS on success.
964 * @returns rc if we failed to acquire the lock.
965 * @param pDevIns The PIC device instance.
966 * @param rc What to return if we fail to acquire the lock.
967 */
968 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
969
970 /**
971 * Releases the PDM lock.
972 *
973 * @param pDevIns The PCI device instance.
974 */
975 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
976
977 /** Just a safety precaution. */
978 uint32_t u32TheEnd;
979} PDMPICHLPR0;
980
981/** Pointer to PIC R0 helpers. */
982typedef R0PTRTYPE(PDMPICHLPR0 *) PPDMPICHLPR0;
983/** Pointer to const PIC R0 helpers. */
984typedef R0PTRTYPE(const PDMPICHLPR0 *) PCPDMPICHLPR0;
985
986/** Current PDMPICHLPR0 version number. */
987#define PDM_PICHLPR0_VERSION PDM_VERSION_MAKE(0xfff8, 1, 0)
988
989/**
990 * PIC R3 helpers.
991 */
992typedef struct PDMPICHLPR3
993{
994 /** Structure version. PDM_PICHLP_VERSION defines the current version. */
995 uint32_t u32Version;
996
997 /**
998 * Set the interrupt force action flag.
999 *
1000 * @param pDevIns Device instance of the PIC.
1001 */
1002 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns));
1003
1004 /**
1005 * Clear the interrupt force action flag.
1006 *
1007 * @param pDevIns Device instance of the PIC.
1008 */
1009 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns));
1010
1011 /**
1012 * Acquires the PDM lock.
1013 *
1014 * @returns VINF_SUCCESS on success.
1015 * @returns Fatal error on failure.
1016 * @param pDevIns The PIC device instance.
1017 * @param rc Dummy for making the interface identical to the RC and R0 versions.
1018 */
1019 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1020
1021 /**
1022 * Releases the PDM lock.
1023 *
1024 * @param pDevIns The PIC device instance.
1025 */
1026 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1027
1028 /**
1029 * Gets the address of the RC PIC helpers.
1030 *
1031 * This should be called at both construction and relocation time
1032 * to obtain the correct address of the RC helpers.
1033 *
1034 * @returns RC pointer to the PIC helpers.
1035 * @param pDevIns Device instance of the PIC.
1036 */
1037 DECLR3CALLBACKMEMBER(PCPDMPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1038
1039 /**
1040 * Gets the address of the R0 PIC helpers.
1041 *
1042 * This should be called at both construction and relocation time
1043 * to obtain the correct address of the R0 helpers.
1044 *
1045 * @returns R0 pointer to the PIC helpers.
1046 * @param pDevIns Device instance of the PIC.
1047 */
1048 DECLR3CALLBACKMEMBER(PCPDMPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1049
1050 /** Just a safety precaution. */
1051 uint32_t u32TheEnd;
1052} PDMPICHLPR3;
1053
1054/** Pointer to PIC R3 helpers. */
1055typedef R3PTRTYPE(PDMPICHLPR3 *) PPDMPICHLPR3;
1056/** Pointer to const PIC R3 helpers. */
1057typedef R3PTRTYPE(const PDMPICHLPR3 *) PCPDMPICHLPR3;
1058
1059/** Current PDMPICHLPR3 version number. */
1060#define PDM_PICHLPR3_VERSION PDM_VERSION_MAKE(0xfff7, 1, 0)
1061
1062
1063
1064/**
1065 * Advanced Programmable Interrupt Controller registration structure.
1066 */
1067typedef struct PDMAPICREG
1068{
1069 /** Structure version number. PDM_APICREG_VERSION defines the current version. */
1070 uint32_t u32Version;
1071
1072 /**
1073 * Get a pending interrupt.
1074 *
1075 * @returns Pending interrupt number.
1076 * @param pDevIns Device instance of the APIC.
1077 * @param puTagSrc Where to return the tag source.
1078 */
1079 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns, uint32_t *puTagSrc));
1080
1081 /**
1082 * Check if the APIC has a pending interrupt/if a TPR change would active one
1083 *
1084 * @returns Pending interrupt yes/no
1085 * @param pDevIns Device instance of the APIC.
1086 */
1087 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
1088
1089 /**
1090 * Set the APIC base.
1091 *
1092 * @param pDevIns Device instance of the APIC.
1093 * @param u64Base The new base.
1094 */
1095 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
1096
1097 /**
1098 * Get the APIC base.
1099 *
1100 * @returns Current base.
1101 * @param pDevIns Device instance of the APIC.
1102 */
1103 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
1104
1105 /**
1106 * Set the TPR (task priority register).
1107 *
1108 * @param pDevIns Device instance of the APIC.
1109 * @param idCpu VCPU id
1110 * @param u8TPR The new TPR.
1111 */
1112 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
1113
1114 /**
1115 * Get the TPR (task priority register).
1116 *
1117 * @returns The current TPR.
1118 * @param pDevIns Device instance of the APIC.
1119 * @param idCpu VCPU id
1120 */
1121 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1122
1123 /**
1124 * Write to a MSR in APIC range.
1125 *
1126 * @returns VBox status code.
1127 * @param pDevIns Device instance of the APIC.
1128 * @param idCpu Target CPU.
1129 * @param u32Reg The MSR begin written to.
1130 * @param u64Value The value to write.
1131 *
1132 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1133 * calling this method.
1134 */
1135 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
1136
1137 /**
1138 * Read from a MSR in APIC range.
1139 *
1140 * @returns VBox status code.
1141 * @param pDevIns Device instance of the APIC.
1142 * @param idCpu Target CPU.
1143 * @param u32Reg MSR to read.
1144 * @param pu64Value Where to return the read value.
1145 *
1146 * @remarks Unlike the other callbacks, the PDM lock is not taken before
1147 * calling this method.
1148 */
1149 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
1150
1151 /**
1152 * Private interface between the IOAPIC and APIC.
1153 *
1154 * This is a low-level, APIC/IOAPIC implementation specific interface which
1155 * is registered with PDM only because it makes life so much simpler right
1156 * now (GC bits). This is a bad bad hack! The correct way of doing this
1157 * would involve some way of querying GC interfaces and relocating them.
1158 * Perhaps doing some kind of device init in GC...
1159 *
1160 * @returns status code.
1161 * @param pDevIns Device instance of the APIC.
1162 * @param u8Dest See APIC implementation.
1163 * @param u8DestMode See APIC implementation.
1164 * @param u8DeliveryMode See APIC implementation.
1165 * @param iVector See APIC implementation.
1166 * @param u8Polarity See APIC implementation.
1167 * @param u8TriggerMode See APIC implementation.
1168 * @param uTagSrc The IRQ tag and source (for tracing).
1169 */
1170 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1171 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1172
1173 /**
1174 * Deliver a signal to CPU's local interrupt pins (LINT0/LINT1).
1175 *
1176 * Used for virtual wire mode when interrupts from the PIC are passed through
1177 * LAPIC.
1178 *
1179 * @returns status code.
1180 * @param pDevIns Device instance of the APIC.
1181 * @param u8Pin Local pin number (0 or 1 for current CPUs).
1182 * @param u8Level The level.
1183 * @param uTagSrc The IRQ tag and source (for tracing).
1184 */
1185 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
1186
1187 /** The name of the RC GetInterrupt entry point. */
1188 const char *pszGetInterruptRC;
1189 /** The name of the RC HasPendingIrq entry point. */
1190 const char *pszHasPendingIrqRC;
1191 /** The name of the RC SetBase entry point. */
1192 const char *pszSetBaseRC;
1193 /** The name of the RC GetBase entry point. */
1194 const char *pszGetBaseRC;
1195 /** The name of the RC SetTPR entry point. */
1196 const char *pszSetTPRRC;
1197 /** The name of the RC GetTPR entry point. */
1198 const char *pszGetTPRRC;
1199 /** The name of the RC WriteMSR entry point. */
1200 const char *pszWriteMSRRC;
1201 /** The name of the RC ReadMSR entry point. */
1202 const char *pszReadMSRRC;
1203 /** The name of the RC BusDeliver entry point. */
1204 const char *pszBusDeliverRC;
1205 /** The name of the RC LocalInterrupt entry point. */
1206 const char *pszLocalInterruptRC;
1207
1208 /** The name of the R0 GetInterrupt entry point. */
1209 const char *pszGetInterruptR0;
1210 /** The name of the R0 HasPendingIrq entry point. */
1211 const char *pszHasPendingIrqR0;
1212 /** The name of the R0 SetBase entry point. */
1213 const char *pszSetBaseR0;
1214 /** The name of the R0 GetBase entry point. */
1215 const char *pszGetBaseR0;
1216 /** The name of the R0 SetTPR entry point. */
1217 const char *pszSetTPRR0;
1218 /** The name of the R0 GetTPR entry point. */
1219 const char *pszGetTPRR0;
1220 /** The name of the R0 WriteMSR entry point. */
1221 const char *pszWriteMSRR0;
1222 /** The name of the R0 ReadMSR entry point. */
1223 const char *pszReadMSRR0;
1224 /** The name of the R0 BusDeliver entry point. */
1225 const char *pszBusDeliverR0;
1226 /** The name of the R0 LocalInterrupt entry point. */
1227 const char *pszLocalInterruptR0;
1228
1229} PDMAPICREG;
1230/** Pointer to an APIC registration structure. */
1231typedef PDMAPICREG *PPDMAPICREG;
1232
1233/** Current PDMAPICREG version number. */
1234#define PDM_APICREG_VERSION PDM_VERSION_MAKE(0xfff6, 2, 0)
1235
1236
1237/**
1238 * APIC version argument for pfnChangeFeature.
1239 */
1240typedef enum PDMAPICVERSION
1241{
1242 /** Invalid 0 entry. */
1243 PDMAPICVERSION_INVALID = 0,
1244 /** No APIC. */
1245 PDMAPICVERSION_NONE,
1246 /** Standard APIC (X86_CPUID_FEATURE_EDX_APIC). */
1247 PDMAPICVERSION_APIC,
1248 /** Intel X2APIC (X86_CPUID_FEATURE_ECX_X2APIC). */
1249 PDMAPICVERSION_X2APIC,
1250 /** The usual 32-bit paranoia. */
1251 PDMAPICVERSION_32BIT_HACK = 0x7fffffff
1252} PDMAPICVERSION;
1253
1254/**
1255 * APIC irq argument for SetInterruptFF.
1256 */
1257typedef enum PDMAPICIRQ
1258{
1259 /** Invalid 0 entry. */
1260 PDMAPICIRQ_INVALID = 0,
1261 /** Normal hardware interrupt. */
1262 PDMAPICIRQ_HARDWARE,
1263 /** NMI. */
1264 PDMAPICIRQ_NMI,
1265 /** SMI. */
1266 PDMAPICIRQ_SMI,
1267 /** ExtINT (HW interrupt via PIC). */
1268 PDMAPICIRQ_EXTINT,
1269 /** The usual 32-bit paranoia. */
1270 PDMAPICIRQ_32BIT_HACK = 0x7fffffff
1271} PDMAPICIRQ;
1272
1273
1274/**
1275 * APIC RC helpers.
1276 */
1277typedef struct PDMAPICHLPRC
1278{
1279 /** Structure version. PDM_APICHLPRC_VERSION defines the current version. */
1280 uint32_t u32Version;
1281
1282 /**
1283 * Set the interrupt force action flag.
1284 *
1285 * @param pDevIns Device instance of the APIC.
1286 * @param enmType IRQ type.
1287 * @param idCpu Virtual CPU to set flag upon.
1288 */
1289 DECLRCCALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1290
1291 /**
1292 * Clear the interrupt force action flag.
1293 *
1294 * @param pDevIns Device instance of the APIC.
1295 * @param enmType IRQ type.
1296 * @param idCpu Virtual CPU to clear flag upon.
1297 */
1298 DECLRCCALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1299
1300 /**
1301 * Calculates an IRQ tag for a timer, IPI or similar event.
1302 *
1303 * @returns The IRQ tag.
1304 * @param pDevIns Device instance of the APIC.
1305 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1306 */
1307 DECLRCCALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1308
1309 /**
1310 * Modifies APIC-related bits in the CPUID feature mask.
1311 *
1312 * @param pDevIns Device instance of the APIC.
1313 * @param enmVersion Supported APIC version.
1314 */
1315 DECLRCCALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1316
1317 /**
1318 * Acquires the PDM lock.
1319 *
1320 * @returns VINF_SUCCESS on success.
1321 * @returns rc if we failed to acquire the lock.
1322 * @param pDevIns The APIC device instance.
1323 * @param rc What to return if we fail to acquire the lock.
1324 */
1325 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1326
1327 /**
1328 * Releases the PDM lock.
1329 *
1330 * @param pDevIns The APIC device instance.
1331 */
1332 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1333
1334 /**
1335 * Get the virtual CPU id corresponding to the current EMT.
1336 *
1337 * @param pDevIns The APIC device instance.
1338 */
1339 DECLRCCALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1340
1341 /** Just a safety precaution. */
1342 uint32_t u32TheEnd;
1343} PDMAPICHLPRC;
1344/** Pointer to APIC GC helpers. */
1345typedef RCPTRTYPE(PDMAPICHLPRC *) PPDMAPICHLPRC;
1346/** Pointer to const APIC helpers. */
1347typedef RCPTRTYPE(const PDMAPICHLPRC *) PCPDMAPICHLPRC;
1348
1349/** Current PDMAPICHLPRC version number. */
1350#define PDM_APICHLPRC_VERSION PDM_VERSION_MAKE(0xfff5, 2, 0)
1351
1352
1353/**
1354 * APIC R0 helpers.
1355 */
1356typedef struct PDMAPICHLPR0
1357{
1358 /** Structure version. PDM_APICHLPR0_VERSION defines the current version. */
1359 uint32_t u32Version;
1360
1361 /**
1362 * Set the interrupt force action flag.
1363 *
1364 * @param pDevIns Device instance of the APIC.
1365 * @param enmType IRQ type.
1366 * @param idCpu Virtual CPU to set flag upon.
1367 */
1368 DECLR0CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1369
1370 /**
1371 * Clear the interrupt force action flag.
1372 *
1373 * @param pDevIns Device instance of the APIC.
1374 * @param enmType IRQ type.
1375 * @param idCpu Virtual CPU to clear flag upon.
1376 */
1377 DECLR0CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1378
1379 /**
1380 * Calculates an IRQ tag for a timer, IPI or similar event.
1381 *
1382 * @returns The IRQ tag.
1383 * @param pDevIns Device instance of the APIC.
1384 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1385 */
1386 DECLR0CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1387
1388 /**
1389 * Modifies APIC-related bits in the CPUID feature mask.
1390 *
1391 * @param pDevIns Device instance of the APIC.
1392 * @param enmVersion Supported APIC version.
1393 */
1394 DECLR0CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1395
1396 /**
1397 * Acquires the PDM lock.
1398 *
1399 * @returns VINF_SUCCESS on success.
1400 * @returns rc if we failed to acquire the lock.
1401 * @param pDevIns The APIC device instance.
1402 * @param rc What to return if we fail to acquire the lock.
1403 */
1404 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1405
1406 /**
1407 * Releases the PDM lock.
1408 *
1409 * @param pDevIns The APIC device instance.
1410 */
1411 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1412
1413 /**
1414 * Get the virtual CPU id corresponding to the current EMT.
1415 *
1416 * @param pDevIns The APIC device instance.
1417 */
1418 DECLR0CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1419
1420 /** Just a safety precaution. */
1421 uint32_t u32TheEnd;
1422} PDMAPICHLPR0;
1423/** Pointer to APIC GC helpers. */
1424typedef RCPTRTYPE(PDMAPICHLPR0 *) PPDMAPICHLPR0;
1425/** Pointer to const APIC helpers. */
1426typedef R0PTRTYPE(const PDMAPICHLPR0 *) PCPDMAPICHLPR0;
1427
1428/** Current PDMAPICHLPR0 version number. */
1429#define PDM_APICHLPR0_VERSION PDM_VERSION_MAKE(0xfff4, 2, 0)
1430
1431/**
1432 * APIC R3 helpers.
1433 */
1434typedef struct PDMAPICHLPR3
1435{
1436 /** Structure version. PDM_APICHLPR3_VERSION defines the current version. */
1437 uint32_t u32Version;
1438
1439 /**
1440 * Set the interrupt force action flag.
1441 *
1442 * @param pDevIns Device instance of the APIC.
1443 * @param enmType IRQ type.
1444 * @param idCpu Virtual CPU to set flag upon.
1445 */
1446 DECLR3CALLBACKMEMBER(void, pfnSetInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1447
1448 /**
1449 * Clear the interrupt force action flag.
1450 *
1451 * @param pDevIns Device instance of the APIC.
1452 * @param enmType IRQ type.
1453 * @param idCpu Virtual CPU to clear flag upon.
1454 */
1455 DECLR3CALLBACKMEMBER(void, pfnClearInterruptFF,(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu));
1456
1457 /**
1458 * Calculates an IRQ tag for a timer, IPI or similar event.
1459 *
1460 * @returns The IRQ tag.
1461 * @param pDevIns Device instance of the APIC.
1462 * @param u8Level PDM_IRQ_LEVEL_HIGH or PDM_IRQ_LEVEL_FLIP_FLOP.
1463 */
1464 DECLR3CALLBACKMEMBER(uint32_t, pfnCalcIrqTag,(PPDMDEVINS pDevIns, uint8_t u8Level));
1465
1466 /**
1467 * Modifies APIC-related bits in the CPUID feature mask.
1468 *
1469 * @param pDevIns Device instance of the APIC.
1470 * @param enmVersion Supported APIC version.
1471 */
1472 DECLR3CALLBACKMEMBER(void, pfnChangeFeature,(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion));
1473
1474 /**
1475 * Get the virtual CPU id corresponding to the current EMT.
1476 *
1477 * @param pDevIns The APIC device instance.
1478 */
1479 DECLR3CALLBACKMEMBER(VMCPUID, pfnGetCpuId,(PPDMDEVINS pDevIns));
1480
1481 /**
1482 * Sends SIPI to given virtual CPU.
1483 *
1484 * @param pDevIns The APIC device instance.
1485 * @param idCpu Virtual CPU to perform SIPI on
1486 * @param iVector SIPI vector
1487 */
1488 DECLR3CALLBACKMEMBER(void, pfnSendSipi,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector));
1489
1490 /**
1491 * Sends init IPI to given virtual CPU, should result in reset and
1492 * halting till SIPI.
1493 *
1494 * @param pDevIns The APIC device instance.
1495 * @param idCpu Virtual CPU to perform SIPI on
1496 */
1497 DECLR3CALLBACKMEMBER(void, pfnSendInitIpi,(PPDMDEVINS pDevIns, VMCPUID idCpu));
1498
1499 /**
1500 * Gets the address of the RC APIC helpers.
1501 *
1502 * This should be called at both construction and relocation time
1503 * to obtain the correct address of the RC helpers.
1504 *
1505 * @returns GC pointer to the APIC helpers.
1506 * @param pDevIns Device instance of the APIC.
1507 */
1508 DECLR3CALLBACKMEMBER(PCPDMAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1509
1510 /**
1511 * Gets the address of the R0 APIC helpers.
1512 *
1513 * This should be called at both construction and relocation time
1514 * to obtain the correct address of the R0 helpers.
1515 *
1516 * @returns R0 pointer to the APIC helpers.
1517 * @param pDevIns Device instance of the APIC.
1518 */
1519 DECLR3CALLBACKMEMBER(PCPDMAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1520
1521 /**
1522 * Get the critical section used to synchronize the PICs, PCI and stuff.
1523 *
1524 * @returns Ring-3 pointer to the critical section.
1525 * @param pDevIns The APIC device instance.
1526 */
1527 DECLR3CALLBACKMEMBER(R3PTRTYPE(PPDMCRITSECT), pfnGetR3CritSect,(PPDMDEVINS pDevIns));
1528
1529 /**
1530 * Get the critical section used to synchronize the PICs, PCI and stuff.
1531 *
1532 * @returns Raw-mode context pointer to the critical section.
1533 * @param pDevIns The APIC device instance.
1534 */
1535 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnGetRCCritSect,(PPDMDEVINS pDevIns));
1536
1537 /**
1538 * Get the critical section used to synchronize the PICs, PCI and stuff.
1539 *
1540 * @returns Ring-0 pointer to the critical section.
1541 * @param pDevIns The APIC device instance.
1542 */
1543 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnGetR0CritSect,(PPDMDEVINS pDevIns));
1544
1545 /** Just a safety precaution. */
1546 uint32_t u32TheEnd;
1547} PDMAPICHLPR3;
1548/** Pointer to APIC helpers. */
1549typedef R3PTRTYPE(PDMAPICHLPR3 *) PPDMAPICHLPR3;
1550/** Pointer to const APIC helpers. */
1551typedef R3PTRTYPE(const PDMAPICHLPR3 *) PCPDMAPICHLPR3;
1552
1553/** Current PDMAPICHLP version number. */
1554#define PDM_APICHLPR3_VERSION PDM_VERSION_MAKE(0xfff3, 2, 0)
1555
1556
1557/**
1558 * I/O APIC registration structure.
1559 */
1560typedef struct PDMIOAPICREG
1561{
1562 /** Struct version+magic number (PDM_IOAPICREG_VERSION). */
1563 uint32_t u32Version;
1564
1565 /**
1566 * Set the an IRQ.
1567 *
1568 * @param pDevIns Device instance of the I/O APIC.
1569 * @param iIrq IRQ number to set.
1570 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
1571 * @param uTagSrc The IRQ tag and source (for tracing).
1572 */
1573 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc));
1574
1575 /** The name of the RC SetIrq entry point. */
1576 const char *pszSetIrqRC;
1577
1578 /** The name of the R0 SetIrq entry point. */
1579 const char *pszSetIrqR0;
1580
1581 /**
1582 * Send a MSI.
1583 *
1584 * @param pDevIns Device instance of the I/O APIC.
1585 * @param GCPhys Request address.
1586 * @param uValue Request value.
1587 * @param uTagSrc The IRQ tag and source (for tracing).
1588 */
1589 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
1590
1591 /** The name of the RC SendMsi entry point. */
1592 const char *pszSendMsiRC;
1593
1594 /** The name of the R0 SendMsi entry point. */
1595 const char *pszSendMsiR0;
1596} PDMIOAPICREG;
1597/** Pointer to an APIC registration structure. */
1598typedef PDMIOAPICREG *PPDMIOAPICREG;
1599
1600/** Current PDMAPICREG version number. */
1601#define PDM_IOAPICREG_VERSION PDM_VERSION_MAKE(0xfff2, 3, 0)
1602
1603
1604/**
1605 * IOAPIC RC helpers.
1606 */
1607typedef struct PDMIOAPICHLPRC
1608{
1609 /** Structure version. PDM_IOAPICHLPRC_VERSION defines the current version. */
1610 uint32_t u32Version;
1611
1612 /**
1613 * Private interface between the IOAPIC and APIC.
1614 *
1615 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1616 *
1617 * @returns status code.
1618 * @param pDevIns Device instance of the IOAPIC.
1619 * @param u8Dest See APIC implementation.
1620 * @param u8DestMode See APIC implementation.
1621 * @param u8DeliveryMode See APIC implementation.
1622 * @param iVector See APIC implementation.
1623 * @param u8Polarity See APIC implementation.
1624 * @param u8TriggerMode See APIC implementation.
1625 * @param uTagSrc The IRQ tag and source (for tracing).
1626 */
1627 DECLRCCALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1628 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1629
1630 /**
1631 * Acquires the PDM lock.
1632 *
1633 * @returns VINF_SUCCESS on success.
1634 * @returns rc if we failed to acquire the lock.
1635 * @param pDevIns The IOAPIC device instance.
1636 * @param rc What to return if we fail to acquire the lock.
1637 */
1638 DECLRCCALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1639
1640 /**
1641 * Releases the PDM lock.
1642 *
1643 * @param pDevIns The IOAPIC device instance.
1644 */
1645 DECLRCCALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1646
1647 /** Just a safety precaution. */
1648 uint32_t u32TheEnd;
1649} PDMIOAPICHLPRC;
1650/** Pointer to IOAPIC RC helpers. */
1651typedef RCPTRTYPE(PDMIOAPICHLPRC *) PPDMIOAPICHLPRC;
1652/** Pointer to const IOAPIC helpers. */
1653typedef RCPTRTYPE(const PDMIOAPICHLPRC *) PCPDMIOAPICHLPRC;
1654
1655/** Current PDMIOAPICHLPRC version number. */
1656#define PDM_IOAPICHLPRC_VERSION PDM_VERSION_MAKE(0xfff1, 2, 0)
1657
1658
1659/**
1660 * IOAPIC R0 helpers.
1661 */
1662typedef struct PDMIOAPICHLPR0
1663{
1664 /** Structure version. PDM_IOAPICHLPR0_VERSION defines the current version. */
1665 uint32_t u32Version;
1666
1667 /**
1668 * Private interface between the IOAPIC and APIC.
1669 *
1670 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1671 *
1672 * @returns status code.
1673 * @param pDevIns Device instance of the IOAPIC.
1674 * @param u8Dest See APIC implementation.
1675 * @param u8DestMode See APIC implementation.
1676 * @param u8DeliveryMode See APIC implementation.
1677 * @param iVector See APIC implementation.
1678 * @param u8Polarity See APIC implementation.
1679 * @param u8TriggerMode See APIC implementation.
1680 * @param uTagSrc The IRQ tag and source (for tracing).
1681 */
1682 DECLR0CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1683 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1684
1685 /**
1686 * Acquires the PDM lock.
1687 *
1688 * @returns VINF_SUCCESS on success.
1689 * @returns rc if we failed to acquire the lock.
1690 * @param pDevIns The IOAPIC device instance.
1691 * @param rc What to return if we fail to acquire the lock.
1692 */
1693 DECLR0CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1694
1695 /**
1696 * Releases the PDM lock.
1697 *
1698 * @param pDevIns The IOAPIC device instance.
1699 */
1700 DECLR0CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1701
1702 /** Just a safety precaution. */
1703 uint32_t u32TheEnd;
1704} PDMIOAPICHLPR0;
1705/** Pointer to IOAPIC R0 helpers. */
1706typedef R0PTRTYPE(PDMIOAPICHLPR0 *) PPDMIOAPICHLPR0;
1707/** Pointer to const IOAPIC helpers. */
1708typedef R0PTRTYPE(const PDMIOAPICHLPR0 *) PCPDMIOAPICHLPR0;
1709
1710/** Current PDMIOAPICHLPR0 version number. */
1711#define PDM_IOAPICHLPR0_VERSION PDM_VERSION_MAKE(0xfff0, 2, 0)
1712
1713/**
1714 * IOAPIC R3 helpers.
1715 */
1716typedef struct PDMIOAPICHLPR3
1717{
1718 /** Structure version. PDM_IOAPICHLPR3_VERSION defines the current version. */
1719 uint32_t u32Version;
1720
1721 /**
1722 * Private interface between the IOAPIC and APIC.
1723 *
1724 * See comments about this hack on PDMAPICREG::pfnBusDeliverR3.
1725 *
1726 * @returns status code
1727 * @param pDevIns Device instance of the IOAPIC.
1728 * @param u8Dest See APIC implementation.
1729 * @param u8DestMode See APIC implementation.
1730 * @param u8DeliveryMode See APIC implementation.
1731 * @param iVector See APIC implementation.
1732 * @param u8Polarity See APIC implementation.
1733 * @param u8TriggerMode See APIC implementation.
1734 * @param uTagSrc The IRQ tag and source (for tracing).
1735 */
1736 DECLR3CALLBACKMEMBER(int, pfnApicBusDeliver,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
1737 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode, uint32_t uTagSrc));
1738
1739 /**
1740 * Acquires the PDM lock.
1741 *
1742 * @returns VINF_SUCCESS on success.
1743 * @returns Fatal error on failure.
1744 * @param pDevIns The IOAPIC device instance.
1745 * @param rc Dummy for making the interface identical to the GC and R0 versions.
1746 */
1747 DECLR3CALLBACKMEMBER(int, pfnLock,(PPDMDEVINS pDevIns, int rc));
1748
1749 /**
1750 * Releases the PDM lock.
1751 *
1752 * @param pDevIns The IOAPIC device instance.
1753 */
1754 DECLR3CALLBACKMEMBER(void, pfnUnlock,(PPDMDEVINS pDevIns));
1755
1756 /**
1757 * Gets the address of the RC IOAPIC helpers.
1758 *
1759 * This should be called at both construction and relocation time
1760 * to obtain the correct address of the RC helpers.
1761 *
1762 * @returns RC pointer to the IOAPIC helpers.
1763 * @param pDevIns Device instance of the IOAPIC.
1764 */
1765 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1766
1767 /**
1768 * Gets the address of the R0 IOAPIC helpers.
1769 *
1770 * This should be called at both construction and relocation time
1771 * to obtain the correct address of the R0 helpers.
1772 *
1773 * @returns R0 pointer to the IOAPIC helpers.
1774 * @param pDevIns Device instance of the IOAPIC.
1775 */
1776 DECLR3CALLBACKMEMBER(PCPDMIOAPICHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1777
1778 /** Just a safety precaution. */
1779 uint32_t u32TheEnd;
1780} PDMIOAPICHLPR3;
1781/** Pointer to IOAPIC R3 helpers. */
1782typedef R3PTRTYPE(PDMIOAPICHLPR3 *) PPDMIOAPICHLPR3;
1783/** Pointer to const IOAPIC helpers. */
1784typedef R3PTRTYPE(const PDMIOAPICHLPR3 *) PCPDMIOAPICHLPR3;
1785
1786/** Current PDMIOAPICHLPR3 version number. */
1787#define PDM_IOAPICHLPR3_VERSION PDM_VERSION_MAKE(0xffef, 2, 0)
1788
1789
1790/**
1791 * HPET registration structure.
1792 */
1793typedef struct PDMHPETREG
1794{
1795 /** Struct version+magic number (PDM_HPETREG_VERSION). */
1796 uint32_t u32Version;
1797
1798} PDMHPETREG;
1799/** Pointer to an HPET registration structure. */
1800typedef PDMHPETREG *PPDMHPETREG;
1801
1802/** Current PDMHPETREG version number. */
1803#define PDM_HPETREG_VERSION PDM_VERSION_MAKE(0xffe2, 1, 0)
1804
1805/**
1806 * HPET RC helpers.
1807 *
1808 * @remarks Keep this around in case HPET will need PDM interaction in again RC
1809 * at some later point.
1810 */
1811typedef struct PDMHPETHLPRC
1812{
1813 /** Structure version. PDM_HPETHLPRC_VERSION defines the current version. */
1814 uint32_t u32Version;
1815
1816 /** Just a safety precaution. */
1817 uint32_t u32TheEnd;
1818} PDMHPETHLPRC;
1819
1820/** Pointer to HPET RC helpers. */
1821typedef RCPTRTYPE(PDMHPETHLPRC *) PPDMHPETHLPRC;
1822/** Pointer to const HPET RC helpers. */
1823typedef RCPTRTYPE(const PDMHPETHLPRC *) PCPDMHPETHLPRC;
1824
1825/** Current PDMHPETHLPRC version number. */
1826#define PDM_HPETHLPRC_VERSION PDM_VERSION_MAKE(0xffee, 2, 0)
1827
1828
1829/**
1830 * HPET R0 helpers.
1831 *
1832 * @remarks Keep this around in case HPET will need PDM interaction in again R0
1833 * at some later point.
1834 */
1835typedef struct PDMHPETHLPR0
1836{
1837 /** Structure version. PDM_HPETHLPR0_VERSION defines the current version. */
1838 uint32_t u32Version;
1839
1840 /** Just a safety precaution. */
1841 uint32_t u32TheEnd;
1842} PDMHPETHLPR0;
1843
1844/** Pointer to HPET R0 helpers. */
1845typedef R0PTRTYPE(PDMHPETHLPR0 *) PPDMHPETHLPR0;
1846/** Pointer to const HPET R0 helpers. */
1847typedef R0PTRTYPE(const PDMHPETHLPR0 *) PCPDMHPETHLPR0;
1848
1849/** Current PDMHPETHLPR0 version number. */
1850#define PDM_HPETHLPR0_VERSION PDM_VERSION_MAKE(0xffed, 2, 0)
1851
1852/**
1853 * HPET R3 helpers.
1854 */
1855typedef struct PDMHPETHLPR3
1856{
1857 /** Structure version. PDM_HPETHLP_VERSION defines the current version. */
1858 uint32_t u32Version;
1859
1860 /**
1861 * Gets the address of the RC HPET helpers.
1862 *
1863 * This should be called at both construction and relocation time
1864 * to obtain the correct address of the RC helpers.
1865 *
1866 * @returns RC pointer to the HPET helpers.
1867 * @param pDevIns Device instance of the HPET.
1868 */
1869 DECLR3CALLBACKMEMBER(PCPDMHPETHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1870
1871 /**
1872 * Gets the address of the R0 HPET helpers.
1873 *
1874 * This should be called at both construction and relocation time
1875 * to obtain the correct address of the R0 helpers.
1876 *
1877 * @returns R0 pointer to the HPET helpers.
1878 * @param pDevIns Device instance of the HPET.
1879 */
1880 DECLR3CALLBACKMEMBER(PCPDMHPETHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1881
1882 /**
1883 * Set legacy mode on PIT and RTC.
1884 *
1885 * @returns VINF_SUCCESS on success.
1886 * @returns rc if we failed to set legacy mode.
1887 * @param pDevIns Device instance of the HPET.
1888 * @param fActivated Whether legacy mode is activated or deactivated.
1889 */
1890 DECLR3CALLBACKMEMBER(int, pfnSetLegacyMode,(PPDMDEVINS pDevIns, bool fActivated));
1891
1892
1893 /**
1894 * Set IRQ, bypassing ISA bus override rules.
1895 *
1896 * @returns VINF_SUCCESS on success.
1897 * @returns rc if we failed to set legacy mode.
1898 * @param pDevIns Device instance of the HPET.
1899 * @param fActivate Activate or deactivate legacy mode.
1900 */
1901 DECLR3CALLBACKMEMBER(int, pfnSetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
1902
1903 /** Just a safety precaution. */
1904 uint32_t u32TheEnd;
1905} PDMHPETHLPR3;
1906
1907/** Pointer to HPET R3 helpers. */
1908typedef R3PTRTYPE(PDMHPETHLPR3 *) PPDMHPETHLPR3;
1909/** Pointer to const HPET R3 helpers. */
1910typedef R3PTRTYPE(const PDMHPETHLPR3 *) PCPDMHPETHLPR3;
1911
1912/** Current PDMHPETHLPR3 version number. */
1913#define PDM_HPETHLPR3_VERSION PDM_VERSION_MAKE(0xffec, 2, 0)
1914
1915
1916/**
1917 * Raw PCI device registration structure.
1918 */
1919typedef struct PDMPCIRAWREG
1920{
1921 /** Struct version+magic number (PDM_PCIRAWREG_VERSION). */
1922 uint32_t u32Version;
1923 /** Just a safety precaution. */
1924 uint32_t u32TheEnd;
1925} PDMPCIRAWREG;
1926/** Pointer to a raw PCI registration structure. */
1927typedef PDMPCIRAWREG *PPDMPCIRAWREG;
1928
1929/** Current PDMPCIRAWREG version number. */
1930#define PDM_PCIRAWREG_VERSION PDM_VERSION_MAKE(0xffe1, 1, 0)
1931
1932/**
1933 * Raw PCI device raw-mode context helpers.
1934 */
1935typedef struct PDMPCIRAWHLPRC
1936{
1937 /** Structure version and magic number (PDM_PCIRAWHLPRC_VERSION). */
1938 uint32_t u32Version;
1939 /** Just a safety precaution. */
1940 uint32_t u32TheEnd;
1941} PDMPCIRAWHLPRC;
1942/** Pointer to a raw PCI deviec raw-mode context helper structure. */
1943typedef RCPTRTYPE(PDMPCIRAWHLPRC *) PPDMPCIRAWHLPRC;
1944/** Pointer to a const raw PCI deviec raw-mode context helper structure. */
1945typedef RCPTRTYPE(const PDMPCIRAWHLPRC *) PCPDMPCIRAWHLPRC;
1946
1947/** Current PDMPCIRAWHLPRC version number. */
1948#define PDM_PCIRAWHLPRC_VERSION PDM_VERSION_MAKE(0xffe0, 1, 0)
1949
1950/**
1951 * Raw PCI device ring-0 context helpers.
1952 */
1953typedef struct PDMPCIRAWHLPR0
1954{
1955 /** Structure version and magic number (PDM_PCIRAWHLPR0_VERSION). */
1956 uint32_t u32Version;
1957 /** Just a safety precaution. */
1958 uint32_t u32TheEnd;
1959} PDMPCIRAWHLPR0;
1960/** Pointer to a raw PCI deviec ring-0 context helper structure. */
1961typedef R0PTRTYPE(PDMPCIRAWHLPR0 *) PPDMPCIRAWHLPR0;
1962/** Pointer to a const raw PCI deviec ring-0 context helper structure. */
1963typedef R0PTRTYPE(const PDMPCIRAWHLPR0 *) PCPDMPCIRAWHLPR0;
1964
1965/** Current PDMPCIRAWHLPR0 version number. */
1966#define PDM_PCIRAWHLPR0_VERSION PDM_VERSION_MAKE(0xffdf, 1, 0)
1967
1968
1969/**
1970 * Raw PCI device ring-3 context helpers.
1971 */
1972typedef struct PDMPCIRAWHLPR3
1973{
1974 /** Undefined structure version and magic number. */
1975 uint32_t u32Version;
1976
1977 /**
1978 * Gets the address of the RC raw PCI device helpers.
1979 *
1980 * This should be called at both construction and relocation time to obtain
1981 * the correct address of the RC helpers.
1982 *
1983 * @returns RC pointer to the raw PCI device helpers.
1984 * @param pDevIns Device instance of the raw PCI device.
1985 */
1986 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPRC, pfnGetRCHelpers,(PPDMDEVINS pDevIns));
1987
1988 /**
1989 * Gets the address of the R0 raw PCI device helpers.
1990 *
1991 * This should be called at both construction and relocation time to obtain
1992 * the correct address of the R0 helpers.
1993 *
1994 * @returns R0 pointer to the raw PCI device helpers.
1995 * @param pDevIns Device instance of the raw PCI device.
1996 */
1997 DECLR3CALLBACKMEMBER(PCPDMPCIRAWHLPR0, pfnGetR0Helpers,(PPDMDEVINS pDevIns));
1998
1999 /** Just a safety precaution. */
2000 uint32_t u32TheEnd;
2001} PDMPCIRAWHLPR3;
2002/** Pointer to raw PCI R3 helpers. */
2003typedef R3PTRTYPE(PDMPCIRAWHLPR3 *) PPDMPCIRAWHLPR3;
2004/** Pointer to const raw PCI R3 helpers. */
2005typedef R3PTRTYPE(const PDMPCIRAWHLPR3 *) PCPDMPCIRAWHLPR3;
2006
2007/** Current PDMPCIRAWHLPR3 version number. */
2008#define PDM_PCIRAWHLPR3_VERSION PDM_VERSION_MAKE(0xffde, 1, 0)
2009
2010
2011#ifdef IN_RING3
2012
2013/**
2014 * DMA Transfer Handler.
2015 *
2016 * @returns Number of bytes transferred.
2017 * @param pDevIns Device instance of the DMA.
2018 * @param pvUser User pointer.
2019 * @param uChannel Channel number.
2020 * @param off DMA position.
2021 * @param cb Block size.
2022 */
2023typedef DECLCALLBACK(uint32_t) FNDMATRANSFERHANDLER(PPDMDEVINS pDevIns, void *pvUser, unsigned uChannel, uint32_t off, uint32_t cb);
2024/** Pointer to a FNDMATRANSFERHANDLER(). */
2025typedef FNDMATRANSFERHANDLER *PFNDMATRANSFERHANDLER;
2026
2027/**
2028 * DMA Controller registration structure.
2029 */
2030typedef struct PDMDMAREG
2031{
2032 /** Structure version number. PDM_DMACREG_VERSION defines the current version. */
2033 uint32_t u32Version;
2034
2035 /**
2036 * Execute pending transfers.
2037 *
2038 * @returns A more work indiciator. I.e. 'true' if there is more to be done, and 'false' if all is done.
2039 * @param pDevIns Device instance of the DMAC.
2040 */
2041 DECLR3CALLBACKMEMBER(bool, pfnRun,(PPDMDEVINS pDevIns));
2042
2043 /**
2044 * Register transfer function for DMA channel.
2045 *
2046 * @param pDevIns Device instance of the DMAC.
2047 * @param uChannel Channel number.
2048 * @param pfnTransferHandler Device specific transfer function.
2049 * @param pvUSer User pointer to be passed to the callback.
2050 */
2051 DECLR3CALLBACKMEMBER(void, pfnRegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
2052
2053 /**
2054 * Read memory
2055 *
2056 * @returns Number of bytes read.
2057 * @param pDevIns Device instance of the DMAC.
2058 * @param pvBuffer Pointer to target buffer.
2059 * @param off DMA position.
2060 * @param cbBlock Block size.
2061 */
2062 DECLR3CALLBACKMEMBER(uint32_t, pfnReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock));
2063
2064 /**
2065 * Write memory
2066 *
2067 * @returns Number of bytes written.
2068 * @param pDevIns Device instance of the DMAC.
2069 * @param pvBuffer Memory to write.
2070 * @param off DMA position.
2071 * @param cbBlock Block size.
2072 */
2073 DECLR3CALLBACKMEMBER(uint32_t, pfnWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock));
2074
2075 /**
2076 * Set the DREQ line.
2077 *
2078 * @param pDevIns Device instance of the DMAC.
2079 * @param uChannel Channel number.
2080 * @param uLevel Level of the line.
2081 */
2082 DECLR3CALLBACKMEMBER(void, pfnSetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
2083
2084 /**
2085 * Get channel mode
2086 *
2087 * @returns Channel mode.
2088 * @param pDevIns Device instance of the DMAC.
2089 * @param uChannel Channel number.
2090 */
2091 DECLR3CALLBACKMEMBER(uint8_t, pfnGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
2092
2093} PDMDMACREG;
2094/** Pointer to a DMAC registration structure. */
2095typedef PDMDMACREG *PPDMDMACREG;
2096
2097/** Current PDMDMACREG version number. */
2098#define PDM_DMACREG_VERSION PDM_VERSION_MAKE(0xffeb, 1, 0)
2099
2100
2101/**
2102 * DMA Controller device helpers.
2103 */
2104typedef struct PDMDMACHLP
2105{
2106 /** Structure version. PDM_DMACHLP_VERSION defines the current version. */
2107 uint32_t u32Version;
2108
2109 /* to-be-defined */
2110
2111} PDMDMACHLP;
2112/** Pointer to DMAC helpers. */
2113typedef PDMDMACHLP *PPDMDMACHLP;
2114/** Pointer to const DMAC helpers. */
2115typedef const PDMDMACHLP *PCPDMDMACHLP;
2116
2117/** Current PDMDMACHLP version number. */
2118#define PDM_DMACHLP_VERSION PDM_VERSION_MAKE(0xffea, 1, 0)
2119
2120#endif /* IN_RING3 */
2121
2122
2123
2124/**
2125 * RTC registration structure.
2126 */
2127typedef struct PDMRTCREG
2128{
2129 /** Structure version number. PDM_RTCREG_VERSION defines the current version. */
2130 uint32_t u32Version;
2131 uint32_t u32Alignment; /**< structure size alignment. */
2132
2133 /**
2134 * Write to a CMOS register and update the checksum if necessary.
2135 *
2136 * @returns VBox status code.
2137 * @param pDevIns Device instance of the RTC.
2138 * @param iReg The CMOS register index.
2139 * @param u8Value The CMOS register value.
2140 */
2141 DECLR3CALLBACKMEMBER(int, pfnWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
2142
2143 /**
2144 * Read a CMOS register.
2145 *
2146 * @returns VBox status code.
2147 * @param pDevIns Device instance of the RTC.
2148 * @param iReg The CMOS register index.
2149 * @param pu8Value Where to store the CMOS register value.
2150 */
2151 DECLR3CALLBACKMEMBER(int, pfnRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
2152
2153} PDMRTCREG;
2154/** Pointer to a RTC registration structure. */
2155typedef PDMRTCREG *PPDMRTCREG;
2156/** Pointer to a const RTC registration structure. */
2157typedef const PDMRTCREG *PCPDMRTCREG;
2158
2159/** Current PDMRTCREG version number. */
2160#define PDM_RTCREG_VERSION PDM_VERSION_MAKE(0xffe9, 1, 0)
2161
2162
2163/**
2164 * RTC device helpers.
2165 */
2166typedef struct PDMRTCHLP
2167{
2168 /** Structure version. PDM_RTCHLP_VERSION defines the current version. */
2169 uint32_t u32Version;
2170
2171 /* to-be-defined */
2172
2173} PDMRTCHLP;
2174/** Pointer to RTC helpers. */
2175typedef PDMRTCHLP *PPDMRTCHLP;
2176/** Pointer to const RTC helpers. */
2177typedef const PDMRTCHLP *PCPDMRTCHLP;
2178
2179/** Current PDMRTCHLP version number. */
2180#define PDM_RTCHLP_VERSION PDM_VERSION_MAKE(0xffe8, 1, 0)
2181
2182
2183
2184#ifdef IN_RING3
2185
2186/**
2187 * PDM Device API.
2188 */
2189typedef struct PDMDEVHLPR3
2190{
2191 /** Structure version. PDM_DEVHLPR3_VERSION defines the current version. */
2192 uint32_t u32Version;
2193
2194 /**
2195 * Register a number of I/O ports with a device.
2196 *
2197 * These callbacks are of course for the host context (HC).
2198 * Register HC handlers before guest context (GC) handlers! There must be a
2199 * HC handler for every GC handler!
2200 *
2201 * @returns VBox status.
2202 * @param pDevIns The device instance to register the ports with.
2203 * @param Port First port number in the range.
2204 * @param cPorts Number of ports to register.
2205 * @param pvUser User argument.
2206 * @param pfnOut Pointer to function which is gonna handle OUT operations.
2207 * @param pfnIn Pointer to function which is gonna handle IN operations.
2208 * @param pfnOutStr Pointer to function which is gonna handle string OUT operations.
2209 * @param pfnInStr Pointer to function which is gonna handle string IN operations.
2210 * @param pszDesc Pointer to description string. This must not be freed.
2211 */
2212 DECLR3CALLBACKMEMBER(int, pfnIOPortRegister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
2213 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
2214 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc));
2215
2216 /**
2217 * Register a number of I/O ports with a device for RC.
2218 *
2219 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2220 * (R3) handlers before raw-mode context handlers! There must be a R3 handler
2221 * for every RC handler!
2222 *
2223 * @returns VBox status.
2224 * @param pDevIns The device instance to register the ports with
2225 * and which RC module to resolve the names
2226 * against.
2227 * @param Port First port number in the range.
2228 * @param cPorts Number of ports to register.
2229 * @param pvUser User argument.
2230 * @param pszOut Name of the RC function which is gonna handle OUT operations.
2231 * @param pszIn Name of the RC function which is gonna handle IN operations.
2232 * @param pszOutStr Name of the RC function which is gonna handle string OUT operations.
2233 * @param pszInStr Name of the RC function which is gonna handle string IN operations.
2234 * @param pszDesc Pointer to description string. This must not be freed.
2235 */
2236 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterRC,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
2237 const char *pszOut, const char *pszIn,
2238 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2239
2240 /**
2241 * Register a number of I/O ports with a device.
2242 *
2243 * These callbacks are of course for the ring-0 host context (R0).
2244 * Register R3 (HC) handlers before R0 (R0) handlers! There must be a R3 (HC) handler for every R0 handler!
2245 *
2246 * @returns VBox status.
2247 * @param pDevIns The device instance to register the ports with.
2248 * @param Port First port number in the range.
2249 * @param cPorts Number of ports to register.
2250 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2251 * @param pszOut Name of the R0 function which is gonna handle OUT operations.
2252 * @param pszIn Name of the R0 function which is gonna handle IN operations.
2253 * @param pszOutStr Name of the R0 function which is gonna handle string OUT operations.
2254 * @param pszInStr Name of the R0 function which is gonna handle string IN operations.
2255 * @param pszDesc Pointer to description string. This must not be freed.
2256 */
2257 DECLR3CALLBACKMEMBER(int, pfnIOPortRegisterR0,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
2258 const char *pszOut, const char *pszIn,
2259 const char *pszOutStr, const char *pszInStr, const char *pszDesc));
2260
2261 /**
2262 * Deregister I/O ports.
2263 *
2264 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2265 *
2266 * @returns VBox status.
2267 * @param pDevIns The device instance owning the ports.
2268 * @param Port First port number in the range.
2269 * @param cPorts Number of ports to deregister.
2270 */
2271 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts));
2272
2273 /**
2274 * Register a Memory Mapped I/O (MMIO) region.
2275 *
2276 * These callbacks are of course for the ring-3 context (R3). Register HC
2277 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
2278 * must be a R3 handler for every RC and R0 handler!
2279 *
2280 * @returns VBox status.
2281 * @param pDevIns The device instance to register the MMIO with.
2282 * @param GCPhysStart First physical address in the range.
2283 * @param cbRange The size of the range (in bytes).
2284 * @param pvUser User argument.
2285 * @param pfnWrite Pointer to function which is gonna handle Write operations.
2286 * @param pfnRead Pointer to function which is gonna handle Read operations.
2287 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)
2288 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
2289 * @param pszDesc Pointer to description string. This must not be freed.
2290 */
2291 DECLR3CALLBACKMEMBER(int, pfnMMIORegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
2292 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
2293 uint32_t fFlags, const char *pszDesc));
2294
2295 /**
2296 * Register a Memory Mapped I/O (MMIO) region for GC.
2297 *
2298 * These callbacks are for the raw-mode context (RC). Register ring-3 context
2299 * (R3) handlers before guest context handlers! There must be a R3 handler for
2300 * every RC handler!
2301 *
2302 * @returns VBox status.
2303 * @param pDevIns The device instance to register the MMIO with.
2304 * @param GCPhysStart First physical address in the range.
2305 * @param cbRange The size of the range (in bytes).
2306 * @param pvUser User argument.
2307 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2308 * @param pszRead Name of the RC function which is gonna handle Read operations.
2309 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2310 */
2311 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterRC,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
2312 const char *pszWrite, const char *pszRead, const char *pszFill));
2313
2314 /**
2315 * Register a Memory Mapped I/O (MMIO) region for R0.
2316 *
2317 * These callbacks are for the ring-0 host context (R0). Register ring-3
2318 * constext (R3) handlers before R0 handlers! There must be a R3 handler for
2319 * every R0 handler!
2320 *
2321 * @returns VBox status.
2322 * @param pDevIns The device instance to register the MMIO with.
2323 * @param GCPhysStart First physical address in the range.
2324 * @param cbRange The size of the range (in bytes).
2325 * @param pvUser User argument. (if pointer, then it must be in locked memory!)
2326 * @param pszWrite Name of the RC function which is gonna handle Write operations.
2327 * @param pszRead Name of the RC function which is gonna handle Read operations.
2328 * @param pszFill Name of the RC function which is gonna handle Fill/memset operations. (optional)
2329 * @param pszDesc Obsolete. NULL is fine.
2330 */
2331 DECLR3CALLBACKMEMBER(int, pfnMMIORegisterR0,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
2332 const char *pszWrite, const char *pszRead, const char *pszFill));
2333
2334 /**
2335 * Deregister a Memory Mapped I/O (MMIO) region.
2336 *
2337 * This naturally affects both guest context (GC), ring-0 (R0) and ring-3 (R3/HC) handlers.
2338 *
2339 * @returns VBox status.
2340 * @param pDevIns The device instance owning the MMIO region(s).
2341 * @param GCPhysStart First physical address in the range.
2342 * @param cbRange The size of the range (in bytes).
2343 */
2344 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange));
2345
2346 /**
2347 * Allocate and register a MMIO2 region.
2348 *
2349 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's
2350 * RAM associated with a device. It is also non-shared memory with a
2351 * permanent ring-3 mapping and page backing (presently).
2352 *
2353 * @returns VBox status.
2354 * @param pDevIns The device instance.
2355 * @param iRegion The region number. Use the PCI region number as
2356 * this must be known to the PCI bus device too. If
2357 * it's not associated with the PCI device, then
2358 * any number up to UINT8_MAX is fine.
2359 * @param cb The size (in bytes) of the region.
2360 * @param fFlags Reserved for future use, must be zero.
2361 * @param ppv Where to store the address of the ring-3 mapping
2362 * of the memory.
2363 * @param pszDesc Pointer to description string. This must not be
2364 * freed.
2365 * @thread EMT.
2366 */
2367 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc));
2368
2369 /**
2370 * Deregisters and frees a MMIO2 region.
2371 *
2372 * Any physical (and virtual) access handlers registered for the region must
2373 * be deregistered before calling this function.
2374 *
2375 * @returns VBox status code.
2376 * @param pDevIns The device instance.
2377 * @param iRegion The region number used during registration.
2378 * @thread EMT.
2379 */
2380 DECLR3CALLBACKMEMBER(int, pfnMMIO2Deregister,(PPDMDEVINS pDevIns, uint32_t iRegion));
2381
2382 /**
2383 * Maps a MMIO2 region into the physical memory space.
2384 *
2385 * A MMIO2 range may overlap with base memory if a lot of RAM
2386 * is configured for the VM, in which case we'll drop the base
2387 * memory pages. Presently we will make no attempt to preserve
2388 * anything that happens to be present in the base memory that
2389 * is replaced, this is of course incorrectly but it's too much
2390 * effort.
2391 *
2392 * @returns VBox status code.
2393 * @param pDevIns The device instance.
2394 * @param iRegion The region number used during registration.
2395 * @param GCPhys The physical address to map it at.
2396 * @thread EMT.
2397 */
2398 DECLR3CALLBACKMEMBER(int, pfnMMIO2Map,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2399
2400 /**
2401 * Unmaps a MMIO2 region previously mapped using pfnMMIO2Map.
2402 *
2403 * @returns VBox status code.
2404 * @param pDevIns The device instance.
2405 * @param iRegion The region number used during registration.
2406 * @param GCPhys The physical address it's currently mapped at.
2407 * @thread EMT.
2408 */
2409 DECLR3CALLBACKMEMBER(int, pfnMMIO2Unmap,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys));
2410
2411 /**
2412 * Maps a portion of an MMIO2 region into the hypervisor region.
2413 *
2414 * Callers of this API must never deregister the MMIO2 region before the
2415 * VM is powered off.
2416 *
2417 * @return VBox status code.
2418 * @param pDevIns The device owning the MMIO2 memory.
2419 * @param iRegion The region.
2420 * @param off The offset into the region. Will be rounded down
2421 * to closest page boundary.
2422 * @param cb The number of bytes to map. Will be rounded up
2423 * to the closest page boundary.
2424 * @param pszDesc Mapping description.
2425 * @param pRCPtr Where to store the RC address.
2426 */
2427 DECLR3CALLBACKMEMBER(int, pfnMMHyperMapMMIO2,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2428 const char *pszDesc, PRTRCPTR pRCPtr));
2429
2430 /**
2431 * Maps a portion of an MMIO2 region into kernel space (host).
2432 *
2433 * The kernel mapping will become invalid when the MMIO2 memory is deregistered
2434 * or the VM is terminated.
2435 *
2436 * @return VBox status code.
2437 * @param pDevIns The device owning the MMIO2 memory.
2438 * @param iRegion The region.
2439 * @param off The offset into the region. Must be page
2440 * aligned.
2441 * @param cb The number of bytes to map. Must be page
2442 * aligned.
2443 * @param pszDesc Mapping description.
2444 * @param pR0Ptr Where to store the R0 address.
2445 */
2446 DECLR3CALLBACKMEMBER(int, pfnMMIO2MapKernel,(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2447 const char *pszDesc, PRTR0PTR pR0Ptr));
2448
2449 /**
2450 * Register a ROM (BIOS) region.
2451 *
2452 * It goes without saying that this is read-only memory. The memory region must be
2453 * in unassigned memory. I.e. from the top of the address space or on the PC in
2454 * the 0xa0000-0xfffff range.
2455 *
2456 * @returns VBox status.
2457 * @param pDevIns The device instance owning the ROM region.
2458 * @param GCPhysStart First physical address in the range.
2459 * Must be page aligned!
2460 * @param cbRange The size of the range (in bytes).
2461 * Must be page aligned!
2462 * @param pvBinary Pointer to the binary data backing the ROM image.
2463 * @param cbBinary The size of the binary pointer. This must
2464 * be equal or smaller than @a cbRange.
2465 * @param fFlags Shadow ROM flags, PGMPHYS_ROM_FLAGS_* in pgm.h.
2466 * @param pszDesc Pointer to description string. This must not be freed.
2467 *
2468 * @remark There is no way to remove the rom, automatically on device cleanup or
2469 * manually from the device yet. At present I doubt we need such features...
2470 */
2471 DECLR3CALLBACKMEMBER(int, pfnROMRegister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
2472 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc));
2473
2474 /**
2475 * Changes the protection of shadowed ROM mapping.
2476 *
2477 * This is intented for use by the system BIOS, chipset or device in question to
2478 * change the protection of shadowed ROM code after init and on reset.
2479 *
2480 * @param pDevIns The device instance.
2481 * @param GCPhysStart Where the mapping starts.
2482 * @param cbRange The size of the mapping.
2483 * @param enmProt The new protection type.
2484 */
2485 DECLR3CALLBACKMEMBER(int, pfnROMProtectShadow,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt));
2486
2487 /**
2488 * Register a save state data unit.
2489 *
2490 * @returns VBox status.
2491 * @param pDevIns The device instance.
2492 * @param pszName Data unit name.
2493 * @param uInstance The instance identifier of the data unit.
2494 * This must together with the name be unique.
2495 * @param uVersion Data layout version number.
2496 * @param cbGuess The approximate amount of data in the unit.
2497 * Only for progress indicators.
2498 * @param pszBefore Name of data unit which we should be put in
2499 * front of. Optional (NULL).
2500 *
2501 * @param pfnLivePrep Prepare live save callback, optional.
2502 * @param pfnLiveExec Execute live save callback, optional.
2503 * @param pfnLiveVote Vote live save callback, optional.
2504 *
2505 * @param pfnSavePrep Prepare save callback, optional.
2506 * @param pfnSaveExec Execute save callback, optional.
2507 * @param pfnSaveDone Done save callback, optional.
2508 *
2509 * @param pfnLoadPrep Prepare load callback, optional.
2510 * @param pfnLoadExec Execute load callback, optional.
2511 * @param pfnLoadDone Done load callback, optional.
2512 */
2513 DECLR3CALLBACKMEMBER(int, pfnSSMRegister,(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
2514 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
2515 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
2516 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone));
2517
2518 /**
2519 * Creates a timer.
2520 *
2521 * @returns VBox status.
2522 * @param pDevIns The device instance.
2523 * @param enmClock The clock to use on this timer.
2524 * @param pfnCallback Callback function.
2525 * @param pvUser User argument for the callback.
2526 * @param fFlags Flags, see TMTIMER_FLAGS_*.
2527 * @param pszDesc Pointer to description string which must stay around
2528 * until the timer is fully destroyed (i.e. a bit after TMTimerDestroy()).
2529 * @param ppTimer Where to store the timer on success.
2530 */
2531 DECLR3CALLBACKMEMBER(int, pfnTMTimerCreate,(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags, const char *pszDesc, PPTMTIMERR3 ppTimer));
2532
2533 /**
2534 * Get the real world UTC time adjusted for VM lag, user offset and warpdrive.
2535 *
2536 * @returns pTime.
2537 * @param pDevIns The device instance.
2538 * @param pTime Where to store the time.
2539 */
2540 DECLR3CALLBACKMEMBER(PRTTIMESPEC, pfnTMUtcNow,(PPDMDEVINS pDevIns, PRTTIMESPEC pTime));
2541
2542 /**
2543 * Read physical memory.
2544 *
2545 * @returns VINF_SUCCESS (for now).
2546 * @param pDevIns The device instance.
2547 * @param GCPhys Physical address start reading from.
2548 * @param pvBuf Where to put the read bits.
2549 * @param cbRead How many bytes to read.
2550 * @thread Any thread, but the call may involve the emulation thread.
2551 */
2552 DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2553
2554 /**
2555 * Write to physical memory.
2556 *
2557 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
2558 * @param pDevIns The device instance.
2559 * @param GCPhys Physical address to write to.
2560 * @param pvBuf What to write.
2561 * @param cbWrite How many bytes to write.
2562 * @thread Any thread, but the call may involve the emulation thread.
2563 */
2564 DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2565
2566 /**
2567 * Requests the mapping of a guest page into ring-3.
2568 *
2569 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2570 * release it.
2571 *
2572 * This API will assume your intention is to write to the page, and will
2573 * therefore replace shared and zero pages. If you do not intend to modify the
2574 * page, use the pfnPhysGCPhys2CCPtrReadOnly() API.
2575 *
2576 * @returns VBox status code.
2577 * @retval VINF_SUCCESS on success.
2578 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2579 * backing or if the page has any active access handlers. The caller
2580 * must fall back on using PGMR3PhysWriteExternal.
2581 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2582 *
2583 * @param pVM The VM handle.
2584 * @param GCPhys The guest physical address of the page that
2585 * should be mapped.
2586 * @param fFlags Flags reserved for future use, MBZ.
2587 * @param ppv Where to store the address corresponding to
2588 * GCPhys.
2589 * @param pLock Where to store the lock information that
2590 * pfnPhysReleasePageMappingLock needs.
2591 *
2592 * @remark Avoid calling this API from within critical sections (other than the
2593 * PGM one) because of the deadlock risk when we have to delegating the
2594 * task to an EMT.
2595 * @thread Any.
2596 */
2597 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtr,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock));
2598
2599 /**
2600 * Requests the mapping of a guest page into ring-3, external threads.
2601 *
2602 * When you're done with the page, call pfnPhysReleasePageMappingLock() ASAP to
2603 * release it.
2604 *
2605 * @returns VBox status code.
2606 * @retval VINF_SUCCESS on success.
2607 * @retval VERR_PGM_PHYS_PAGE_RESERVED it it's a valid page but has no physical
2608 * backing or if the page as an active ALL access handler. The caller
2609 * must fall back on using PGMPhysRead.
2610 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2611 *
2612 * @param pDevIns The device instance.
2613 * @param GCPhys The guest physical address of the page that
2614 * should be mapped.
2615 * @param fFlags Flags reserved for future use, MBZ.
2616 * @param ppv Where to store the address corresponding to
2617 * GCPhys.
2618 * @param pLock Where to store the lock information that
2619 * pfnPhysReleasePageMappingLock needs.
2620 *
2621 * @remark Avoid calling this API from within critical sections.
2622 * @thread Any.
2623 */
2624 DECLR3CALLBACKMEMBER(int, pfnPhysGCPhys2CCPtrReadOnly,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock));
2625
2626 /**
2627 * Release the mapping of a guest page.
2628 *
2629 * This is the counter part of pfnPhysGCPhys2CCPtr and
2630 * pfnPhysGCPhys2CCPtrReadOnly.
2631 *
2632 * @param pDevIns The device instance.
2633 * @param pLock The lock structure initialized by the mapping
2634 * function.
2635 */
2636 DECLR3CALLBACKMEMBER(void, pfnPhysReleasePageMappingLock,(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock));
2637
2638 /**
2639 * Read guest physical memory by virtual address.
2640 *
2641 * @param pDevIns The device instance.
2642 * @param pvDst Where to put the read bits.
2643 * @param GCVirtSrc Guest virtual address to start reading from.
2644 * @param cb How many bytes to read.
2645 * @thread The emulation thread.
2646 */
2647 DECLR3CALLBACKMEMBER(int, pfnPhysReadGCVirt,(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb));
2648
2649 /**
2650 * Write to guest physical memory by virtual address.
2651 *
2652 * @param pDevIns The device instance.
2653 * @param GCVirtDst Guest virtual address to write to.
2654 * @param pvSrc What to write.
2655 * @param cb How many bytes to write.
2656 * @thread The emulation thread.
2657 */
2658 DECLR3CALLBACKMEMBER(int, pfnPhysWriteGCVirt,(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb));
2659
2660 /**
2661 * Convert a guest virtual address to a guest physical address.
2662 *
2663 * @returns VBox status code.
2664 * @param pDevIns The device instance.
2665 * @param GCPtr Guest virtual address.
2666 * @param pGCPhys Where to store the GC physical address
2667 * corresponding to GCPtr.
2668 * @thread The emulation thread.
2669 * @remark Careful with page boundaries.
2670 */
2671 DECLR3CALLBACKMEMBER(int, pfnPhysGCPtr2GCPhys, (PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys));
2672
2673 /**
2674 * Allocate memory which is associated with current VM instance
2675 * and automatically freed on it's destruction.
2676 *
2677 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2678 * @param pDevIns The device instance.
2679 * @param cb Number of bytes to allocate.
2680 */
2681 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAlloc,(PPDMDEVINS pDevIns, size_t cb));
2682
2683 /**
2684 * Allocate memory which is associated with current VM instance
2685 * and automatically freed on it's destruction. The memory is ZEROed.
2686 *
2687 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
2688 * @param pDevIns The device instance.
2689 * @param cb Number of bytes to allocate.
2690 */
2691 DECLR3CALLBACKMEMBER(void *, pfnMMHeapAllocZ,(PPDMDEVINS pDevIns, size_t cb));
2692
2693 /**
2694 * Free memory allocated with pfnMMHeapAlloc() and pfnMMHeapAllocZ().
2695 *
2696 * @param pDevIns The device instance.
2697 * @param pv Pointer to the memory to free.
2698 */
2699 DECLR3CALLBACKMEMBER(void, pfnMMHeapFree,(PPDMDEVINS pDevIns, void *pv));
2700
2701 /**
2702 * Gets the VM state.
2703 *
2704 * @returns VM state.
2705 * @param pDevIns The device instance.
2706 * @thread Any thread (just keep in mind that it's volatile info).
2707 */
2708 DECLR3CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
2709
2710 /**
2711 * Checks if the VM was teleported and hasn't been fully resumed yet.
2712 *
2713 * @returns true / false.
2714 * @param pDevIns The device instance.
2715 * @thread Any thread.
2716 */
2717 DECLR3CALLBACKMEMBER(bool, pfnVMTeleportedAndNotFullyResumedYet,(PPDMDEVINS pDevIns));
2718
2719 /**
2720 * Set the VM error message
2721 *
2722 * @returns rc.
2723 * @param pDevIns The device instance.
2724 * @param rc VBox status code.
2725 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2726 * @param pszFormat Error message format string.
2727 * @param ... Error message arguments.
2728 */
2729 DECLR3CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
2730
2731 /**
2732 * Set the VM error message
2733 *
2734 * @returns rc.
2735 * @param pDevIns The device instance.
2736 * @param rc VBox status code.
2737 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
2738 * @param pszFormat Error message format string.
2739 * @param va Error message arguments.
2740 */
2741 DECLR3CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
2742
2743 /**
2744 * Set the VM runtime error message
2745 *
2746 * @returns VBox status code.
2747 * @param pDevIns The device instance.
2748 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2749 * @param pszErrorId Error ID string.
2750 * @param pszFormat Error message format string.
2751 * @param ... Error message arguments.
2752 */
2753 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
2754
2755 /**
2756 * Set the VM runtime error message
2757 *
2758 * @returns VBox status code.
2759 * @param pDevIns The device instance.
2760 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
2761 * @param pszErrorId Error ID string.
2762 * @param pszFormat Error message format string.
2763 * @param va Error message arguments.
2764 */
2765 DECLR3CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
2766
2767 /**
2768 * Stops the VM and enters the debugger to look at the guest state.
2769 *
2770 * Use the PDMDeviceDBGFStop() inline function with the RT_SRC_POS macro instead of
2771 * invoking this function directly.
2772 *
2773 * @returns VBox status code which must be passed up to the VMM.
2774 * @param pDevIns The device instance.
2775 * @param pszFile Filename of the assertion location.
2776 * @param iLine The linenumber of the assertion location.
2777 * @param pszFunction Function of the assertion location.
2778 * @param pszFormat Message. (optional)
2779 * @param args Message parameters.
2780 */
2781 DECLR3CALLBACKMEMBER(int, pfnDBGFStopV,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args));
2782
2783 /**
2784 * Register a info handler with DBGF,
2785 *
2786 * @returns VBox status code.
2787 * @param pDevIns The device instance.
2788 * @param pszName The identifier of the info.
2789 * @param pszDesc The description of the info and any arguments
2790 * the handler may take.
2791 * @param pfnHandler The handler function to be called to display the
2792 * info.
2793 */
2794 DECLR3CALLBACKMEMBER(int, pfnDBGFInfoRegister,(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler));
2795
2796 /**
2797 * Gets the trace buffer handle.
2798 *
2799 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
2800 * really inteded for direct usage, thus no inline wrapper function.
2801 *
2802 * @returns Trace buffer handle or NIL_RTTRACEBUF.
2803 * @param pDevIns The device instance.
2804 */
2805 DECLR3CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
2806
2807 /**
2808 * Registers a statistics sample if statistics are enabled.
2809 *
2810 * @param pDevIns Device instance of the DMA.
2811 * @param pvSample Pointer to the sample.
2812 * @param enmType Sample type. This indicates what pvSample is
2813 * pointing at.
2814 * @param pszName Sample name. The name is on this form
2815 * "/<component>/<sample>". Further nesting is
2816 * possible.
2817 * @param enmUnit Sample unit.
2818 * @param pszDesc Sample description.
2819 */
2820 DECLR3CALLBACKMEMBER(void, pfnSTAMRegister,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc));
2821
2822 /**
2823 * Same as pfnSTAMRegister except that the name is specified in a
2824 * RTStrPrintf like fashion.
2825 *
2826 * @returns VBox status.
2827 * @param pDevIns Device instance of the DMA.
2828 * @param pvSample Pointer to the sample.
2829 * @param enmType Sample type. This indicates what pvSample is
2830 * pointing at.
2831 * @param enmVisibility Visibility type specifying whether unused
2832 * statistics should be visible or not.
2833 * @param enmUnit Sample unit.
2834 * @param pszDesc Sample description.
2835 * @param pszName The sample name format string.
2836 * @param ... Arguments to the format string.
2837 */
2838 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterF,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2839 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...));
2840
2841 /**
2842 * Same as pfnSTAMRegister except that the name is specified in a
2843 * RTStrPrintfV like fashion.
2844 *
2845 * @returns VBox status.
2846 * @param pDevIns Device instance of the DMA.
2847 * @param pvSample Pointer to the sample.
2848 * @param enmType Sample type. This indicates what pvSample is
2849 * pointing at.
2850 * @param enmVisibility Visibility type specifying whether unused
2851 * statistics should be visible or not.
2852 * @param enmUnit Sample unit.
2853 * @param pszDesc Sample description.
2854 * @param pszName The sample name format string.
2855 * @param args Arguments to the format string.
2856 */
2857 DECLR3CALLBACKMEMBER(void, pfnSTAMRegisterV,(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2858 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args));
2859
2860 /**
2861 * Reads data via bus mastering, if enabled. If no bus mastering is available,
2862 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED.
2863 *
2864 * @return IPRT status code.
2865 */
2866 DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
2867
2868 /**
2869 * Writes data via bus mastering, if enabled. If no bus mastering is available,
2870 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED.
2871 *
2872 * @return IPRT status code.
2873 */
2874 DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
2875
2876 /**
2877 * Registers the device with the default PCI bus.
2878 *
2879 * @returns VBox status code.
2880 * @param pDevIns The device instance.
2881 * @param pPciDev The PCI device structure.
2882 * Any PCI enabled device must keep this in it's instance data!
2883 * Fill in the PCI data config before registration, please.
2884 * @remark This is the simple interface, a Ex interface will be created if
2885 * more features are needed later.
2886 */
2887 DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev));
2888
2889 /**
2890 * Initialize MSI support in a PCI device.
2891 *
2892 * @returns VBox status code.
2893 * @param pDevIns The device instance.
2894 * @param pMsiReg MSI registartion structure.
2895 */
2896 DECLR3CALLBACKMEMBER(int, pfnPCIRegisterMsi,(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg));
2897
2898 /**
2899 * Registers a I/O region (memory mapped or I/O ports) for a PCI device.
2900 *
2901 * @returns VBox status code.
2902 * @param pDevIns The device instance.
2903 * @param iRegion The region number.
2904 * @param cbRegion Size of the region.
2905 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH.
2906 * @param pfnCallback Callback for doing the mapping.
2907 */
2908 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
2909
2910 /**
2911 * Register PCI configuration space read/write callbacks.
2912 *
2913 * @param pDevIns The device instance.
2914 * @param pPciDev The PCI device structure.
2915 * If NULL the default PCI device for this device instance is used.
2916 * @param pfnRead Pointer to the user defined PCI config read function.
2917 * @param ppfnReadOld Pointer to function pointer which will receive the old (default)
2918 * PCI config read function. This way, user can decide when (and if)
2919 * to call default PCI config read function. Can be NULL.
2920 * @param pfnWrite Pointer to the user defined PCI config write function.
2921 * @param pfnWriteOld Pointer to function pointer which will receive the old (default)
2922 * PCI config write function. This way, user can decide when (and if)
2923 * to call default PCI config write function. Can be NULL.
2924 * @thread EMT
2925 */
2926 DECLR3CALLBACKMEMBER(void, pfnPCISetConfigCallbacks,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
2927 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
2928
2929 /**
2930 * Set the IRQ for a PCI device.
2931 *
2932 * @param pDevIns The device instance.
2933 * @param iIrq IRQ number to set.
2934 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2935 * @thread Any thread, but will involve the emulation thread.
2936 */
2937 DECLR3CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2938
2939 /**
2940 * Set the IRQ for a PCI device, but don't wait for EMT to process
2941 * the request when not called from EMT.
2942 *
2943 * @param pDevIns The device instance.
2944 * @param iIrq IRQ number to set.
2945 * @param iLevel IRQ level.
2946 * @thread Any thread, but will involve the emulation thread.
2947 */
2948 DECLR3CALLBACKMEMBER(void, pfnPCISetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2949
2950 /**
2951 * Set ISA IRQ for a device.
2952 *
2953 * @param pDevIns The device instance.
2954 * @param iIrq IRQ number to set.
2955 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2956 * @thread Any thread, but will involve the emulation thread.
2957 */
2958 DECLR3CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2959
2960 /**
2961 * Set the ISA IRQ for a device, but don't wait for EMT to process
2962 * the request when not called from EMT.
2963 *
2964 * @param pDevIns The device instance.
2965 * @param iIrq IRQ number to set.
2966 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
2967 * @thread Any thread, but will involve the emulation thread.
2968 */
2969 DECLR3CALLBACKMEMBER(void, pfnISASetIrqNoWait,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
2970
2971 /**
2972 * Attaches a driver (chain) to the device.
2973 *
2974 * The first call for a LUN this will serve as a registartion of the LUN. The pBaseInterface and
2975 * the pszDesc string will be registered with that LUN and kept around for PDMR3QueryDeviceLun().
2976 *
2977 * @returns VBox status code.
2978 * @param pDevIns The device instance.
2979 * @param iLun The logical unit to attach.
2980 * @param pBaseInterface Pointer to the base interface for that LUN. (device side / down)
2981 * @param ppBaseInterface Where to store the pointer to the base interface. (driver side / up)
2982 * @param pszDesc Pointer to a string describing the LUN. This string must remain valid
2983 * for the live of the device instance.
2984 */
2985 DECLR3CALLBACKMEMBER(int, pfnDriverAttach,(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc));
2986
2987 /**
2988 * Create a queue.
2989 *
2990 * @returns VBox status code.
2991 * @param pDevIns The device instance.
2992 * @param cbItem The size of a queue item.
2993 * @param cItems The number of items in the queue.
2994 * @param cMilliesInterval The number of milliseconds between polling the queue.
2995 * If 0 then the emulation thread will be notified whenever an item arrives.
2996 * @param pfnCallback The consumer function.
2997 * @param fRZEnabled Set if the queue should work in RC and R0.
2998 * @param pszName The queue base name. The instance number will be
2999 * appended automatically.
3000 * @param ppQueue Where to store the queue handle on success.
3001 * @thread The emulation thread.
3002 */
3003 DECLR3CALLBACKMEMBER(int, pfnQueueCreate,(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
3004 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue));
3005
3006 /**
3007 * Initializes a PDM critical section.
3008 *
3009 * The PDM critical sections are derived from the IPRT critical sections, but
3010 * works in RC and R0 as well.
3011 *
3012 * @returns VBox status code.
3013 * @param pDevIns The device instance.
3014 * @param pCritSect Pointer to the critical section.
3015 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3016 * @param pszNameFmt Format string for naming the critical section.
3017 * For statistics and lock validation.
3018 * @param va Arguments for the format string.
3019 */
3020 DECLR3CALLBACKMEMBER(int, pfnCritSectInit,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
3021 const char *pszNameFmt, va_list va));
3022
3023 /**
3024 * Gets the NOP critical section.
3025 *
3026 * @returns The ring-3 address of the NOP critical section.
3027 * @param pDevIns The device instance.
3028 */
3029 DECLR3CALLBACKMEMBER(PPDMCRITSECT, pfnCritSectGetNop,(PPDMDEVINS pDevIns));
3030
3031 /**
3032 * Gets the NOP critical section.
3033 *
3034 * @returns The ring-0 address of the NOP critical section.
3035 * @param pDevIns The device instance.
3036 */
3037 DECLR3CALLBACKMEMBER(R0PTRTYPE(PPDMCRITSECT), pfnCritSectGetNopR0,(PPDMDEVINS pDevIns));
3038
3039 /**
3040 * Gets the NOP critical section.
3041 *
3042 * @returns The raw-mode context address of the NOP critical section.
3043 * @param pDevIns The device instance.
3044 */
3045 DECLR3CALLBACKMEMBER(RCPTRTYPE(PPDMCRITSECT), pfnCritSectGetNopRC,(PPDMDEVINS pDevIns));
3046
3047 /**
3048 * Changes the device level critical section from the automatically created
3049 * default to one desired by the device constructor.
3050 *
3051 * @returns VBox status code.
3052 * @param pDevIns The device instance.
3053 * @param pCritSect The critical section to use. NULL is not
3054 * valid, instead use the NOP critical
3055 * section.
3056 */
3057 DECLR3CALLBACKMEMBER(int, pfnSetDeviceCritSect,(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect));
3058
3059 /**
3060 * Creates a PDM thread.
3061 *
3062 * This differs from the RTThreadCreate() API in that PDM takes care of suspending,
3063 * resuming, and destroying the thread as the VM state changes.
3064 *
3065 * @returns VBox status code.
3066 * @param pDevIns The device instance.
3067 * @param ppThread Where to store the thread 'handle'.
3068 * @param pvUser The user argument to the thread function.
3069 * @param pfnThread The thread function.
3070 * @param pfnWakeup The wakup callback. This is called on the EMT
3071 * thread when a state change is pending.
3072 * @param cbStack See RTThreadCreate.
3073 * @param enmType See RTThreadCreate.
3074 * @param pszName See RTThreadCreate.
3075 */
3076 DECLR3CALLBACKMEMBER(int, pfnThreadCreate,(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
3077 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName));
3078
3079 /**
3080 * Set up asynchronous handling of a suspend, reset or power off notification.
3081 *
3082 * This shall only be called when getting the notification. It must be called
3083 * for each one.
3084 *
3085 * @returns VBox status code.
3086 * @param pDevIns The device instance.
3087 * @param pfnAsyncNotify The callback.
3088 * @thread EMT(0)
3089 */
3090 DECLR3CALLBACKMEMBER(int, pfnSetAsyncNotification, (PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify));
3091
3092 /**
3093 * Notify EMT(0) that the device has completed the asynchronous notification
3094 * handling.
3095 *
3096 * This can be called at any time, spurious calls will simply be ignored.
3097 *
3098 * @param pDevIns The device instance.
3099 * @thread Any
3100 */
3101 DECLR3CALLBACKMEMBER(void, pfnAsyncNotificationCompleted, (PPDMDEVINS pDevIns));
3102
3103 /**
3104 * Register the RTC device.
3105 *
3106 * @returns VBox status code.
3107 * @param pDevIns The device instance.
3108 * @param pRtcReg Pointer to a RTC registration structure.
3109 * @param ppRtcHlp Where to store the pointer to the helper
3110 * functions.
3111 */
3112 DECLR3CALLBACKMEMBER(int, pfnRTCRegister,(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp));
3113
3114 /**
3115 * Register the PCI Bus.
3116 *
3117 * @returns VBox status code.
3118 * @param pDevIns The device instance.
3119 * @param pPciBusReg Pointer to PCI bus registration structure.
3120 * @param ppPciHlpR3 Where to store the pointer to the PCI Bus
3121 * helpers.
3122 */
3123 DECLR3CALLBACKMEMBER(int, pfnPCIBusRegister,(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3));
3124
3125 /**
3126 * Register the PIC device.
3127 *
3128 * @returns VBox status code.
3129 * @param pDevIns The device instance.
3130 * @param pPicReg Pointer to a PIC registration structure.
3131 * @param ppPicHlpR3 Where to store the pointer to the PIC HC
3132 * helpers.
3133 */
3134 DECLR3CALLBACKMEMBER(int, pfnPICRegister,(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3));
3135
3136 /**
3137 * Register the APIC device.
3138 *
3139 * @returns VBox status code.
3140 * @param pDevIns The device instance.
3141 * @param pApicReg Pointer to a APIC registration structure.
3142 * @param ppApicHlpR3 Where to store the pointer to the APIC helpers.
3143 */
3144 DECLR3CALLBACKMEMBER(int, pfnAPICRegister,(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3));
3145
3146 /**
3147 * Register the I/O APIC device.
3148 *
3149 * @returns VBox status code.
3150 * @param pDevIns The device instance.
3151 * @param pIoApicReg Pointer to a I/O APIC registration structure.
3152 * @param ppIoApicHlpR3 Where to store the pointer to the IOAPIC
3153 * helpers.
3154 */
3155 DECLR3CALLBACKMEMBER(int, pfnIOAPICRegister,(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3));
3156
3157 /**
3158 * Register the HPET device.
3159 *
3160 * @returns VBox status code.
3161 * @param pDevIns The device instance.
3162 * @param pHpetReg Pointer to a HPET registration structure.
3163 * @param ppHpetHlpR3 Where to store the pointer to the HPET
3164 * helpers.
3165 */
3166 DECLR3CALLBACKMEMBER(int, pfnHPETRegister,(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3));
3167
3168 /**
3169 * Register a raw PCI device.
3170 *
3171 * @returns VBox status code.
3172 * @param pDevIns The device instance.
3173 * @param pHpetReg Pointer to a raw PCI registration structure.
3174 * @param ppPciRawHlpR3 Where to store the pointer to the raw PCI
3175 * device helpers.
3176 */
3177 DECLR3CALLBACKMEMBER(int, pfnPciRawRegister,(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3));
3178
3179 /**
3180 * Register the DMA device.
3181 *
3182 * @returns VBox status code.
3183 * @param pDevIns The device instance.
3184 * @param pDmacReg Pointer to a DMAC registration structure.
3185 * @param ppDmacHlp Where to store the pointer to the DMA helpers.
3186 */
3187 DECLR3CALLBACKMEMBER(int, pfnDMACRegister,(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp));
3188
3189 /**
3190 * Register transfer function for DMA channel.
3191 *
3192 * @returns VBox status code.
3193 * @param pDevIns The device instance.
3194 * @param uChannel Channel number.
3195 * @param pfnTransferHandler Device specific transfer callback function.
3196 * @param pvUser User pointer to pass to the callback.
3197 * @thread EMT
3198 */
3199 DECLR3CALLBACKMEMBER(int, pfnDMARegister,(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser));
3200
3201 /**
3202 * Read memory.
3203 *
3204 * @returns VBox status code.
3205 * @param pDevIns The device instance.
3206 * @param uChannel Channel number.
3207 * @param pvBuffer Pointer to target buffer.
3208 * @param off DMA position.
3209 * @param cbBlock Block size.
3210 * @param pcbRead Where to store the number of bytes which was
3211 * read. optional.
3212 * @thread EMT
3213 */
3214 DECLR3CALLBACKMEMBER(int, pfnDMAReadMemory,(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead));
3215
3216 /**
3217 * Write memory.
3218 *
3219 * @returns VBox status code.
3220 * @param pDevIns The device instance.
3221 * @param uChannel Channel number.
3222 * @param pvBuffer Memory to write.
3223 * @param off DMA position.
3224 * @param cbBlock Block size.
3225 * @param pcbWritten Where to store the number of bytes which was
3226 * written. optional.
3227 * @thread EMT
3228 */
3229 DECLR3CALLBACKMEMBER(int, pfnDMAWriteMemory,(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten));
3230
3231 /**
3232 * Set the DREQ line.
3233 *
3234 * @returns VBox status code.
3235 * @param pDevIns Device instance.
3236 * @param uChannel Channel number.
3237 * @param uLevel Level of the line.
3238 * @thread EMT
3239 */
3240 DECLR3CALLBACKMEMBER(int, pfnDMASetDREQ,(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel));
3241
3242 /**
3243 * Get channel mode.
3244 *
3245 * @returns Channel mode. See specs.
3246 * @param pDevIns The device instance.
3247 * @param uChannel Channel number.
3248 * @thread EMT
3249 */
3250 DECLR3CALLBACKMEMBER(uint8_t, pfnDMAGetChannelMode,(PPDMDEVINS pDevIns, unsigned uChannel));
3251
3252 /**
3253 * Schedule DMA execution.
3254 *
3255 * @param pDevIns The device instance.
3256 * @thread Any thread.
3257 */
3258 DECLR3CALLBACKMEMBER(void, pfnDMASchedule,(PPDMDEVINS pDevIns));
3259
3260 /**
3261 * Write CMOS value and update the checksum(s).
3262 *
3263 * @returns VBox status code.
3264 * @param pDevIns The device instance.
3265 * @param iReg The CMOS register index.
3266 * @param u8Value The CMOS register value.
3267 * @thread EMT
3268 */
3269 DECLR3CALLBACKMEMBER(int, pfnCMOSWrite,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value));
3270
3271 /**
3272 * Read CMOS value.
3273 *
3274 * @returns VBox status code.
3275 * @param pDevIns The device instance.
3276 * @param iReg The CMOS register index.
3277 * @param pu8Value Where to store the CMOS register value.
3278 * @thread EMT
3279 */
3280 DECLR3CALLBACKMEMBER(int, pfnCMOSRead,(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value));
3281
3282 /**
3283 * Assert that the current thread is the emulation thread.
3284 *
3285 * @returns True if correct.
3286 * @returns False if wrong.
3287 * @param pDevIns The device instance.
3288 * @param pszFile Filename of the assertion location.
3289 * @param iLine The linenumber of the assertion location.
3290 * @param pszFunction Function of the assertion location.
3291 */
3292 DECLR3CALLBACKMEMBER(bool, pfnAssertEMT,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3293
3294 /**
3295 * Assert that the current thread is NOT the emulation thread.
3296 *
3297 * @returns True if correct.
3298 * @returns False if wrong.
3299 * @param pDevIns The device instance.
3300 * @param pszFile Filename of the assertion location.
3301 * @param iLine The linenumber of the assertion location.
3302 * @param pszFunction Function of the assertion location.
3303 */
3304 DECLR3CALLBACKMEMBER(bool, pfnAssertOther,(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction));
3305
3306 /**
3307 * Resolves the symbol for a raw-mode context interface.
3308 *
3309 * @returns VBox status code.
3310 * @param pDevIns The device instance.
3311 * @param pvInterface The interface structure.
3312 * @param cbInterface The size of the interface structure.
3313 * @param pszSymPrefix What to prefix the symbols in the list with
3314 * before resolving them. This must start with
3315 * 'dev' and contain the driver name.
3316 * @param pszSymList List of symbols corresponding to the interface.
3317 * There is generally a there is generally a define
3318 * holding this list associated with the interface
3319 * definition (INTERFACE_SYM_LIST). For more
3320 * details see PDMR3LdrGetInterfaceSymbols.
3321 * @thread EMT
3322 */
3323 DECLR3CALLBACKMEMBER(int, pfnLdrGetRCInterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3324 const char *pszSymPrefix, const char *pszSymList));
3325
3326 /**
3327 * Resolves the symbol for a ring-0 context interface.
3328 *
3329 * @returns VBox status code.
3330 * @param pDevIns The device instance.
3331 * @param pvInterface The interface structure.
3332 * @param cbInterface The size of the interface structure.
3333 * @param pszSymPrefix What to prefix the symbols in the list with
3334 * before resolving them. This must start with
3335 * 'dev' and contain the driver name.
3336 * @param pszSymList List of symbols corresponding to the interface.
3337 * There is generally a there is generally a define
3338 * holding this list associated with the interface
3339 * definition (INTERFACE_SYM_LIST). For more
3340 * details see PDMR3LdrGetInterfaceSymbols.
3341 * @thread EMT
3342 */
3343 DECLR3CALLBACKMEMBER(int, pfnLdrGetR0InterfaceSymbols,(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
3344 const char *pszSymPrefix, const char *pszSymList));
3345
3346 /**
3347 * Call the ring-0 request handler routine of the device.
3348 *
3349 * For this to work, the device must be ring-0 enabled and export a request
3350 * handler function. The name of the function must be the device name in
3351 * the PDMDRVREG struct prefixed with 'drvR0' and suffixed with
3352 * 'ReqHandler'. The device name will be captialized. It shall take the
3353 * exact same arguments as this function and be declared using
3354 * PDMBOTHCBDECL. See FNPDMDEVREQHANDLERR0.
3355 *
3356 * Unlike PDMDrvHlpCallR0, this is current unsuitable for more than a call
3357 * or two as the handler address will be resolved on each invocation. This
3358 * is the reason for the EMT only restriction as well.
3359 *
3360 * @returns VBox status code.
3361 * @retval VERR_SYMBOL_NOT_FOUND if the device doesn't export the required
3362 * handler function.
3363 * @retval VERR_ACCESS_DENIED if the device isn't ring-0 capable.
3364 *
3365 * @param pDevIns The device instance.
3366 * @param uOperation The operation to perform.
3367 * @param u64Arg 64-bit integer argument.
3368 * @thread EMT
3369 */
3370 DECLR3CALLBACKMEMBER(int, pfnCallR0,(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg));
3371
3372 /** Space reserved for future members.
3373 * @{ */
3374 DECLR3CALLBACKMEMBER(void, pfnReserved1,(void));
3375 DECLR3CALLBACKMEMBER(void, pfnReserved2,(void));
3376 DECLR3CALLBACKMEMBER(void, pfnReserved3,(void));
3377 DECLR3CALLBACKMEMBER(void, pfnReserved4,(void));
3378 DECLR3CALLBACKMEMBER(void, pfnReserved5,(void));
3379 DECLR3CALLBACKMEMBER(void, pfnReserved6,(void));
3380 DECLR3CALLBACKMEMBER(void, pfnReserved7,(void));
3381 DECLR3CALLBACKMEMBER(void, pfnReserved8,(void));
3382 DECLR3CALLBACKMEMBER(void, pfnReserved9,(void));
3383 DECLR3CALLBACKMEMBER(void, pfnReserved10,(void));
3384 /** @} */
3385
3386
3387 /** API available to trusted devices only.
3388 *
3389 * These APIs are providing unrestricted access to the guest and the VM,
3390 * or they are interacting intimately with PDM.
3391 *
3392 * @{
3393 */
3394 /**
3395 * Gets the VM handle. Restricted API.
3396 *
3397 * @returns VM Handle.
3398 * @param pDevIns The device instance.
3399 */
3400 DECLR3CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3401
3402 /**
3403 * Gets the VMCPU handle. Restricted API.
3404 *
3405 * @returns VMCPU Handle.
3406 * @param pDevIns The device instance.
3407 */
3408 DECLR3CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3409
3410 /**
3411 * Registers the VMM device heap
3412 *
3413 * @returns VBox status code.
3414 * @param pDevIns The device instance.
3415 * @param GCPhys The physical address.
3416 * @param pvHeap Ring 3 heap pointer.
3417 * @param cbSize Size of the heap.
3418 * @thread EMT.
3419 */
3420 DECLR3CALLBACKMEMBER(int, pfnRegisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize));
3421
3422 /**
3423 * Unregisters the VMM device heap
3424 *
3425 * @returns VBox status code.
3426 * @param pDevIns The device instance.
3427 * @param GCPhys The physical address.
3428 * @thread EMT.
3429 */
3430 DECLR3CALLBACKMEMBER(int, pfnUnregisterVMMDevHeap,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys));
3431
3432 /**
3433 * Resets the VM.
3434 *
3435 * @returns The appropriate VBox status code to pass around on reset.
3436 * @param pDevIns The device instance.
3437 * @thread The emulation thread.
3438 */
3439 DECLR3CALLBACKMEMBER(int, pfnVMReset,(PPDMDEVINS pDevIns));
3440
3441 /**
3442 * Suspends the VM.
3443 *
3444 * @returns The appropriate VBox status code to pass around on suspend.
3445 * @param pDevIns The device instance.
3446 * @thread The emulation thread.
3447 */
3448 DECLR3CALLBACKMEMBER(int, pfnVMSuspend,(PPDMDEVINS pDevIns));
3449
3450 /**
3451 * Suspends, saves and powers off the VM.
3452 *
3453 * @returns The appropriate VBox status code to pass around.
3454 * @param pDevIns The device instance.
3455 * @thread An emulation thread.
3456 */
3457 DECLR3CALLBACKMEMBER(int, pfnVMSuspendSaveAndPowerOff,(PPDMDEVINS pDevIns));
3458
3459 /**
3460 * Power off the VM.
3461 *
3462 * @returns The appropriate VBox status code to pass around on power off.
3463 * @param pDevIns The device instance.
3464 * @thread The emulation thread.
3465 */
3466 DECLR3CALLBACKMEMBER(int, pfnVMPowerOff,(PPDMDEVINS pDevIns));
3467
3468 /**
3469 * Checks if the Gate A20 is enabled or not.
3470 *
3471 * @returns true if A20 is enabled.
3472 * @returns false if A20 is disabled.
3473 * @param pDevIns The device instance.
3474 * @thread The emulation thread.
3475 */
3476 DECLR3CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3477
3478 /**
3479 * Enables or disables the Gate A20.
3480 *
3481 * @param pDevIns The device instance.
3482 * @param fEnable Set this flag to enable the Gate A20; clear it
3483 * to disable.
3484 * @thread The emulation thread.
3485 */
3486 DECLR3CALLBACKMEMBER(void, pfnA20Set,(PPDMDEVINS pDevIns, bool fEnable));
3487
3488 /**
3489 * Get the specified CPUID leaf for the virtual CPU associated with the calling
3490 * thread.
3491 *
3492 * @param pDevIns The device instance.
3493 * @param iLeaf The CPUID leaf to get.
3494 * @param pEax Where to store the EAX value.
3495 * @param pEbx Where to store the EBX value.
3496 * @param pEcx Where to store the ECX value.
3497 * @param pEdx Where to store the EDX value.
3498 * @thread EMT.
3499 */
3500 DECLR3CALLBACKMEMBER(void, pfnGetCpuId,(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx));
3501
3502 /**
3503 * Get the current virtual clock time in a VM. The clock frequency must be
3504 * queried separately.
3505 *
3506 * @returns Current clock time.
3507 * @param pDevIns The device instance.
3508 */
3509 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3510
3511 /**
3512 * Get the frequency of the virtual clock.
3513 *
3514 * @returns The clock frequency (not variable at run-time).
3515 * @param pDevIns The device instance.
3516 */
3517 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3518
3519 /**
3520 * Get the current virtual clock time in a VM, in nanoseconds.
3521 *
3522 * @returns Current clock time (in ns).
3523 * @param pDevIns The device instance.
3524 */
3525 DECLR3CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3526
3527 /** @} */
3528
3529 /** Just a safety precaution. (PDM_DEVHLPR3_VERSION) */
3530 uint32_t u32TheEnd;
3531} PDMDEVHLPR3;
3532#endif /* !IN_RING3 */
3533/** Pointer to the R3 PDM Device API. */
3534typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3;
3535/** Pointer to the R3 PDM Device API, const variant. */
3536typedef R3PTRTYPE(const struct PDMDEVHLPR3 *) PCPDMDEVHLPR3;
3537
3538/** Current PDMDEVHLPR3 version number. */
3539#define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE(0xffe7, 9, 0)
3540
3541
3542/**
3543 * PDM Device API - RC Variant.
3544 */
3545typedef struct PDMDEVHLPRC
3546{
3547 /** Structure version. PDM_DEVHLPRC_VERSION defines the current version. */
3548 uint32_t u32Version;
3549
3550 /**
3551 * Reads data via bus mastering, if enabled. If no bus mastering is available,
3552 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED.
3553 *
3554 * @return IPRT status code.
3555 */
3556 DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3557
3558 /**
3559 * Writes data via bus mastering, if enabled. If no bus mastering is available,
3560 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED.
3561 *
3562 * @return IPRT status code.
3563 */
3564 DECLRCCALLBACKMEMBER(int, pfnPCIDevPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3565
3566 /**
3567 * Set the IRQ for a PCI device.
3568 *
3569 * @param pDevIns Device instance.
3570 * @param iIrq IRQ number to set.
3571 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3572 * @thread Any thread, but will involve the emulation thread.
3573 */
3574 DECLRCCALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3575
3576 /**
3577 * Set ISA IRQ for a device.
3578 *
3579 * @param pDevIns Device instance.
3580 * @param iIrq IRQ number to set.
3581 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3582 * @thread Any thread, but will involve the emulation thread.
3583 */
3584 DECLRCCALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3585
3586 /**
3587 * Read physical memory.
3588 *
3589 * @returns VINF_SUCCESS (for now).
3590 * @param pDevIns Device instance.
3591 * @param GCPhys Physical address start reading from.
3592 * @param pvBuf Where to put the read bits.
3593 * @param cbRead How many bytes to read.
3594 */
3595 DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3596
3597 /**
3598 * Write to physical memory.
3599 *
3600 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3601 * @param pDevIns Device instance.
3602 * @param GCPhys Physical address to write to.
3603 * @param pvBuf What to write.
3604 * @param cbWrite How many bytes to write.
3605 */
3606 DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3607
3608 /**
3609 * Checks if the Gate A20 is enabled or not.
3610 *
3611 * @returns true if A20 is enabled.
3612 * @returns false if A20 is disabled.
3613 * @param pDevIns Device instance.
3614 * @thread The emulation thread.
3615 */
3616 DECLRCCALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3617
3618 /**
3619 * Gets the VM state.
3620 *
3621 * @returns VM state.
3622 * @param pDevIns The device instance.
3623 * @thread Any thread (just keep in mind that it's volatile info).
3624 */
3625 DECLRCCALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3626
3627 /**
3628 * Set the VM error message
3629 *
3630 * @returns rc.
3631 * @param pDrvIns Driver instance.
3632 * @param rc VBox status code.
3633 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3634 * @param pszFormat Error message format string.
3635 * @param ... Error message arguments.
3636 */
3637 DECLRCCALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3638
3639 /**
3640 * Set the VM error message
3641 *
3642 * @returns rc.
3643 * @param pDrvIns Driver instance.
3644 * @param rc VBox status code.
3645 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3646 * @param pszFormat Error message format string.
3647 * @param va Error message arguments.
3648 */
3649 DECLRCCALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3650
3651 /**
3652 * Set the VM runtime error message
3653 *
3654 * @returns VBox status code.
3655 * @param pDevIns Device instance.
3656 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3657 * @param pszErrorId Error ID string.
3658 * @param pszFormat Error message format string.
3659 * @param ... Error message arguments.
3660 */
3661 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3662
3663 /**
3664 * Set the VM runtime error message
3665 *
3666 * @returns VBox status code.
3667 * @param pDevIns Device instance.
3668 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3669 * @param pszErrorId Error ID string.
3670 * @param pszFormat Error message format string.
3671 * @param va Error message arguments.
3672 */
3673 DECLRCCALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3674
3675 /**
3676 * Set parameters for pending MMIO patch operation
3677 *
3678 * @returns VBox status code.
3679 * @param pDevIns Device instance.
3680 * @param GCPhys MMIO physical address
3681 * @param pCachedData GC pointer to cached data
3682 */
3683 DECLRCCALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3684
3685 /**
3686 * Gets the VM handle. Restricted API.
3687 *
3688 * @returns VM Handle.
3689 * @param pDevIns Device instance.
3690 */
3691 DECLRCCALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3692
3693 /**
3694 * Gets the VMCPU handle. Restricted API.
3695 *
3696 * @returns VMCPU Handle.
3697 * @param pDevIns The device instance.
3698 */
3699 DECLRCCALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3700
3701 /**
3702 * Get the current virtual clock time in a VM. The clock frequency must be
3703 * queried separately.
3704 *
3705 * @returns Current clock time.
3706 * @param pDevIns The device instance.
3707 */
3708 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3709
3710 /**
3711 * Get the frequency of the virtual clock.
3712 *
3713 * @returns The clock frequency (not variable at run-time).
3714 * @param pDevIns The device instance.
3715 */
3716 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3717
3718 /**
3719 * Get the current virtual clock time in a VM, in nanoseconds.
3720 *
3721 * @returns Current clock time (in ns).
3722 * @param pDevIns The device instance.
3723 */
3724 DECLRCCALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3725
3726 /**
3727 * Gets the trace buffer handle.
3728 *
3729 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3730 * really inteded for direct usage, thus no inline wrapper function.
3731 *
3732 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3733 * @param pDevIns The device instance.
3734 */
3735 DECLRCCALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3736
3737 /** Just a safety precaution. */
3738 uint32_t u32TheEnd;
3739} PDMDEVHLPRC;
3740/** Pointer PDM Device RC API. */
3741typedef RCPTRTYPE(struct PDMDEVHLPRC *) PPDMDEVHLPRC;
3742/** Pointer PDM Device RC API. */
3743typedef RCPTRTYPE(const struct PDMDEVHLPRC *) PCPDMDEVHLPRC;
3744
3745/** Current PDMDEVHLP version number. */
3746#define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 3, 0)
3747
3748
3749/**
3750 * PDM Device API - R0 Variant.
3751 */
3752typedef struct PDMDEVHLPR0
3753{
3754 /** Structure version. PDM_DEVHLPR0_VERSION defines the current version. */
3755 uint32_t u32Version;
3756
3757 /**
3758 * Reads data via bus mastering, if enabled. If no bus mastering is available,
3759 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED.
3760 *
3761 * @return IPRT status code.
3762 */
3763 DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3764
3765 /**
3766 * Writes data via bus mastering, if enabled. If no bus mastering is available,
3767 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED.
3768 *
3769 * @return IPRT status code.
3770 */
3771 DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3772
3773 /**
3774 * Set the IRQ for a PCI device.
3775 *
3776 * @param pDevIns Device instance.
3777 * @param iIrq IRQ number to set.
3778 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3779 * @thread Any thread, but will involve the emulation thread.
3780 */
3781 DECLR0CALLBACKMEMBER(void, pfnPCISetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3782
3783 /**
3784 * Set ISA IRQ for a device.
3785 *
3786 * @param pDevIns Device instance.
3787 * @param iIrq IRQ number to set.
3788 * @param iLevel IRQ level. See the PDM_IRQ_LEVEL_* \#defines.
3789 * @thread Any thread, but will involve the emulation thread.
3790 */
3791 DECLR0CALLBACKMEMBER(void, pfnISASetIrq,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
3792
3793 /**
3794 * Read physical memory.
3795 *
3796 * @returns VINF_SUCCESS (for now).
3797 * @param pDevIns Device instance.
3798 * @param GCPhys Physical address start reading from.
3799 * @param pvBuf Where to put the read bits.
3800 * @param cbRead How many bytes to read.
3801 */
3802 DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
3803
3804 /**
3805 * Write to physical memory.
3806 *
3807 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
3808 * @param pDevIns Device instance.
3809 * @param GCPhys Physical address to write to.
3810 * @param pvBuf What to write.
3811 * @param cbWrite How many bytes to write.
3812 */
3813 DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
3814
3815 /**
3816 * Checks if the Gate A20 is enabled or not.
3817 *
3818 * @returns true if A20 is enabled.
3819 * @returns false if A20 is disabled.
3820 * @param pDevIns Device instance.
3821 * @thread The emulation thread.
3822 */
3823 DECLR0CALLBACKMEMBER(bool, pfnA20IsEnabled,(PPDMDEVINS pDevIns));
3824
3825 /**
3826 * Gets the VM state.
3827 *
3828 * @returns VM state.
3829 * @param pDevIns The device instance.
3830 * @thread Any thread (just keep in mind that it's volatile info).
3831 */
3832 DECLR0CALLBACKMEMBER(VMSTATE, pfnVMState, (PPDMDEVINS pDevIns));
3833
3834 /**
3835 * Set the VM error message
3836 *
3837 * @returns rc.
3838 * @param pDrvIns Driver instance.
3839 * @param rc VBox status code.
3840 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3841 * @param pszFormat Error message format string.
3842 * @param ... Error message arguments.
3843 */
3844 DECLR0CALLBACKMEMBER(int, pfnVMSetError,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...));
3845
3846 /**
3847 * Set the VM error message
3848 *
3849 * @returns rc.
3850 * @param pDrvIns Driver instance.
3851 * @param rc VBox status code.
3852 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
3853 * @param pszFormat Error message format string.
3854 * @param va Error message arguments.
3855 */
3856 DECLR0CALLBACKMEMBER(int, pfnVMSetErrorV,(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va));
3857
3858 /**
3859 * Set the VM runtime error message
3860 *
3861 * @returns VBox status code.
3862 * @param pDevIns Device instance.
3863 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3864 * @param pszErrorId Error ID string.
3865 * @param pszFormat Error message format string.
3866 * @param ... Error message arguments.
3867 */
3868 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeError,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...));
3869
3870 /**
3871 * Set the VM runtime error message
3872 *
3873 * @returns VBox status code.
3874 * @param pDevIns Device instance.
3875 * @param fFlags The action flags. See VMSETRTERR_FLAGS_*.
3876 * @param pszErrorId Error ID string.
3877 * @param pszFormat Error message format string.
3878 * @param va Error message arguments.
3879 */
3880 DECLR0CALLBACKMEMBER(int, pfnVMSetRuntimeErrorV,(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va));
3881
3882 /**
3883 * Set parameters for pending MMIO patch operation
3884 *
3885 * @returns rc.
3886 * @param pDevIns Device instance.
3887 * @param GCPhys MMIO physical address
3888 * @param pCachedData GC pointer to cached data
3889 */
3890 DECLR0CALLBACKMEMBER(int, pfnPATMSetMMIOPatchInfo,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPTR pCachedData));
3891
3892 /**
3893 * Gets the VM handle. Restricted API.
3894 *
3895 * @returns VM Handle.
3896 * @param pDevIns Device instance.
3897 */
3898 DECLR0CALLBACKMEMBER(PVM, pfnGetVM,(PPDMDEVINS pDevIns));
3899
3900 /**
3901 * Checks if our current CPU state allows for IO block emulation fallback to the recompiler
3902 *
3903 * @returns true = yes, false = no
3904 * @param pDevIns Device instance.
3905 */
3906 DECLR0CALLBACKMEMBER(bool, pfnCanEmulateIoBlock,(PPDMDEVINS pDevIns));
3907
3908 /**
3909 * Gets the VMCPU handle. Restricted API.
3910 *
3911 * @returns VMCPU Handle.
3912 * @param pDevIns The device instance.
3913 */
3914 DECLR0CALLBACKMEMBER(PVMCPU, pfnGetVMCPU,(PPDMDEVINS pDevIns));
3915
3916 /**
3917 * Get the current virtual clock time in a VM. The clock frequency must be
3918 * queried separately.
3919 *
3920 * @returns Current clock time.
3921 * @param pDevIns The device instance.
3922 */
3923 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGet,(PPDMDEVINS pDevIns));
3924
3925 /**
3926 * Get the frequency of the virtual clock.
3927 *
3928 * @returns The clock frequency (not variable at run-time).
3929 * @param pDevIns The device instance.
3930 */
3931 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetFreq,(PPDMDEVINS pDevIns));
3932
3933 /**
3934 * Get the current virtual clock time in a VM, in nanoseconds.
3935 *
3936 * @returns Current clock time (in ns).
3937 * @param pDevIns The device instance.
3938 */
3939 DECLR0CALLBACKMEMBER(uint64_t, pfnTMTimeVirtGetNano,(PPDMDEVINS pDevIns));
3940
3941 /**
3942 * Gets the trace buffer handle.
3943 *
3944 * This is used by the macros found in VBox/vmm/dbgftrace.h and is not
3945 * really inteded for direct usage, thus no inline wrapper function.
3946 *
3947 * @returns Trace buffer handle or NIL_RTTRACEBUF.
3948 * @param pDevIns The device instance.
3949 */
3950 DECLR0CALLBACKMEMBER(RTTRACEBUF, pfnDBGFTraceBuf,(PPDMDEVINS pDevIns));
3951
3952 /** Just a safety precaution. */
3953 uint32_t u32TheEnd;
3954} PDMDEVHLPR0;
3955/** Pointer PDM Device R0 API. */
3956typedef R0PTRTYPE(struct PDMDEVHLPR0 *) PPDMDEVHLPR0;
3957/** Pointer PDM Device GC API. */
3958typedef R0PTRTYPE(const struct PDMDEVHLPR0 *) PCPDMDEVHLPR0;
3959
3960/** Current PDMDEVHLP version number. */
3961#define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 3, 0)
3962
3963
3964
3965/**
3966 * PDM Device Instance.
3967 */
3968typedef struct PDMDEVINS
3969{
3970 /** Structure version. PDM_DEVINS_VERSION defines the current version. */
3971 uint32_t u32Version;
3972 /** Device instance number. */
3973 uint32_t iInstance;
3974
3975 /** Pointer the GC PDM Device API. */
3976 PCPDMDEVHLPRC pHlpRC;
3977 /** Pointer to device instance data. */
3978 RTRCPTR pvInstanceDataRC;
3979 /** The critical section for the device, see pCritSectXR3. */
3980 RCPTRTYPE(PPDMCRITSECT) pCritSectRoRC;
3981 /** Alignment padding. */
3982 RTRCPTR pAlignmentRC;
3983
3984 /** Pointer the R0 PDM Device API. */
3985 PCPDMDEVHLPR0 pHlpR0;
3986 /** Pointer to device instance data (R0). */
3987 RTR0PTR pvInstanceDataR0;
3988 /** The critical section for the device, see pCritSectXR3. */
3989 R0PTRTYPE(PPDMCRITSECT) pCritSectRoR0;
3990
3991 /** Pointer the HC PDM Device API. */
3992 PCPDMDEVHLPR3 pHlpR3;
3993 /** Pointer to device instance data. */
3994 RTR3PTR pvInstanceDataR3;
3995 /** The critical section for the device.
3996 *
3997 * TM and IOM will enter this critical section before calling into the device
3998 * code. PDM will when doing power on, power off, reset, suspend and resume
3999 * notifications. SSM will currently not, but this will be changed later on.
4000 *
4001 * The device gets a critical section automatically assigned to it before
4002 * the constructor is called. If the constructor wishes to use a different
4003 * critical section, it calls PDMDevHlpSetDeviceCritSect() to change it
4004 * very early on.
4005 */
4006 R3PTRTYPE(PPDMCRITSECT) pCritSectRoR3;
4007
4008 /** Pointer to device registration structure. */
4009 R3PTRTYPE(PCPDMDEVREG) pReg;
4010 /** Configuration handle. */
4011 R3PTRTYPE(PCFGMNODE) pCfg;
4012
4013 /** The base interface of the device.
4014 *
4015 * The device constructor initializes this if it has any
4016 * device level interfaces to export. To obtain this interface
4017 * call PDMR3QueryDevice(). */
4018 PDMIBASE IBase;
4019
4020 /** Tracing indicator. */
4021 uint32_t fTracing;
4022 /** The tracing ID of this device. */
4023 uint32_t idTracing;
4024#if HC_ARCH_BITS == 32
4025 /** Align the internal data more naturally. */
4026 uint32_t au32Padding[HC_ARCH_BITS == 32 ? 13 : 0];
4027#endif
4028
4029 /** Internal data. */
4030 union
4031 {
4032#ifdef PDMDEVINSINT_DECLARED
4033 PDMDEVINSINT s;
4034#endif
4035 uint8_t padding[HC_ARCH_BITS == 32 ? 72 : 112 + 0x28];
4036 } Internal;
4037
4038 /** Device instance data. The size of this area is defined
4039 * in the PDMDEVREG::cbInstanceData field. */
4040 char achInstanceData[8];
4041} PDMDEVINS;
4042
4043/** Current PDMDEVINS version number. */
4044#define PDM_DEVINS_VERSION PDM_VERSION_MAKE(0xffe4, 3, 0)
4045
4046/** Converts a pointer to the PDMDEVINS::IBase to a pointer to PDMDEVINS. */
4047#define PDMIBASE_2_PDMDEV(pInterface) ( (PPDMDEVINS)((char *)(pInterface) - RT_OFFSETOF(PDMDEVINS, IBase)) )
4048
4049/**
4050 * Checks the structure versions of the device instance and device helpers,
4051 * returning if they are incompatible.
4052 *
4053 * This is for use in the constructor.
4054 *
4055 * @param pDevIns The device instance pointer.
4056 */
4057#define PDMDEV_CHECK_VERSIONS_RETURN(pDevIns) \
4058 do \
4059 { \
4060 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4061 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4062 ("DevIns=%#x mine=%#x\n", (pDevIns)->u32Version, PDM_DEVINS_VERSION), \
4063 VERR_PDM_DEVINS_VERSION_MISMATCH); \
4064 AssertLogRelMsgReturn(PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4065 ("DevHlp=%#x mine=%#x\n", (pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION), \
4066 VERR_PDM_DEVHLPR3_VERSION_MISMATCH); \
4067 } while (0)
4068
4069/**
4070 * Quietly checks the structure versions of the device instance and device
4071 * helpers, returning if they are incompatible.
4072 *
4073 * This is for use in the destructor.
4074 *
4075 * @param pDevIns The device instance pointer.
4076 */
4077#define PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns) \
4078 do \
4079 { \
4080 PPDMDEVINS pDevInsTypeCheck = (pDevIns); NOREF(pDevInsTypeCheck); \
4081 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->u32Version, PDM_DEVINS_VERSION) )) \
4082 return VERR_PDM_DEVINS_VERSION_MISMATCH; \
4083 if (RT_UNLIKELY(!PDM_VERSION_ARE_COMPATIBLE((pDevIns)->pHlpR3->u32Version, PDM_DEVHLPR3_VERSION) )) \
4084 return VERR_PDM_DEVHLPR3_VERSION_MISMATCH; \
4085 } while (0)
4086
4087/**
4088 * Wrapper around CFGMR3ValidateConfig for the root config for use in the
4089 * constructor - returns on failure.
4090 *
4091 * This should be invoked after having initialized the instance data
4092 * sufficiently for the correct operation of the destructor. The destructor is
4093 * always called!
4094 *
4095 * @param pDevIns Pointer to the PDM device instance.
4096 * @param pszValidValues Patterns describing the valid value names. See
4097 * RTStrSimplePatternMultiMatch for details on the
4098 * pattern syntax.
4099 * @param pszValidNodes Patterns describing the valid node (key) names.
4100 * Pass empty string if no valid nodes.
4101 */
4102#define PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, pszValidValues, pszValidNodes) \
4103 do \
4104 { \
4105 int rcValCfg = CFGMR3ValidateConfig((pDevIns)->pCfg, "/", pszValidValues, pszValidNodes, \
4106 (pDevIns)->pReg->szName, (pDevIns)->iInstance); \
4107 if (RT_FAILURE(rcValCfg)) \
4108 return rcValCfg; \
4109 } while (0)
4110
4111/** @def PDMDEV_ASSERT_EMT
4112 * Assert that the current thread is the emulation thread.
4113 */
4114#ifdef VBOX_STRICT
4115# define PDMDEV_ASSERT_EMT(pDevIns) pDevIns->pHlpR3->pfnAssertEMT(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4116#else
4117# define PDMDEV_ASSERT_EMT(pDevIns) do { } while (0)
4118#endif
4119
4120/** @def PDMDEV_ASSERT_OTHER
4121 * Assert that the current thread is NOT the emulation thread.
4122 */
4123#ifdef VBOX_STRICT
4124# define PDMDEV_ASSERT_OTHER(pDevIns) pDevIns->pHlpR3->pfnAssertOther(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4125#else
4126# define PDMDEV_ASSERT_OTHER(pDevIns) do { } while (0)
4127#endif
4128
4129/** @def PDMDEV_ASSERT_VMLOCK_OWNER
4130 * Assert that the current thread is owner of the VM lock.
4131 */
4132#ifdef VBOX_STRICT
4133# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) pDevIns->pHlpR3->pfnAssertVMLock(pDevIns, __FILE__, __LINE__, __FUNCTION__)
4134#else
4135# define PDMDEV_ASSERT_VMLOCK_OWNER(pDevIns) do { } while (0)
4136#endif
4137
4138/** @def PDMDEV_SET_ERROR
4139 * Set the VM error. See PDMDevHlpVMSetError() for printf like message formatting.
4140 */
4141#define PDMDEV_SET_ERROR(pDevIns, rc, pszError) \
4142 PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, "%s", pszError)
4143
4144/** @def PDMDEV_SET_RUNTIME_ERROR
4145 * Set the VM runtime error. See PDMDevHlpVMSetRuntimeError() for printf like message formatting.
4146 */
4147#define PDMDEV_SET_RUNTIME_ERROR(pDevIns, fFlags, pszErrorId, pszError) \
4148 PDMDevHlpVMSetRuntimeError(pDevIns, fFlags, pszErrorId, "%s", pszError)
4149
4150/** @def PDMDEVINS_2_RCPTR
4151 * Converts a PDM Device instance pointer a RC PDM Device instance pointer.
4152 */
4153#define PDMDEVINS_2_RCPTR(pDevIns) ( (RCPTRTYPE(PPDMDEVINS))((RTGCUINTPTR)(pDevIns)->pvInstanceDataRC - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4154
4155/** @def PDMDEVINS_2_R3PTR
4156 * Converts a PDM Device instance pointer a R3 PDM Device instance pointer.
4157 */
4158#define PDMDEVINS_2_R3PTR(pDevIns) ( (R3PTRTYPE(PPDMDEVINS))((RTHCUINTPTR)(pDevIns)->pvInstanceDataR3 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4159
4160/** @def PDMDEVINS_2_R0PTR
4161 * Converts a PDM Device instance pointer a R0 PDM Device instance pointer.
4162 */
4163#define PDMDEVINS_2_R0PTR(pDevIns) ( (R0PTRTYPE(PPDMDEVINS))((RTR0UINTPTR)(pDevIns)->pvInstanceDataR0 - RT_OFFSETOF(PDMDEVINS, achInstanceData)) )
4164
4165
4166#ifdef IN_RING3
4167
4168/**
4169 * @copydoc PDMDEVHLPR3::pfnIOPortRegister
4170 */
4171DECLINLINE(int) PDMDevHlpIOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTHCPTR pvUser,
4172 PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
4173 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
4174{
4175 return pDevIns->pHlpR3->pfnIOPortRegister(pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
4176}
4177
4178/**
4179 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterRC
4180 */
4181DECLINLINE(int) PDMDevHlpIOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTRCPTR pvUser,
4182 const char *pszOut, const char *pszIn, const char *pszOutStr,
4183 const char *pszInStr, const char *pszDesc)
4184{
4185 return pDevIns->pHlpR3->pfnIOPortRegisterRC(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4186}
4187
4188/**
4189 * @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0
4190 */
4191DECLINLINE(int) PDMDevHlpIOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts, RTR0PTR pvUser,
4192 const char *pszOut, const char *pszIn, const char *pszOutStr,
4193 const char *pszInStr, const char *pszDesc)
4194{
4195 return pDevIns->pHlpR3->pfnIOPortRegisterR0(pDevIns, Port, cPorts, pvUser, pszOut, pszIn, pszOutStr, pszInStr, pszDesc);
4196}
4197
4198/**
4199 * @copydoc PDMDEVHLPR3::pfnIOPortDeregister
4200 */
4201DECLINLINE(int) PDMDevHlpIOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)
4202{
4203 return pDevIns->pHlpR3->pfnIOPortDeregister(pDevIns, Port, cPorts);
4204}
4205
4206/**
4207 * Register a Memory Mapped I/O (MMIO) region.
4208 *
4209 * These callbacks are of course for the ring-3 context (R3). Register HC
4210 * handlers before raw-mode context (RC) and ring-0 context (R0) handlers! There
4211 * must be a R3 handler for every RC and R0 handler!
4212 *
4213 * @returns VBox status.
4214 * @param pDevIns The device instance to register the MMIO with.
4215 * @param GCPhysStart First physical address in the range.
4216 * @param cbRange The size of the range (in bytes).
4217 * @param pvUser User argument.
4218 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.
4219 * @param pfnWrite Pointer to function which is gonna handle Write operations.
4220 * @param pfnRead Pointer to function which is gonna handle Read operations.
4221 * @param pszDesc Pointer to description string. This must not be freed.
4222 */
4223DECLINLINE(int) PDMDevHlpMMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4224 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, const char *pszDesc)
4225{
4226 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, NULL /*pfnFill*/,
4227 fFlags, pszDesc);
4228}
4229
4230/**
4231 * Register a Memory Mapped I/O (MMIO) region for GC.
4232 *
4233 * These callbacks are for the raw-mode context (RC). Register ring-3 context
4234 * (R3) handlers before guest context handlers! There must be a R3 handler for
4235 * every RC handler!
4236 *
4237 * @returns VBox status.
4238 * @param pDevIns The device instance to register the MMIO with.
4239 * @param GCPhysStart First physical address in the range.
4240 * @param cbRange The size of the range (in bytes).
4241 * @param pvUser User argument.
4242 * @param pszWrite Name of the RC function which is gonna handle Write operations.
4243 * @param pszRead Name of the RC function which is gonna handle Read operations.
4244 */
4245DECLINLINE(int) PDMDevHlpMMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4246 const char *pszWrite, const char *pszRead)
4247{
4248 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4249}
4250
4251/**
4252 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4253 */
4254DECLINLINE(int) PDMDevHlpMMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4255 const char *pszWrite, const char *pszRead)
4256{
4257 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, NULL /*pszFill*/);
4258}
4259
4260/**
4261 * @copydoc PDMDEVHLPR3::pfnMMIORegister
4262 */
4263DECLINLINE(int) PDMDevHlpMMIORegisterEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTHCPTR pvUser,
4264 uint32_t fFlags, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead,
4265 PFNIOMMMIOFILL pfnFill, const char *pszDesc)
4266{
4267 return pDevIns->pHlpR3->pfnMMIORegister(pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill,
4268 fFlags, pszDesc);
4269}
4270
4271/**
4272 * @copydoc PDMDEVHLPR3::pfnMMIORegisterRC
4273 */
4274DECLINLINE(int) PDMDevHlpMMIORegisterRCEx(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTRCPTR pvUser,
4275 const char *pszWrite, const char *pszRead, const char *pszFill)
4276{
4277 return pDevIns->pHlpR3->pfnMMIORegisterRC(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4278}
4279
4280/**
4281 * @copydoc PDMDEVHLPR3::pfnMMIORegisterR0
4282 */
4283DECLINLINE(int) PDMDevHlpMMIORegisterR0Ex(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, RTR0PTR pvUser,
4284 const char *pszWrite, const char *pszRead, const char *pszFill)
4285{
4286 return pDevIns->pHlpR3->pfnMMIORegisterR0(pDevIns, GCPhysStart, cbRange, pvUser, pszWrite, pszRead, pszFill);
4287}
4288
4289/**
4290 * @copydoc PDMDEVHLPR3::pfnMMIODeregister
4291 */
4292DECLINLINE(int) PDMDevHlpMMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange)
4293{
4294 return pDevIns->pHlpR3->pfnMMIODeregister(pDevIns, GCPhysStart, cbRange);
4295}
4296
4297/**
4298 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
4299 */
4300DECLINLINE(int) PDMDevHlpMMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
4301{
4302 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
4303}
4304
4305/**
4306 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
4307 */
4308DECLINLINE(int) PDMDevHlpMMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
4309{
4310 return pDevIns->pHlpR3->pfnMMIO2Deregister(pDevIns, iRegion);
4311}
4312
4313/**
4314 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
4315 */
4316DECLINLINE(int) PDMDevHlpMMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4317{
4318 return pDevIns->pHlpR3->pfnMMIO2Map(pDevIns, iRegion, GCPhys);
4319}
4320
4321/**
4322 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
4323 */
4324DECLINLINE(int) PDMDevHlpMMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
4325{
4326 return pDevIns->pHlpR3->pfnMMIO2Unmap(pDevIns, iRegion, GCPhys);
4327}
4328
4329/**
4330 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
4331 */
4332DECLINLINE(int) PDMDevHlpMMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4333 const char *pszDesc, PRTRCPTR pRCPtr)
4334{
4335 return pDevIns->pHlpR3->pfnMMHyperMapMMIO2(pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
4336}
4337
4338/**
4339 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
4340 */
4341DECLINLINE(int) PDMDevHlpMMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
4342 const char *pszDesc, PRTR0PTR pR0Ptr)
4343{
4344 return pDevIns->pHlpR3->pfnMMIO2MapKernel(pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
4345}
4346
4347/**
4348 * @copydoc PDMDEVHLPR3::pfnROMRegister
4349 */
4350DECLINLINE(int) PDMDevHlpROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange,
4351 const void *pvBinary, uint32_t cbBinary, uint32_t fFlags, const char *pszDesc)
4352{
4353 return pDevIns->pHlpR3->pfnROMRegister(pDevIns, GCPhysStart, cbRange, pvBinary, cbBinary, fFlags, pszDesc);
4354}
4355
4356/**
4357 * @copydoc PDMDEVHLPR3::pfnROMProtectShadow
4358 */
4359DECLINLINE(int) PDMDevHlpROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, uint32_t cbRange, PGMROMPROT enmProt)
4360{
4361 return pDevIns->pHlpR3->pfnROMProtectShadow(pDevIns, GCPhysStart, cbRange, enmProt);
4362}
4363
4364/**
4365 * Register a save state data unit.
4366 *
4367 * @returns VBox status.
4368 * @param pDevIns The device instance.
4369 * @param uVersion Data layout version number.
4370 * @param cbGuess The approximate amount of data in the unit.
4371 * Only for progress indicators.
4372 * @param pfnSaveExec Execute save callback, optional.
4373 * @param pfnLoadExec Execute load callback, optional.
4374 */
4375DECLINLINE(int) PDMDevHlpSSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4376 PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4377{
4378 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4379 NULL /*pfnLivePrep*/, NULL /*pfnLiveExec*/, NULL /*pfnLiveDone*/,
4380 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4381 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4382}
4383
4384/**
4385 * Register a save state data unit with a live save callback as well.
4386 *
4387 * @returns VBox status.
4388 * @param pDevIns The device instance.
4389 * @param uVersion Data layout version number.
4390 * @param cbGuess The approximate amount of data in the unit.
4391 * Only for progress indicators.
4392 * @param pfnLiveExec Execute live callback, optional.
4393 * @param pfnSaveExec Execute save callback, optional.
4394 * @param pfnLoadExec Execute load callback, optional.
4395 */
4396DECLINLINE(int) PDMDevHlpSSMRegister3(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess,
4397 FNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVLOADEXEC pfnLoadExec)
4398{
4399 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, NULL /*pszBefore*/,
4400 NULL /*pfnLivePrep*/, pfnLiveExec, NULL /*pfnLiveDone*/,
4401 NULL /*pfnSavePrep*/, pfnSaveExec, NULL /*pfnSaveDone*/,
4402 NULL /*pfnLoadPrep*/, pfnLoadExec, NULL /*pfnLoadDone*/);
4403}
4404
4405/**
4406 * @copydoc PDMDEVHLPR3::pfnSSMRegister
4407 */
4408DECLINLINE(int) PDMDevHlpSSMRegisterEx(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
4409 PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
4410 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
4411 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
4412{
4413 return pDevIns->pHlpR3->pfnSSMRegister(pDevIns, uVersion, cbGuess, pszBefore,
4414 pfnLivePrep, pfnLiveExec, pfnLiveVote,
4415 pfnSavePrep, pfnSaveExec, pfnSaveDone,
4416 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
4417}
4418
4419/**
4420 * @copydoc PDMDEVHLPR3::pfnTMTimerCreate
4421 */
4422DECLINLINE(int) PDMDevHlpTMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void *pvUser, uint32_t fFlags,
4423 const char *pszDesc, PPTMTIMERR3 ppTimer)
4424{
4425 return pDevIns->pHlpR3->pfnTMTimerCreate(pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
4426}
4427
4428/**
4429 * @copydoc PDMDEVHLPR3::pfnTMUtcNow
4430 */
4431DECLINLINE(PRTTIMESPEC) PDMDevHlpTMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
4432{
4433 return pDevIns->pHlpR3->pfnTMUtcNow(pDevIns, pTime);
4434}
4435
4436#endif /* IN_RING3 */
4437
4438/**
4439 * @copydoc PDMDEVHLPR3::pfnPhysRead
4440 */
4441DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4442{
4443 return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
4444}
4445
4446/**
4447 * @copydoc PDMDEVHLPR3::pfnPhysWrite
4448 */
4449DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4450{
4451 return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
4452}
4453
4454#ifdef IN_RING3
4455
4456/**
4457 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr
4458 */
4459DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
4460{
4461 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtr(pDevIns, GCPhys, fFlags, ppv, pLock);
4462}
4463
4464/**
4465 * @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly
4466 */
4467DECLINLINE(int) PDMDevHlpPhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void const **ppv, PPGMPAGEMAPLOCK pLock)
4468{
4469 return pDevIns->CTX_SUFF(pHlp)->pfnPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhys, fFlags, ppv, pLock);
4470}
4471
4472/**
4473 * @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock
4474 */
4475DECLINLINE(void) PDMDevHlpPhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
4476{
4477 pDevIns->CTX_SUFF(pHlp)->pfnPhysReleasePageMappingLock(pDevIns, pLock);
4478}
4479
4480/**
4481 * @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt
4482 */
4483DECLINLINE(int) PDMDevHlpPhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
4484{
4485 return pDevIns->pHlpR3->pfnPhysReadGCVirt(pDevIns, pvDst, GCVirtSrc, cb);
4486}
4487
4488/**
4489 * @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt
4490 */
4491DECLINLINE(int) PDMDevHlpPhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
4492{
4493 return pDevIns->pHlpR3->pfnPhysWriteGCVirt(pDevIns, GCVirtDst, pvSrc, cb);
4494}
4495
4496/**
4497 * @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys
4498 */
4499DECLINLINE(int) PDMDevHlpPhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
4500{
4501 return pDevIns->pHlpR3->pfnPhysGCPtr2GCPhys(pDevIns, GCPtr, pGCPhys);
4502}
4503
4504/**
4505 * @copydoc PDMDEVHLPR3::pfnMMHeapAlloc
4506 */
4507DECLINLINE(void *) PDMDevHlpMMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
4508{
4509 return pDevIns->pHlpR3->pfnMMHeapAlloc(pDevIns, cb);
4510}
4511
4512/**
4513 * @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ
4514 */
4515DECLINLINE(void *) PDMDevHlpMMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
4516{
4517 return pDevIns->pHlpR3->pfnMMHeapAllocZ(pDevIns, cb);
4518}
4519
4520/**
4521 * @copydoc PDMDEVHLPR3::pfnMMHeapFree
4522 */
4523DECLINLINE(void) PDMDevHlpMMHeapFree(PPDMDEVINS pDevIns, void *pv)
4524{
4525 pDevIns->pHlpR3->pfnMMHeapFree(pDevIns, pv);
4526}
4527#endif /* IN_RING3 */
4528
4529/**
4530 * @copydoc PDMDEVHLPR3::pfnVMState
4531 */
4532DECLINLINE(VMSTATE) PDMDevHlpVMState(PPDMDEVINS pDevIns)
4533{
4534 return pDevIns->CTX_SUFF(pHlp)->pfnVMState(pDevIns);
4535}
4536
4537#ifdef IN_RING3
4538/**
4539 * @copydoc PDMDEVHLPR3::pfnVMTeleportedAndNotFullyResumedYet
4540 */
4541DECLINLINE(bool) PDMDevHlpVMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
4542{
4543 return pDevIns->pHlpR3->pfnVMTeleportedAndNotFullyResumedYet(pDevIns);
4544}
4545#endif /* IN_RING3 */
4546
4547/**
4548 * @copydoc PDMDEVHLPR3::pfnVMSetError
4549 */
4550DECLINLINE(int) PDMDevHlpVMSetError(PPDMDEVINS pDevIns, const int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
4551{
4552 va_list va;
4553 va_start(va, pszFormat);
4554 pDevIns->CTX_SUFF(pHlp)->pfnVMSetErrorV(pDevIns, rc, RT_SRC_POS_ARGS, pszFormat, va);
4555 va_end(va);
4556 return rc;
4557}
4558
4559/**
4560 * @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError
4561 */
4562DECLINLINE(int) PDMDevHlpVMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
4563{
4564 va_list va;
4565 int rc;
4566 va_start(va, pszFormat);
4567 rc = pDevIns->CTX_SUFF(pHlp)->pfnVMSetRuntimeErrorV(pDevIns, fFlags, pszErrorId, pszFormat, va);
4568 va_end(va);
4569 return rc;
4570}
4571
4572/**
4573 * VBOX_STRICT wrapper for pHlp->pfnDBGFStopV.
4574 *
4575 * @returns VBox status code which must be passed up to the VMM. This will be
4576 * VINF_SUCCESS in non-strict builds.
4577 * @param pDevIns The device instance.
4578 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4579 * @param pszFormat Message. (optional)
4580 * @param ... Message parameters.
4581 */
4582DECLINLINE(int) PDMDevHlpDBGFStop(PPDMDEVINS pDevIns, RT_SRC_POS_DECL, const char *pszFormat, ...)
4583{
4584#ifdef VBOX_STRICT
4585# ifdef IN_RING3
4586 int rc;
4587 va_list args;
4588 va_start(args, pszFormat);
4589 rc = pDevIns->pHlpR3->pfnDBGFStopV(pDevIns, RT_SRC_POS_ARGS, pszFormat, args);
4590 va_end(args);
4591 return rc;
4592# else
4593 NOREF(pDevIns);
4594 NOREF(pszFile);
4595 NOREF(iLine);
4596 NOREF(pszFunction);
4597 NOREF(pszFormat);
4598 return VINF_EM_DBG_STOP;
4599# endif
4600#else
4601 NOREF(pDevIns);
4602 NOREF(pszFile);
4603 NOREF(iLine);
4604 NOREF(pszFunction);
4605 NOREF(pszFormat);
4606 return VINF_SUCCESS;
4607#endif
4608}
4609
4610#ifdef IN_RING3
4611
4612/**
4613 * @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister
4614 */
4615DECLINLINE(int) PDMDevHlpDBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
4616{
4617 return pDevIns->pHlpR3->pfnDBGFInfoRegister(pDevIns, pszName, pszDesc, pfnHandler);
4618}
4619
4620/**
4621 * @copydoc PDMDEVHLPR3::pfnSTAMRegister
4622 */
4623DECLINLINE(void) PDMDevHlpSTAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
4624{
4625 pDevIns->pHlpR3->pfnSTAMRegister(pDevIns, pvSample, enmType, pszName, enmUnit, pszDesc);
4626}
4627
4628/**
4629 * @copydoc PDMDEVHLPR3::pfnSTAMRegisterF
4630 */
4631DECLINLINE(void) PDMDevHlpSTAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit,
4632 const char *pszDesc, const char *pszName, ...)
4633{
4634 va_list va;
4635 va_start(va, pszName);
4636 pDevIns->pHlpR3->pfnSTAMRegisterV(pDevIns, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, va);
4637 va_end(va);
4638}
4639
4640/**
4641 * @copydoc PDMDEVHLPR3::pfnPCIRegister
4642 */
4643DECLINLINE(int) PDMDevHlpPCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
4644{
4645 return pDevIns->pHlpR3->pfnPCIRegister(pDevIns, pPciDev);
4646}
4647
4648/**
4649 * @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister
4650 */
4651DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
4652{
4653 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, iRegion, cbRegion, enmType, pfnCallback);
4654}
4655
4656/**
4657 * @copydoc PDMDEVHLPR3::pfnPCIRegisterMsi
4658 */
4659DECLINLINE(int) PDMDevHlpPCIRegisterMsi(PPDMDEVINS pDevIns, PPDMMSIREG pMsiReg)
4660{
4661 return pDevIns->pHlpR3->pfnPCIRegisterMsi(pDevIns, pMsiReg);
4662}
4663
4664/**
4665 * @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks
4666 */
4667DECLINLINE(void) PDMDevHlpPCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
4668 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
4669{
4670 pDevIns->pHlpR3->pfnPCISetConfigCallbacks(pDevIns, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
4671}
4672
4673/**
4674 * Reads data via bus mastering, if enabled. If no bus mastering is available,
4675 * this function does nothing and returns VINF_PGM_PCI_PHYS_READ_BM_DISABLED.
4676 *
4677 * @return IPRT status code.
4678 */
4679DECLINLINE(int) PDMDevHlpPCIDevPhysRead(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
4680{
4681 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER);
4682 AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);
4683 AssertReturn(cbRead, VERR_INVALID_PARAMETER);
4684
4685 if (!PCIDevIsBusmaster(pPciDev))
4686 {
4687#ifdef DEBUG
4688 Log2(("%s: %RU16:%RU16: No bus master (anymore), skipping read %p (%z)\n", __FUNCTION__,
4689 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbRead));
4690#endif
4691 return VINF_PDM_PCI_PHYS_READ_BM_DISABLED;
4692 }
4693
4694 return PDMDevHlpPhysRead(pPciDev->pDevIns, GCPhys, pvBuf, cbRead);
4695}
4696
4697/**
4698 * Writes data via bus mastering, if enabled. If no bus mastering is available,
4699 * this function does nothing and returns VINF_PGM_PCI_PHYS_WRITE_BM_DISABLED.
4700 *
4701 * @return IPRT status code.
4702 */
4703DECLINLINE(int) PDMDevHlpPCIDevPhysWrite(PPCIDEVICE pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
4704{
4705 AssertPtrReturn(pPciDev, VERR_INVALID_POINTER);
4706 AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);
4707 AssertReturn(cbWrite, VERR_INVALID_PARAMETER);
4708
4709 if (!PCIDevIsBusmaster(pPciDev))
4710 {
4711#ifdef DEBUG
4712 Log2(("%s: %RU16:%RU16: No bus master (anymore), skipping write %p (%z)\n", __FUNCTION__,
4713 PCIDevGetVendorId(pPciDev), PCIDevGetDeviceId(pPciDev), pvBuf, cbWrite));
4714#endif
4715 return VINF_PDM_PCI_PHYS_WRITE_BM_DISABLED;
4716 }
4717
4718 return PDMDevHlpPhysWrite(pPciDev->pDevIns, GCPhys, pvBuf, cbWrite);
4719}
4720
4721#endif /* IN_RING3 */
4722
4723/**
4724 * @copydoc PDMDEVHLPR3::pfnPCISetIrq
4725 */
4726DECLINLINE(void) PDMDevHlpPCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4727{
4728 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4729}
4730
4731/**
4732 * @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait
4733 */
4734DECLINLINE(void) PDMDevHlpPCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4735{
4736 pDevIns->CTX_SUFF(pHlp)->pfnPCISetIrq(pDevIns, iIrq, iLevel);
4737}
4738
4739/**
4740 * @copydoc PDMDEVHLPR3::pfnISASetIrq
4741 */
4742DECLINLINE(void) PDMDevHlpISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4743{
4744 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4745}
4746
4747/**
4748 * @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait
4749 */
4750DECLINLINE(void) PDMDevHlpISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4751{
4752 pDevIns->CTX_SUFF(pHlp)->pfnISASetIrq(pDevIns, iIrq, iLevel);
4753}
4754
4755#ifdef IN_RING3
4756
4757/**
4758 * @copydoc PDMDEVHLPR3::pfnDriverAttach
4759 */
4760DECLINLINE(int) PDMDevHlpDriverAttach(PPDMDEVINS pDevIns, uint32_t iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
4761{
4762 return pDevIns->pHlpR3->pfnDriverAttach(pDevIns, iLun, pBaseInterface, ppBaseInterface, pszDesc);
4763}
4764
4765/**
4766 * @copydoc PDMDEVHLPR3::pfnQueueCreate
4767 */
4768DECLINLINE(int) PDMDevHlpQueueCreate(PPDMDEVINS pDevIns, size_t cbItem, uint32_t cItems, uint32_t cMilliesInterval,
4769 PFNPDMQUEUEDEV pfnCallback, bool fRZEnabled, const char *pszName, PPDMQUEUE *ppQueue)
4770{
4771 return pDevIns->pHlpR3->pfnQueueCreate(pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fRZEnabled, pszName, ppQueue);
4772}
4773
4774/**
4775 * Initializes a PDM critical section.
4776 *
4777 * The PDM critical sections are derived from the IPRT critical sections, but
4778 * works in RC and R0 as well.
4779 *
4780 * @returns VBox status code.
4781 * @param pDevIns The device instance.
4782 * @param pCritSect Pointer to the critical section.
4783 * @param RT_SRC_POS_DECL Use RT_SRC_POS.
4784 * @param pszNameFmt Format string for naming the critical section.
4785 * For statistics and lock validation.
4786 * @param ... Arguments for the format string.
4787 */
4788DECLINLINE(int) PDMDevHlpCritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...)
4789{
4790 int rc;
4791 va_list va;
4792 va_start(va, pszNameFmt);
4793 rc = pDevIns->pHlpR3->pfnCritSectInit(pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
4794 va_end(va);
4795 return rc;
4796}
4797
4798/**
4799 * @copydoc PDMDEVHLPR3::pfnCritSectGetNop
4800 */
4801DECLINLINE(PPDMCRITSECT) PDMDevHlpCritSectGetNop(PPDMDEVINS pDevIns)
4802{
4803 return pDevIns->pHlpR3->pfnCritSectGetNop(pDevIns);
4804}
4805
4806/**
4807 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopR0
4808 */
4809DECLINLINE(R0PTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopR0(PPDMDEVINS pDevIns)
4810{
4811 return pDevIns->pHlpR3->pfnCritSectGetNopR0(pDevIns);
4812}
4813
4814/**
4815 * @copydoc PDMDEVHLPR3::pfnCritSectGetNopRC
4816 */
4817DECLINLINE(RCPTRTYPE(PPDMCRITSECT)) PDMDevHlpCritSectGetNopRC(PPDMDEVINS pDevIns)
4818{
4819 return pDevIns->pHlpR3->pfnCritSectGetNopRC(pDevIns);
4820}
4821
4822/**
4823 * @copydoc PDMDEVHLPR3::pfnSetDeviceCritSect
4824 */
4825DECLINLINE(int) PDMDevHlpSetDeviceCritSect(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect)
4826{
4827 return pDevIns->pHlpR3->pfnSetDeviceCritSect(pDevIns, pCritSect);
4828}
4829
4830/**
4831 * @copydoc PDMDEVHLPR3::pfnThreadCreate
4832 */
4833DECLINLINE(int) PDMDevHlpThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
4834 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
4835{
4836 return pDevIns->pHlpR3->pfnThreadCreate(pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
4837}
4838
4839/**
4840 * @copydoc PDMDEVHLPR3::pfnSetAsyncNotification
4841 */
4842DECLINLINE(int) PDMDevHlpSetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
4843{
4844 return pDevIns->pHlpR3->pfnSetAsyncNotification(pDevIns, pfnAsyncNotify);
4845}
4846
4847/**
4848 * @copydoc PDMDEVHLPR3::pfnAsyncNotificationCompleted
4849 */
4850DECLINLINE(void) PDMDevHlpAsyncNotificationCompleted(PPDMDEVINS pDevIns)
4851{
4852 pDevIns->pHlpR3->pfnAsyncNotificationCompleted(pDevIns);
4853}
4854
4855/**
4856 * @copydoc PDMDEVHLPR3::pfnA20Set
4857 */
4858DECLINLINE(void) PDMDevHlpA20Set(PPDMDEVINS pDevIns, bool fEnable)
4859{
4860 pDevIns->pHlpR3->pfnA20Set(pDevIns, fEnable);
4861}
4862
4863/**
4864 * @copydoc PDMDEVHLPR3::pfnRTCRegister
4865 */
4866DECLINLINE(int) PDMDevHlpRTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
4867{
4868 return pDevIns->pHlpR3->pfnRTCRegister(pDevIns, pRtcReg, ppRtcHlp);
4869}
4870
4871/**
4872 * @copydoc PDMDEVHLPR3::pfnPCIBusRegister
4873 */
4874DECLINLINE(int) PDMDevHlpPCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
4875{
4876 return pDevIns->pHlpR3->pfnPCIBusRegister(pDevIns, pPciBusReg, ppPciHlpR3);
4877}
4878
4879/**
4880 * @copydoc PDMDEVHLPR3::pfnPICRegister
4881 */
4882DECLINLINE(int) PDMDevHlpPICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
4883{
4884 return pDevIns->pHlpR3->pfnPICRegister(pDevIns, pPicReg, ppPicHlpR3);
4885}
4886
4887/**
4888 * @copydoc PDMDEVHLPR3::pfnAPICRegister
4889 */
4890DECLINLINE(int) PDMDevHlpAPICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
4891{
4892 return pDevIns->pHlpR3->pfnAPICRegister(pDevIns, pApicReg, ppApicHlpR3);
4893}
4894
4895/**
4896 * @copydoc PDMDEVHLPR3::pfn
4897 */
4898DECLINLINE(int) PDMDevHlpIOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
4899{
4900 return pDevIns->pHlpR3->pfnIOAPICRegister(pDevIns, pIoApicReg, ppIoApicHlpR3);
4901}
4902
4903/**
4904 * @copydoc PDMDEVHLPR3::pfnHPETRegister
4905 */
4906DECLINLINE(int) PDMDevHlpHPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
4907{
4908 return pDevIns->pHlpR3->pfnHPETRegister(pDevIns, pHpetReg, ppHpetHlpR3);
4909}
4910
4911/**
4912 * @copydoc PDMDEVHLPR3::pfnPciRawRegister
4913 */
4914DECLINLINE(int) PDMDevHlpPciRawRegister(PPDMDEVINS pDevIns, PPDMPCIRAWREG pPciRawReg, PCPDMPCIRAWHLPR3 *ppPciRawHlpR3)
4915{
4916 return pDevIns->pHlpR3->pfnPciRawRegister(pDevIns, pPciRawReg, ppPciRawHlpR3);
4917}
4918
4919/**
4920 * @copydoc PDMDEVHLPR3::pfnDMACRegister
4921 */
4922DECLINLINE(int) PDMDevHlpDMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
4923{
4924 return pDevIns->pHlpR3->pfnDMACRegister(pDevIns, pDmacReg, ppDmacHlp);
4925}
4926
4927/**
4928 * @copydoc PDMDEVHLPR3::pfnDMARegister
4929 */
4930DECLINLINE(int) PDMDevHlpDMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
4931{
4932 return pDevIns->pHlpR3->pfnDMARegister(pDevIns, uChannel, pfnTransferHandler, pvUser);
4933}
4934
4935/**
4936 * @copydoc PDMDEVHLPR3::pfnDMAReadMemory
4937 */
4938DECLINLINE(int) PDMDevHlpDMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
4939{
4940 return pDevIns->pHlpR3->pfnDMAReadMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbRead);
4941}
4942
4943/**
4944 * @copydoc PDMDEVHLPR3::pfnDMAWriteMemory
4945 */
4946DECLINLINE(int) PDMDevHlpDMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
4947{
4948 return pDevIns->pHlpR3->pfnDMAWriteMemory(pDevIns, uChannel, pvBuffer, off, cbBlock, pcbWritten);
4949}
4950
4951/**
4952 * @copydoc PDMDEVHLPR3::pfnDMASetDREQ
4953 */
4954DECLINLINE(int) PDMDevHlpDMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
4955{
4956 return pDevIns->pHlpR3->pfnDMASetDREQ(pDevIns, uChannel, uLevel);
4957}
4958
4959/**
4960 * @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode
4961 */
4962DECLINLINE(uint8_t) PDMDevHlpDMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
4963{
4964 return pDevIns->pHlpR3->pfnDMAGetChannelMode(pDevIns, uChannel);
4965}
4966
4967/**
4968 * @copydoc PDMDEVHLPR3::pfnDMASchedule
4969 */
4970DECLINLINE(void) PDMDevHlpDMASchedule(PPDMDEVINS pDevIns)
4971{
4972 pDevIns->pHlpR3->pfnDMASchedule(pDevIns);
4973}
4974
4975/**
4976 * @copydoc PDMDEVHLPR3::pfnCMOSWrite
4977 */
4978DECLINLINE(int) PDMDevHlpCMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
4979{
4980 return pDevIns->pHlpR3->pfnCMOSWrite(pDevIns, iReg, u8Value);
4981}
4982
4983/**
4984 * @copydoc PDMDEVHLPR3::pfnCMOSRead
4985 */
4986DECLINLINE(int) PDMDevHlpCMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
4987{
4988 return pDevIns->pHlpR3->pfnCMOSRead(pDevIns, iReg, pu8Value);
4989}
4990
4991/**
4992 * @copydoc PDMDEVHLP::pfnCallR0
4993 */
4994DECLINLINE(int) PDMDevHlpCallR0(PPDMDEVINS pDevIns, uint32_t uOperation, uint64_t u64Arg)
4995{
4996 return pDevIns->pHlpR3->pfnCallR0(pDevIns, uOperation, u64Arg);
4997}
4998
4999#endif /* IN_RING3 */
5000
5001/**
5002 * @copydoc PDMDEVHLPR3::pfnGetVM
5003 */
5004DECLINLINE(PVM) PDMDevHlpGetVM(PPDMDEVINS pDevIns)
5005{
5006 return pDevIns->CTX_SUFF(pHlp)->pfnGetVM(pDevIns);
5007}
5008
5009/**
5010 * @copydoc PDMDEVHLPR3::pfnGetVMCPU
5011 */
5012DECLINLINE(PVMCPU) PDMDevHlpGetVMCPU(PPDMDEVINS pDevIns)
5013{
5014 return pDevIns->CTX_SUFF(pHlp)->pfnGetVMCPU(pDevIns);
5015}
5016
5017/**
5018 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGet
5019 */
5020DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGet(PPDMDEVINS pDevIns)
5021{
5022 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGet(pDevIns);
5023}
5024
5025/**
5026 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5027 */
5028DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetFreq(PPDMDEVINS pDevIns)
5029{
5030 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetFreq(pDevIns);
5031}
5032
5033/**
5034 * @copydoc PDMDEVHLPR3::pfnTMTimeVirtGetFreq
5035 */
5036DECLINLINE(uint64_t) PDMDevHlpTMTimeVirtGetNano(PPDMDEVINS pDevIns)
5037{
5038 return pDevIns->CTX_SUFF(pHlp)->pfnTMTimeVirtGetNano(pDevIns);
5039}
5040
5041#ifdef IN_RING3
5042
5043/**
5044 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
5045 */
5046DECLINLINE(int) PDMDevHlpRegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
5047{
5048 return pDevIns->pHlpR3->pfnRegisterVMMDevHeap(pDevIns, GCPhys, pvHeap, cbSize);
5049}
5050
5051/**
5052 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
5053 */
5054DECLINLINE(int) PDMDevHlpUnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
5055{
5056 return pDevIns->pHlpR3->pfnUnregisterVMMDevHeap(pDevIns, GCPhys);
5057}
5058
5059/**
5060 * @copydoc PDMDEVHLPR3::pfnVMReset
5061 */
5062DECLINLINE(int) PDMDevHlpVMReset(PPDMDEVINS pDevIns)
5063{
5064 return pDevIns->pHlpR3->pfnVMReset(pDevIns);
5065}
5066
5067/**
5068 * @copydoc PDMDEVHLPR3::pfnVMSuspend
5069 */
5070DECLINLINE(int) PDMDevHlpVMSuspend(PPDMDEVINS pDevIns)
5071{
5072 return pDevIns->pHlpR3->pfnVMSuspend(pDevIns);
5073}
5074
5075/**
5076 * @copydoc PDMDEVHLPR3::pfnVMSuspendSaveAndPowerOff
5077 */
5078DECLINLINE(int) PDMDevHlpVMSuspendSaveAndPowerOff(PPDMDEVINS pDevIns)
5079{
5080 return pDevIns->pHlpR3->pfnVMSuspendSaveAndPowerOff(pDevIns);
5081}
5082
5083/**
5084 * @copydoc PDMDEVHLPR3::pfnVMPowerOff
5085 */
5086DECLINLINE(int) PDMDevHlpVMPowerOff(PPDMDEVINS pDevIns)
5087{
5088 return pDevIns->pHlpR3->pfnVMPowerOff(pDevIns);
5089}
5090
5091#endif /* IN_RING3 */
5092
5093/**
5094 * @copydoc PDMDEVHLPR3::pfnA20IsEnabled
5095 */
5096DECLINLINE(bool) PDMDevHlpA20IsEnabled(PPDMDEVINS pDevIns)
5097{
5098 return pDevIns->CTX_SUFF(pHlp)->pfnA20IsEnabled(pDevIns);
5099}
5100
5101#ifdef IN_RING3
5102
5103/**
5104 * @copydoc PDMDEVHLPR3::pfnGetCpuId
5105 */
5106DECLINLINE(void) PDMDevHlpGetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf, uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
5107{
5108 pDevIns->pHlpR3->pfnGetCpuId(pDevIns, iLeaf, pEax, pEbx, pEcx, pEdx);
5109}
5110
5111#endif /* IN_RING3 */
5112#ifdef IN_RING0
5113
5114/**
5115 * @copydoc PDMDEVHLPR0::pfnCanEmulateIoBlock
5116 */
5117DECLINLINE(bool) PDMDevHlpCanEmulateIoBlock(PPDMDEVINS pDevIns)
5118{
5119 return pDevIns->CTX_SUFF(pHlp)->pfnCanEmulateIoBlock(pDevIns);
5120}
5121
5122#endif /* IN_RING0 */
5123
5124
5125
5126
5127/** Pointer to callbacks provided to the VBoxDeviceRegister() call. */
5128typedef struct PDMDEVREGCB *PPDMDEVREGCB;
5129
5130/**
5131 * Callbacks for VBoxDeviceRegister().
5132 */
5133typedef struct PDMDEVREGCB
5134{
5135 /** Interface version.
5136 * This is set to PDM_DEVREG_CB_VERSION. */
5137 uint32_t u32Version;
5138
5139 /**
5140 * Registers a device with the current VM instance.
5141 *
5142 * @returns VBox status code.
5143 * @param pCallbacks Pointer to the callback table.
5144 * @param pReg Pointer to the device registration record.
5145 * This data must be permanent and readonly.
5146 */
5147 DECLR3CALLBACKMEMBER(int, pfnRegister,(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pReg));
5148} PDMDEVREGCB;
5149
5150/** Current version of the PDMDEVREGCB structure. */
5151#define PDM_DEVREG_CB_VERSION PDM_VERSION_MAKE(0xffe3, 1, 0)
5152
5153
5154/**
5155 * The VBoxDevicesRegister callback function.
5156 *
5157 * PDM will invoke this function after loading a device module and letting
5158 * the module decide which devices to register and how to handle conflicts.
5159 *
5160 * @returns VBox status code.
5161 * @param pCallbacks Pointer to the callback table.
5162 * @param u32Version VBox version number.
5163 */
5164typedef DECLCALLBACK(int) FNPDMVBOXDEVICESREGISTER(PPDMDEVREGCB pCallbacks, uint32_t u32Version);
5165
5166/** @} */
5167
5168RT_C_DECLS_END
5169
5170#endif
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