DevVGA.h@ 55747

Last change on this file since 55747 was 55493, checked in by vboxsync, 10 years ago
PGM,++: Separated physical access handler callback function pointers from the access handler registrations to reduce footprint and simplify adding a couple of more callbacks.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 30.7 KB

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1	/* $Id: DevVGA.h 55493 2015-04-28 16:51:35Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2013 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	* --------------------------------------------------------------------
17	*
18	* This code is based on:
19	*
20	* QEMU internal VGA defines.
21	*
22	* Copyright (c) 2003-2004 Fabrice Bellard
23	*
24	* Permission is hereby granted, free of charge, to any person obtaining a copy
25	* of this software and associated documentation files (the "Software"), to deal
26	* in the Software without restriction, including without limitation the rights
27	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28	* copies of the Software, and to permit persons to whom the Software is
29	* furnished to do so, subject to the following conditions:
30	*
31	* The above copyright notice and this permission notice shall be included in
32	* all copies or substantial portions of the Software.
33	*
34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40	* THE SOFTWARE.
41	*/
42
43	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
44	#define VBE_BYTEWISE_IO
45
46	/** Use VBE new dynamic mode list.
47	* If this is not defined, no checks are carried out to see if the modes all
48	* fit into the framebuffer! See the VRAM_SIZE_FIX define. */
49	#define VBE_NEW_DYN_LIST
50
51	#ifdef VBOX
52	/** The default amount of VRAM. */
53	# define VGA_VRAM_DEFAULT (_4M)
54	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
55	# define VGA_VRAM_MAX (256 * _1M)
56	/** The minimum amount of VRAM. */
57	# define VGA_VRAM_MIN (_1M)
58	#endif
59
60	#include <VBox/Hardware/VBoxVideoVBE.h>
61
62	#ifdef VBOX_WITH_HGSMI
63	# include "HGSMI/HGSMIHost.h"
64	#endif /* VBOX_WITH_HGSMI */
65	#include "DevVGASavedState.h"
66
67	#ifdef VBOX_WITH_VMSVGA
68	# include "DevVGA-SVGA.h"
69	#endif
70
71	# include <iprt/list.h>
72
73	#define MSR_COLOR_EMULATION 0x01
74	#define MSR_PAGE_SELECT 0x20
75
76	#define ST01_V_RETRACE 0x08
77	#define ST01_DISP_ENABLE 0x01
78
79	/* bochs VBE support */
80	#define CONFIG_BOCHS_VBE
81
82	#ifdef CONFIG_BOCHS_VBE
83
84	/* Cross reference with <VBox/Hardware/VBoxVideoVBE.h> */
85	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
86	#define VBE_DISPI_INDEX_NB 0xc /* Total number of VBE registers */
87
88	#define VGA_STATE_COMMON_BOCHS_VBE \
89	uint16_t vbe_index; \
90	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
91	uint16_t alignment[3]; /* pad to 64 bits */ \
92	uint32_t vbe_start_addr; \
93	uint32_t vbe_line_offset; \
94	uint32_t vbe_bank_max;
95
96	#else
97
98	#define VGA_STATE_COMMON_BOCHS_VBE
99
100	#endif /* !CONFIG_BOCHS_VBE */
101
102	#define CH_ATTR_SIZE (160 * 100)
103	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
104
105	typedef struct vga_retrace_s {
106	unsigned frame_cclks; /* Character clocks per frame. */
107	unsigned frame_ns; /* Frame duration in ns. */
108	unsigned cclk_ns; /* Character clock duration in ns. */
109	unsigned vb_start; /* Vertical blanking start (scanline). */
110	unsigned vb_end; /* Vertical blanking end (scanline). */
111	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
112	unsigned vs_start; /* Vertical sync start (scanline). */
113	unsigned vs_end; /* Vertical sync end (scanline). */
114	unsigned vs_start_ns; /* Vertical sync start time in ns. */
115	unsigned vs_end_ns; /* Vertical sync end time in ns. */
116	unsigned h_total; /* Horizontal total (cclks per scanline). */
117	unsigned h_total_ns; /* Scanline duration in ns. */
118	unsigned hb_start; /* Horizontal blanking start (cclk). */
119	unsigned hb_end; /* Horizontal blanking end (cclk). */
120	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
121	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
122	} vga_retrace_s;
123
124	#ifndef VBOX
125	#define VGA_STATE_COMMON \
126	uint8_t *vram_ptr; \
127	unsigned long vram_offset; \
128	unsigned int vram_size; \
129	uint32_t latch; \
130	uint8_t sr_index; \
131	uint8_t sr[256]; \
132	uint8_t gr_index; \
133	uint8_t gr[256]; \
134	uint8_t ar_index; \
135	uint8_t ar[21]; \
136	int ar_flip_flop; \
137	uint8_t cr_index; \
138	uint8_t cr[256]; /* CRT registers */ \
139	uint8_t msr; /* Misc Output Register */ \
140	uint8_t fcr; /* Feature Control Register */ \
141	uint8_t st00; /* status 0 */ \
142	uint8_t st01; /* status 1 */ \
143	uint8_t dac_state; \
144	uint8_t dac_sub_index; \
145	uint8_t dac_read_index; \
146	uint8_t dac_write_index; \
147	uint8_t dac_cache[3]; /* used when writing */ \
148	uint8_t palette[768]; \
149	int32_t bank_offset; \
150	int (get_bpp)(struct VGAState s); \
151	void (get_offsets)(struct VGAState s, \
152	uint32_t *pline_offset, \
153	uint32_t *pstart_addr, \
154	uint32_t *pline_compare); \
155	void (get_resolution)(struct VGAState s, \
156	int *pwidth, \
157	int *pheight); \
158	VGA_STATE_COMMON_BOCHS_VBE \
159	/* display refresh support */ \
160	DisplayState *ds; \
161	uint32_t font_offsets[2]; \
162	int graphic_mode; \
163	uint8_t shift_control; \
164	uint8_t double_scan; \
165	uint32_t line_offset; \
166	uint32_t line_compare; \
167	uint32_t start_addr; \
168	uint32_t plane_updated; \
169	uint8_t last_cw, last_ch; \
170	uint32_t last_width, last_height; /* in chars or pixels */ \
171	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
172	uint8_t cursor_start, cursor_end; \
173	uint32_t cursor_offset; \
174	unsigned int (*rgb_to_pixel)(unsigned int r, \
175	unsigned int g, unsigned b); \
176	/* hardware mouse cursor support */ \
177	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
178	void (cursor_invalidate)(struct VGAState s); \
179	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
180	/* tell for each page if it has been updated since the last time */ \
181	uint32_t last_palette[256]; \
182	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
183
184	#else /* VBOX */
185
186	/* bird: Since we've changed types, reordered members, done alignment
187	paddings and more, VGA_STATE_COMMON was added directly to the
188	struct to make it more readable and easier to handle. */
189
190	struct VGAState;
191	typedef int FNGETBPP(struct VGAState *s);
192	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
193	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
194	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
195	typedef void FNCURSORINVALIDATE(struct VGAState *s);
196	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
197
198	#endif /* VBOX */
199
200	#ifdef VBOX_WITH_VDMA
201	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
202	#endif
203
204	#ifdef VBOX_WITH_VIDEOHWACCEL
205	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
206
207	typedef struct _VBOX_VHWA_PENDINGCMD
208	{
209	RTLISTNODE Node;
210	PVBOXVHWACMD pCommand;
211	} VBOX_VHWA_PENDINGCMD;
212	#endif
213
214	#ifdef VBOX_WITH_VMSVGA
215
216	#define VMSVGA_FIFO_EXTCMD_NONE 0
217	#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
218	#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
219	#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
220	#define VMSVGA_FIFO_EXTCMD_RESET 4
221
222	typedef struct
223	{
224	PSSMHANDLE pSSM;
225	uint32_t uVersion;
226	uint32_t uPass;
227	} VMSVGA_STATE_LOAD, *PVMSVGA_STATE_LOAD;
228
229	typedef struct
230	{
231	/** The host window handle */
232	uint64_t u64HostWindowId;
233	/** The R3 FIFO pointer. */
234	R3PTRTYPE(uint32_t *) pFIFOR3;
235	/** The R0 FIFO pointer. */
236	R0PTRTYPE(uint32_t *) pFIFOR0;
237	/** R3 Opaque pointer to svga state. */
238	R3PTRTYPE(void *) pSVGAState;
239	/** R3 Opaque pointer to 3d state. */
240	R3PTRTYPE(void *) p3dState;
241	/** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */
242	R3PTRTYPE(void *) pFrameBufferBackup;
243	/** R3 Opaque pointer to an external fifo cmd parameter. */
244	R3PTRTYPE(void *) pFIFOExtCmdParam;
245
246	/** Guest physical address of the FIFO memory range. */
247	RTGCPHYS GCPhysFIFO;
248	/** Size in bytes of the FIFO memory range. */
249	uint32_t cbFIFO;
250	/** SVGA id. */
251	uint32_t u32SVGAId;
252	/** SVGA extensions enabled or not. */
253	uint32_t fEnabled;
254	/** SVGA memory area configured status. */
255	uint32_t fConfigured;
256	/** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
257	* VMSVGA_BUSY_F_EMT_FORCE). */
258	uint32_t volatile fBusy;
259	#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /*< The normal true/false busy FIFO bit. /
260	#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /*< Bit preventing race status flickering when EMT kicks the FIFO thread. /
261	/** Traces (dirty page detection) enabled or not. */
262	uint32_t fTraces;
263	/** Guest OS identifier. */
264	uint32_t u32GuestId;
265	/** Scratch region size. */
266	uint32_t cScratchRegion;
267	/** Scratch array. */
268	uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
269	/** Irq status. */
270	uint32_t u32IrqStatus;
271	/** Irq mask. */
272	uint32_t u32IrqMask;
273	/** Pitch lock. */
274	uint32_t u32PitchLock;
275	/** Current GMR id. (SVGA_REG_GMR_ID) */
276	uint32_t u32CurrentGMRId;
277	/** Register caps. */
278	uint32_t u32RegCaps;
279	uint32_t Padding2;
280	/** Physical address of command mmio range. */
281	RTIOPORT BasePort;
282	/** Port io index register. */
283	uint32_t u32IndexReg;
284	/** The support driver session handle for use with FIFORequestSem. */
285	R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
286	/** FIFO request semaphore. */
287	SUPSEMEVENT FIFORequestSem;
288	/** FIFO external command semaphore. */
289	R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;
290	/** FIFO IO Thread. */
291	R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
292	uint32_t uWidth;
293	uint32_t uHeight;
294	uint32_t uBpp;
295	uint32_t cbScanline;
296	/** Maximum width supported. */
297	uint32_t u32MaxWidth;
298	/** Maximum height supported. */
299	uint32_t u32MaxHeight;
300	/** Viewport rectangle */
301	struct
302	{
303	uint32_t x;
304	uint32_t y;
305	uint32_t cx;
306	uint32_t cy;
307	} viewport;
308	/** Action flags */
309	uint32_t u32ActionFlags;
310	/** SVGA 3d extensions enabled or not. */
311	bool f3DEnabled;
312	/** VRAM page monitoring enabled or not. */
313	bool fVRAMTracking;
314	/** External command to be executed in the FIFO thread. */
315	uint8_t u8FIFOExtCommand;
316	bool Padding6;
317	# if defined(DEBUG_GMR_ACCESS) \|\| defined(DEBUG_FIFO_ACCESS)
318	/** GMR debug access handler type handle. */
319	PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
320	/** FIFO debug access handler type handle. */
321	PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
322	# endif
323	} VMSVGAState;
324	#endif /* VBOX_WITH_VMSVGA */
325
326
327	typedef struct VGAState {
328	#ifndef VBOX
329	VGA_STATE_COMMON
330	#else /* VBOX */
331	R3PTRTYPE(uint8_t *) vram_ptrR3;
332	R3PTRTYPE(FNGETBPP *) get_bpp;
333	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
334	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
335	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
336	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
337	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
338	RTR3PTR R3PtrCmnAlignment;
339	uint32_t vram_size;
340	uint32_t latch;
341	uint8_t sr_index;
342	uint8_t sr[256];
343	uint8_t gr_index;
344	uint8_t gr[256];
345	uint8_t ar_index;
346	uint8_t ar[21];
347	int32_t ar_flip_flop;
348	uint8_t cr_index;
349	uint8_t cr[256]; /* CRT registers */
350	uint8_t msr; /* Misc Output Register */
351	uint8_t fcr; /* Feature Control Register */
352	uint8_t st00; /* status 0 */
353	uint8_t st01; /* status 1 */
354	uint8_t dac_state;
355	uint8_t dac_sub_index;
356	uint8_t dac_read_index;
357	uint8_t dac_write_index;
358	uint8_t dac_cache[3]; /* used when writing */
359	uint8_t palette[768];
360	int32_t bank_offset;
361	VGA_STATE_COMMON_BOCHS_VBE
362	/* display refresh support */
363	uint32_t font_offsets[2];
364	int32_t graphic_mode;
365	uint8_t shift_control;
366	uint8_t double_scan;
367	uint8_t padding1[2];
368	uint32_t line_offset;
369	uint32_t line_compare;
370	uint32_t start_addr;
371	uint32_t plane_updated;
372	uint8_t last_cw, last_ch, padding2[2];
373	uint32_t last_width, last_height; /* in chars or pixels */
374	uint32_t last_scr_width, last_scr_height; /* in pixels */
375	uint32_t last_bpp;
376	uint8_t cursor_start, cursor_end, padding3[2];
377	uint32_t cursor_offset;
378	/* hardware mouse cursor support */
379	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
380	/* tell for each page if it has been updated since the last time */
381	uint32_t last_palette[256];
382	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
383
384	/** end-of-common-state-marker */
385	uint32_t u32Marker;
386
387	/** Pointer to the device instance - RC Ptr. */
388	PPDMDEVINSRC pDevInsRC;
389	/** Pointer to the GC vram mapping. */
390	RCPTRTYPE(uint8_t *) vram_ptrRC;
391	uint32_t PaddingMinus1;
392
393	/** Pointer to the device instance - R3 Ptr. */
394	PPDMDEVINSR3 pDevInsR3;
395	# ifdef VBOX_WITH_HGSMI
396	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
397	# endif
398	# ifdef VBOX_WITH_VDMA
399	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
400	# endif
401	/** LUN\#0: The display port base interface. */
402	PDMIBASE IBase;
403	/** LUN\#0: The display port interface. */
404	PDMIDISPLAYPORT IPort;
405	# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) \|\| defined(VBOX_WITH_CRHGSMI))
406	/** LUN\#0: VBVA callbacks interface */
407	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
408	# else
409	RTR3PTR Padding2;
410	# endif
411	/** Status LUN\#0: Leds interface. */
412	PDMILEDPORTS ILeds;
413
414	/** Pointer to base interface of the driver. */
415	R3PTRTYPE(PPDMIBASE) pDrvBase;
416	/** Pointer to display connector interface of the driver. */
417	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
418
419	/** Status LUN: Partner of ILeds. */
420	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
421	/** Status LUN: Media Notifys. */
422	R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
423
424	/** Refresh timer handle - HC. */
425	PTMTIMERR3 RefreshTimer;
426
427	/** Pointer to the device instance - R0 Ptr. */
428	PPDMDEVINSR0 pDevInsR0;
429	/** The R0 vram pointer... */
430	R0PTRTYPE(uint8_t *) vram_ptrR0;
431
432	#ifdef VBOX_WITH_VMSVGA
433	# if HC_ARCH_BITS == 32
434	uint32_t Padding3;
435	# endif
436	VMSVGAState svga;
437	#endif
438
439	/** The number of monitors. */
440	uint32_t cMonitors;
441	/** Current refresh timer interval. */
442	uint32_t cMilliesRefreshInterval;
443	/** Bitmap tracking dirty pages. */
444	uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
445
446	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
447	bool fHasDirtyBits;
448	/** LFB was updated flag. */
449	bool fLFBUpdated;
450	/** Indicates if the GC extensions are enabled or not. */
451	bool fGCEnabled;
452	/** Indicates if the R0 extensions are enabled or not. */
453	bool fR0Enabled;
454	/** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
455	bool fRemappedVGA;
456	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
457	bool fRenderVRAM;
458	#ifdef VBOX_WITH_VMSVGA
459	/* Whether the SVGA emulation is enabled or not. */
460	bool fVMSVGAEnabled;
461	bool Padding1[1+4];
462	#else
463	bool Padding1[2+4];
464	#endif
465
466	/** Physical access type for the linear frame buffer dirty page tracking. */
467	PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
468
469	/** The physical address the VRAM was assigned. */
470	RTGCPHYS GCPhysVRAM;
471	/** The critical section protect the instance data. */
472	PDMCRITSECT CritSect;
473	/** The PCI device. */
474	PCIDEVICE Dev;
475
476	STAMPROFILE StatRZMemoryRead;
477	STAMPROFILE StatR3MemoryRead;
478	STAMPROFILE StatRZMemoryWrite;
479	STAMPROFILE StatR3MemoryWrite;
480	STAMCOUNTER StatMapPage; /*< Counts IOMMMIOMapMMIO2Page calls. /
481	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
482
483	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
484	uint64_t u64LastLatchedAccess;
485	uint32_t cLatchAccesses;
486	uint16_t uMaskLatchAccess;
487	uint16_t iMask;
488
489	# ifdef VBE_BYTEWISE_IO
490	/** VBE read/write data/index flags */
491	uint8_t fReadVBEData;
492	uint8_t fWriteVBEData;
493	uint8_t fReadVBEIndex;
494	uint8_t fWriteVBEIndex;
495	/** VBE write data/index one byte buffer */
496	uint8_t cbWriteVBEData;
497	uint8_t cbWriteVBEIndex;
498	# ifdef VBE_NEW_DYN_LIST
499	/** VBE Extra Data write address one byte buffer */
500	uint8_t cbWriteVBEExtraAddress;
501	uint8_t Padding5;
502	# else
503	uint8_t Padding5[2];
504	# endif
505	# endif
506
507	/** Retrace emulation state */
508	bool fRealRetrace;
509	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
510	vga_retrace_s retrace_state;
511
512	# ifdef VBE_NEW_DYN_LIST
513	/** The VBE BIOS extra data. */
514	R3PTRTYPE(uint8_t *) pu8VBEExtraData;
515	/** The size of the VBE BIOS extra data. */
516	uint16_t cbVBEExtraData;
517	/** The VBE BIOS current memory address. */
518	uint16_t u16VBEExtraAddress;
519	uint16_t Padding7[2];
520	# endif
521
522	/** The BIOS logo data. */
523	R3PTRTYPE(uint8_t *) pu8Logo;
524	/** The name of the logo file. */
525	R3PTRTYPE(char *) pszLogoFile;
526	/** Bitmap image data. */
527	R3PTRTYPE(uint8_t *) pu8LogoBitmap;
528	/** Current logo data offset. */
529	uint32_t offLogoData;
530	/** The size of the BIOS logo data. */
531	uint32_t cbLogo;
532	/** Current logo command. */
533	uint16_t LogoCommand;
534	/** Bitmap width. */
535	uint16_t cxLogo;
536	/** Bitmap height. */
537	uint16_t cyLogo;
538	/** Bitmap planes. */
539	uint16_t cLogoPlanes;
540	/** Bitmap depth. */
541	uint16_t cLogoBits;
542	/** Bitmap compression. */
543	uint16_t LogoCompression;
544	/** Bitmap colors used. */
545	uint16_t cLogoUsedColors;
546	/** Palette size. */
547	uint16_t cLogoPalEntries;
548	/** Clear screen flag. */
549	uint8_t fLogoClearScreen;
550	uint8_t Padding8[7];
551	/** Palette data. */
552	uint32_t au32LogoPalette[256];
553
554	/** The VGA BIOS ROM data. */
555	R3PTRTYPE(uint8_t *) pu8VgaBios;
556	/** The size of the VGA BIOS ROM. */
557	uint64_t cbVgaBios;
558	/** The name of the VGA BIOS ROM file. */
559	R3PTRTYPE(char *) pszVgaBiosFile;
560
561	# ifdef VBOX_WITH_HGSMI
562	/** Base port in the assigned PCI I/O space. */
563	RTIOPORT IOPortBase;
564	# ifdef VBOX_WITH_WDDM
565	uint8_t Padding9[2];
566	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
567	* adapter, the way it can handle async HGSMI command completion, etc. */
568	uint32_t fGuestCaps;
569	uint32_t fScanLineCfg;
570	uint32_t fHostCursorCapabilities;
571	# else
572	uint8_t Padding10[14];
573	# endif
574	# endif /* VBOX_WITH_HGSMI */
575
576	PDMLED Led3D;
577
578	struct {
579	volatile uint32_t cPending;
580	uint32_t Padding1;
581	union
582	{
583	RTLISTNODE PendingList;
584	/* make sure the structure sized cross different contexts correctly */
585	struct
586	{
587	R3PTRTYPE(void *) dummy1;
588	R3PTRTYPE(void *) dummy2;
589	} dummy;
590	};
591	} pendingVhwaCommands;
592	#endif /* VBOX */
593	} VGAState;
594	#ifdef VBOX
595	/** VGA state. */
596	typedef VGAState VGASTATE;
597	/** Pointer to the VGA state. */
598	typedef VGASTATE *PVGASTATE;
599	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
600	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
601	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
602	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
603	#endif
604
605	#ifdef VBE_NEW_DYN_LIST
606	/**
607	* VBE Bios Extra Data structure.
608	* @remark duplicated in vbe.h.
609	*/
610	typedef struct VBEHeader
611	{
612	/** Signature (VBEHEADER_MAGIC). */
613	uint16_t u16Signature;
614	/** Data size. */
615	uint16_t cbData;
616	} VBEHeader;
617
618	/** VBE Extra Data. */
619	typedef VBEHeader VBEHEADER;
620	/** Pointer to the VBE Extra Data. */
621	typedef VBEHEADER *PVBEHEADER;
622
623	/** The value of the VBEHEADER::u16Signature field.
624	* @remark duplicated in vbe.h. */
625	#define VBEHEADER_MAGIC 0x77CC
626
627	/** The extra port which is used to read the mode list.
628	* @remark duplicated in vbe.h. */
629	#define VBE_EXTRA_PORT 0x3b6
630
631	/** The extra port which is used for debug printf.
632	* @remark duplicated in vbe.h. */
633	#define VBE_PRINTF_PORT 0x3b7
634
635	#endif /* VBE_NEW_DYN_LIST */
636
637	#if !defined(VBOX) \|\| defined(IN_RING3)
638	static inline int c6_to_8(int v)
639	{
640	int b;
641	v &= 0x3f;
642	b = v & 1;
643	return (v << 2) \| (b << 1) \| b;
644	}
645	#endif /* !VBOX \|\| IN_RING3 */
646
647
648	#ifdef VBOX_WITH_HGSMI
649	int VBVAInit (PVGASTATE pVGAState);
650	void VBVADestroy (PVGASTATE pVGAState);
651	int VBVAUpdateDisplay (PVGASTATE pVGAState);
652	void VBVAReset (PVGASTATE pVGAState);
653	void VBVAPause (PVGASTATE pVGAState, bool fPause);
654
655	bool VBVAIsEnabled(PVGASTATE pVGAState);
656
657	void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags);
658	void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags);
659
660	int VBVAInfoView(PVGASTATE pVGAState, VBVAINFOVIEW *pView);
661	int VBVAInfoScreen(PVGASTATE pVGAState, VBVAINFOSCREEN *pScreen);
662	int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
663
664	/* @return host-guest flags that were set on reset
665	* this allows the caller to make further cleaning when needed,
666	* e.g. reset the IRQ */
667	uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
668
669	# ifdef VBOX_WITH_VIDEOHWACCEL
670	int vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
671	int vbvaVHWAConstruct (PVGASTATE pVGAState);
672	int vbvaVHWAReset (PVGASTATE pVGAState);
673
674	void vbvaTimerCb(PVGASTATE pVGAState);
675
676	int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
677	int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
678	# endif
679
680	#ifdef VBOX_WITH_HGSMI
681	#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
682	#endif
683
684	# ifdef VBOX_WITH_CRHGSMI
685	int vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
686	int vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
687	int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
688	struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
689	PFNCRCTLCOMPLETION pfnCompletion,
690	void *pvCompletion);
691	int vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
692	struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
693	# endif
694
695	int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
696	int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
697	int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
698
699	DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
700	DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
701	uint32_t cy, uint32_t cBPP,
702	uint32_t cDisplay, uint32_t dx,
703	uint32_t dy, uint32_t fEnabled,
704	uint32_t fNotifyGuest);
705	DECLCALLBACK(void) vbvaPortReportHostCursorCapabilities(PPDMIDISPLAYPORT pInterface, uint32_t fCapabilitiesAdded,
706	uint32_t fCapabilitiesRemoved);
707	DECLCALLBACK(void) vbvaPortReportHostCursorPosition(PPDMIDISPLAYPORT pInterface, uint32_t x, uint32_t y);
708
709	# ifdef VBOX_WITH_VDMA
710	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
711	int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
712	int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
713	int vboxVDMAReset(PVBOXVDMAHOST pVdma);
714	void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd);
715	void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd);
716	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
717	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
718	int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
719	int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
720	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
721	# endif /* VBOX_WITH_VDMA */
722
723	# ifdef VBOX_WITH_CRHGSMI
724	int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
725	int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
726	void vboxCmdVBVACmdTimer(PVGASTATE pVGAState);
727	int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl);
728	bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
729	# endif /* VBOX_WITH_CRHGSMI */
730	#endif /* VBOX_WITH_HGSMI */
731
732	# ifdef VBOX_WITH_VMSVGA
733	int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
734	int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
735	int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
736	# endif
737
738	#ifndef VBOX
739	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
740	unsigned long vga_ram_offset, int vga_ram_size);
741	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
742	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
743	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
744
745	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
746	int poffset, int w,
747	unsigned int color0, unsigned int color1,
748	unsigned int color_xor);
749	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
750	int poffset, int w,
751	unsigned int color0, unsigned int color1,
752	unsigned int color_xor);
753	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
754	int poffset, int w,
755	unsigned int color0, unsigned int color1,
756	unsigned int color_xor);
757
758	extern const uint8_t sr_mask[8];
759	extern const uint8_t gr_mask[16];
760	#endif /* !VBOX */
761

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 55747

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