Changeset 55493 in vbox
- Timestamp:
- Apr 28, 2015 4:51:35 PM (10 years ago)
- svn:sync-xref-src-repo-rev:
- 99843
- Location:
- trunk
- Files:
-
- 27 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/pgm.h
r55331 r55493 77 77 78 78 /** 79 * Physical page access handler type.80 */ 81 typedef enum PGMPHYSHANDLER TYPE79 * Physical page access handler kind. 80 */ 81 typedef enum PGMPHYSHANDLERKIND 82 82 { 83 83 /** MMIO range. Pages are not present, all access is done in interpreter or recompiler. */ 84 PGMPHYSHANDLER TYPE_MMIO = 1,84 PGMPHYSHANDLERKIND_MMIO = 1, 85 85 /** Handler all write access to a physical page range. */ 86 PGMPHYSHANDLER TYPE_PHYSICAL_WRITE,86 PGMPHYSHANDLERKIND_WRITE, 87 87 /** Handler all access to a physical page range. */ 88 PGMPHYSHANDLER TYPE_PHYSICAL_ALL89 90 } PGMPHYSHANDLER TYPE;88 PGMPHYSHANDLERKIND_ALL 89 90 } PGMPHYSHANDLERKIND; 91 91 92 92 /** … … 348 348 VMM_INT_DECL(void) PGMNotifyNxeChanged(PVMCPU pVCpu, bool fNxe); 349 349 VMMDECL(bool) PGMHasDirtyPages(PVM pVM); 350 VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, 351 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 352 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 353 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC, 354 R3PTRTYPE(const char *) pszDesc); 350 351 /** PGM physical access handler type registration handle (heap offset, valid 352 * cross contexts without needing fixing up). Callbacks and handler type is 353 * associated with this and it is shared by all handler registrations. */ 354 typedef uint32_t PGMPHYSHANDLERTYPE; 355 /** Pointer to a PGM physical handler type registration handle. */ 356 typedef PGMPHYSHANDLERTYPE *PPGMPHYSHANDLERTYPE; 357 /** NIL value for PGM physical access handler type handle. */ 358 #define NIL_PGMPHYSHANDLERTYPE UINT32_MAX 359 VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVM pVM, PGMPHYSHANDLERTYPE hCallbacks); 360 VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hCallbacks); 361 362 VMMDECL(int) PGMHandlerPhysicalRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType, 363 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, 364 R3PTRTYPE(const char *) pszDesc); 355 365 VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast); 356 366 VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys); … … 469 479 VMMR3DECL(int) PGMR3QueryGlobalMemoryStats(PUVM pUVM, uint64_t *pcbAllocMem, uint64_t *pcbFreeMem, uint64_t *pcbBallonedMem, uint64_t *pcbSharedMem); 470 480 471 VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, 472 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 473 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 474 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC, 475 R3PTRTYPE(const char *) pszDesc); 481 VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMPHYSHANDLERTYPE hType, 482 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc); 476 483 VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb); 477 484 VMMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc); … … 514 521 VMMR3DECL(int) PGMR3MapRead(PVM pVM, void *pvDst, RTGCPTR GCPtrSrc, size_t cb); 515 522 516 VMMR3DECL(int) PGMR3HandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, 517 PFNPGMR3PHYSHANDLER pfnHandlerR3, void *pvUserR3, 518 const char *pszModR0, const char *pszHandlerR0, RTR0PTR pvUserR0, 519 const char *pszModRC, const char *pszHandlerRC, RTRCPTR pvUserRC, const char *pszDesc); 523 VMM_INT_DECL(int) PGMR3HandlerPhysicalTypeRegisterEx(PVM pVM, PGMPHYSHANDLERKIND enmKind, 524 PFNPGMR3PHYSHANDLER pfnHandlerR3, 525 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, 526 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, 527 const char *pszDesc, PPGMPHYSHANDLERTYPE phType); 528 VMMR3DECL(int) PGMR3HandlerPhysicalTypeRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, 529 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, 530 const char *pszModR0, const char *pszHandlerR0, 531 const char *pszModRC, const char *pszHandlerRC, const char *pszDesc, 532 PPGMPHYSHANDLERTYPE phType); 520 533 VMMDECL(int) PGMR3HandlerVirtualRegisterEx(PVM pVM, PGMVIRTHANDLERTYPE enmType, RTGCPTR GCPtr, RTGCPTR GCPtrLast, 521 534 R3PTRTYPE(PFNPGMR3VIRTINVALIDATE) pfnInvalidateR3, -
trunk/include/VBox/vmm/rem.h
r53615 r55493 44 44 #if defined(IN_RING0) || defined(IN_RC) 45 45 VMMDECL(void) REMNotifyInvalidatePage(PVM pVM, RTGCPTR GCPtrPage); 46 VMMDECL(void) REMNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler);47 VMMDECL(void) REMNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM);48 VMMDECL(void) REMNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM);46 VMMDECL(void) REMNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler); 47 VMMDECL(void) REMNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM); 48 VMMDECL(void) REMNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM); 49 49 #endif /* IN_RING0 || IN_RC */ 50 50 #ifdef IN_RC … … 82 82 REMR3DECL(void) REMR3NotifyPhysRomRegister(PVM pVM, RTGCPHYS GCPhys, RTUINT cb, void *pvCopy, bool fShadow); 83 83 REMR3DECL(void) REMR3NotifyPhysRamDeregister(PVM pVM, RTGCPHYS GCPhys, RTUINT cb); 84 REMR3DECL(void) REMR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler);85 REMR3DECL(void) REMR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM);86 REMR3DECL(void) REMR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM);84 REMR3DECL(void) REMR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler); 85 REMR3DECL(void) REMR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM); 86 REMR3DECL(void) REMR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM); 87 87 REMR3DECL(void) REMR3NotifyPendingInterrupt(PVM pVM, PVMCPU pVCpu, uint8_t u8Interrupt); 88 88 REMR3DECL(uint32_t) REMR3QueryPendingInterrupt(PVM pVM, PVMCPU pVCpu); -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r54659 r55493 1936 1936 for (uint32_t i = 0; i < pGMR->numDescriptors; i++) 1937 1937 { 1938 rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pThis->pDevInsR3), 1939 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 1940 pGMR->paDesc[i].GCPhys, pGMR->paDesc[i].GCPhys + pGMR->paDesc[i].numPages * PAGE_SIZE - 1, 1941 vmsvgaR3GMRAccessHandler, pThis, 1942 NULL, NULL, NULL, 1943 NULL, NULL, NULL, 1944 "VMSVGA GMR"); 1938 rc = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pThis->pDevInsR3), 1939 pGMR->paDesc[i].GCPhys, pGMR->paDesc[i].GCPhys + pGMR->paDesc[i].numPages * PAGE_SIZE - 1, 1940 pThis->svga.hGmrAccessHandlerType, pThis, NIL_RTR0PTR, NIL_RTRCPTR, "VMSVGA GMR"); 1945 1941 AssertRC(rc); 1946 1942 } … … 1949 1945 1950 1946 /* Callback handler for VMR3ReqCallWait */ 1951 static DECLCALLBACK(int) vmsvga UnregisterGMR(PPDMDEVINS pDevIns, uint32_t gmrId)1947 static DECLCALLBACK(int) vmsvgaDeregisterGMR(PPDMDEVINS pDevIns, uint32_t gmrId) 1952 1948 { 1953 1949 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); … … 3245 3241 PGMR pGMR = &pSVGAState->aGMR[idGMR]; 3246 3242 # ifdef DEBUG_GMR_ACCESS 3247 VMR3ReqCallWait(PDMDevHlpGetVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvga UnregisterGMR, 2, pThis->pDevInsR3, idGMR);3243 VMR3ReqCallWait(PDMDevHlpGetVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaDeregisterGMR, 2, pThis->pDevInsR3, idGMR); 3248 3244 # endif 3249 3245 … … 3523 3519 if (RT_SUCCESS(rc)) 3524 3520 { 3525 rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 3526 PGMPHYSHANDLERTYPE_PHYSICAL_ALL, 3527 GCPhysAddress, GCPhysAddress + (VMSVGA_FIFO_SIZE - 1), 3528 vmsvgaR3FIFOAccessHandler, pThis, 3529 NULL, NULL, NULL, 3530 NULL, NULL, NULL, 3531 "VMSVGA FIFO"); 3521 rc = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), GCPhysAddress, GCPhysAddress + (VMSVGA_FIFO_SIZE - 1), 3522 pThis->svga.hFifoAccessHandlerType, pThis, NIL_RTR0PTR, NIL_RTRCPTR, 3523 "VMSVGA FIFO"); 3532 3524 AssertRC(rc); 3533 3525 } … … 3930 3922 } 3931 3923 Log(("VMSVGA: Maximum size (%d,%d)\n", pThis->svga.u32MaxWidth, pThis->svga.u32MaxHeight)); 3924 3925 # ifdef DEBUG_GMR_ACCESS 3926 /* Register the GMR access handler type. */ 3927 rc = PGMR3HandlerPhysicalTypeRegister(PDMDevHlpGetVM(pThis->pDevInsR3), PGMPHYSHANDLERKIND_WRITE, 3928 vmsvgaR3GMRAccessHandler, NULL, NULL, NULL, NULL, "VMSVGA GMR", 3929 &pThis->svga.hGmrAccessHandlerType); 3930 AssertRCReturn(rc, rc); 3931 # endif 3932 # ifdef DEBUG_FIFO_ACCESS 3933 rc = PGMR3HandlerPhysicalTypeRegister(PDMDevHlpGetVM(pThis->pDevInsR3), PGMPHYSHANDLERKIND_ALL, 3934 vmsvgaR3FIFOAccessHandler, NULL, NULL, NULL, NULL, "VMSVGA FIFO", 3935 &pThis->svga.hFifoAccessHandlerType); 3936 AssertRCReturn(rc, rc); 3937 #endif 3932 3938 3933 3939 /* Create the async IO thread. */ -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r55341 r55493 5286 5286 { 5287 5287 PPDMDEVINS pDevIns = pVGAState->pDevInsR3; 5288 5289 5288 Assert(pVGAState->GCPhysVRAM); 5290 5289 5291 int rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 5292 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 5293 pVGAState->GCPhysVRAM, pVGAState->GCPhysVRAM + (cbFrameBuffer - 1), 5294 vgaR3LFBAccessHandler, pVGAState, 5295 g_DeviceVga.szR0Mod, "vgaR0LFBAccessHandler", pDevIns->pvInstanceDataR0, 5296 g_DeviceVga.szRCMod, "vgaGCLFBAccessHandler", pDevIns->pvInstanceDataRC, 5297 "VGA LFB"); 5290 int rc = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 5291 pVGAState->GCPhysVRAM, pVGAState->GCPhysVRAM + (cbFrameBuffer - 1), 5292 pVGAState->hLfbAccessHandlerType, pVGAState, pDevIns->pvInstanceDataR0, 5293 pDevIns->pvInstanceDataRC, "VGA LFB"); 5294 5298 5295 AssertRC(rc); 5299 5296 return rc; … … 5348 5345 if (RT_SUCCESS(rc)) 5349 5346 { 5350 rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 5351 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 5352 GCPhysAddress, GCPhysAddress + (pThis->vram_size - 1), 5353 vgaR3LFBAccessHandler, pThis, 5354 g_DeviceVga.szR0Mod, "vgaR0LFBAccessHandler", pDevIns->pvInstanceDataR0, 5355 g_DeviceVga.szRCMod, "vgaRCLFBAccessHandler", pDevIns->pvInstanceDataRC, 5356 "VGA LFB"); 5347 rc = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), GCPhysAddress, GCPhysAddress + (pThis->vram_size - 1), 5348 pThis->hLfbAccessHandlerType, pThis, pDevIns->pvInstanceDataR0, 5349 pDevIns->pvInstanceDataRC, "VGA LFB"); 5357 5350 AssertRC(rc); 5358 5351 if (RT_SUCCESS(rc)) … … 6152 6145 6153 6146 /* 6147 * Register access handler types. 6148 */ 6149 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, 6150 vgaR3LFBAccessHandler, 6151 g_DeviceVga.szR0Mod, "vgaR0LFBAccessHandler", 6152 g_DeviceVga.szRCMod, "vgaRCLFBAccessHandler", 6153 "VGA LFB", &pThis->hLfbAccessHandlerType); 6154 AssertRCReturn(rc, rc); 6155 6156 6157 /* 6154 6158 * Register I/O ports. 6155 6159 */ -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r55303 r55493 315 315 uint8_t u8FIFOExtCommand; 316 316 bool Padding6; 317 # if defined(DEBUG_GMR_ACCESS) || defined(DEBUG_FIFO_ACCESS) 318 /** GMR debug access handler type handle. */ 319 PGMPHYSHANDLERTYPE hGmrAccessHandlerType; 320 /** FIFO debug access handler type handle. */ 321 PGMPHYSHANDLERTYPE hFifoAccessHandlerType; 322 # endif 317 323 } VMSVGAState; 318 324 #endif /* VBOX_WITH_VMSVGA */ … … 453 459 /* Whether the SVGA emulation is enabled or not. */ 454 460 bool fVMSVGAEnabled; 455 bool Padding1[1 ];461 bool Padding1[1+4]; 456 462 #else 457 bool Padding1[2 ];463 bool Padding1[2+4]; 458 464 #endif 465 466 /** Physical access type for the linear frame buffer dirty page tracking. */ 467 PGMPHYSHANDLERTYPE hLfbAccessHandlerType; 459 468 460 469 /** The physical address the VRAM was assigned. */ -
trunk/src/VBox/Devices/Graphics/DevVGA_VDMA.cpp
r55401 r55493 17 17 #include <VBox/VMMDev.h> 18 18 #include <VBox/vmm/pdmdev.h> 19 #include <VBox/vmm/pgm.h> 19 20 #include <VBox/VBoxVideo.h> 20 21 #include <iprt/semaphore.h> -
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r51155 r55493 1357 1357 pThis->RDRAPhysOld & ~PAGE_OFFSET_MASK); 1358 1358 1359 rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 1360 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 1361 pThis->GCRDRA & ~PAGE_OFFSET_MASK, 1362 RT_ALIGN(pcnetRdraAddr(pThis, 0), PAGE_SIZE) - 1, 1363 pcnetHandleRingWrite, pDevIns, 1364 g_DevicePCNet.szR0Mod, "pcnetHandleRingWrite", 1365 pThis->pDevInsHC->pvInstanceDataHC, 1366 g_DevicePCNet.szRCMod, "pcnetHandleRingWrite", 1367 pThis->pDevInsHC->pvInstanceDataRC, 1368 "PCNet receive ring write access handler"); 1359 rc = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 1360 pThis->GCRDRA & ~PAGE_OFFSET_MASK, 1361 RT_ALIGN(pcnetRdraAddr(pThis, 0), PAGE_SIZE) - 1, 1362 pThis->hNoPollingHandlerType, pDevIns, 1363 pThis->pDevInsHC->pvInstanceDataHC, 1364 pThis->pDevInsHC->pvInstanceDataRC, 1365 "PCNet receive ring write access handler"); 1369 1366 AssertRC(rc); 1370 1367 … … 1396 1393 pThis->TDRAPhysOld & ~PAGE_OFFSET_MASK); 1397 1394 1398 rc = PGMR3HandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 1399 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 1400 pThis->GCTDRA & ~PAGE_OFFSET_MASK, 1401 RT_ALIGN(pcnetTdraAddr(pThis, 0), PAGE_SIZE) - 1, 1402 pcnetHandleRingWrite, pDevIns, 1403 g_DevicePCNet.szR0Mod, "pcnetHandleRingWrite", 1404 pThis->pDevInsHC->pvInstanceDataHC, 1405 g_DevicePCNet.szRCMod, "pcnetHandleRingWrite", 1406 pThis->pDevInsHC->pvInstanceDataRC, 1407 "PCNet transmit ring write access handler"); 1395 rc = PGMHandlerPhysicalRegister(PDMDevHlpGetVM(pDevIns), 1396 pThis->GCTDRA & ~PAGE_OFFSET_MASK, 1397 RT_ALIGN(pcnetTdraAddr(pThis, 0), PAGE_SIZE) - 1, 1398 pThis->hNoPollingHandlerType, 1399 pDevIns, 1400 pThis->pDevInsHC->pvInstanceDataHC, 1401 pThis->pDevInsHC->pvInstanceDataRC, 1402 "PCNet transmit ring write access handler"); 1408 1403 AssertRC(rc); 1409 1404 … … 4948 4943 4949 4944 /* 4950 * We use o wn critical section (historical reasons).4945 * We use our own critical section (historical reasons). 4951 4946 */ 4952 4947 rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSect, RT_SRC_POS, "PCNet#%u", iInstance); … … 4979 4974 rc = PDMR3LdrGetSymbolRCLazy(PDMDevHlpGetVM(pDevIns), NULL, NULL, "EMInterpretInstruction", (RTGCPTR *)&pThis->pfnEMInterpretInstructionRC); 4980 4975 AssertLogRelMsgRCReturn(rc, ("PDMR3LdrGetSymbolRCLazy(EMInterpretInstruction) -> %Rrc\n", rc), rc); 4976 4977 rc = PGMR3HandlerPhysicalTypeRegister(PDMDevHlpGetVM(pDevIns), PGMPHYSHANDLERKIND_WRITE, 4978 pcnetHandleRingWrite, 4979 g_DevicePCNet.szR0Mod, "pcnetHandleRingWrite", 4980 g_DevicePCNet.szRCMod, "pcnetHandleRingWrite", 4981 "PCNet ring write access handler", 4982 &pThis->hNoPollingHandlerType); 4983 AssertRCReturn(rc, rc); 4984 4981 4985 #else 4982 4986 rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, pcnetTimer, pThis, -
trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r46420 r55493 179 179 if (pCur) 180 180 { 181 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 182 181 183 # ifdef PGM_SYNC_N_PAGES 182 184 /* … … 188 190 */ 189 191 if ( !(uErr & X86_TRAP_PF_P) 190 && pCur ->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE)192 && pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE) 191 193 { 192 194 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) … … 211 213 */ 212 214 if ( !(uErr & X86_TRAP_PF_RSVD) 213 && pCur ->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE215 && pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE 214 216 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE) 215 217 && pGstWalk->Core.fEffectiveRW … … 234 236 # endif 235 237 236 AssertMsg( pCur ->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE237 || (pCur ->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE && (uErr & X86_TRAP_PF_RW)),238 ("Unexpected trap for physical handler: %08X (phys=%08x) pPage=%R[pgmpage] uErr=%X, en um=%d\n",239 pvFault, GCPhysFault, pPage, uErr, pCur ->enmType));240 if (pCur ->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE)238 AssertMsg( pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE 239 || (pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE && (uErr & X86_TRAP_PF_RW)), 240 ("Unexpected trap for physical handler: %08X (phys=%08x) pPage=%R[pgmpage] uErr=%X, enmKind=%d\n", 241 pvFault, GCPhysFault, pPage, uErr, pCurType->enmKind)); 242 if (pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE) 241 243 STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->StatRZTrap0eHandlersPhysWrite); 242 244 else … … 246 248 } 247 249 248 if (pCur ->CTX_SUFF(pfnHandler))250 if (pCurType->CTX_SUFF(pfnHandler)) 249 251 { 250 252 PPGMPOOL pPool = pVM->pgm.s.CTX_SUFF(pPool); 251 253 void *pvUser = pCur->CTX_SUFF(pvUser); 252 254 # ifdef IN_RING0 253 PFNPGMR0PHYSHANDLER pfnHandler = pCur ->CTX_SUFF(pfnHandler);255 PFNPGMR0PHYSHANDLER pfnHandler = pCurType->CTX_SUFF(pfnHandler); 254 256 # else 255 PFNPGMRCPHYSHANDLER pfnHandler = pCur ->CTX_SUFF(pfnHandler);257 PFNPGMRCPHYSHANDLER pfnHandler = pCurType->CTX_SUFF(pfnHandler); 256 258 # endif 257 259 258 260 STAM_PROFILE_START(&pCur->Stat, h); 259 if (p fnHandler != pPool->CTX_SUFF(pfnAccessHandler))261 if (pCur->hType != pPool->hAccessHandlerType) 260 262 { 261 263 pgmUnlock(pVM); -
trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp
r55331 r55493 55 55 56 56 57 /** 58 * Internal worker for releasing a physical handler type registration reference. 59 * 60 * @returns New reference count. UINT32_MAX if invalid input (asserted). 61 * @param pVM Pointer to the cross context VM structure. 62 * @param pType Pointer to the type registration. 63 */ 64 DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRelease(PVM pVM, PPGMPHYSHANDLERTYPEINT pType) 65 { 66 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX); 67 uint32_t cRefs = ASMAtomicDecU32(&pType->cRefs); 68 if (cRefs == 0) 69 { 70 pgmLock(pVM); 71 pType->u32Magic = PGMPHYSHANDLERTYPEINT_MAGIC_DEAD; 72 RTListOff32NodeRemove(&pType->ListNode); 73 pgmUnlock(pVM); 74 MMHyperFree(pVM, pType); 75 } 76 return cRefs; 77 } 78 79 80 /** 81 * Internal worker for retaining a physical handler type registration reference. 82 * 83 * @returns New reference count. UINT32_MAX if invalid input (asserted). 84 * @param pVM Pointer to the cross context VM structure. 85 * @param pType Pointer to the type registration. 86 */ 87 DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRetain(PVM pVM, PPGMPHYSHANDLERTYPEINT pType) 88 { 89 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX); 90 uint32_t cRefs = ASMAtomicIncU32(&pType->cRefs); 91 Assert(cRefs < _1M && cRefs > 0); 92 return cRefs; 93 } 94 95 96 /** 97 * Releases a reference to a physical handler type registration. 98 * 99 * @returns New reference count. UINT32_MAX if invalid input (asserted). 100 * @param pVM Pointer to the cross context VM structure. 101 * @param hType The type regiration handle. 102 */ 103 VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVM pVM, PGMPHYSHANDLERTYPE hType) 104 { 105 if (hType != NIL_PGMPHYSHANDLERTYPE) 106 return pgmHandlerPhysicalTypeRelease(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType)); 107 return 0; 108 } 109 110 111 /** 112 * Retains a reference to a physical handler type registration. 113 * 114 * @returns New reference count. UINT32_MAX if invalid input (asserted). 115 * @param pVM Pointer to the cross context VM structure. 116 * @param hType The type regiration handle. 117 */ 118 VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType) 119 { 120 return pgmHandlerPhysicalTypeRetain(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType)); 121 } 122 123 57 124 58 125 /** … … 68 135 * 69 136 * @param pVM Pointer to the VM. 70 * @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums.71 137 * @param GCPhys Start physical address. 72 138 * @param GCPhysLast Last physical address. (inclusive) 73 * @param pfnHandlerR3 The R3 handler.139 * @param hType The handler type registration handle. 74 140 * @param pvUserR3 User argument to the R3 handler. 75 * @param pfnHandlerR0 The R0 handler.76 141 * @param pvUserR0 User argument to the R0 handler. 77 * @param pfnHandlerRC The RC handler.78 142 * @param pvUserRC User argument to the RC handler. This can be a value 79 143 * less that 0x10000 or a (non-null) pointer that is 80 144 * automatically relocated. 81 * @param pszDesc Pointer to description string. This must not be freed. 82 */ 83 VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, 84 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 85 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 86 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC, 87 R3PTRTYPE(const char *) pszDesc) 88 { 89 Log(("PGMHandlerPhysicalRegisterEx: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserR3=%RHv pfnHandlerR0=%RHv pvUserR0=%RHv pfnHandlerGC=%RRv pvUserGC=%RRv pszDesc=%s\n", 90 enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, R3STRING(pszDesc))); 145 * @param pszDesc Description of this handler. If NULL, the type 146 * description will be used instead. 147 */ 148 VMMDECL(int) PGMHandlerPhysicalRegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType, 149 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc) 150 { 151 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType); 152 Log(("PGMHandlerPhysicalRegister: GCPhys=%RGp GCPhysLast=%RGp pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n", 153 GCPhys, GCPhysLast, pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc))); 91 154 92 155 /* 93 156 * Validate input. 94 157 */ 158 AssertReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, VERR_INVALID_HANDLE); 95 159 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER); 96 switch ( enmType)97 { 98 case PGMPHYSHANDLER TYPE_PHYSICAL_WRITE:160 switch (pType->enmKind) 161 { 162 case PGMPHYSHANDLERKIND_WRITE: 99 163 break; 100 case PGMPHYSHANDLER TYPE_MMIO:101 case PGMPHYSHANDLER TYPE_PHYSICAL_ALL:164 case PGMPHYSHANDLERKIND_MMIO: 165 case PGMPHYSHANDLERKIND_ALL: 102 166 /* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others. */ 103 167 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER); … … 105 169 break; 106 170 default: 107 AssertMsgFailed(("Invalid input enm Type=%d!\n", enmType));171 AssertMsgFailed(("Invalid input enmKind=%d!\n", pType->enmKind)); 108 172 return VERR_INVALID_PARAMETER; 109 173 } … … 116 180 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0), 117 181 VERR_INVALID_PARAMETER); 118 AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER);119 AssertReturn(pfnHandlerR0, VERR_INVALID_PARAMETER);120 AssertReturn(pfnHandlerRC || HMIsEnabled(pVM), VERR_INVALID_PARAMETER);121 182 122 183 /* … … 146 207 pNew->Core.Key = GCPhys; 147 208 pNew->Core.KeyLast = GCPhysLast; 148 pNew->enmType = enmType;149 209 pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT; 150 210 pNew->cAliasedPages = 0; 151 211 pNew->cTmpOffPages = 0; 152 pNew->pfnHandlerR3 = pfnHandlerR3;153 212 pNew->pvUserR3 = pvUserR3; 154 pNew->pfnHandlerR0 = pfnHandlerR0;155 213 pNew->pvUserR0 = pvUserR0; 156 pNew->pfnHandlerRC = pfnHandlerRC;157 214 pNew->pvUserRC = pvUserRC; 158 pNew->pszDesc = pszDesc; 215 pNew->hType = hType; 216 pNew->pszDesc = pszDesc != NIL_RTR3PTR ? pszDesc : pType->pszDesc; 217 pgmHandlerPhysicalTypeRetain(pVM, pType); 159 218 160 219 pgmLock(pVM); … … 171 230 #ifdef VBOX_WITH_REM 172 231 # ifndef IN_RING3 173 REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);232 REMNotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1, !!pType->pfnHandlerR3); 174 233 # else 175 REMR3NotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);234 REMR3NotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1, !!pType->pfnHandlerR3); 176 235 # endif 177 236 #endif … … 186 245 DBGFR3Info(pVM->pUVM, "handlers", "phys nostats", NULL); 187 246 #endif 188 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s\n", GCPhys, GCPhysLast, pszDesc)); 247 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s/%s\n", 248 GCPhys, GCPhysLast, R3STRING(pszDesc), R3STRING(pType->pszDesc))); 249 pgmHandlerPhysicalTypeRelease(pVM, pType); 189 250 MMHyperFree(pVM, pNew); 190 251 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT; … … 209 270 * mapping the page. 210 271 */ 211 bool fFlushTLBs = false; 212 int rc = VINF_SUCCESS; 213 const unsigned uState = pgmHandlerPhysicalCalcState(pCur); 214 uint32_t cPages = pCur->cPages; 215 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT; 272 bool fFlushTLBs = false; 273 int rc = VINF_SUCCESS; 274 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 275 const unsigned uState = pCurType->uState; 276 uint32_t cPages = pCur->cPages; 277 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT; 216 278 for (;;) 217 279 { 218 280 PPGMPAGE pPage = &pRam->aPages[i]; 219 AssertMsg(pCur ->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage),281 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage), 220 282 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage)); 221 283 … … 265 327 if (pCur) 266 328 { 267 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n", 268 pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc))); 329 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n", pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc))); 269 330 270 331 /* … … 277 338 pVM->pgm.s.pLastPhysHandlerR3 = 0; 278 339 pVM->pgm.s.pLastPhysHandlerRC = 0; 340 PGMHandlerPhysicalTypeRelease(pVM, pCur->hType); 279 341 MMHyperFree(pVM, pCur); 280 342 pgmUnlock(pVM); … … 293 355 static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur) 294 356 { 295 RTGCPHYS GCPhysStart = pCur->Core.Key; 296 RTGCPHYS GCPhysLast = pCur->Core.KeyLast; 357 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 358 RTGCPHYS GCPhysStart = pCur->Core.Key; 359 RTGCPHYS GCPhysLast = pCur->Core.KeyLast; 297 360 298 361 /* … … 306 369 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK)) 307 370 { 308 Assert(pCur ->enmType != PGMPHYSHANDLERTYPE_MMIO);371 Assert(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO); 309 372 310 373 if (GCPhysStart & PAGE_OFFSET_MASK) … … 346 409 * Tell REM. 347 410 */ 348 const bool fRestoreAsRAM = pCur ->pfnHandlerR3349 && pCur ->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */411 const bool fRestoreAsRAM = pCurType->pfnHandlerR3 412 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO; /** @todo this isn't entirely correct. */ 350 413 #ifdef VBOX_WITH_REM 351 414 # ifndef IN_RING3 352 REMNotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM); 415 REMNotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1, 416 !!pCurType->pfnHandlerR3, fRestoreAsRAM); 353 417 # else 354 REMR3NotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM); 418 REMR3NotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1, 419 !!pCurType->pfnHandlerR3, fRestoreAsRAM); 355 420 # endif 356 421 #endif … … 371 436 { 372 437 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove); 373 if ( 374 || 438 if ( !pCur 439 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT)) 375 440 break; 376 unsigned uThisState = pgmHandlerPhysicalCalcState(pCur);377 uState = RT_MAX(uState, uThisState);441 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 442 uState = RT_MAX(uState, pCurType->uState); 378 443 379 444 /* next? */ … … 505 570 pCur->cAliasedPages--; 506 571 } 507 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage)); 572 #ifdef VBOX_STRICT 573 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 574 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage)); 575 #endif 508 576 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE); 509 577 } … … 557 625 */ 558 626 pgmHandlerPhysicalResetRamFlags(pVM, pCur); 559 const bool fRestoreAsRAM = pCur->pfnHandlerR3 560 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */ 627 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 628 const bool fRestoreAsRAM = pCurType->pfnHandlerR3 629 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO; /** @todo this isn't entirely correct. */ 561 630 562 631 /* … … 580 649 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core)) 581 650 { 582 PGMPHYSHANDLERTYPE enmType = pCur->enmType;583 651 RTGCPHYS cb = GCPhysLast - GCPhys + 1; 584 bool fHasHCHandler = !!pCur->pfnHandlerR3; 652 PGMPHYSHANDLERKIND enmKind = pCurType->enmKind; 653 bool fHasHCHandler = !!pCurType->pfnHandlerR3; 585 654 586 655 /* … … 592 661 #ifdef VBOX_WITH_REM 593 662 # ifndef IN_RING3 594 REMNotifyHandlerPhysicalModify(pVM, enm Type, GCPhysCurrent, GCPhys, cb,663 REMNotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb, 595 664 fHasHCHandler, fRestoreAsRAM); 596 665 # else 597 REMR3NotifyHandlerPhysicalModify(pVM, enm Type, GCPhysCurrent, GCPhys, cb,666 REMR3NotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb, 598 667 fHasHCHandler, fRestoreAsRAM); 599 668 # endif … … 628 697 pVM->pgm.s.pLastPhysHandlerR3 = 0; 629 698 pVM->pgm.s.pLastPhysHandlerRC = 0; 699 PGMHandlerPhysicalTypeRelease(pVM, pCur->hType); 630 700 MMHyperFree(pVM, pCur); 631 701 } … … 773 843 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key)) 774 844 { 775 if (RT_LIKELY( pCur1->pfnHandlerRC == pCur2->pfnHandlerRC 776 && pCur1->pfnHandlerR0 == pCur2->pfnHandlerR0 777 && pCur1->pfnHandlerR3 == pCur2->pfnHandlerR3)) 845 if (RT_LIKELY(pCur1->hType == pCur2->hType)) 778 846 { 779 847 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2); … … 787 855 pVM->pgm.s.pLastPhysHandlerR3 = 0; 788 856 pVM->pgm.s.pLastPhysHandlerRC = 0; 857 PGMHandlerPhysicalTypeRelease(pVM, pCur2->hType); 789 858 MMHyperFree(pVM, pCur2); 790 859 pgmUnlock(pVM); … … 852 921 { 853 922 /* 854 * Validate type.923 * Validate kind. 855 924 */ 856 switch (pCur->enmType) 925 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 926 switch (pCurType->enmKind) 857 927 { 858 case PGMPHYSHANDLER TYPE_PHYSICAL_WRITE:859 case PGMPHYSHANDLER TYPE_PHYSICAL_ALL:860 case PGMPHYSHANDLER TYPE_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */928 case PGMPHYSHANDLERKIND_WRITE: 929 case PGMPHYSHANDLERKIND_ALL: 930 case PGMPHYSHANDLERKIND_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */ 861 931 { 862 932 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysHandlerReset)); /**@Todo move out of switch */ … … 866 936 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast); 867 937 868 if (pCur ->enmType == PGMPHYSHANDLERTYPE_MMIO)938 if (pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO) 869 939 { 870 940 /* … … 916 986 */ 917 987 default: 918 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur ->enmType));988 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCurType->enmKind)); 919 989 rc = VERR_PGM_PHYS_HANDLER_IPE; 920 990 break; … … 968 1038 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK); 969 1039 970 AssertReturnStmt( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE 971 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL, 1040 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 1041 AssertReturnStmt( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE 1042 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL, 972 1043 pgmUnlock(pVM), VERR_ACCESS_DENIED); 973 1044 … … 1041 1112 { 1042 1113 /// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */ 1043 1044 1114 pgmLock(pVM); 1115 1045 1116 /* 1046 1117 * Lookup and validate the range. … … 1052 1123 && GCPhysPage <= pCur->Core.KeyLast)) 1053 1124 { 1054 AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED); 1125 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 1126 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED); 1055 1127 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER); 1056 1128 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER); … … 1159 1231 { 1160 1232 /// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */ 1233 pgmLock(pVM); 1161 1234 1162 1235 /* 1163 1236 * Lookup and validate the range. 1164 1237 */ 1165 pgmLock(pVM);1166 1238 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys); 1167 1239 if (RT_LIKELY(pCur)) … … 1170 1242 && GCPhysPage <= pCur->Core.KeyLast)) 1171 1243 { 1172 AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED); 1244 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 1245 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED); 1173 1246 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER); 1174 1247 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER); … … 1243 1316 if (pCur) 1244 1317 { 1318 #ifdef VBOX_STRICT 1245 1319 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast); 1246 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE 1247 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL 1248 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); 1320 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 1321 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE 1322 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL 1323 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO); 1324 #endif 1249 1325 pgmUnlock(pVM); 1250 1326 return true; … … 1276 1352 return true; 1277 1353 } 1278 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE 1279 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL 1280 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); /* sanity */ 1354 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 1355 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE 1356 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL 1357 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO); /* sanity */ 1281 1358 /* Only whole pages can be disabled. */ 1282 1359 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK) 1283 1360 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK)); 1284 1361 1285 bool bRet = pCur ->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE;1362 bool bRet = pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE; 1286 1363 pgmUnlock(pVM); 1287 1364 return bRet; … … 1713 1790 if (pPhys) 1714 1791 { 1715 unsigned uState = pgmHandlerPhysicalCalcState(pPhys); 1792 PPGMPHYSHANDLERTYPEINT pPhysType = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys->hType); 1793 unsigned uState = pPhysType->uState; 1716 1794 1717 1795 /* more? */ … … 1723 1801 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK)) 1724 1802 break; 1725 unsigned uState2 = pgmHandlerPhysicalCalcState(pPhys2);1726 uState = RT_MAX(uState, uState2);1803 PPGMPHYSHANDLERTYPEINT pPhysType2 = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys2->hType); 1804 uState = RT_MAX(uState, pPhysType2->uState); 1727 1805 pPhys = pPhys2; 1728 1806 } … … 1733 1811 { 1734 1812 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n", 1735 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhys ->pszDesc));1813 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhysType->pszDesc)); 1736 1814 State.cErrors++; 1737 1815 } … … 1745 1823 { 1746 1824 AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n", 1747 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhys ->pszDesc));1825 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhysType->pszDesc)); 1748 1826 State.cErrors++; 1749 1827 } -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r52318 r55493 2118 2118 Assert((pPhys->Core.Key & PAGE_OFFSET_MASK) == 0); 2119 2119 Assert((pPhys->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK); 2120 Assert(pPhys->CTX_SUFF(pfnHandler)); 2121 2122 PFNPGMR3PHYSHANDLER pfnHandler = pPhys->CTX_SUFF(pfnHandler); 2120 2121 PFNPGMR3PHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pPhys)->CTX_SUFF(pfnHandler); Assert(pfnHandler); 2123 2122 void *pvUser = pPhys->CTX_SUFF(pvUser); 2124 2123 … … 2354 2353 { 2355 2354 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast); 2356 Assert( pCur->CTX_SUFF(pfnHandler));2355 Assert(PGMPHYSHANDLER_GET_TYPE(pVM, pCur)->CTX_SUFF(pfnHandler)); 2357 2356 2358 2357 size_t cbRange = pCur->Core.KeyLast - GCPhys + 1; … … 2367 2366 2368 2367 #else /* IN_RING3 */ 2369 Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", GCPhys, cbRange, pPage, R3STRING(pCur->pszDesc) )); 2368 Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys %s\n", 2369 GCPhys, cbRange, pPage, R3STRING(pCur->pszDesc) )); 2370 2370 if (!PGM_PAGE_IS_MMIO_OR_SPECIAL_ALIAS(pPage)) 2371 2371 rc = pgmPhysGCPhys2CCPtrInternal(pVM, pPage, GCPhys, &pvDst, &PgMpLck); … … 2374 2374 if (RT_SUCCESS(rc)) 2375 2375 { 2376 PFNPGMR3PHYSHANDLER pfnHandler = pCur->CTX_SUFF(pfnHandler);2376 PFNPGMR3PHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pCur)->CTX_SUFF(pfnHandler); 2377 2377 void *pvUser = pCur->CTX_SUFF(pvUser); 2378 2378 … … 2396 2396 } 2397 2397 else 2398 AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, (pCur) ? pCur->pszDesc : "")); 2398 AssertLogRelMsg(rc == VINF_SUCCESS || rc == VINF_PGM_HANDLER_DO_DEFAULT, 2399 ("rc=%Rrc GCPhys=%RGp pPage=%R[pgmpage] %s\n", rc, GCPhys, pPage, pCur ? pCur->pszDesc : "")); 2399 2400 } 2400 2401 else … … 2595 2596 cbRange = offVirt; 2596 2597 #ifdef IN_RING3 2597 PFNPGMR3PHYSHANDLER pfnHandler = pPhys->CTX_SUFF(pfnHandler);2598 PFNPGMR3PHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pPhys)->CTX_SUFF(pfnHandler); 2598 2599 void *pvUser = pPhys->CTX_SUFF(pvUser); 2599 2600 … … 2667 2668 Log5(("pgmPhysWriteHandler: GCPhys=%RGp cbRange=%#x pPage=%R[pgmpage] phys/virt %s/%s\n", GCPhys, cbRange, pPage, R3STRING(pPhys->pszDesc), R3STRING(pVirt->pszDesc) )); 2668 2669 2669 PFNPGMR3PHYSHANDLER pfnHandler = pPhys->CTX_SUFF(pfnHandler);2670 PFNPGMR3PHYSHANDLER pfnHandler = PGMPHYSHANDLER_GET_TYPE(pVM, pPhys)->CTX_SUFF(pfnHandler); 2670 2671 void *pvUser = pPhys->CTX_SUFF(pvUser); 2671 2672 -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r55331 r55493 2501 2501 PVM pVM = pPool->CTX_SUFF(pVM); 2502 2502 const RTGCPHYS GCPhysPage = pPage->GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK; 2503 rc = PGMHandlerPhysicalRegisterEx(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, 2504 GCPhysPage, GCPhysPage + PAGE_OFFSET_MASK, 2505 pPool->pfnAccessHandlerR3, MMHyperCCToR3(pVM, pPage), 2506 pPool->pfnAccessHandlerR0, MMHyperCCToR0(pVM, pPage), 2507 pPool->pfnAccessHandlerRC, MMHyperCCToRC(pVM, pPage), 2508 pPool->pszAccessHandler); 2503 rc = PGMHandlerPhysicalRegister(pVM, GCPhysPage, GCPhysPage + PAGE_OFFSET_MASK, pPool->hAccessHandlerType, 2504 MMHyperCCToR3(pVM, pPage), MMHyperCCToR0(pVM, pPage), MMHyperCCToRC(pVM, pPage), 2505 NIL_RTR3PTR /*pszDesc*/); 2509 2506 /** @todo we should probably deal with out-of-memory conditions here, but for now increasing 2510 2507 * the heap size should suffice. */ -
trunk/src/VBox/VMM/VMMAll/REMAll.cpp
r46420 r55493 133 133 * 134 134 * @param pVM Pointer to the VM. 135 * @param enm Type Handler type.135 * @param enmKind Kind of access handler. 136 136 * @param GCPhys Handler range address. 137 137 * @param cb Size of the handler range. 138 138 * @param fHasHCHandler Set if the handler have a HC callback function. 139 139 */ 140 VMMDECL(void) REMNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler)140 VMMDECL(void) REMNotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler) 141 141 { 142 142 REMHANDLERNOTIFICATION Rec; 143 143 Rec.enmKind = REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER; 144 Rec.u.PhysicalRegister.enm Type = enmType;144 Rec.u.PhysicalRegister.enmKind = enmKind; 145 145 Rec.u.PhysicalRegister.GCPhys = GCPhys; 146 146 Rec.u.PhysicalRegister.cb = cb; … … 154 154 * 155 155 * @param pVM Pointer to the VM. 156 * @param enm Type Handler type.156 * @param enmKind Kind of access handler. 157 157 * @param GCPhys Handler range address. 158 158 * @param cb Size of the handler range. … … 160 160 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 161 161 */ 162 VMMDECL(void) REMNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)162 VMMDECL(void) REMNotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 163 163 { 164 164 REMHANDLERNOTIFICATION Rec; 165 165 Rec.enmKind = REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER; 166 Rec.u.PhysicalDeregister.enm Type = enmType;166 Rec.u.PhysicalDeregister.enmKind = enmKind; 167 167 Rec.u.PhysicalDeregister.GCPhys = GCPhys; 168 168 Rec.u.PhysicalDeregister.cb = cb; … … 177 177 * 178 178 * @param pVM Pointer to the VM. 179 * @param enm Type Handler type.179 * @param enmKind Kind of access handler. 180 180 * @param GCPhysOld Old handler range address. 181 181 * @param GCPhysNew New handler range address. … … 184 184 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 185 185 */ 186 VMMDECL(void) REMNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)186 VMMDECL(void) REMNotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 187 187 { 188 188 REMHANDLERNOTIFICATION Rec; 189 189 Rec.enmKind = REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY; 190 Rec.u.PhysicalModify.enm Type = enmType;190 Rec.u.PhysicalModify.enmKind = enmKind; 191 191 Rec.u.PhysicalModify.GCPhysOld = GCPhysOld; 192 192 Rec.u.PhysicalModify.GCPhysNew = GCPhysNew; -
trunk/src/VBox/VMM/VMMR0/PGMR0.cpp
r44528 r55493 557 557 */ 558 558 pgmLock(pVM); 559 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysFault); 560 if (RT_LIKELY(pHandler && pHandler->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE)) 559 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysFault); 560 PPGMPHYSHANDLERTYPEINT pHandlerType = RT_LIKELY(pHandler) ? PGMPHYSHANDLER_GET_TYPE(pVM, pHandler) : NULL; 561 if (RT_LIKELY(pHandler && pHandlerType->enmKind != PGMPHYSHANDLERKIND_WRITE)) 561 562 { 562 563 /* … … 579 580 else 580 581 { 581 if (pHandler ->CTX_SUFF(pfnHandler))582 if (pHandlerType->CTX_SUFF(pfnHandler)) 582 583 { 583 CTX_MID(PFNPGM,PHYSHANDLER) pfnHandler = pHandler ->CTX_SUFF(pfnHandler);584 CTX_MID(PFNPGM,PHYSHANDLER) pfnHandler = pHandlerType->CTX_SUFF(pfnHandler); 584 585 void *pvUser = pHandler->CTX_SUFF(pvUser); 585 586 STAM_PROFILE_START(&pHandler->Stat, h); -
trunk/src/VBox/VMM/VMMR3/GIM.cpp
r55383 r55493 88 88 89 89 /* 90 * Initialize members. 91 */ 92 pVM->gim.s.hSemiReadOnlyMmio2Handler = NIL_PGMPHYSHANDLERTYPE; 93 94 /* 90 95 * Register the saved state data unit. 91 96 */ … … 543 548 { 544 549 /* 545 * Install access-handlers for the mapped page to prevent (ignore) writes to it from the guest. 550 * Install access-handlers for the mapped page to prevent (ignore) writes to it 551 * from the guest. 546 552 */ 547 rc = PGMR3HandlerPhysicalRegister(pVM,548 PGMPHYSHANDLERTYPE_PHYSICAL_WRITE,549 GCPhysRegion, GCPhysRegion + (pRegion->cbRegion - 1),550 gimR3Mmio2WriteHandler, NULL /* pvUserR3*/,551 NULL /* pszModR0 */, NULL /* pszHandlerR0 */, NIL_RTR0PTR /* pvUserR0*/,552 NULL /* pszModRC */, NULL /* pszHandlerRC */, NIL_RTRCPTR /* pvUserRC */,553 pRegion->szDescription);553 if (pVM->gim.s.hSemiReadOnlyMmio2Handler == NIL_PGMPHYSHANDLERTYPE) 554 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, 555 gimR3Mmio2WriteHandler, 556 NULL /* pszModR0 */, NULL /* pszHandlerR0 */, 557 NULL /* pszModRC */, NULL /* pszHandlerRC */, 558 "GIM read-only MMIO2 handler", 559 &pVM->gim.s.hSemiReadOnlyMmio2Handler); 554 560 if (RT_SUCCESS(rc)) 555 561 { 556 pRegion->fMapped = true; 557 pRegion->GCPhysPage = GCPhysRegion; 558 return rc; 562 rc = PGMHandlerPhysicalRegister(pVM, GCPhysRegion, GCPhysRegion + (pRegion->cbRegion - 1), 563 pVM->gim.s.hSemiReadOnlyMmio2Handler, 564 NULL /* pvUserR3 */, NIL_RTR0PTR /* pvUserR0 */, NIL_RTRCPTR /* pvUserRC */, 565 pRegion->szDescription); 566 if (RT_SUCCESS(rc)) 567 { 568 pRegion->fMapped = true; 569 pRegion->GCPhysPage = GCPhysRegion; 570 return rc; 571 } 559 572 } 560 573 … … 580 593 581 594 return PGMR3HandlerPhysicalRegister(pVM, 582 PGMPHYSHANDLER TYPE_PHYSICAL_WRITE,595 PGMPHYSHANDLERKIND_WRITE, 583 596 pRegion->GCPhysPage, pRegion->GCPhysPage + (pRegion->cbRegion - 1), 584 597 gimR3Mmio2WriteHandler, NULL /* pvUserR3 */, -
trunk/src/VBox/VMM/VMMR3/IOM.cpp
r45808 r55493 182 182 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3); 183 183 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3); 184 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;185 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;186 184 187 185 /* 188 * Info.186 * Register the MMIO access handler type. 189 187 */ 190 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo); 191 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo); 192 193 /* 194 * Statistics. 195 */ 196 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls."); 197 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter."); 198 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter."); 199 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter."); 200 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter."); 201 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request."); 202 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation."); 203 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation."); 204 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation."); 205 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation."); 206 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation."); 207 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation."); 208 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation."); 209 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation."); 210 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation."); 211 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation."); 188 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_MMIO, 189 IOMR3MMIOHandler, 190 NULL, "IOMMMIOHandler", 191 NULL, "IOMMMIOHandler", 192 "MMIO", 193 &pVM->iom.s.hMmioHandlerType); 194 AssertRC(rc); 195 if (RT_SUCCESS(rc)) 196 { 197 198 /* 199 * Info. 200 */ 201 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo); 202 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo); 203 204 /* 205 * Statistics. 206 */ 207 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls."); 208 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter."); 209 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter."); 210 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter."); 211 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter."); 212 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request."); 213 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation."); 214 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation."); 215 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation."); 216 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation."); 217 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation."); 218 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation."); 219 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation."); 220 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation."); 221 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation."); 222 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation."); 212 223 #ifdef IOM_WITH_MOVS_SUPPORT 213 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");214 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");215 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");216 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");224 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation."); 225 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO."); 226 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem."); 227 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO."); 217 228 #endif 218 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter."); 219 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler."); 220 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions."); 221 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions."); 222 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions."); 223 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions."); 229 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter."); 230 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler."); 231 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions."); 232 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions."); 233 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions."); 234 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions."); 235 } 224 236 } 225 237 … … 308 320 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta); 309 321 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta); 310 311 if (pVM->iom.s.pfnMMIOHandlerRC != NIL_RTRCPTR)312 pVM->iom.s.pfnMMIOHandlerRC += offDelta;313 322 314 323 /* … … 1379 1388 1380 1389 /* 1381 * Resolve the GC/R0 handler addresses lazily because of init order.1382 */1383 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)1384 {1385 if (!HMIsEnabled(pVM))1386 {1387 rc = PDMR3LdrGetSymbolRC(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);1388 AssertLogRelRCReturn(rc, rc);1389 }1390 rc = PDMR3LdrGetSymbolR0(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);1391 AssertLogRelRCReturn(rc, rc);1392 }1393 1394 /*1395 1390 * Allocate new range record and initialize it. 1396 1391 */ … … 1429 1424 * Try register it with PGM and then insert it into the tree. 1430 1425 */ 1431 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange, 1432 IOMR3MMIOHandler, pRange, 1433 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange), 1434 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc); 1426 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange, pVM->iom.s.hMmioHandlerType, 1427 pRange, MMHyperR3ToR0(pVM, pRange), MMHyperR3ToRC(pVM, pRange), pszDesc); 1435 1428 if (RT_SUCCESS(rc)) 1436 1429 { -
trunk/src/VBox/VMM/VMMR3/PGM.cpp
r55220 r55493 1402 1402 pVM->pgm.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->pgm.s.pTreesR3); 1403 1403 pVM->pgm.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pTreesR3); 1404 1405 /* 1406 * Allocate the zero page. 1407 */ 1404 } 1405 1406 /* 1407 * Allocate the zero page. 1408 */ 1409 if (RT_SUCCESS(rc)) 1410 { 1408 1411 rc = MMHyperAlloc(pVM, PAGE_SIZE, PAGE_SIZE, MM_TAG_PGM, &pVM->pgm.s.pvZeroPgR3); 1409 } 1412 if (RT_SUCCESS(rc)) 1413 { 1414 pVM->pgm.s.pvZeroPgRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pvZeroPgR3); 1415 pVM->pgm.s.pvZeroPgR0 = MMHyperR3ToR0(pVM, pVM->pgm.s.pvZeroPgR3); 1416 pVM->pgm.s.HCPhysZeroPg = MMR3HyperHCVirt2HCPhys(pVM, pVM->pgm.s.pvZeroPgR3); 1417 AssertRelease(pVM->pgm.s.HCPhysZeroPg != NIL_RTHCPHYS); 1418 } 1419 } 1420 1421 /* 1422 * Allocate the invalid MMIO page. 1423 * (The invalid bits in HCPhysInvMmioPg are set later on init complete.) 1424 */ 1410 1425 if (RT_SUCCESS(rc)) 1411 1426 { 1412 pVM->pgm.s.pvZeroPgRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pvZeroPgR3);1413 pVM->pgm.s.pvZeroPgR0 = MMHyperR3ToR0(pVM, pVM->pgm.s.pvZeroPgR3);1414 pVM->pgm.s.HCPhysZeroPg = MMR3HyperHCVirt2HCPhys(pVM, pVM->pgm.s.pvZeroPgR3);1415 AssertRelease(pVM->pgm.s.HCPhysZeroPg != NIL_RTHCPHYS);1416 1417 /*1418 * Allocate the invalid MMIO page.1419 * (The invalid bits in HCPhysInvMmioPg are set later on init complete.)1420 */1421 1427 rc = MMHyperAlloc(pVM, PAGE_SIZE, PAGE_SIZE, MM_TAG_PGM, &pVM->pgm.s.pvMmioPgR3); 1422 } 1428 if (RT_SUCCESS(rc)) 1429 { 1430 ASMMemFill32(pVM->pgm.s.pvMmioPgR3, PAGE_SIZE, 0xfeedface); 1431 pVM->pgm.s.HCPhysMmioPg = MMR3HyperHCVirt2HCPhys(pVM, pVM->pgm.s.pvMmioPgR3); 1432 AssertRelease(pVM->pgm.s.HCPhysMmioPg != NIL_RTHCPHYS); 1433 pVM->pgm.s.HCPhysInvMmioPg = pVM->pgm.s.HCPhysMmioPg; 1434 } 1435 } 1436 1437 /* 1438 * Register the physical access handler protecting ROMs. 1439 */ 1423 1440 if (RT_SUCCESS(rc)) 1424 { 1425 ASMMemFill32(pVM->pgm.s.pvMmioPgR3, PAGE_SIZE, 0xfeedface); 1426 pVM->pgm.s.HCPhysMmioPg = MMR3HyperHCVirt2HCPhys(pVM, pVM->pgm.s.pvMmioPgR3); 1427 AssertRelease(pVM->pgm.s.HCPhysMmioPg != NIL_RTHCPHYS); 1428 pVM->pgm.s.HCPhysInvMmioPg = pVM->pgm.s.HCPhysMmioPg; 1429 1430 /* 1431 * Init the paging. 1432 */ 1441 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, 1442 pgmR3PhysRomWriteHandler, 1443 NULL, "pgmPhysRomWriteHandler", 1444 NULL, "pgmPhysRomWriteHandler", 1445 "ROM write protection", 1446 &pVM->pgm.s.hRomPhysHandlerType); 1447 1448 /* 1449 * Init the paging. 1450 */ 1451 if (RT_SUCCESS(rc)) 1433 1452 rc = pgmR3InitPaging(pVM); 1434 } 1453 1454 /* 1455 * Init the page pool. 1456 */ 1435 1457 if (RT_SUCCESS(rc)) 1436 {1437 /*1438 * Init the page pool.1439 */1440 1458 rc = pgmR3PoolInit(pVM); 1441 } 1459 1442 1460 if (RT_SUCCESS(rc)) 1443 1461 { … … 2391 2409 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.pTreesR3->PhysHandlers, true, pgmR3RelocatePhysHandler, &offDelta); 2392 2410 pVM->pgm.s.pLastPhysHandlerRC = NIL_RTRCPTR; 2411 2412 PPGMPHYSHANDLERTYPEINT pCurPhysType; 2413 RTListOff32ForEach(&pVM->pgm.s.pTreesR3->HeadPhysHandlerTypes, pCurPhysType, PGMPHYSHANDLERTYPEINT, ListNode) 2414 { 2415 if (pCurPhysType->pfnHandlerRC) 2416 pCurPhysType->pfnHandlerRC += offDelta; 2417 } 2418 2393 2419 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.pTreesR3->VirtHandlers, true, pgmR3RelocateVirtHandler, &offDelta); 2394 2420 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.pTreesR3->HyperVirtHandlers, true, pgmR3RelocateHyperVirtHandler, &offDelta); … … 2422 2448 PPGMPHYSHANDLER pHandler = (PPGMPHYSHANDLER)pNode; 2423 2449 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser; 2424 if (pHandler->pfnHandlerRC)2425 pHandler->pfnHandlerRC += offDelta;2426 2450 if (pHandler->pvUserRC >= 0x10000) 2427 2451 pHandler->pvUserRC += offDelta; … … 4006 4030 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)pNode; 4007 4031 AssertReleaseReturn(!((uintptr_t)pCur & 7), 1); 4008 AssertReleaseMsg(pCur->Core.Key <= pCur->Core.KeyLast,("pCur=%p %RGp-%RGp %s\n", pCur, pCur->Core.Key, pCur->Core.KeyLast, pCur->pszDesc)); 4032 AssertReleaseMsg(pCur->Core.Key <= pCur->Core.KeyLast, 4033 ("pCur=%p %RGp-%RGp %s\n", pCur, pCur->Core.Key, pCur->Core.KeyLast, pCur->pszDesc)); 4009 4034 AssertReleaseMsg( !pArgs->pPrevPhys 4010 || (pArgs->fLeftToRight ? pArgs->pPrevPhys->Core.KeyLast < pCur->Core.Key : pArgs->pPrevPhys->Core.KeyLast > pCur->Core.Key), 4035 || ( pArgs->fLeftToRight 4036 ? pArgs->pPrevPhys->Core.KeyLast < pCur->Core.Key 4037 : pArgs->pPrevPhys->Core.KeyLast > pCur->Core.Key), 4011 4038 ("pPrevPhys=%p %RGp-%RGp %s\n" 4012 4039 " pCur=%p %RGp-%RGp %s\n", -
trunk/src/VBox/VMM/VMMR3/PGMHandler.cpp
r46493 r55493 65 65 66 66 67 /** 68 * Register a access handler for a physical range. 67 68 /** 69 * Register a physical page access handler type, extended version. 69 70 * 70 71 * @returns VBox status code. 71 * @param pVM Pointer to the VM. 72 * @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums. 73 * @param GCPhys Start physical address. 74 * @param GCPhysLast Last physical address. (inclusive) 75 * @param pfnHandlerR3 The R3 handler. 76 * @param pvUserR3 User argument to the R3 handler. 77 * @param pszModR0 The R0 handler module. NULL means the default R0 module. 78 * @param pszHandlerR0 The R0 handler symbol name. 79 * @param pvUserR0 User argument to the R0 handler. 80 * @param pszModRC The RC handler module. NULL means the default RC 81 * module. 82 * @param pszHandlerRC The RC handler symbol name. 83 * @param pvUserRC User argument to the RC handler. Values less than 84 * 0x10000 will not be relocated. 85 * @param pszDesc Pointer to description string. This must not be freed. 86 */ 87 VMMR3DECL(int) PGMR3HandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, 88 PFNPGMR3PHYSHANDLER pfnHandlerR3, void *pvUserR3, 89 const char *pszModR0, const char *pszHandlerR0, RTR0PTR pvUserR0, 90 const char *pszModRC, const char *pszHandlerRC, RTRCPTR pvUserRC, const char *pszDesc) 91 { 92 LogFlow(("PGMR3HandlerPhysicalRegister: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserHC=%RHv pszModR0=%s pszHandlerR0=%s pvUserR0=%RHv pszModRC=%s pszHandlerRC=%s pvUser=%RRv pszDesc=%s\n", 93 enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pszModR0, pszHandlerR0, pvUserR0, pszHandlerRC, pszModRC, pvUserRC, pszDesc)); 72 * @param pVM Pointer to the cross context VM structure. 73 * @param enmKind The kind of access handler. 74 * @param pfnHandlerR3 Pointer to the ring-3 handler callback. 75 * @param pfnHandlerR0 Pointer to the ring-0 handler callback. 76 * @param pfnHandlerRC Pointer to the raw-mode context handler callback. 77 * @param pszDesc The type description. 78 * @param phType Where to return the type handle (cross context 79 * safe). 80 */ 81 VMM_INT_DECL(int) PGMR3HandlerPhysicalTypeRegisterEx(PVM pVM, PGMPHYSHANDLERKIND enmKind, 82 PFNPGMR3PHYSHANDLER pfnHandlerR3, 83 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, 84 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, 85 const char *pszDesc, PPGMPHYSHANDLERTYPE phType) 86 { 87 AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER); 88 AssertReturn(pfnHandlerR0 != NIL_RTR0PTR, VERR_INVALID_POINTER); 89 AssertReturn(pfnHandlerRC != NIL_RTRCPTR || HMIsEnabled(pVM), VERR_INVALID_POINTER); 90 AssertPtrReturn(pszDesc, VERR_INVALID_POINTER); 91 AssertReturn( enmKind == PGMPHYSHANDLERKIND_WRITE 92 || enmKind == PGMPHYSHANDLERKIND_ALL 93 || enmKind == PGMPHYSHANDLERKIND_MMIO, 94 VERR_INVALID_PARAMETER); 95 96 PPGMPHYSHANDLERTYPEINT pType; 97 int rc = MMHyperAlloc(pVM, sizeof(*pType), 0, MM_TAG_PGM_HANDLER_TYPES, (void **)&pType); 98 if (RT_SUCCESS(rc)) 99 { 100 pType->u32Magic = PGMPHYSHANDLERTYPEINT_MAGIC; 101 pType->cRefs = 1; 102 pType->enmKind = enmKind; 103 pType->uState = enmKind == PGMPHYSHANDLERKIND_WRITE ? PGM_PAGE_HNDL_PHYS_STATE_WRITE : PGM_PAGE_HNDL_PHYS_STATE_ALL; 104 pType->pfnHandlerR3 = pfnHandlerR3; 105 pType->pfnHandlerR0 = pfnHandlerR0; 106 pType->pfnHandlerRC = pfnHandlerRC; 107 pType->pszDesc = pszDesc; 108 109 pgmLock(pVM); 110 RTListOff32Append(&pVM->pgm.s.CTX_SUFF(pTrees)->HeadPhysHandlerTypes, &pType->ListNode); 111 pgmUnlock(pVM); 112 113 *phType = MMHyperHeapPtrToOffset(pVM, pType); 114 LogFlow(("PGMR3HandlerPhysicalTypeRegisterEx: %p/%#x: enmKind=%d pfnHandlerR3=%RHv pfnHandlerR0=%RHv pfnHandlerRC=%RRv pszDesc=%s\n", 115 pType, *phType, enmKind, pfnHandlerR3, pfnHandlerR0, pfnHandlerRC, pszDesc)); 116 return VINF_SUCCESS; 117 } 118 *phType = NIL_PGMPHYSHANDLERTYPE; 119 return rc; 120 } 121 122 123 /** 124 * Register a physical page access handler type. 125 * 126 * @returns VBox status code. 127 * @param pVM Pointer to the cross context VM structure. 128 * @param enmKind The kind of access handler. 129 * @param pfnHandlerR3 Pointer to the ring-3 handler callback. 130 * @param pszModR0 The name of the ring-0 module, NULL is an alias for 131 * the main ring-0 module. 132 * @param pszHandlerR0 The name of the ring-0 handler, NULL if the ring-3 133 * handler should be called. 134 * @param pszModRC The name of the raw-mode context module, NULL is an 135 * alias for the main RC module. 136 * @param pszHandlerRC The name of the raw-mode context handler, NULL if 137 * the ring-3 handler should be called. 138 * @param pszDesc The type description. 139 * @param phType Where to return the type handle (cross context 140 * safe). 141 */ 142 VMMR3DECL(int) PGMR3HandlerPhysicalTypeRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, 143 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, 144 const char *pszModR0, const char *pszHandlerR0, 145 const char *pszModRC, const char *pszHandlerRC, const char *pszDesc, 146 PPGMPHYSHANDLERTYPE phType) 147 { 148 LogFlow(("PGMR3HandlerPhysicalTypeRegister: enmKind=%d pfnHandlerR3=%RHv pszModR0=%s pszHandlerR0=%s pszModRC=%s pszHandlerRC=%s pszDesc=%s\n", 149 enmKind, pfnHandlerR3, pszModR0, pszHandlerR0, pszHandlerRC, pszModRC, pszDesc)); 94 150 95 151 /* … … 112 168 */ 113 169 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0 = NIL_RTR0PTR; 114 int rc = VINF_SUCCESS; 115 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pszModR0, NULL /*pszSearchPath*/, pszHandlerR0, &pfnHandlerR0); 170 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pszModR0, NULL /*pszSearchPath*/, pszHandlerR0, &pfnHandlerR0); 116 171 if (RT_SUCCESS(rc)) 117 172 { … … 123 178 rc = PDMR3LdrGetSymbolRCLazy(pVM, pszModRC, NULL /*pszSearchPath*/, pszHandlerRC, &pfnHandlerRC); 124 179 if (RT_SUCCESS(rc)) 125 return PGMHandlerPhysicalRegisterEx(pVM, enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, 126 pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, pszDesc); 180 return PGMR3HandlerPhysicalTypeRegisterEx(pVM, enmKind, pfnHandlerR3, pfnHandlerR0, pfnHandlerRC, pszDesc, phType); 127 181 128 182 AssertMsgFailed(("Failed to resolve %s.%s, rc=%Rrc.\n", pszModRC, pszHandlerRC, rc)); … … 195 249 static DECLCALLBACK(int) pgmR3HandlerPhysicalOneSet(PAVLROGCPHYSNODECORE pNode, void *pvUser) 196 250 { 197 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)pNode; 198 unsigned uState = pgmHandlerPhysicalCalcState(pCur); 199 PPGMRAMRANGE pRamHint = NULL; 200 RTGCPHYS GCPhys = pCur->Core.Key; 201 RTUINT cPages = pCur->cPages; 202 PVM pVM = (PVM)pvUser; 251 PVM pVM = (PVM)pvUser; 252 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)pNode; 253 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur); 254 unsigned uState = pCurType->uState; 255 PPGMRAMRANGE pRamHint = NULL; 256 RTGCPHYS GCPhys = pCur->Core.Key; 257 RTUINT cPages = pCur->cPages; 203 258 for (;;) 204 259 { … … 524 579 /** The output helpers.*/ 525 580 PCDBGFINFOHLP pHlp; 581 /** Pointer to the cross context VM handle. */ 582 PVM pVM; 526 583 /** Set if statistics should be dumped. */ 527 584 bool fStats; … … 540 597 * Test input. 541 598 */ 542 PGMHANDLERINFOARG Args = { pHlp, /* .fStats = */ true };599 PGMHANDLERINFOARG Args = { pHlp, pVM, /* .fStats = */ true }; 543 600 bool fPhysical = !pszArgs || !*pszArgs; 544 601 bool fVirtual = fPhysical; … … 604 661 static DECLCALLBACK(int) pgmR3InfoHandlersPhysicalOne(PAVLROGCPHYSNODECORE pNode, void *pvUser) 605 662 { 606 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)pNode; 607 PPGMHANDLERINFOARG pArgs= (PPGMHANDLERINFOARG)pvUser; 608 PCDBGFINFOHLP pHlp = pArgs->pHlp; 663 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)pNode; 664 PPGMHANDLERINFOARG pArgs = (PPGMHANDLERINFOARG)pvUser; 665 PCDBGFINFOHLP pHlp = pArgs->pHlp; 666 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pArgs->pVM, pCur); 609 667 const char *pszType; 610 switch (pCur ->enmType)611 { 612 case PGMPHYSHANDLER TYPE_MMIO:pszType = "MMIO "; break;613 case PGMPHYSHANDLER TYPE_PHYSICAL_WRITE:pszType = "Write "; break;614 case PGMPHYSHANDLER TYPE_PHYSICAL_ALL:pszType = "All "; break;615 default: 668 switch (pCurType->enmKind) 669 { 670 case PGMPHYSHANDLERKIND_MMIO: pszType = "MMIO "; break; 671 case PGMPHYSHANDLERKIND_WRITE: pszType = "Write "; break; 672 case PGMPHYSHANDLERKIND_ALL: pszType = "All "; break; 673 default: pszType = "????"; break; 616 674 } 617 675 pHlp->pfnPrintf(pHlp, 618 676 "%RGp - %RGp %RHv %RHv %RRv %RRv %s %s\n", 619 pCur->Core.Key, pCur->Core.KeyLast, pCur->pfnHandlerR3, pCur->pvUserR3, pCur->pfnHandlerRC, pCur->pvUserRC, pszType, pCur->pszDesc); 677 pCur->Core.Key, pCur->Core.KeyLast, pCurType->pfnHandlerR3, pCur->pvUserR3, pCurType->pfnHandlerRC, pCur->pvUserRC, 678 pszType, pCur->pszDesc); 620 679 #ifdef VBOX_WITH_STATISTICS 621 680 if (pArgs->fStats) -
trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp
r54823 r55493 55 55 56 56 57 /*******************************************************************************58 * Internal Functions *59 *******************************************************************************/60 static DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);61 62 63 57 /* 64 58 * PGMR3PhysReadU8-64 … … 2172 2166 * @param GCPhys The start of the MMIO region. 2173 2167 * @param cb The size of the MMIO region. 2174 * @param pfnHandlerR3 The address of the ring-3 handler. (IOMR3MMIOHandler)2168 * @param hType The physical access handler type registration. 2175 2169 * @param pvUserR3 The user argument for R3. 2176 * @param pfnHandlerR0 The address of the ring-0 handler. (IOMMMIOHandler)2177 2170 * @param pvUserR0 The user argument for R0. 2178 * @param pfnHandlerRC The address of the RC handler. (IOMMMIOHandler)2179 2171 * @param pvUserRC The user argument for RC. 2180 2172 * @param pszDesc The description of the MMIO region. 2181 2173 */ 2182 VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, 2183 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3, 2184 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0, 2185 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC, 2186 R3PTRTYPE(const char *) pszDesc) 2174 VMMR3DECL(int) PGMR3PhysMMIORegister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb, PGMPHYSHANDLERTYPE hType, 2175 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc) 2187 2176 { 2188 2177 /* … … 2194 2183 AssertPtrReturn(pszDesc, VERR_INVALID_POINTER); 2195 2184 AssertReturn(*pszDesc, VERR_INVALID_PARAMETER); 2185 Assert(((PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, hType))->enmKind == PGMPHYSHANDLERKIND_MMIO); 2196 2186 2197 2187 int rc = pgmLock(pVM); … … 2306 2296 * Register the access handler. 2307 2297 */ 2308 rc = PGMHandlerPhysicalRegisterEx(pVM, PGMPHYSHANDLERTYPE_MMIO, GCPhys, GCPhysLast, 2309 pfnHandlerR3, pvUserR3, 2310 pfnHandlerR0, pvUserR0, 2311 pfnHandlerRC, pvUserRC, pszDesc); 2298 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc); 2312 2299 if ( RT_FAILURE(rc) 2313 2300 && !fRamExists) … … 3338 3325 REMR3NotifyPhysRomRegister(pVM, GCPhys, cb, NULL, true /* fShadowed */); 3339 3326 #endif 3340 rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhys, GCPhysLast, 3341 pgmR3PhysRomWriteHandler, pRomNew, 3342 NULL, "pgmPhysRomWriteHandler", MMHyperCCToR0(pVM, pRomNew), 3343 NULL, "pgmPhysRomWriteHandler", MMHyperCCToRC(pVM, pRomNew), pszDesc); 3327 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, pVM->pgm.s.hRomPhysHandlerType, 3328 pRomNew, MMHyperCCToR0(pVM, pRomNew), MMHyperCCToRC(pVM, pRomNew), 3329 pszDesc); 3344 3330 } 3345 3331 else 3346 3332 { 3347 rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhys, GCPhysLast, 3348 pgmR3PhysRomWriteHandler, pRomNew, 3349 NULL, "pgmPhysRomWriteHandler", MMHyperCCToR0(pVM, pRomNew), 3350 NULL, "pgmPhysRomWriteHandler", MMHyperCCToRC(pVM, pRomNew), pszDesc); 3333 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, pVM->pgm.s.hRomPhysHandlerType, 3334 pRomNew, MMHyperCCToR0(pVM, pRomNew), MMHyperCCToRC(pVM, pRomNew), 3335 pszDesc); 3351 3336 #ifdef VBOX_WITH_REM 3352 3337 REMR3NotifyPhysRomRegister(pVM, GCPhys, cb, NULL, false /* fShadowed */); … … 3522 3507 * @param pvUser User argument. 3523 3508 */ 3524 staticDECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,3525 3509 DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 3510 PGMACCESSTYPE enmAccessType, void *pvUser) 3526 3511 { 3527 3512 PPGMROMRANGE pRom = (PPGMROMRANGE)pvUser; -
trunk/src/VBox/VMM/VMMR3/PGMPool.cpp
r55174 r55493 280 280 pPool->iAgeTail = NIL_PGMPOOL_IDX; 281 281 pPool->fCacheEnabled = fCacheEnabled; 282 pPool->pfnAccessHandlerR3 = pgmR3PoolAccessHandler; 283 pPool->pszAccessHandler = "Guest Paging Access Handler"; 282 283 pPool->hAccessHandlerType = NIL_PGMPHYSHANDLERTYPE; 284 rc = PGMR3HandlerPhysicalTypeRegister(pVM, PGMPHYSHANDLERKIND_WRITE, 285 pgmR3PoolAccessHandler, 286 NULL, "pgmPoolAccessHandler", 287 NULL, "pgmPoolAccessHandler", 288 "Guest Paging Access Handler", 289 &pPool->hAccessHandlerType); 290 AssertLogRelRCReturn(rc, rc); 291 284 292 pPool->HCPhysTree = 0; 285 293 … … 411 419 pVM->pgm.s.pPoolR3->paUsersRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pPoolR3->paUsersR3); 412 420 pVM->pgm.s.pPoolR3->paPhysExtsRC = MMHyperR3ToRC(pVM, pVM->pgm.s.pPoolR3->paPhysExtsR3); 413 414 if (!HMIsEnabled(pVM))415 {416 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "pgmPoolAccessHandler", &pVM->pgm.s.pPoolR3->pfnAccessHandlerRC);417 AssertReleaseRC(rc);418 }419 420 /* init order hack. */421 if (!pVM->pgm.s.pPoolR3->pfnAccessHandlerR0)422 {423 int rc = PDMR3LdrGetSymbolR0(pVM, NULL, "pgmPoolAccessHandler", &pVM->pgm.s.pPoolR3->pfnAccessHandlerR0);424 AssertReleaseRC(rc);425 }426 421 } 427 422 -
trunk/src/VBox/VMM/include/GIMInternal.h
r55037 r55493 5 5 6 6 /* 7 * Copyright (C) 2014 Oracle Corporation7 * Copyright (C) 2014-2015 Oracle Corporation 8 8 * 9 9 * This file is part of VirtualBox Open Source Edition (OSE), as … … 20 20 21 21 #include <VBox/vmm/gim.h> 22 #include <VBox/vmm/pgm.h> 22 23 #include "GIMHvInternal.h" 23 24 #include "GIMKvmInternal.h" … … 45 46 /** The interface implementation version. */ 46 47 uint32_t u32Version; 48 49 /** Physical access handler type for semi-read-only MMIO2 memory. Lazy creation. */ 50 PGMPHYSHANDLERTYPE hSemiReadOnlyMmio2Handler; 51 /** Alignment padding. */ 52 uint32_t u32Padding; 47 53 48 54 /** Pointer to the GIM device - ring-3 context. */ -
trunk/src/VBox/VMM/include/IOMInternal.h
r48017 r55493 320 320 R0PTRTYPE(PIOMTREES) pTreesR0; 321 321 322 /** The ring-0 address of IOMMMIOHandler. */ 323 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnMMIOHandlerR0; 324 /** The RC address of IOMMMIOHandler. */ 325 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnMMIOHandlerRC; 326 #if HC_ARCH_BITS == 64 327 RTRCPTR padding; 328 #endif 322 /** MMIO physical access handler type. */ 323 PGMPHYSHANDLERTYPE hMmioHandlerType; 324 uint32_t u32Padding; 329 325 330 326 /** Lock serializing EMT access to IOM. */ -
trunk/src/VBox/VMM/include/PGMInline.h
r45832 r55493 1200 1200 1201 1201 /** 1202 * Gets the page state for a physical handler.1203 *1204 * @returns The physical handler page state.1205 * @param pCur The physical handler in question.1206 */1207 DECLINLINE(unsigned) pgmHandlerPhysicalCalcState(PPGMPHYSHANDLER pCur)1208 {1209 switch (pCur->enmType)1210 {1211 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:1212 return PGM_PAGE_HNDL_PHYS_STATE_WRITE;1213 1214 case PGMPHYSHANDLERTYPE_MMIO:1215 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:1216 return PGM_PAGE_HNDL_PHYS_STATE_ALL;1217 1218 default:1219 AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));1220 }1221 }1222 1223 1224 /**1225 1202 * Gets the page state for a virtual handler. 1226 1203 * -
trunk/src/VBox/VMM/include/PGMInternal.h
r52764 r55493 5 5 6 6 /* 7 * Copyright (C) 2006-201 4Oracle Corporation7 * Copyright (C) 2006-2015 Oracle Corporation 8 8 * 9 9 * This file is part of VirtualBox Open Source Edition (OSE), as … … 40 40 #include <iprt/avl.h> 41 41 #include <iprt/critsect.h> 42 #include <iprt/list-off32.h> 42 43 #include <iprt/sha.h> 43 44 … … 575 576 576 577 /** 578 * Physical page access handler type registration. 579 */ 580 typedef struct PGMPHYSHANDLERTYPEINT 581 { 582 /** Number of references. */ 583 uint32_t volatile cRefs; 584 /** Magic number (PGMPHYSHANDLERTYPEINT_MAGIC). */ 585 uint32_t u32Magic; 586 /** Link of handler types anchored in PGMTREES::HeadPhysHandlerTypes. */ 587 RTLISTOFF32NODE ListNode; 588 /** The kind of accesses we're handling. */ 589 PGMPHYSHANDLERKIND enmKind; 590 /** The PGM_PAGE_HNDL_PHYS_STATE_XXX value corresponding to enmKind. */ 591 uint32_t uState; 592 /** Pointer to RC callback function. */ 593 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC; 594 /** Explicit alignment padding. */ 595 RTRCPTR RCPtrPadding; 596 /** Pointer to R3 callback function. */ 597 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3; 598 /** Pointer to R0 callback function. */ 599 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0; 600 /** Description / Name. For easing debugging. */ 601 R3PTRTYPE(const char *) pszDesc; 602 } PGMPHYSHANDLERTYPEINT; 603 /** Pointer to a physical access handler type registration. */ 604 typedef PGMPHYSHANDLERTYPEINT *PPGMPHYSHANDLERTYPEINT; 605 /** Magic value for the physical handler callbacks (Robert A. Heinlein). */ 606 #define PGMPHYSHANDLERTYPEINT_MAGIC UINT32_C(0x19070707) 607 /** Magic value for the physical handler callbacks. */ 608 #define PGMPHYSHANDLERTYPEINT_MAGIC_DEAD UINT32_C(0x19880508) 609 610 /** 611 * Converts a handle to a pointer. 612 * @returns PPGMPHYSHANDLERTYPEINT 613 * @param a_pVM Pointer to the cross context VM structure. 614 * @param a_hType Physical access handler handle. 615 */ 616 #define PGMPHYSHANDLERTYPEINT_FROM_HANDLE(a_pVM, a_hType) ((PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(a_pVM, a_hType)) 617 618 619 /** 577 620 * Physical page access handler structure. 578 621 * … … 583 626 { 584 627 AVLROGCPHYSNODECORE Core; 585 /** Access type. */586 PGMPHYSHANDLERTYPE enmType;587 628 /** Number of pages to update. */ 588 629 uint32_t cPages; … … 591 632 /** Set if we have pages that have temporarily been disabled. */ 592 633 uint32_t cTmpOffPages; 593 /** Pointer to R3 callback function. */ 594 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3; 634 /** Registered handler type handle (heap offset). */ 635 PGMPHYSHANDLERTYPE hType; 636 /** User argument for RC handlers. */ 637 RCPTRTYPE(void *) pvUserRC; 638 #if HC_ARCH_BITS == 64 639 RTRCPTR Padding0; /**< Explicit alignment padding. */ 640 #endif 595 641 /** User argument for R3 handlers. */ 596 642 R3PTRTYPE(void *) pvUserR3; 597 /** Pointer to R0 callback function. */598 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;599 643 /** User argument for R0 handlers. */ 600 644 R0PTRTYPE(void *) pvUserR0; 601 /** Pointer to RC callback function. */602 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC;603 /** User argument for RC handlers. */604 RCPTRTYPE(void *) pvUserRC;605 645 /** Description / Name. For easing debugging. */ 606 646 R3PTRTYPE(const char *) pszDesc; … … 612 652 /** Pointer to a physical page access handler structure. */ 613 653 typedef PGMPHYSHANDLER *PPGMPHYSHANDLER; 654 655 /** 656 * Gets the type record for a physical handler (no reference added). 657 * @returns PPGMPHYSHANDLERTYPEINT 658 * @param a_pVM Pointer to the cross context VM structure. 659 * @param a_pPhysHandler Pointer to the physical handler structure 660 * (PGMPHYSHANDLER). 661 */ 662 #define PGMPHYSHANDLER_GET_TYPE(a_pVM, a_pPhysHandler) PGMPHYSHANDLERTYPEINT_FROM_HANDLE(a_pVM, (a_pPhysHandler)->hType) 614 663 615 664 … … 2314 2363 /** The current number of modified pages. */ 2315 2364 uint16_t cModifiedPages; 2316 /** Access handler, RC. */ 2317 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnAccessHandlerRC; 2318 /** Access handler, R0. */ 2319 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0; 2320 /** Access handler, R3. */ 2321 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3; 2322 /** The access handler description (R3 ptr). */ 2323 R3PTRTYPE(const char *) pszAccessHandler; 2324 # if HC_ARCH_BITS == 32 2325 /** Alignment padding. */ 2326 uint32_t u32Padding2; 2327 # endif 2365 /** Physical access handler type registration handle. */ 2366 PGMPHYSHANDLERTYPE hAccessHandlerType; 2328 2367 /** Next available slot (in aDirtyPages). */ 2329 2368 uint32_t idxFreeDirtyPage; … … 2611 2650 2612 2651 /** 2613 * Trees are using self relative offsets as pointers. 2614 * So, all its data, including the root pointer, must be in the heap for HC and GC 2615 * to have the same layout. 2652 * Roots and anchors for trees and list employing self relative offsets as 2653 * pointers. 2654 * 2655 * When using self-relative offsets instead of pointers, the offsets needs to be 2656 * the same in all offsets. Thus the roots and anchors needs to live on the 2657 * hyper heap just like the nodes. 2616 2658 */ 2617 2659 typedef struct PGMTREES … … 2625 2667 /** Virtual access handlers for the hypervisor (AVL range + GC ptr tree). */ 2626 2668 AVLROGCPTRTREE HyperVirtHandlers; 2669 /** List of physical access handler types (offset pointers) of type 2670 * PGMPHYSHANDLERTYPEINT. This is needed for relocations. */ 2671 RTLISTOFF32ANCHOR HeadPhysHandlerTypes; 2627 2672 } PGMTREES; 2628 2673 /** Pointer to PGM trees. */ … … 3156 3201 /** The address of the previous RAM range mapping. */ 3157 3202 RTGCPTR GCPtrPrevRamRangeMapping; 3203 3204 /** Physical access handler type for ROM protection. */ 3205 PGMPHYSHANDLERTYPE hRomPhysHandlerType; 3206 /** Alignment padding. */ 3207 uint32_t u32Padding; 3158 3208 3159 3209 /** 4 MB page mask; 32 or 36 bits depending on PSE-36 (identical for all VCPUs) */ … … 4059 4109 4060 4110 #ifdef IN_RING3 4111 DECLCALLBACK(int) pgmR3PhysRomWriteHandler(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, 4112 PGMACCESSTYPE enmAccessType, void *pvUser); 4061 4113 void pgmR3PhysRelinkRamRanges(PVM pVM); 4062 4114 int pgmR3PhysRamPreAllocate(PVM pVM); -
trunk/src/VBox/VMM/include/REMInternal.h
r45528 r55493 79 79 RTGCPHYS GCPhys; 80 80 RTGCPHYS cb; 81 PGMPHYSHANDLER TYPE enmType;81 PGMPHYSHANDLERKIND enmKind; 82 82 bool fHasHCHandler; 83 83 } PhysicalRegister; … … 87 87 RTGCPHYS GCPhys; 88 88 RTGCPHYS cb; 89 PGMPHYSHANDLER TYPE enmType;89 PGMPHYSHANDLERKIND enmKind; 90 90 bool fHasHCHandler; 91 91 bool fRestoreAsRAM; … … 97 97 RTGCPHYS GCPhysNew; 98 98 RTGCPHYS cb; 99 PGMPHYSHANDLER TYPE enmType;99 PGMPHYSHANDLERKIND enmKind; 100 100 bool fHasHCHandler; 101 101 bool fRestoreAsRAM; -
trunk/src/VBox/VMM/testcase/tstVMStruct.h
r55062 r55493 776 776 GEN_CHECK_OFF(PGMPHYSHANDLER, Core); 777 777 GEN_CHECK_SIZE(((PPGMPHYSHANDLER)0)->Core); 778 GEN_CHECK_OFF(PGMPHYSHANDLER, enmType);779 778 GEN_CHECK_OFF(PGMPHYSHANDLER, cPages); 780 779 GEN_CHECK_OFF(PGMPHYSHANDLER, cAliasedPages); 781 780 GEN_CHECK_OFF(PGMPHYSHANDLER, cTmpOffPages); 782 GEN_CHECK_OFF(PGMPHYSHANDLER, pfnHandlerR3);781 GEN_CHECK_OFF(PGMPHYSHANDLER, hType); 783 782 GEN_CHECK_OFF(PGMPHYSHANDLER, pvUserR3); 784 GEN_CHECK_OFF(PGMPHYSHANDLER, pfnHandlerR0);785 783 GEN_CHECK_OFF(PGMPHYSHANDLER, pvUserR0); 786 GEN_CHECK_OFF(PGMPHYSHANDLER, pfnHandlerRC);787 784 GEN_CHECK_OFF(PGMPHYSHANDLER, pvUserRC); 788 GEN_CHECK_OFF(PGMPHYSHANDLER, pszDesc); 785 //GEN_CHECK_OFF(PGMPHYSHANDLER, pszDesc); 786 GEN_CHECK_SIZE(PGMPHYSHANDLERTYPEINT); 787 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, u32Magic); 788 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, cRefs); 789 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, ListNode); 790 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, enmKind); 791 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, uState); 792 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, pfnHandlerR3); 793 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, pfnHandlerR0); 794 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, pfnHandlerRC); 795 GEN_CHECK_OFF(PGMPHYSHANDLERTYPEINT, pszDesc); 789 796 GEN_CHECK_SIZE(PGMPHYS2VIRTHANDLER); 790 797 GEN_CHECK_OFF(PGMPHYS2VIRTHANDLER, Core); … … 960 967 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalRegister.GCPhys); 961 968 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalRegister.cb); 962 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalRegister.enm Type);969 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalRegister.enmKind); 963 970 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalRegister.fHasHCHandler); 964 971 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalDeregister.GCPhys); 965 972 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalDeregister.cb); 966 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalDeregister.enm Type);973 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalDeregister.enmKind); 967 974 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalDeregister.fHasHCHandler); 968 975 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalDeregister.fRestoreAsRAM); … … 970 977 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalModify.GCPhysNew); 971 978 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalModify.cb); 972 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalModify.enm Type);979 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalModify.enmKind); 973 980 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalModify.fHasHCHandler); 974 981 GEN_CHECK_OFF_DOT(REMHANDLERNOTIFICATION, u.PhysicalModify.fRestoreAsRAM); -
trunk/src/recompiler/VBoxREMWrapper.cpp
r54737 r55493 366 366 static DECLCALLBACKPTR(void, pfnREMR3NotifyPhysRamDeregister)(PVM, RTGCPHYS, RTUINT); 367 367 static DECLCALLBACKPTR(void, pfnREMR3NotifyPhysRomRegister)(PVM, RTGCPHYS, RTUINT, void *, bool); 368 static DECLCALLBACKPTR(void, pfnREMR3NotifyHandlerPhysicalModify)(PVM, PGMPHYSHANDLER TYPE, RTGCPHYS, RTGCPHYS, RTGCPHYS, bool, bool);369 static DECLCALLBACKPTR(void, pfnREMR3NotifyHandlerPhysicalRegister)(PVM, PGMPHYSHANDLER TYPE, RTGCPHYS, RTGCPHYS, bool);370 static DECLCALLBACKPTR(void, pfnREMR3NotifyHandlerPhysicalDeregister)(PVM, PGMPHYSHANDLER TYPE, RTGCPHYS, RTGCPHYS, bool, bool);368 static DECLCALLBACKPTR(void, pfnREMR3NotifyHandlerPhysicalModify)(PVM, PGMPHYSHANDLERKIND, RTGCPHYS, RTGCPHYS, RTGCPHYS, bool, bool); 369 static DECLCALLBACKPTR(void, pfnREMR3NotifyHandlerPhysicalRegister)(PVM, PGMPHYSHANDLERKIND, RTGCPHYS, RTGCPHYS, bool); 370 static DECLCALLBACKPTR(void, pfnREMR3NotifyHandlerPhysicalDeregister)(PVM, PGMPHYSHANDLERKIND, RTGCPHYS, RTGCPHYS, bool, bool); 371 371 static DECLCALLBACKPTR(void, pfnREMR3NotifyInterruptSet)(PVM, PVMCPU); 372 372 static DECLCALLBACKPTR(void, pfnREMR3NotifyInterruptClear)(PVM, PVMCPU); … … 484 484 { 485 485 { REMPARMDESC_FLAGS_INT, sizeof(PVM), NULL }, 486 { REMPARMDESC_FLAGS_INT, sizeof(PGMPHYSHANDLER TYPE), NULL },486 { REMPARMDESC_FLAGS_INT, sizeof(PGMPHYSHANDLERKIND), NULL }, 487 487 { REMPARMDESC_FLAGS_GCPHYS, sizeof(RTGCPHYS), NULL }, 488 488 { REMPARMDESC_FLAGS_GCPHYS, sizeof(RTGCPHYS), NULL }, … … 494 494 { 495 495 { REMPARMDESC_FLAGS_INT, sizeof(PVM), NULL }, 496 { REMPARMDESC_FLAGS_INT, sizeof(PGMPHYSHANDLER TYPE), NULL },496 { REMPARMDESC_FLAGS_INT, sizeof(PGMPHYSHANDLERKIND), NULL }, 497 497 { REMPARMDESC_FLAGS_GCPHYS, sizeof(RTGCPHYS), NULL }, 498 498 { REMPARMDESC_FLAGS_GCPHYS, sizeof(RTGCPHYS), NULL }, … … 502 502 { 503 503 { REMPARMDESC_FLAGS_INT, sizeof(PVM), NULL }, 504 { REMPARMDESC_FLAGS_INT, sizeof(PGMPHYSHANDLER TYPE), NULL },504 { REMPARMDESC_FLAGS_INT, sizeof(PGMPHYSHANDLERKIND), NULL }, 505 505 { REMPARMDESC_FLAGS_GCPHYS, sizeof(RTGCPHYS), NULL }, 506 506 { REMPARMDESC_FLAGS_GCPHYS, sizeof(RTGCPHYS), NULL }, … … 2382 2382 } 2383 2383 2384 REMR3DECL(void) REMR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler)2384 REMR3DECL(void) REMR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler) 2385 2385 { 2386 2386 #ifndef USE_REM_STUBS 2387 2387 Assert(VALID_PTR(pfnREMR3NotifyHandlerPhysicalRegister)); 2388 pfnREMR3NotifyHandlerPhysicalRegister(pVM, enm Type, GCPhys, cb, fHasHCHandler);2389 #endif 2390 } 2391 2392 REMR3DECL(void) REMR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)2388 pfnREMR3NotifyHandlerPhysicalRegister(pVM, enmKind, GCPhys, cb, fHasHCHandler); 2389 #endif 2390 } 2391 2392 REMR3DECL(void) REMR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 2393 2393 { 2394 2394 #ifndef USE_REM_STUBS 2395 2395 Assert(VALID_PTR(pfnREMR3NotifyHandlerPhysicalDeregister)); 2396 pfnREMR3NotifyHandlerPhysicalDeregister(pVM, enm Type, GCPhys, cb, fHasHCHandler, fRestoreAsRAM);2397 #endif 2398 } 2399 2400 REMR3DECL(void) REMR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)2396 pfnREMR3NotifyHandlerPhysicalDeregister(pVM, enmKind, GCPhys, cb, fHasHCHandler, fRestoreAsRAM); 2397 #endif 2398 } 2399 2400 REMR3DECL(void) REMR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 2401 2401 { 2402 2402 #ifndef USE_REM_STUBS 2403 2403 Assert(VALID_PTR(pfnREMR3NotifyHandlerPhysicalModify)); 2404 pfnREMR3NotifyHandlerPhysicalModify(pVM, enm Type, GCPhysOld, GCPhysNew, cb, fHasHCHandler, fRestoreAsRAM);2404 pfnREMR3NotifyHandlerPhysicalModify(pVM, enmKind, GCPhysOld, GCPhysNew, cb, fHasHCHandler, fRestoreAsRAM); 2405 2405 #endif 2406 2406 } -
trunk/src/recompiler/VBoxRecompiler.c
r55048 r55493 116 116 static void remR3HandlerWriteU32(void *pvVM, target_phys_addr_t GCPhys, uint32_t u32); 117 117 118 static void remR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM); 119 static void remR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler); 120 static void remR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM); 118 static void remR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM); 119 static void remR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler); 120 static void remR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM); 121 121 122 122 123 /******************************************************************************* … … 3090 3091 case REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER: 3091 3092 remR3NotifyHandlerPhysicalRegister(pVM, 3092 pCur->u.PhysicalRegister.enm Type,3093 pCur->u.PhysicalRegister.enmKind, 3093 3094 pCur->u.PhysicalRegister.GCPhys, 3094 3095 pCur->u.PhysicalRegister.cb, … … 3098 3099 case REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER: 3099 3100 remR3NotifyHandlerPhysicalDeregister(pVM, 3100 pCur->u.PhysicalDeregister.enm Type,3101 pCur->u.PhysicalDeregister.enmKind, 3101 3102 pCur->u.PhysicalDeregister.GCPhys, 3102 3103 pCur->u.PhysicalDeregister.cb, … … 3107 3108 case REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY: 3108 3109 remR3NotifyHandlerPhysicalModify(pVM, 3109 pCur->u.PhysicalModify.enm Type,3110 pCur->u.PhysicalModify.enmKind, 3110 3111 pCur->u.PhysicalModify.GCPhysOld, 3111 3112 pCur->u.PhysicalModify.GCPhysNew, … … 3311 3312 * 3312 3313 * @param pVM VM Handle. 3313 * @param enm Type Handler type.3314 * @param enmKind Kind of access handler. 3314 3315 * @param GCPhys Handler range address. 3315 3316 * @param cb Size of the handler range. … … 3319 3320 * Handler memory type to memory which has no HC handler. 3320 3321 */ 3321 static void remR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler) 3322 { 3323 Log(("REMR3NotifyHandlerPhysicalRegister: enmType=%d GCPhys=%RGp cb=%RGp fHasHCHandler=%d\n", 3324 enmType, GCPhys, cb, fHasHCHandler)); 3322 static void remR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, 3323 bool fHasHCHandler) 3324 { 3325 Log(("REMR3NotifyHandlerPhysicalRegister: enmKind=%d GCPhys=%RGp cb=%RGp fHasHCHandler=%d\n", 3326 enmKind, GCPhys, cb, fHasHCHandler)); 3325 3327 3326 3328 VM_ASSERT_EMT(pVM); … … 3332 3334 3333 3335 PDMCritSectEnter(&pVM->rem.s.CritSectRegister, VERR_SEM_BUSY); 3334 if (enm Type == PGMPHYSHANDLERTYPE_MMIO)3336 if (enmKind == PGMPHYSHANDLERKIND_MMIO) 3335 3337 cpu_register_physical_memory_offset(GCPhys, cb, pVM->rem.s.iMMIOMemType, GCPhys); 3336 3338 else if (fHasHCHandler) … … 3345 3347 * 3346 3348 * @param pVM VM Handle. 3347 * @param enm Type Handler type.3349 * @param enmKind Kind of access handler. 3348 3350 * @param GCPhys Handler range address. 3349 3351 * @param cb Size of the handler range. … … 3353 3355 * Handler memory type to memory which has no HC handler. 3354 3356 */ 3355 REMR3DECL(void) REMR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler) 3357 REMR3DECL(void) REMR3NotifyHandlerPhysicalRegister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, 3358 bool fHasHCHandler) 3356 3359 { 3357 3360 REMR3ReplayHandlerNotifications(pVM); 3358 3361 3359 remR3NotifyHandlerPhysicalRegister(pVM, enm Type, GCPhys, cb, fHasHCHandler);3362 remR3NotifyHandlerPhysicalRegister(pVM, enmKind, GCPhys, cb, fHasHCHandler); 3360 3363 } 3361 3364 … … 3364 3367 * 3365 3368 * @param pVM VM Handle. 3366 * @param enm Type Handler type.3369 * @param enmKind Kind of access handler. 3367 3370 * @param GCPhys Handler range address. 3368 3371 * @param cb Size of the handler range. … … 3370 3373 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 3371 3374 */ 3372 static void remR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 3373 { 3374 Log(("REMR3NotifyHandlerPhysicalDeregister: enmType=%d GCPhys=%RGp cb=%RGp fHasHCHandler=%RTbool fRestoreAsRAM=%RTbool RAM=%08x\n", 3375 enmType, GCPhys, cb, fHasHCHandler, fRestoreAsRAM, MMR3PhysGetRamSize(pVM))); 3375 static void remR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, 3376 bool fHasHCHandler, bool fRestoreAsRAM) 3377 { 3378 Log(("REMR3NotifyHandlerPhysicalDeregister: enmKind=%d GCPhys=%RGp cb=%RGp fHasHCHandler=%RTbool fRestoreAsRAM=%RTbool RAM=%08x\n", 3379 enmKind, GCPhys, cb, fHasHCHandler, fRestoreAsRAM, MMR3PhysGetRamSize(pVM))); 3376 3380 VM_ASSERT_EMT(pVM); 3377 3381 … … 3381 3385 PDMCritSectEnter(&pVM->rem.s.CritSectRegister, VERR_SEM_BUSY); 3382 3386 /** @todo this isn't right, MMIO can (in theory) be restored as RAM. */ 3383 if (enm Type == PGMPHYSHANDLERTYPE_MMIO)3387 if (enmKind == PGMPHYSHANDLERKIND_MMIO) 3384 3388 cpu_register_physical_memory_offset(GCPhys, cb, IO_MEM_UNASSIGNED, GCPhys); 3385 3389 else if (fHasHCHandler) … … 3406 3410 * 3407 3411 * @param pVM VM Handle. 3408 * @param enm Type Handler type.3412 * @param enmKind Kind of access handler. 3409 3413 * @param GCPhys Handler range address. 3410 3414 * @param cb Size of the handler range. … … 3412 3416 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 3413 3417 */ 3414 REMR3DECL(void) REMR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)3418 REMR3DECL(void) REMR3NotifyHandlerPhysicalDeregister(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhys, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 3415 3419 { 3416 3420 REMR3ReplayHandlerNotifications(pVM); 3417 remR3NotifyHandlerPhysicalDeregister(pVM, enm Type, GCPhys, cb, fHasHCHandler, fRestoreAsRAM);3421 remR3NotifyHandlerPhysicalDeregister(pVM, enmKind, GCPhys, cb, fHasHCHandler, fRestoreAsRAM); 3418 3422 } 3419 3423 … … 3423 3427 * 3424 3428 * @param pVM VM Handle. 3425 * @param enm Type Handler type.3429 * @param enmKind Kind of access handler. 3426 3430 * @param GCPhysOld Old handler range address. 3427 3431 * @param GCPhysNew New handler range address. … … 3430 3434 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 3431 3435 */ 3432 static void remR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)3433 { 3434 Log(("REMR3NotifyHandlerPhysicalModify: enm Type=%d GCPhysOld=%RGp GCPhysNew=%RGp cb=%RGp fHasHCHandler=%RTbool fRestoreAsRAM=%RTbool\n",3435 enmType, GCPhysOld, GCPhysNew, cb, fHasHCHandler, fRestoreAsRAM));3436 static void remR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 3437 { 3438 Log(("REMR3NotifyHandlerPhysicalModify: enmKind=%d GCPhysOld=%RGp GCPhysNew=%RGp cb=%RGp fHasHCHandler=%RTbool fRestoreAsRAM=%RTbool\n", 3439 enmKind, GCPhysOld, GCPhysNew, cb, fHasHCHandler, fRestoreAsRAM)); 3436 3440 VM_ASSERT_EMT(pVM); 3437 AssertReleaseMsg(enm Type != PGMPHYSHANDLERTYPE_MMIO, ("enmType=%d\n", enmType));3441 AssertReleaseMsg(enmKind != PGMPHYSHANDLERKIND_MMIO, ("enmKind=%d\n", enmKind)); 3438 3442 3439 3443 if (fHasHCHandler) … … 3471 3475 * 3472 3476 * @param pVM VM Handle. 3473 * @param enm Type Handler type.3477 * @param enmKind Kind of access handler. 3474 3478 * @param GCPhysOld Old handler range address. 3475 3479 * @param GCPhysNew New handler range address. … … 3478 3482 * @param fRestoreAsRAM Whether the to restore it as normal RAM or as unassigned memory. 3479 3483 */ 3480 REMR3DECL(void) REMR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLER TYPE enmType, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM)3484 REMR3DECL(void) REMR3NotifyHandlerPhysicalModify(PVM pVM, PGMPHYSHANDLERKIND enmKind, RTGCPHYS GCPhysOld, RTGCPHYS GCPhysNew, RTGCPHYS cb, bool fHasHCHandler, bool fRestoreAsRAM) 3481 3485 { 3482 3486 REMR3ReplayHandlerNotifications(pVM); 3483 3487 3484 remR3NotifyHandlerPhysicalModify(pVM, enm Type, GCPhysOld, GCPhysNew, cb, fHasHCHandler, fRestoreAsRAM);3488 remR3NotifyHandlerPhysicalModify(pVM, enmKind, GCPhysOld, GCPhysNew, cb, fHasHCHandler, fRestoreAsRAM); 3485 3489 } 3486 3490
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