DevBusLogic.cpp@ 64401

Last change on this file since 64401 was 64387, checked in by vboxsync, 8 years ago
PDM,Devices: Some PCI device type cleanup.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 165.8 KB

Line
1	/* $Id: DevBusLogic.cpp 64387 2016-10-24 14:06:02Z vboxsync $ */
2	/** @file
3	* VBox storage devices - BusLogic SCSI host adapter BT-958.
4	*
5	* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual.
6	*/
7
8	/*
9	* Copyright (C) 2006-2016 Oracle Corporation
10	*
11	* This file is part of VirtualBox Open Source Edition (OSE), as
12	* available from http://www.virtualbox.org. This file is free software;
13	* you can redistribute it and/or modify it under the terms of the GNU
14	* General Public License (GPL) as published by the Free Software
15	* Foundation, in version 2 as it comes in the "COPYING" file of the
16	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18	*/
19
20
21	/*********************************************************************************************************************************
22	* Header Files *
23	*********************************************************************************************************************************/
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmstorageifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47	/** Maximum number of attached devices the adapter can handle. */
48	#define BUSLOGIC_MAX_DEVICES 16
49
50	/** Maximum number of scatter gather elements this device can handle. */
51	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
52
53	/** Size of the command buffer. */
54	#define BUSLOGIC_COMMAND_SIZE_MAX 53
55
56	/** Size of the reply buffer. */
57	#define BUSLOGIC_REPLY_SIZE_MAX 64
58
59	/** Custom fixed I/O ports for BIOS controller access.
60	* Note that these should not be in the ISA range (below 400h) to avoid
61	* conflicts with ISA device probing. Addresses in the 300h-340h range should be
62	* especially avoided.
63	*/
64	#define BUSLOGIC_BIOS_IO_PORT 0x430
65
66	/** State saved version. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 4
68
69	/** Saved state version before the suspend on error feature was implemented. */
70	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
71	/** Saved state version before 24-bit mailbox support was implemented. */
72	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX 2
73	/** Saved state version before command buffer size was raised. */
74	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE 3
75
76	/** Command buffer size in old saved states. */
77	#define BUSLOGIC_COMMAND_SIZE_OLD 5
78
79	/** The duration of software-initiated reset (in nano seconds).
80	* Not documented, set to 50 ms. */
81	#define BUSLOGIC_RESET_DURATION_NS UINT64_C(50000000)
82
83
84	/*********************************************************************************************************************************
85	* Structures and Typedefs *
86	*********************************************************************************************************************************/
87	/**
88	* State of a device attached to the buslogic host adapter.
89	*
90	* @implements PDMIBASE
91	* @implements PDMISCSIPORT
92	* @implements PDMILEDPORTS
93	*/
94	typedef struct BUSLOGICDEVICE
95	{
96	/** Pointer to the owning buslogic device instance. - R3 pointer */
97	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
98	/** Pointer to the owning buslogic device instance. - R0 pointer */
99	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
100	/** Pointer to the owning buslogic device instance. - RC pointer */
101	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
102
103	/** Flag whether device is present. */
104	bool fPresent;
105	/** LUN of the device. */
106	RTUINT iLUN;
107
108	#if HC_ARCH_BITS == 64
109	uint32_t Alignment0;
110	#endif
111
112	/** Our base interface. */
113	PDMIBASE IBase;
114	/** Media port interface. */
115	PDMIMEDIAPORT IMediaPort;
116	/** Extended media port interface. */
117	PDMIMEDIAEXPORT IMediaExPort;
118	/** Led interface. */
119	PDMILEDPORTS ILed;
120	/** Pointer to the attached driver's base interface. */
121	R3PTRTYPE(PPDMIBASE) pDrvBase;
122	/** Pointer to the attached driver's media interface. */
123	R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
124	/** Pointer to the attached driver's extended media interface. */
125	R3PTRTYPE(PPDMIMEDIAEX) pDrvMediaEx;
126	/** The status LED state for this device. */
127	PDMLED Led;
128
129	#if HC_ARCH_BITS == 64
130	uint32_t Alignment1;
131	#endif
132
133	/** Number of outstanding tasks on the port. */
134	volatile uint32_t cOutstandingRequests;
135
136	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
137
138	/**
139	* Commands the BusLogic adapter supports.
140	*/
141	enum BUSLOGICCOMMAND
142	{
143	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
144	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
145	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
146	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
147	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
148	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
149	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
150	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
151	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
152	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
153	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
154	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
155	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
156	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
157	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
158	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
159	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
160	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
161	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
162	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
163	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
164	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
165	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
166	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
167	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
168	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
169	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
170	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
171	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
172	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
173	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
174	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
175	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
176	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
177	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
178	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
179	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
180	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
181	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
182	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
183	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
184	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
185	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
186	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
187	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
188	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
189	} BUSLOGICCOMMAND;
190
191	#pragma pack(1)
192	/**
193	* Auto SCSI structure which is located
194	* in host adapter RAM and contains several
195	* configuration parameters.
196	*/
197	typedef struct AutoSCSIRam
198	{
199	uint8_t aInternalSignature[2];
200	uint8_t cbInformation;
201	uint8_t aHostAdaptertype[6];
202	uint8_t uReserved1;
203	bool fFloppyEnabled : 1;
204	bool fFloppySecondary : 1;
205	bool fLevelSensitiveInterrupt : 1;
206	unsigned char uReserved2 : 2;
207	unsigned char uSystemRAMAreForBIOS : 3;
208	unsigned char uDMAChannel : 7;
209	bool fDMAAutoConfiguration : 1;
210	unsigned char uIrqChannel : 7;
211	bool fIrqAutoConfiguration : 1;
212	uint8_t uDMATransferRate;
213	uint8_t uSCSIId;
214	bool fLowByteTerminated : 1;
215	bool fParityCheckingEnabled : 1;
216	bool fHighByteTerminated : 1;
217	bool fNoisyCablingEnvironment : 1;
218	bool fFastSynchronousNeogtiation : 1;
219	bool fBusResetEnabled : 1;
220	bool fReserved3 : 1;
221	bool fActiveNegotiationEnabled : 1;
222	uint8_t uBusOnDelay;
223	uint8_t uBusOffDelay;
224	bool fHostAdapterBIOSEnabled : 1;
225	bool fBIOSRedirectionOfInt19 : 1;
226	bool fExtendedTranslation : 1;
227	bool fMapRemovableAsFixed : 1;
228	bool fReserved4 : 1;
229	bool fBIOSSupportsMoreThan2Drives : 1;
230	bool fBIOSInterruptMode : 1;
231	bool fFlopticalSupport : 1;
232	uint16_t u16DeviceEnabledMask;
233	uint16_t u16WidePermittedMask;
234	uint16_t u16FastPermittedMask;
235	uint16_t u16SynchronousPermittedMask;
236	uint16_t u16DisconnectPermittedMask;
237	uint16_t u16SendStartUnitCommandMask;
238	uint16_t u16IgnoreInBIOSScanMask;
239	unsigned char uPCIInterruptPin : 2;
240	unsigned char uHostAdapterIoPortAddress : 2;
241	bool fStrictRoundRobinMode : 1;
242	bool fVesaBusSpeedGreaterThan33MHz : 1;
243	bool fVesaBurstWrite : 1;
244	bool fVesaBurstRead : 1;
245	uint16_t u16UltraPermittedMask;
246	uint32_t uReserved5;
247	uint8_t uReserved6;
248	uint8_t uAutoSCSIMaximumLUN;
249	bool fReserved7 : 1;
250	bool fSCAMDominant : 1;
251	bool fSCAMenabled : 1;
252	bool fSCAMLevel2 : 1;
253	unsigned char uReserved8 : 4;
254	bool fInt13Extension : 1;
255	bool fReserved9 : 1;
256	bool fCDROMBoot : 1;
257	unsigned char uReserved10 : 5;
258	unsigned char uBootTargetId : 4;
259	unsigned char uBootChannel : 4;
260	bool fForceBusDeviceScanningOrder : 1;
261	unsigned char uReserved11 : 7;
262	uint16_t u16NonTaggedToAlternateLunPermittedMask;
263	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
264	uint8_t aReserved12[10];
265	uint8_t aManufacturingDiagnostic[2];
266	uint16_t u16Checksum;
267	} AutoSCSIRam, *PAutoSCSIRam;
268	AssertCompileSize(AutoSCSIRam, 64);
269	#pragma pack()
270
271	/**
272	* The local Ram.
273	*/
274	typedef union HostAdapterLocalRam
275	{
276	/** Byte view. */
277	uint8_t u8View[256];
278	/** Structured view. */
279	struct
280	{
281	/** Offset 0 - 63 is for BIOS. */
282	uint8_t u8Bios[64];
283	/** Auto SCSI structure. */
284	AutoSCSIRam autoSCSIData;
285	} structured;
286	} HostAdapterLocalRam, *PHostAdapterLocalRam;
287	AssertCompileSize(HostAdapterLocalRam, 256);
288
289
290	/** Ugly 24-bit big-endian addressing. */
291	typedef struct
292	{
293	uint8_t hi;
294	uint8_t mid;
295	uint8_t lo;
296	} Addr24, Len24;
297	AssertCompileSize(Addr24, 3);
298
299	#define ADDR_TO_U32(x) (((x).hi << 16) \| ((x).mid << 8) \| (x).lo)
300	#define LEN_TO_U32 ADDR_TO_U32
301	#define U32_TO_ADDR(a, x) do {(a).hi = (x) >> 16; (a).mid = (x) >> 8; (a).lo = (x);} while(0)
302	#define U32_TO_LEN U32_TO_ADDR
303
304	/** @name Compatible ISA base I/O port addresses. Disabled if zero.
305	* @{ */
306	#define NUM_ISA_BASES 8
307	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
308	#define ISA_BASE_DISABLED 6
309
310	#ifdef IN_RING3
311	static uint16_t const g_aISABases[NUM_ISA_BASES] =
312	{
313	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
314	};
315	#endif
316	/** @} */
317
318	/** Pointer to a task state structure. */
319	typedef struct BUSLOGICREQ *PBUSLOGICREQ;
320
321	/**
322	* Main BusLogic device state.
323	*
324	* @extends PDMPCIDEV
325	* @implements PDMILEDPORTS
326	*/
327	typedef struct BUSLOGIC
328	{
329	/** The PCI device structure. */
330	PDMPCIDEV dev;
331	/** Pointer to the device instance - HC ptr */
332	PPDMDEVINSR3 pDevInsR3;
333	/** Pointer to the device instance - R0 ptr */
334	PPDMDEVINSR0 pDevInsR0;
335	/** Pointer to the device instance - RC ptr. */
336	PPDMDEVINSRC pDevInsRC;
337
338	/** Whether R0 is enabled. */
339	bool fR0Enabled;
340	/** Whether RC is enabled. */
341	bool fGCEnabled;
342
343	/** Base address of the I/O ports. */
344	RTIOPORT IOPortBase;
345	/** Base address of the memory mapping. */
346	RTGCPHYS MMIOBase;
347	/** Status register - Readonly. */
348	volatile uint8_t regStatus;
349	/** Interrupt register - Readonly. */
350	volatile uint8_t regInterrupt;
351	/** Geometry register - Readonly. */
352	volatile uint8_t regGeometry;
353	/** Pending (delayed) interrupt. */
354	uint8_t uPendingIntr;
355
356	/** Local RAM for the fetch hostadapter local RAM request.
357	* I don't know how big the buffer really is but the maximum
358	* seems to be 256 bytes because the offset and count field in the command request
359	* are only one byte big.
360	*/
361	HostAdapterLocalRam LocalRam;
362
363	/** Command code the guest issued. */
364	uint8_t uOperationCode;
365	/** Buffer for the command parameters the adapter is currently receiving from the guest.
366	* Size of the largest command which is possible.
367	*/
368	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
369	/** Current position in the command buffer. */
370	uint8_t iParameter;
371	/** Parameters left until the command is complete. */
372	uint8_t cbCommandParametersLeft;
373
374	/** Whether we are using the RAM or reply buffer. */
375	bool fUseLocalRam;
376	/** Buffer to store reply data from the controller to the guest. */
377	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
378	/** Position in the buffer we are reading next. */
379	uint8_t iReply;
380	/** Bytes left until the reply buffer is empty. */
381	uint8_t cbReplyParametersLeft;
382
383	/** Flag whether IRQs are enabled. */
384	bool fIRQEnabled;
385	/** Flag whether the ISA I/O port range is disabled
386	* to prevent the BIOS to access the device. */
387	bool fISAEnabled; /*< @todo unused, to be removed /
388	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
389	bool fMbxIs24Bit;
390	/** ISA I/O port base (encoded in FW-compatible format). */
391	uint8_t uISABaseCode;
392
393	/** ISA I/O port base (disabled if zero). */
394	RTIOPORT IOISABase;
395	/** Default ISA I/O port base in FW-compatible format. */
396	uint8_t uDefaultISABaseCode;
397
398	/** Number of mailboxes the guest set up. */
399	uint32_t cMailbox;
400
401	#if HC_ARCH_BITS == 64
402	uint32_t Alignment0;
403	#endif
404
405	/** Time when HBA reset was last initiated. / /< @todo does this need to be saved? /
406	uint64_t u64ResetTime;
407	/** Physical base address of the outgoing mailboxes. */
408	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
409	/** Current outgoing mailbox position. */
410	uint32_t uMailboxOutgoingPositionCurrent;
411	/** Number of mailboxes ready. */
412	volatile uint32_t cMailboxesReady;
413	/** Whether a notification to R3 was sent. */
414	volatile bool fNotificationSent;
415
416	#if HC_ARCH_BITS == 64
417	uint32_t Alignment1;
418	#endif
419
420	/** Physical base address of the incoming mailboxes. */
421	RTGCPHYS GCPhysAddrMailboxIncomingBase;
422	/** Current incoming mailbox position. */
423	uint32_t uMailboxIncomingPositionCurrent;
424
425	/** Whether strict round robin is enabled. */
426	bool fStrictRoundRobinMode;
427	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
428	bool fExtendedLunCCBFormat;
429
430	/** Queue to send tasks to R3. - HC ptr */
431	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
432	/** Queue to send tasks to R3. - HC ptr */
433	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
434	/** Queue to send tasks to R3. - RC ptr */
435	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
436
437	uint32_t Alignment2;
438
439	/** Critical section protecting access to the interrupt status register. */
440	PDMCRITSECT CritSectIntr;
441
442	/** Device state for BIOS access. */
443	VBOXSCSI VBoxSCSI;
444
445	/** BusLogic device states. */
446	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
447
448	/** The base interface.
449	* @todo use PDMDEVINS::IBase */
450	PDMIBASE IBase;
451	/** Status Port - Leds interface. */
452	PDMILEDPORTS ILeds;
453	/** Partner of ILeds. */
454	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
455
456	#if HC_ARCH_BITS == 64
457	uint32_t Alignment3;
458	#endif
459
460	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
461	* a port is entering the idle state. */
462	bool volatile fSignalIdle;
463	/** Flag whether the worker thread is sleeping. */
464	volatile bool fWrkThreadSleeping;
465	/** Flag whether a request from the BIOS is pending which the
466	* worker thread needs to process. */
467	volatile bool fBiosReqPending;
468
469	/** The support driver session handle. */
470	R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
471	/** Worker thread. */
472	R3PTRTYPE(PPDMTHREAD) pThreadWrk;
473	/** The event semaphore the processing thread waits on. */
474	SUPSEMEVENT hEvtProcess;
475
476	/** Pointer to the array of addresses to redo. */
477	R3PTRTYPE(PRTGCPHYS) paGCPhysAddrCCBRedo;
478	/** Number of addresses the redo array holds. */
479	uint32_t cReqsRedo;
480
481	#ifdef LOG_ENABLED
482	volatile uint32_t cInMailboxesReady;
483	#else
484	# if HC_ARCH_BITS == 64
485	uint32_t Alignment4;
486	# endif
487	#endif
488
489	} BUSLOGIC, *PBUSLOGIC;
490
491	/** Register offsets in the I/O port space. */
492	#define BUSLOGIC_REGISTER_CONTROL 0 /*< Writeonly /
493	/** Fields for the control register. */
494	# define BL_CTRL_RSBUS RT_BIT(4) /* Reset SCSI Bus. */
495	# define BL_CTRL_RINT RT_BIT(5) /* Reset Interrupt. */
496	# define BL_CTRL_RSOFT RT_BIT(6) /* Soft Reset. */
497	# define BL_CTRL_RHARD RT_BIT(7) /* Hard Reset. */
498
499	#define BUSLOGIC_REGISTER_STATUS 0 /*< Readonly /
500	/** Fields for the status register. */
501	# define BL_STAT_CMDINV RT_BIT(0) /* Command Invalid. */
502	# define BL_STAT_DIRRDY RT_BIT(2) /* Data In Register Ready. */
503	# define BL_STAT_CPRBSY RT_BIT(3) /* Command/Parameter Out Register Busy. */
504	# define BL_STAT_HARDY RT_BIT(4) /* Host Adapter Ready. */
505	# define BL_STAT_INREQ RT_BIT(5) /* Initialization Required. */
506	# define BL_STAT_DFAIL RT_BIT(6) /* Diagnostic Failure. */
507	# define BL_STAT_DACT RT_BIT(7) /* Diagnistic Active. */
508
509	#define BUSLOGIC_REGISTER_COMMAND 1 /*< Writeonly /
510	#define BUSLOGIC_REGISTER_DATAIN 1 /*< Readonly /
511	#define BUSLOGIC_REGISTER_INTERRUPT 2 /*< Readonly /
512	/** Fields for the interrupt register. */
513	# define BL_INTR_IMBL RT_BIT(0) /* Incoming Mailbox Loaded. */
514	# define BL_INTR_OMBR RT_BIT(1) /* Outgoing Mailbox Available. */
515	# define BL_INTR_CMDC RT_BIT(2) /* Command Complete. */
516	# define BL_INTR_RSTS RT_BIT(3) /* SCSI Bus Reset State. */
517	# define BL_INTR_INTV RT_BIT(7) /* Interrupt Valid. */
518
519	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
520	# define BL_GEOM_XLATEN RT_BIT(7) /* Extended geometry translation enabled. */
521
522	/** Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
523	typedef struct ReplyInquirePCIHostAdapterInformation
524	{
525	uint8_t IsaIOPort;
526	uint8_t IRQ;
527	unsigned char LowByteTerminated : 1;
528	unsigned char HighByteTerminated : 1;
529	unsigned char uReserved : 2; /* Reserved. */
530	unsigned char JP1 : 1; /* Whatever that means. */
531	unsigned char JP2 : 1; /* Whatever that means. */
532	unsigned char JP3 : 1; /* Whatever that means. */
533	/** Whether the provided info is valid. */
534	unsigned char InformationIsValid: 1;
535	uint8_t uReserved2; /* Reserved. */
536	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
537	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
538
539	/** Structure for the INQUIRE_CONFIGURATION reply. */
540	typedef struct ReplyInquireConfiguration
541	{
542	unsigned char uReserved1 : 5;
543	bool fDmaChannel5 : 1;
544	bool fDmaChannel6 : 1;
545	bool fDmaChannel7 : 1;
546	bool fIrqChannel9 : 1;
547	bool fIrqChannel10 : 1;
548	bool fIrqChannel11 : 1;
549	bool fIrqChannel12 : 1;
550	unsigned char uReserved2 : 1;
551	bool fIrqChannel14 : 1;
552	bool fIrqChannel15 : 1;
553	unsigned char uReserved3 : 1;
554	unsigned char uHostAdapterId : 4;
555	unsigned char uReserved4 : 4;
556	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
557	AssertCompileSize(ReplyInquireConfiguration, 3);
558
559	/** Structure for the INQUIRE_SETUP_INFORMATION reply. */
560	typedef struct ReplyInquireSetupInformationSynchronousValue
561	{
562	unsigned char uOffset : 4;
563	unsigned char uTransferPeriod : 3;
564	bool fSynchronous : 1;
565	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
566	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
567
568	typedef struct ReplyInquireSetupInformation
569	{
570	bool fSynchronousInitiationEnabled : 1;
571	bool fParityCheckingEnabled : 1;
572	unsigned char uReserved1 : 6;
573	uint8_t uBusTransferRate;
574	uint8_t uPreemptTimeOnBus;
575	uint8_t uTimeOffBus;
576	uint8_t cMailbox;
577	Addr24 MailboxAddress;
578	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
579	uint8_t uDisconnectPermittedId0To7;
580	uint8_t uSignature;
581	uint8_t uCharacterD;
582	uint8_t uHostBusType;
583	uint8_t uWideTransferPermittedId0To7;
584	uint8_t uWideTransfersActiveId0To7;
585	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
586	uint8_t uDisconnectPermittedId8To15;
587	uint8_t uReserved2;
588	uint8_t uWideTransferPermittedId8To15;
589	uint8_t uWideTransfersActiveId8To15;
590	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
591	AssertCompileSize(ReplyInquireSetupInformation, 34);
592
593	/** Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
594	#pragma pack(1)
595	typedef struct ReplyInquireExtendedSetupInformation
596	{
597	uint8_t uBusType;
598	uint8_t uBiosAddress;
599	uint16_t u16ScatterGatherLimit;
600	uint8_t cMailbox;
601	uint32_t uMailboxAddressBase;
602	unsigned char uReserved1 : 2;
603	bool fFastEISA : 1;
604	unsigned char uReserved2 : 3;
605	bool fLevelSensitiveInterrupt : 1;
606	unsigned char uReserved3 : 1;
607	unsigned char aFirmwareRevision[3];
608	bool fHostWideSCSI : 1;
609	bool fHostDifferentialSCSI : 1;
610	bool fHostSupportsSCAM : 1;
611	bool fHostUltraSCSI : 1;
612	bool fHostSmartTermination : 1;
613	unsigned char uReserved4 : 3;
614	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
615	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
616	#pragma pack()
617
618	/** Structure for the INITIALIZE EXTENDED MAILBOX request. */
619	#pragma pack(1)
620	typedef struct RequestInitializeExtendedMailbox
621	{
622	/** Number of mailboxes in guest memory. */
623	uint8_t cMailbox;
624	/** Physical address of the first mailbox. */
625	uint32_t uMailboxBaseAddress;
626	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
627	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
628	#pragma pack()
629
630	/** Structure for the INITIALIZE MAILBOX request. */
631	typedef struct
632	{
633	/** Number of mailboxes to set up. */
634	uint8_t cMailbox;
635	/** Physical address of the first mailbox. */
636	Addr24 aMailboxBaseAddr;
637	} RequestInitMbx, *PRequestInitMbx;
638	AssertCompileSize(RequestInitMbx, 4);
639
640	/**
641	* Structure of a mailbox in guest memory.
642	* The incoming and outgoing mailbox have the same size
643	* but the incoming one has some more fields defined which
644	* are marked as reserved in the outgoing one.
645	* The last field is also different from the type.
646	* For outgoing mailboxes it is the action and
647	* for incoming ones the completion status code for the task.
648	* We use one structure for both types.
649	*/
650	typedef struct Mailbox32
651	{
652	/** Physical address of the CCB structure in the guest memory. */
653	uint32_t u32PhysAddrCCB;
654	/** Type specific data. */
655	union
656	{
657	/** For outgoing mailboxes. */
658	struct
659	{
660	/** Reserved */
661	uint8_t uReserved[3];
662	/** Action code. */
663	uint8_t uActionCode;
664	} out;
665	/** For incoming mailboxes. */
666	struct
667	{
668	/** The host adapter status after finishing the request. */
669	uint8_t uHostAdapterStatus;
670	/** The status of the device which executed the request after executing it. */
671	uint8_t uTargetDeviceStatus;
672	/** Reserved. */
673	uint8_t uReserved;
674	/** The completion status code of the request. */
675	uint8_t uCompletionCode;
676	} in;
677	} u;
678	} Mailbox32, *PMailbox32;
679	AssertCompileSize(Mailbox32, 8);
680
681	/** Old style 24-bit mailbox entry. */
682	typedef struct Mailbox24
683	{
684	/** Mailbox command (incoming) or state (outgoing). */
685	uint8_t uCmdState;
686	/** Physical address of the CCB structure in the guest memory. */
687	Addr24 aPhysAddrCCB;
688	} Mailbox24, *PMailbox24;
689	AssertCompileSize(Mailbox24, 4);
690
691	/**
692	* Action codes for outgoing mailboxes.
693	*/
694	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
695	{
696	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
697	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
698	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
699	};
700
701	/**
702	* Completion codes for incoming mailboxes.
703	*/
704	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
705	{
706	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
707	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
708	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
709	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
710	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
711	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
712	};
713
714	/**
715	* Host adapter status for incoming mailboxes.
716	*/
717	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
718	{
719	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
720	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
721	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
722	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
723	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
724	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
725	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
726	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
727	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
728	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
729	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
730	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
731	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
732	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
733	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
734	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
735	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
736	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
737	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
738	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
739	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
740	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
741	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
742	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
743	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
744	};
745
746	/**
747	* Device status codes for incoming mailboxes.
748	*/
749	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
750	{
751	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
752	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
753	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
754	};
755
756	/**
757	* Opcode types for CCB.
758	*/
759	enum BUSLOGIC_CCB_OPCODE
760	{
761	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
762	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
763	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
764	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
765	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
766	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
767	};
768
769	/**
770	* Data transfer direction.
771	*/
772	enum BUSLOGIC_CCB_DIRECTION
773	{
774	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
775	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
776	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
777	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
778	};
779
780	/**
781	* The command control block for a SCSI request.
782	*/
783	typedef struct CCB32
784	{
785	/** Opcode. */
786	uint8_t uOpcode;
787	/** Reserved */
788	unsigned char uReserved1 : 3;
789	/** Data direction for the request. */
790	unsigned char uDataDirection : 2;
791	/** Whether the request is tag queued. */
792	bool fTagQueued : 1;
793	/** Queue tag mode. */
794	unsigned char uQueueTag : 2;
795	/** Length of the SCSI CDB. */
796	uint8_t cbCDB;
797	/** Sense data length. */
798	uint8_t cbSenseData;
799	/** Data length. */
800	uint32_t cbData;
801	/** Data pointer.
802	* This points to the data region or a scatter gather list based on the opcode.
803	*/
804	uint32_t u32PhysAddrData;
805	/** Reserved. */
806	uint8_t uReserved2[2];
807	/** Host adapter status. */
808	uint8_t uHostAdapterStatus;
809	/** Device adapter status. */
810	uint8_t uDeviceStatus;
811	/** The device the request is sent to. */
812	uint8_t uTargetId;
813	/*The LUN in the device. /
814	unsigned char uLogicalUnit : 5;
815	/** Legacy tag. */
816	bool fLegacyTagEnable : 1;
817	/** Legacy queue tag. */
818	unsigned char uLegacyQueueTag : 2;
819	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
820	uint8_t abCDB[12];
821	/** Reserved. */
822	uint8_t uReserved3[6];
823	/** Sense data pointer. */
824	uint32_t u32PhysAddrSenseData;
825	} CCB32, *PCCB32;
826	AssertCompileSize(CCB32, 40);
827
828
829	/**
830	* The 24-bit command control block.
831	*/
832	typedef struct CCB24
833	{
834	/** Opcode. */
835	uint8_t uOpcode;
836	/** The LUN in the device. */
837	unsigned char uLogicalUnit : 3;
838	/** Data direction for the request. */
839	unsigned char uDataDirection : 2;
840	/** The target device ID. */
841	unsigned char uTargetId : 3;
842	/** Length of the SCSI CDB. */
843	uint8_t cbCDB;
844	/** Sense data length. */
845	uint8_t cbSenseData;
846	/** Data length. */
847	Len24 acbData;
848	/** Data pointer.
849	* This points to the data region or a scatter gather list based on the opc
850	*/
851	Addr24 aPhysAddrData;
852	/** Pointer to next CCB for linked commands. */
853	Addr24 aPhysAddrLink;
854	/** Command linking identifier. */
855	uint8_t uLinkId;
856	/** Host adapter status. */
857	uint8_t uHostAdapterStatus;
858	/** Device adapter status. */
859	uint8_t uDeviceStatus;
860	/** Two unused bytes. */
861	uint8_t aReserved[2];
862	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
863	uint8_t abCDB[12];
864	} CCB24, *PCCB24;
865	AssertCompileSize(CCB24, 30);
866
867	/**
868	* The common 24-bit/32-bit command control block. The 32-bit CCB is laid out
869	* such that many fields are in the same location as in the older 24-bit CCB.
870	*/
871	typedef struct CCBC
872	{
873	/** Opcode. */
874	uint8_t uOpcode;
875	/** The LUN in the device. */
876	unsigned char uPad1 : 3;
877	/** Data direction for the request. */
878	unsigned char uDataDirection : 2;
879	/** The target device ID. */
880	unsigned char uPad2 : 3;
881	/** Length of the SCSI CDB. */
882	uint8_t cbCDB;
883	/** Sense data length. */
884	uint8_t cbSenseData;
885	uint8_t aPad1[10];
886	/** Host adapter status. */
887	uint8_t uHostAdapterStatus;
888	/** Device adapter status. */
889	uint8_t uDeviceStatus;
890	uint8_t aPad2[2];
891	/** The SCSI CDB (up to 12 bytes). */
892	uint8_t abCDB[12];
893	} CCBC, *PCCBC;
894	AssertCompileSize(CCBC, 30);
895
896	/* Make sure that the 24-bit/32-bit/common CCB offsets match. */
897	AssertCompileMemberOffset(CCBC, cbCDB, 2);
898	AssertCompileMemberOffset(CCB24, cbCDB, 2);
899	AssertCompileMemberOffset(CCB32, cbCDB, 2);
900	AssertCompileMemberOffset(CCBC, uHostAdapterStatus, 14);
901	AssertCompileMemberOffset(CCB24, uHostAdapterStatus, 14);
902	AssertCompileMemberOffset(CCB32, uHostAdapterStatus, 14);
903	AssertCompileMemberOffset(CCBC, abCDB, 18);
904	AssertCompileMemberOffset(CCB24, abCDB, 18);
905	AssertCompileMemberOffset(CCB32, abCDB, 18);
906
907	/** A union of all CCB types (24-bit/32-bit/common). */
908	typedef union CCBU
909	{
910	CCB32 n; /*< New 32-bit CCB. /
911	CCB24 o; /*< Old 24-bit CCB. /
912	CCBC c; /*< Common CCB subset. /
913	} CCBU, *PCCBU;
914
915	/** 32-bit scatter-gather list entry. */
916	typedef struct SGE32
917	{
918	uint32_t cbSegment;
919	uint32_t u32PhysAddrSegmentBase;
920	} SGE32, *PSGE32;
921	AssertCompileSize(SGE32, 8);
922
923	/** 24-bit scatter-gather list entry. */
924	typedef struct SGE24
925	{
926	Len24 acbSegment;
927	Addr24 aPhysAddrSegmentBase;
928	} SGE24, *PSGE24;
929	AssertCompileSize(SGE24, 6);
930
931	/**
932	* The structure for the "Execute SCSI Command" command.
933	*/
934	typedef struct ESCMD
935	{
936	/** Data length. */
937	uint32_t cbData;
938	/** Data pointer. */
939	uint32_t u32PhysAddrData;
940	/** The device the request is sent to. */
941	uint8_t uTargetId;
942	/** The LUN in the device. */
943	uint8_t uLogicalUnit;
944	/** Reserved */
945	unsigned char uReserved1 : 3;
946	/** Data direction for the request. */
947	unsigned char uDataDirection : 2;
948	/** Reserved */
949	unsigned char uReserved2 : 3;
950	/** Length of the SCSI CDB. */
951	uint8_t cbCDB;
952	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
953	uint8_t abCDB[12];
954	} ESCMD, *PESCMD;
955	AssertCompileSize(ESCMD, 24);
956
957	/**
958	* Task state for a CCB request.
959	*/
960	typedef struct BUSLOGICREQ
961	{
962	/** PDM extended media interface I/O request hande. */
963	PDMMEDIAEXIOREQ hIoReq;
964	/** Device this task is assigned to. */
965	PBUSLOGICDEVICE pTargetDevice;
966	/** The command control block from the guest. */
967	CCBU CCBGuest;
968	/** Guest physical address of th CCB. */
969	RTGCPHYS GCPhysAddrCCB;
970	/** Pointer to the R3 sense buffer. */
971	uint8_t *pbSenseBuffer;
972	/** Flag whether this is a request from the BIOS. */
973	bool fBIOS;
974	/** 24-bit request flag (default is 32-bit). */
975	bool fIs24Bit;
976	/** SCSI status code. */
977	uint8_t u8ScsiSts;
978	} BUSLOGICREQ;
979
980	#ifdef IN_RING3
981	/**
982	* Memory buffer callback.
983	*
984	* @returns nothing.
985	* @param pThis The LsiLogic controller instance.
986	* @param GCPhys The guest physical address of the memory buffer.
987	* @param pSgBuf The pointer to the host R3 S/G buffer.
988	* @param cbCopy How many bytes to copy between the two buffers.
989	* @param pcbSkip Initially contains the amount of bytes to skip
990	* starting from the guest physical address before
991	* accessing the S/G buffer and start copying data.
992	* On return this contains the remaining amount if
993	* cbCopy < *pcbSkip or 0 otherwise.
994	*/
995	typedef DECLCALLBACK(void) BUSLOGICR3MEMCOPYCALLBACK(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf, size_t cbCopy,
996	size_t *pcbSkip);
997	/** Pointer to a memory copy buffer callback. */
998	typedef BUSLOGICR3MEMCOPYCALLBACK *PBUSLOGICR3MEMCOPYCALLBACK;
999	#endif
1000
1001	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
1002
1003
1004	/*********************************************************************************************************************************
1005	* Internal Functions *
1006	*********************************************************************************************************************************/
1007	#ifdef IN_RING3
1008	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
1009	#endif
1010
1011
1012	/**
1013	* Assert IRQ line of the BusLogic adapter.
1014	*
1015	* @returns nothing.
1016	* @param pBusLogic Pointer to the BusLogic device instance.
1017	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
1018	* @param uIrqType Type of interrupt being generated.
1019	*/
1020	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
1021	{
1022	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1023
1024	/* The CMDC interrupt has priority over IMBL and OMBR. */
1025	if (uIrqType & (BL_INTR_IMBL \| BL_INTR_OMBR))
1026	{
1027	if (!(pBusLogic->regInterrupt & BL_INTR_CMDC))
1028	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
1029	else
1030	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
1031	}
1032	else if (uIrqType & BL_INTR_CMDC)
1033	{
1034	AssertMsg(pBusLogic->regInterrupt == 0 \|\| pBusLogic->regInterrupt == (BL_INTR_INTV \| BL_INTR_CMDC),
1035	("regInterrupt=%02X\n", pBusLogic->regInterrupt));
1036	pBusLogic->regInterrupt \|= uIrqType;
1037	}
1038	else
1039	AssertMsgFailed(("Invalid interrupt state!\n"));
1040
1041	pBusLogic->regInterrupt \|= BL_INTR_INTV;
1042	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
1043	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
1044	}
1045
1046	/**
1047	* Deasserts the interrupt line of the BusLogic adapter.
1048	*
1049	* @returns nothing.
1050	* @param pBusLogic Pointer to the BusLogic device instance.
1051	*/
1052	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
1053	{
1054	LogFlowFunc(("pBusLogic=%#p, clearing %#02x (pending %#02x)\n",
1055	pBusLogic, pBusLogic->regInterrupt, pBusLogic->uPendingIntr));
1056	pBusLogic->regInterrupt = 0;
1057	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
1058	/* If there's another pending interrupt, report it now. */
1059	if (pBusLogic->uPendingIntr)
1060	{
1061	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
1062	pBusLogic->uPendingIntr = 0;
1063	}
1064	}
1065
1066	#if defined(IN_RING3)
1067
1068	/**
1069	* Advances the mailbox pointer to the next slot.
1070	*
1071	* @returns nothing.
1072	* @param pBusLogic The BusLogic controller instance.
1073	*/
1074	DECLINLINE(void) buslogicR3OutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
1075	{
1076	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
1077	}
1078
1079	/**
1080	* Initialize local RAM of host adapter with default values.
1081	*
1082	* @returns nothing.
1083	* @param pBusLogic The BusLogic controller instance.
1084	*/
1085	static void buslogicR3InitializeLocalRam(PBUSLOGIC pBusLogic)
1086	{
1087	/*
1088	* These values are mostly from what I think is right
1089	* looking at the dmesg output from a Linux guest inside
1090	* a VMware server VM.
1091	*
1092	* So they don't have to be right :)
1093	*/
1094	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
1095	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
1096	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
1097	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
1098	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = UINT16_MAX; /* All enabled. Maybe mask out non present devices? */
1099	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = UINT16_MAX;
1100	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = UINT16_MAX;
1101	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = UINT16_MAX;
1102	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = UINT16_MAX;
1103	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
1104	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = UINT16_MAX;
1105	/** @todo calculate checksum? */
1106	}
1107
1108	/**
1109	* Do a hardware reset of the buslogic adapter.
1110	*
1111	* @returns VBox status code.
1112	* @param pBusLogic Pointer to the BusLogic device instance.
1113	* @param fResetIO Flag determining whether ISA I/O should be reset.
1114	*/
1115	static int buslogicR3HwReset(PBUSLOGIC pBusLogic, bool fResetIO)
1116	{
1117	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1118
1119	/* Reset registers to default values. */
1120	pBusLogic->regStatus = BL_STAT_HARDY \| BL_STAT_INREQ;
1121	pBusLogic->regGeometry = BL_GEOM_XLATEN;
1122	pBusLogic->uOperationCode = 0xff; /* No command executing. */
1123	pBusLogic->iParameter = 0;
1124	pBusLogic->cbCommandParametersLeft = 0;
1125	pBusLogic->fIRQEnabled = true;
1126	pBusLogic->fStrictRoundRobinMode = false;
1127	pBusLogic->fExtendedLunCCBFormat = false;
1128	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
1129	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1130
1131	/* Clear any active/pending interrupts. */
1132	pBusLogic->uPendingIntr = 0;
1133	buslogicClearInterrupt(pBusLogic);
1134
1135	/* Guest-initiated HBA reset does not affect ISA port I/O. */
1136	if (fResetIO)
1137	{
1138	buslogicR3RegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
1139	}
1140	buslogicR3InitializeLocalRam(pBusLogic);
1141	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
1142
1143	return VINF_SUCCESS;
1144	}
1145
1146	#endif /* IN_RING3 */
1147
1148	/**
1149	* Resets the command state machine for the next command and notifies the guest.
1150	*
1151	* @returns nothing.
1152	* @param pBusLogic Pointer to the BusLogic device instance
1153	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
1154	*/
1155	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
1156	{
1157	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1158
1159	pBusLogic->fUseLocalRam = false;
1160	pBusLogic->regStatus \|= BL_STAT_HARDY;
1161	pBusLogic->iReply = 0;
1162
1163	/* Modify I/O address does not generate an interrupt. */
1164	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND)
1165	{
1166	/* Notify that the command is complete. */
1167	pBusLogic->regStatus &= ~BL_STAT_DIRRDY;
1168	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BL_INTR_CMDC);
1169	}
1170
1171	pBusLogic->uOperationCode = 0xff;
1172	pBusLogic->iParameter = 0;
1173	}
1174
1175	#if defined(IN_RING3)
1176
1177	/**
1178	* Initiates a hard reset which was issued from the guest.
1179	*
1180	* @returns nothing
1181	* @param pBusLogic Pointer to the BusLogic device instance.
1182	* @param fHardReset Flag initiating a hard (vs. soft) reset.
1183	*/
1184	static void buslogicR3InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)
1185	{
1186	LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset));
1187
1188	buslogicR3HwReset(pBusLogic, false);
1189
1190	if (fHardReset)
1191	{
1192	/* Set the diagnostic active bit in the status register and clear the ready state. */
1193	pBusLogic->regStatus \|= BL_STAT_DACT;
1194	pBusLogic->regStatus &= ~BL_STAT_HARDY;
1195
1196	/* Remember when the guest initiated a reset (after we're done resetting). */
1197	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1198	}
1199	}
1200
1201	/**
1202	* Send a mailbox with set status codes to the guest.
1203	*
1204	* @returns nothing.
1205	* @param pBusLogic Pointer to the BusLogic device instance.
1206	* @param GCPhysAddrCCB The physical guest address of the CCB the mailbox is for.
1207	* @param pCCBGuest The command control block.
1208	* @param uHostAdapterStatus The host adapter status code to set.
1209	* @param uDeviceStatus The target device status to set.
1210	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
1211	*/
1212	static void buslogicR3SendIncomingMailbox(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB,
1213	PCCBU pCCBGuest, uint8_t uHostAdapterStatus,
1214	uint8_t uDeviceStatus, uint8_t uMailboxCompletionCode)
1215	{
1216	Mailbox32 MbxIn;
1217
1218	MbxIn.u32PhysAddrCCB = (uint32_t)GCPhysAddrCCB;
1219	MbxIn.u.in.uHostAdapterStatus = uHostAdapterStatus;
1220	MbxIn.u.in.uTargetDeviceStatus = uDeviceStatus;
1221	MbxIn.u.in.uCompletionCode = uMailboxCompletionCode;
1222
1223	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1224	AssertRC(rc);
1225
1226	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase
1227	+ ( pBusLogic->uMailboxIncomingPositionCurrent
1228	* (pBusLogic->fMbxIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32)) );
1229
1230	if (uMailboxCompletionCode != BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND)
1231	{
1232	LogFlowFunc(("Completing CCB %RGp hstat=%u, dstat=%u, outgoing mailbox at %RGp\n", GCPhysAddrCCB,
1233	uHostAdapterStatus, uDeviceStatus, GCPhysAddrMailboxIncoming));
1234
1235	/* Update CCB. */
1236	pCCBGuest->c.uHostAdapterStatus = uHostAdapterStatus;
1237	pCCBGuest->c.uDeviceStatus = uDeviceStatus;
1238	/* Rewrite CCB up to the CDB; perhaps more than necessary. */
1239	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
1240	pCCBGuest, RT_OFFSETOF(CCBC, abCDB));
1241	}
1242
1243	# ifdef RT_STRICT
1244	uint8_t uCode;
1245	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
1246	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming + uCodeOffs, &uCode, sizeof(uCode));
1247	Assert(uCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1248	# endif
1249
1250	/* Update mailbox. */
1251	if (pBusLogic->fMbxIs24Bit)
1252	{
1253	Mailbox24 Mbx24;
1254
1255	Mbx24.uCmdState = MbxIn.u.in.uCompletionCode;
1256	U32_TO_ADDR(Mbx24.aPhysAddrCCB, MbxIn.u32PhysAddrCCB);
1257	Log(("24-bit mailbox: completion code=%u, CCB at %RGp\n", Mbx24.uCmdState, (RTGCPHYS)ADDR_TO_U32(Mbx24.aPhysAddrCCB)));
1258	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
1259	}
1260	else
1261	{
1262	Log(("32-bit mailbox: completion code=%u, CCB at %RGp\n", MbxIn.u.in.uCompletionCode, GCPhysAddrCCB));
1263	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming,
1264	&MbxIn, sizeof(Mailbox32));
1265	}
1266
1267	/* Advance to next mailbox position. */
1268	pBusLogic->uMailboxIncomingPositionCurrent++;
1269	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1270	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1271
1272	# ifdef LOG_ENABLED
1273	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1274	# endif
1275
1276	buslogicSetInterrupt(pBusLogic, false, BL_INTR_IMBL);
1277
1278	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1279	}
1280
1281	# ifdef LOG_ENABLED
1282
1283	/**
1284	* Dumps the content of a mailbox for debugging purposes.
1285	*
1286	* @return nothing
1287	* @param pMailbox The mailbox to dump.
1288	* @param fOutgoing true if dumping the outgoing state.
1289	* false if dumping the incoming state.
1290	*/
1291	static void buslogicR3DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing)
1292	{
1293	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1294	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1295	if (fOutgoing)
1296	{
1297	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1298	}
1299	else
1300	{
1301	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1302	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1303	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1304	}
1305	}
1306
1307	/**
1308	* Dumps the content of a command control block for debugging purposes.
1309	*
1310	* @returns nothing.
1311	* @param pCCB Pointer to the command control block to dump.
1312	* @param fIs24BitCCB Flag to determine CCB format.
1313	*/
1314	static void buslogicR3DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB)
1315	{
1316	Log(("%s: Dump for %s Command Control Block:\n", __FUNCTION__, fIs24BitCCB ? "24-bit" : "32-bit"));
1317	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->c.uOpcode));
1318	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->c.uDataDirection));
1319	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->c.cbCDB));
1320	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->c.cbSenseData));
1321	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->c.uHostAdapterStatus));
1322	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->c.uDeviceStatus));
1323	if (fIs24BitCCB)
1324	{
1325	Log(("%s: cbData=%u\n", __FUNCTION__, LEN_TO_U32(pCCB->o.acbData)));
1326	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, ADDR_TO_U32(pCCB->o.aPhysAddrData)));
1327	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->o.uTargetId));
1328	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->o.uLogicalUnit));
1329	}
1330	else
1331	{
1332	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->n.cbData));
1333	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrData));
1334	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->n.uTargetId));
1335	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->n.uLogicalUnit));
1336	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->n.fTagQueued));
1337	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->n.uQueueTag));
1338	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->n.fLegacyTagEnable));
1339	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->n.uLegacyQueueTag));
1340	Log(("%s: PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrSenseData));
1341	}
1342	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->c.abCDB[0]));
1343	for (int i = 1; i < pCCB->c.cbCDB; i++)
1344	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->c.abCDB[i]));
1345	}
1346
1347	# endif /* LOG_ENABLED */
1348
1349	/**
1350	* Allocate data buffer.
1351	*
1352	* @param pDevIns PDM device instance.
1353	* @param fIs24Bit Flag whether the 24bit SG format is used.
1354	* @param GCSGList Guest physical address of S/G list.
1355	* @param cEntries Number of list entries to read.
1356	* @param pSGEList Pointer to 32-bit S/G list storage.
1357	*/
1358	static void buslogicR3ReadSGEntries(PPDMDEVINS pDevIns, bool fIs24Bit, RTGCPHYS GCSGList,
1359	uint32_t cEntries, SGE32 *pSGEList)
1360	{
1361	/* Read the S/G entries. Convert 24-bit entries to 32-bit format. */
1362	if (fIs24Bit)
1363	{
1364	SGE24 aSGE24[32];
1365	Assert(cEntries <= RT_ELEMENTS(aSGE24));
1366
1367	Log2(("Converting %u 24-bit S/G entries to 32-bit\n", cEntries));
1368	PDMDevHlpPhysRead(pDevIns, GCSGList, &aSGE24, cEntries * sizeof(SGE24));
1369	for (uint32_t i = 0; i < cEntries; ++i)
1370	{
1371	pSGEList[i].cbSegment = LEN_TO_U32(aSGE24[i].acbSegment);
1372	pSGEList[i].u32PhysAddrSegmentBase = ADDR_TO_U32(aSGE24[i].aPhysAddrSegmentBase);
1373	}
1374	}
1375	else
1376	PDMDevHlpPhysRead(pDevIns, GCSGList, pSGEList, cEntries * sizeof(SGE32));
1377	}
1378
1379	/**
1380	* Determines the size of th guest data buffer.
1381	*
1382	* @returns VBox status code.
1383	* @param pDevIns PDM device instance.
1384	* @param pCCBGuest The CCB of the guest.
1385	* @param fIs24Bit Flag whether the 24bit SG format is used.
1386	* @param pcbBuf Where to store the size of the guest data buffer on success.
1387	*/
1388	static int buslogicR3QueryDataBufferSize(PPDMDEVINS pDevIns, PCCBU pCCBGuest, bool fIs24Bit, size_t *pcbBuf)
1389	{
1390	int rc = VINF_SUCCESS;
1391	uint32_t cbDataCCB;
1392	uint32_t u32PhysAddrCCB;
1393	size_t cbBuf = 0;
1394
1395	/* Extract the data length and physical address from the CCB. */
1396	if (fIs24Bit)
1397	{
1398	u32PhysAddrCCB = ADDR_TO_U32(pCCBGuest->o.aPhysAddrData);
1399	cbDataCCB = LEN_TO_U32(pCCBGuest->o.acbData);
1400	}
1401	else
1402	{
1403	u32PhysAddrCCB = pCCBGuest->n.u32PhysAddrData;
1404	cbDataCCB = pCCBGuest->n.cbData;
1405	}
1406
1407	if ( (pCCBGuest->c.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1408	&& cbDataCCB)
1409	{
1410	/*
1411	* The BusLogic adapter can handle two different data buffer formats.
1412	* The first one is that the data pointer entry in the CCB points to
1413	* the buffer directly. In second mode the data pointer points to a
1414	* scatter gather list which describes the buffer.
1415	*/
1416	if ( (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1417	\|\| (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1418	{
1419	uint32_t cScatterGatherGCRead;
1420	uint32_t iScatterGatherEntry;
1421	SGE32 aScatterGatherReadGC[32]; /* A buffer for scatter gather list entries read from guest memory. */
1422	uint32_t cScatterGatherGCLeft = cbDataCCB / (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1423	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1424
1425	/* Count number of bytes to transfer. */
1426	do
1427	{
1428	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1429	? cScatterGatherGCLeft
1430	: RT_ELEMENTS(aScatterGatherReadGC);
1431	cScatterGatherGCLeft -= cScatterGatherGCRead;
1432
1433	buslogicR3ReadSGEntries(pDevIns, fIs24Bit, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1434
1435	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1436	cbBuf += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1437
1438	/* Set address to the next entries to read. */
1439	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1440	} while (cScatterGatherGCLeft > 0);
1441
1442	Log(("%s: cbBuf=%d\n", __FUNCTION__, cbBuf));
1443	}
1444	else if ( pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1445	\|\| pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1446	cbBuf = cbDataCCB;
1447	}
1448
1449	if (RT_SUCCESS(rc))
1450	*pcbBuf = cbBuf;
1451
1452	return rc;
1453	}
1454
1455	/**
1456	* Copy from guest to host memory worker.
1457	*
1458	* @copydoc{BUSLOGICR3MEMCOPYCALLBACK}
1459	*/
1460	static DECLCALLBACK(void) buslogicR3CopyBufferFromGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1461	size_t cbCopy, size_t *pcbSkip)
1462	{
1463	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1464	cbCopy -= cbSkipped;
1465	GCPhys += cbSkipped;
1466	*pcbSkip -= cbSkipped;
1467
1468	while (cbCopy)
1469	{
1470	size_t cbSeg = cbCopy;
1471	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1472
1473	AssertPtr(pvSeg);
1474	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1475	GCPhys += cbSeg;
1476	cbCopy -= cbSeg;
1477	}
1478	}
1479
1480	/**
1481	* Copy from host to guest memory worker.
1482	*
1483	* @copydoc{BUSLOGICR3MEMCOPYCALLBACK}
1484	*/
1485	static DECLCALLBACK(void) buslogicR3CopyBufferToGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1486	size_t cbCopy, size_t *pcbSkip)
1487	{
1488	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1489	cbCopy -= cbSkipped;
1490	GCPhys += cbSkipped;
1491	*pcbSkip -= cbSkipped;
1492
1493	while (cbCopy)
1494	{
1495	size_t cbSeg = cbCopy;
1496	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1497
1498	AssertPtr(pvSeg);
1499	PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1500	GCPhys += cbSeg;
1501	cbCopy -= cbSeg;
1502	}
1503	}
1504
1505	/**
1506	* Walks the guest S/G buffer calling the given copy worker for every buffer.
1507	*
1508	* @returns The amout of bytes actually copied.
1509	* @param pThis Pointer to the Buslogic device state.
1510	* @param pReq Pointe to the request state.
1511	* @param pfnCopyWorker The copy method to apply for each guest buffer.
1512	* @param pSgBuf The host S/G buffer.
1513	* @param cbSkip How many bytes to skip in advance before starting to copy.
1514	* @param cbCopy How many bytes to copy.
1515	*/
1516	static size_t buslogicR3SgBufWalker(PBUSLOGIC pThis, PBUSLOGICREQ pReq,
1517	PBUSLOGICR3MEMCOPYCALLBACK pfnCopyWorker,
1518	PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
1519	{
1520	PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
1521	uint32_t cbDataCCB;
1522	uint32_t u32PhysAddrCCB;
1523	size_t cbCopied = 0;
1524
1525	/*
1526	* Add the amount to skip to the host buffer size to avoid a
1527	* few conditionals later on.
1528	*/
1529	cbCopy += cbSkip;
1530
1531	/* Extract the data length and physical address from the CCB. */
1532	if (pReq->fIs24Bit)
1533	{
1534	u32PhysAddrCCB = ADDR_TO_U32(pReq->CCBGuest.o.aPhysAddrData);
1535	cbDataCCB = LEN_TO_U32(pReq->CCBGuest.o.acbData);
1536	}
1537	else
1538	{
1539	u32PhysAddrCCB = pReq->CCBGuest.n.u32PhysAddrData;
1540	cbDataCCB = pReq->CCBGuest.n.cbData;
1541	}
1542
1543	#if 1
1544	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1545	* returns no data, hence the buffer must be left alone!
1546	*/
1547	if (pReq->CCBGuest.c.abCDB[0] == 0)
1548	cbDataCCB = 0;
1549	#endif
1550
1551	LogFlowFunc(("pReq=%#p cbDataCCB=%u direction=%u cbCopy=%zu\n", pReq, cbDataCCB,
1552	pReq->CCBGuest.c.uDataDirection, cbCopy));
1553
1554	if ( (cbDataCCB > 0)
1555	&& ( pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN
1556	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT
1557	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN))
1558	{
1559	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1560	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1561	{
1562	uint32_t cScatterGatherGCRead;
1563	uint32_t iScatterGatherEntry;
1564	SGE32 aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1565	uint32_t cScatterGatherGCLeft = cbDataCCB / (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1566	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1567
1568	do
1569	{
1570	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1571	? cScatterGatherGCLeft
1572	: RT_ELEMENTS(aScatterGatherReadGC);
1573	cScatterGatherGCLeft -= cScatterGatherGCRead;
1574
1575	buslogicR3ReadSGEntries(pDevIns, pReq->fIs24Bit, GCPhysAddrScatterGatherCurrent,
1576	cScatterGatherGCRead, aScatterGatherReadGC);
1577
1578	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead && cbCopy > 0; iScatterGatherEntry++)
1579	{
1580	RTGCPHYS GCPhysAddrDataBase;
1581	size_t cbCopyThis;
1582
1583	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1584
1585	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1586	cbCopyThis = RT_MIN(cbCopy, aScatterGatherReadGC[iScatterGatherEntry].cbSegment);
1587
1588	Log(("%s: GCPhysAddrDataBase=%RGp cbCopyThis=%zu\n", __FUNCTION__, GCPhysAddrDataBase, cbCopyThis));
1589
1590	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, cbCopyThis, &cbSkip);
1591	cbCopied += cbCopyThis;
1592	cbCopy -= cbCopyThis;
1593	}
1594
1595	/* Set address to the next entries to read. */
1596	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1597	} while ( cScatterGatherGCLeft > 0
1598	&& cbCopy > 0);
1599
1600	}
1601	else if ( pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1602	\|\| pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1603	{
1604	/* The buffer is not scattered. */
1605	RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1606
1607	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1608
1609	Log(("Non-scattered buffer:\n"));
1610	Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1611	Log(("cbData=%u\n", cbDataCCB));
1612	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1613
1614	/* Copy the data into the guest memory. */
1615	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, RT_MIN(cbDataCCB, cbCopy), &cbSkip);
1616	cbCopied += RT_MIN(cbDataCCB, cbCopy);
1617	}
1618	}
1619
1620	/* Update residual data length. */
1621	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1622	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1623	{
1624	uint32_t cbResidual;
1625
1626	/** @todo we need to get the actual transfer length from the VSCSI layer?! */
1627	cbResidual = 0; //LEN_TO_U32(pTaskState->CCBGuest.acbData) - ???;
1628	if (pReq->fIs24Bit)
1629	U32_TO_LEN(pReq->CCBGuest.o.acbData, cbResidual);
1630	else
1631	pReq->CCBGuest.n.cbData = cbResidual;
1632	}
1633
1634	return cbCopied - RT_MIN(cbSkip, cbCopied);
1635	}
1636
1637	/**
1638	* Copies a data buffer into the S/G buffer set up by the guest.
1639	*
1640	* @returns Amount of bytes copied to the guest.
1641	* @param pThis The LsiLogic controller device instance.
1642	* @param pReq Request structure.
1643	* @param pSgBuf The S/G buffer to copy from.
1644	* @param cbSkip How many bytes to skip in advance before starting to copy.
1645	* @param cbCopy How many bytes to copy.
1646	*/
1647	static size_t buslogicR3CopySgBufToGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1648	size_t cbSkip, size_t cbCopy)
1649	{
1650	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferToGuestWorker,
1651	pSgBuf, cbSkip, cbCopy);
1652	}
1653
1654	/**
1655	* Copies the guest S/G buffer into a host data buffer.
1656	*
1657	* @returns Amount of bytes copied from the guest.
1658	* @param pThis The LsiLogic controller device instance.
1659	* @param pReq Request structure.
1660	* @param pSgBuf The S/G buffer to copy into.
1661	* @param cbSkip How many bytes to skip in advance before starting to copy.
1662	* @param cbCopy How many bytes to copy.
1663	*/
1664	static size_t buslogicR3CopySgBufFromGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1665	size_t cbSkip, size_t cbCopy)
1666	{
1667	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferFromGuestWorker,
1668	pSgBuf, cbSkip, cbCopy);
1669	}
1670
1671	/** Convert sense buffer length taking into account shortcut values. */
1672	static uint32_t buslogicR3ConvertSenseBufferLength(uint32_t cbSense)
1673	{
1674	/* Convert special sense buffer length values. */
1675	if (cbSense == 0)
1676	cbSense = 14; /* 0 means standard 14-byte buffer. */
1677	else if (cbSense == 1)
1678	cbSense = 0; /* 1 means no sense data. */
1679	else if (cbSense < 8)
1680	AssertMsgFailed(("Reserved cbSense value of %d used!\n", cbSense));
1681
1682	return cbSense;
1683	}
1684
1685	/**
1686	* Free the sense buffer.
1687	*
1688	* @returns nothing.
1689	* @param pReq Pointer to the request state.
1690	* @param fCopy If sense data should be copied to guest memory.
1691	*/
1692	static void buslogicR3SenseBufferFree(PBUSLOGICREQ pReq, bool fCopy)
1693	{
1694	uint32_t cbSenseBuffer;
1695
1696	cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1697
1698	/* Copy the sense buffer into guest memory if requested. */
1699	if (fCopy && cbSenseBuffer)
1700	{
1701	PPDMDEVINS pDevIns = pReq->pTargetDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1702	RTGCPHYS GCPhysAddrSenseBuffer;
1703
1704	/* With 32-bit CCBs, the (optional) sense buffer physical address is provided separately.
1705	* On the other hand, with 24-bit CCBs, the sense buffer is simply located at the end of
1706	* the CCB, right after the variable-length CDB.
1707	*/
1708	if (pReq->fIs24Bit)
1709	{
1710	GCPhysAddrSenseBuffer = pReq->GCPhysAddrCCB;
1711	GCPhysAddrSenseBuffer += pReq->CCBGuest.c.cbCDB + RT_OFFSETOF(CCB24, abCDB);
1712	}
1713	else
1714	GCPhysAddrSenseBuffer = pReq->CCBGuest.n.u32PhysAddrSenseData;
1715
1716	Log3(("%s: sense buffer: %.*Rhxs\n", __FUNCTION__, cbSenseBuffer, pReq->pbSenseBuffer));
1717	PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pReq->pbSenseBuffer, cbSenseBuffer);
1718	}
1719
1720	RTMemFree(pReq->pbSenseBuffer);
1721	pReq->pbSenseBuffer = NULL;
1722	}
1723
1724	/**
1725	* Alloc the sense buffer.
1726	*
1727	* @returns VBox status code.
1728	* @param pReq Pointer to the task state.
1729	*/
1730	static int buslogicR3SenseBufferAlloc(PBUSLOGICREQ pReq)
1731	{
1732	pReq->pbSenseBuffer = NULL;
1733
1734	uint32_t cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1735	if (cbSenseBuffer)
1736	{
1737	pReq->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1738	if (!pReq->pbSenseBuffer)
1739	return VERR_NO_MEMORY;
1740	}
1741
1742	return VINF_SUCCESS;
1743	}
1744
1745	#endif /* IN_RING3 */
1746
1747	/**
1748	* Parses the command buffer and executes it.
1749	*
1750	* @returns VBox status code.
1751	* @param pBusLogic Pointer to the BusLogic device instance.
1752	*/
1753	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1754	{
1755	int rc = VINF_SUCCESS;
1756	bool fSuppressIrq = false;
1757
1758	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1759	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1760
1761	switch (pBusLogic->uOperationCode)
1762	{
1763	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1764	/* Valid command, no reply. */
1765	pBusLogic->cbReplyParametersLeft = 0;
1766	break;
1767	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1768	{
1769	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1770	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1771
1772	/* It seems VMware does not provide valid information here too, lets do the same :) */
1773	pReply->InformationIsValid = 0;
1774	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1775	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1776	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1777	break;
1778	}
1779	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
1780	{
1781	/* no-op */
1782	pBusLogic->cbReplyParametersLeft = 0;
1783	break;
1784	}
1785	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1786	{
1787	/* Modify the ISA-compatible I/O port base. Note that this technically
1788	* violates the PCI spec, as this address is not reported through PCI.
1789	* However, it is required for compatibility with old drivers.
1790	*/
1791	#ifdef IN_RING3
1792	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1793	buslogicR3RegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1794	pBusLogic->cbReplyParametersLeft = 0;
1795	fSuppressIrq = true;
1796	break;
1797	#else
1798	AssertMsgFailed(("Must never get here!\n"));
1799	#endif
1800	}
1801	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1802	{
1803	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1804	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1805	* the adapter only when the byte is not '0' or 'B'.
1806	*/
1807	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1808	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1809
1810	/* We report version 5.07B. This reply will provide the first two digits. */
1811	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1812	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1813	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1814	break;
1815	}
1816	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1817	{
1818	pBusLogic->aReplyBuffer[0] = '7';
1819	pBusLogic->cbReplyParametersLeft = 1;
1820	break;
1821	}
1822	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1823	{
1824	pBusLogic->aReplyBuffer[0] = 'B';
1825	pBusLogic->cbReplyParametersLeft = 1;
1826	break;
1827	}
1828	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1829	/* The parameter list length is determined by the first byte of the command buffer. */
1830	if (pBusLogic->iParameter == 1)
1831	{
1832	/* First pass - set the number of following parameter bytes. */
1833	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1834	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1835	}
1836	else
1837	{
1838	/* Second pass - process received data. */
1839	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1840	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1841	}
1842	pBusLogic->cbReplyParametersLeft = 0;
1843	break;
1844
1845	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
1846	/* The parameter list length is at least 12 bytes; the 12th byte determines
1847	* the number of additional CDB bytes that will follow.
1848	*/
1849	if (pBusLogic->iParameter == 12)
1850	{
1851	/* First pass - set the number of following CDB bytes. */
1852	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[11];
1853	Log(("Execute SCSI cmd: %u more bytes follow\n", pBusLogic->cbCommandParametersLeft));
1854	}
1855	else
1856	{
1857	PESCMD pCmd;
1858
1859	/* Second pass - process received data. */
1860	Log(("Execute SCSI cmd: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1861
1862	pCmd = (PESCMD)pBusLogic->aCommandBuffer;
1863	Log(("Addr %08X, cbData %08X, cbCDB=%u\n", pCmd->u32PhysAddrData, pCmd->cbData, pCmd->cbCDB));
1864	}
1865	// This is currently a dummy - just fails every command.
1866	pBusLogic->cbReplyParametersLeft = 4;
1867	pBusLogic->aReplyBuffer[0] = pBusLogic->aReplyBuffer[1] = 0;
1868	pBusLogic->aReplyBuffer[2] = 0x11; /* HBA status (timeout). */
1869	pBusLogic->aReplyBuffer[3] = 0; /* Device status. */
1870	break;
1871
1872	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1873	{
1874	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1875	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1876	memset(pBusLogic->aReplyBuffer, 0, pBusLogic->cbReplyParametersLeft);
1877	const char aModelName[] = "958D "; /* Trailing \0 is fine, that's the filler anyway. */
1878	int cCharsToTransfer = pBusLogic->cbReplyParametersLeft <= sizeof(aModelName)
1879	? pBusLogic->cbReplyParametersLeft
1880	: sizeof(aModelName);
1881
1882	for (int i = 0; i < cCharsToTransfer; i++)
1883	pBusLogic->aReplyBuffer[i] = aModelName[i];
1884
1885	break;
1886	}
1887	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1888	{
1889	uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1890
1891	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1892	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1893	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1894
1895	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1896	pReply->fDmaChannel6 = 1; /* DMA channel 6 is a good default. */
1897	/* The PCI IRQ is not necessarily representable in this structure.
1898	* If that is the case, the guest likely won't function correctly,
1899	* therefore we log a warning.
1900	*/
1901	switch (uPciIrq)
1902	{
1903	case 9: pReply->fIrqChannel9 = 1; break;
1904	case 10: pReply->fIrqChannel10 = 1; break;
1905	case 11: pReply->fIrqChannel11 = 1; break;
1906	case 12: pReply->fIrqChannel12 = 1; break;
1907	case 14: pReply->fIrqChannel14 = 1; break;
1908	case 15: pReply->fIrqChannel15 = 1; break;
1909	default:
1910	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1911	break;
1912	}
1913	break;
1914	}
1915	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1916	{
1917	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1918	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1919	* Adaptec 154x models supposedly support it too??
1920	*/
1921
1922	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1923	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1924	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1925	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1926
1927	/** @todo should this reflect the RAM contents (AutoSCSIRam)? */
1928	pReply->uBusType = 'E'; /* EISA style */
1929	pReply->u16ScatterGatherLimit = 8192;
1930	pReply->cMailbox = pBusLogic->cMailbox;
1931	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1932	pReply->fLevelSensitiveInterrupt = true;
1933	pReply->fHostWideSCSI = true;
1934	pReply->fHostUltraSCSI = true;
1935	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1936
1937	break;
1938	}
1939	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1940	{
1941	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1942	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1943	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1944	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1945	pReply->fSynchronousInitiationEnabled = true;
1946	pReply->fParityCheckingEnabled = true;
1947	pReply->cMailbox = pBusLogic->cMailbox;
1948	U32_TO_ADDR(pReply->MailboxAddress, pBusLogic->GCPhysAddrMailboxOutgoingBase);
1949	pReply->uSignature = 'B';
1950	/* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1951	* friendly with BusLogic hardware and upsetting the HBA state.
1952	*/
1953	pReply->uCharacterD = 'D'; /* BusLogic model. */
1954	pReply->uHostBusType = 'F'; /* PCI bus. */
1955	break;
1956	}
1957	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1958	{
1959	/*
1960	* First element in the command buffer contains start offset to read from
1961	* and second one the number of bytes to read.
1962	*/
1963	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1964	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1965
1966	pBusLogic->fUseLocalRam = true;
1967	pBusLogic->iReply = uOffset;
1968	break;
1969	}
1970	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
1971	{
1972	PRequestInitMbx pRequest = (PRequestInitMbx)pBusLogic->aCommandBuffer;
1973
1974	pBusLogic->fMbxIs24Bit = true;
1975	pBusLogic->cMailbox = pRequest->cMailbox;
1976	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)ADDR_TO_U32(pRequest->aMailboxBaseAddr);
1977	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1978	pBusLogic->GCPhysAddrMailboxIncomingBase = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->cMailbox * sizeof(Mailbox24));
1979
1980	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1981	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1982	Log(("cMailboxes=%u (24-bit mode)\n", pBusLogic->cMailbox));
1983	LogRel(("Initialized 24-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, ADDR_TO_U32(pRequest->aMailboxBaseAddr)));
1984
1985	pBusLogic->regStatus &= ~BL_STAT_INREQ;
1986	pBusLogic->cbReplyParametersLeft = 0;
1987	break;
1988	}
1989	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1990	{
1991	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
1992
1993	pBusLogic->fMbxIs24Bit = false;
1994	pBusLogic->cMailbox = pRequest->cMailbox;
1995	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
1996	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1997	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox32));
1998
1999	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
2000	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
2001	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
2002	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
2003
2004	pBusLogic->regStatus &= ~BL_STAT_INREQ;
2005	pBusLogic->cbReplyParametersLeft = 0;
2006	break;
2007	}
2008	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2009	{
2010	if (pBusLogic->aCommandBuffer[0] == 0)
2011	pBusLogic->fStrictRoundRobinMode = false;
2012	else if (pBusLogic->aCommandBuffer[0] == 1)
2013	pBusLogic->fStrictRoundRobinMode = true;
2014	else
2015	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
2016
2017	pBusLogic->cbReplyParametersLeft = 0;
2018	break;
2019	}
2020	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2021	{
2022	if (pBusLogic->aCommandBuffer[0] == 0)
2023	pBusLogic->fExtendedLunCCBFormat = false;
2024	else if (pBusLogic->aCommandBuffer[0] == 1)
2025	pBusLogic->fExtendedLunCCBFormat = true;
2026	else
2027	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
2028
2029	pBusLogic->cbReplyParametersLeft = 0;
2030	break;
2031	}
2032	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2033	/* This is supposed to send TEST UNIT READY to each target/LUN.
2034	* We cheat and skip that, since we already know what's attached
2035	*/
2036	memset(pBusLogic->aReplyBuffer, 0, 8);
2037	for (int i = 0; i < 8; ++i)
2038	{
2039	if (pBusLogic->aDeviceStates[i].fPresent)
2040	pBusLogic->aReplyBuffer[i] = 1;
2041	}
2042	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
2043	pBusLogic->cbReplyParametersLeft = 8;
2044	break;
2045	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2046	/* See note about cheating above. */
2047	memset(pBusLogic->aReplyBuffer, 0, 8);
2048	for (int i = 0; i < 8; ++i)
2049	{
2050	if (pBusLogic->aDeviceStates[i + 8].fPresent)
2051	pBusLogic->aReplyBuffer[i] = 1;
2052	}
2053	pBusLogic->cbReplyParametersLeft = 8;
2054	break;
2055	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2056	{
2057	/* Each bit which is set in the 16bit wide variable means a present device. */
2058	uint16_t u16TargetsPresentMask = 0;
2059
2060	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2061	{
2062	if (pBusLogic->aDeviceStates[i].fPresent)
2063	u16TargetsPresentMask \|= (1 << i);
2064	}
2065	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
2066	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
2067	pBusLogic->cbReplyParametersLeft = 2;
2068	break;
2069	}
2070	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2071	{
2072	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
2073
2074	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
2075	pBusLogic->aReplyBuffer[i] = 0; /** @todo Figure if we need something other here. It's not needed for the linux driver */
2076
2077	break;
2078	}
2079	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2080	{
2081	if (pBusLogic->aCommandBuffer[0] == 0)
2082	pBusLogic->fIRQEnabled = false;
2083	else
2084	pBusLogic->fIRQEnabled = true;
2085	/* No interrupt signaled regardless of enable/disable. */
2086	fSuppressIrq = true;
2087	break;
2088	}
2089	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2090	{
2091	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
2092	pBusLogic->cbReplyParametersLeft = 1;
2093	break;
2094	}
2095	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2096	{
2097	pBusLogic->cbReplyParametersLeft = 0;
2098	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
2099	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
2100	break;
2101	}
2102	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2103	{
2104	pBusLogic->cbReplyParametersLeft = 0;
2105	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
2106	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
2107	break;
2108	}
2109	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2110	{
2111	pBusLogic->cbReplyParametersLeft = 0;
2112	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
2113	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
2114	break;
2115	}
2116	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2117	{
2118	RTGCPHYS GCPhysFifoBuf;
2119	Addr24 addr;
2120
2121	pBusLogic->cbReplyParametersLeft = 0;
2122	addr.hi = pBusLogic->aCommandBuffer[0];
2123	addr.mid = pBusLogic->aCommandBuffer[1];
2124	addr.lo = pBusLogic->aCommandBuffer[2];
2125	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2126	Log(("Write busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2127	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2128	&pBusLogic->LocalRam.u8View[64], 64);
2129	break;
2130	}
2131	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2132	{
2133	RTGCPHYS GCPhysFifoBuf;
2134	Addr24 addr;
2135
2136	pBusLogic->cbReplyParametersLeft = 0;
2137	addr.hi = pBusLogic->aCommandBuffer[0];
2138	addr.mid = pBusLogic->aCommandBuffer[1];
2139	addr.lo = pBusLogic->aCommandBuffer[2];
2140	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2141	Log(("Read busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2142	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2143	&pBusLogic->LocalRam.u8View[64], 64);
2144	break;
2145	}
2146	default:
2147	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
2148	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2149	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2150	/* Commands valid for Adaptec 154xC which we don't handle since
2151	* we pretend being 154xB compatible. Just mark the command as invalid.
2152	*/
2153	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2154	pBusLogic->cbReplyParametersLeft = 0;
2155	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2156	break;
2157	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
2158	AssertMsgFailed(("Invalid mailbox execute state!\n"));
2159	}
2160
2161	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
2162
2163	/* Set the data in ready bit in the status register in case the command has a reply. */
2164	if (pBusLogic->cbReplyParametersLeft)
2165	pBusLogic->regStatus \|= BL_STAT_DIRRDY;
2166	else if (!pBusLogic->cbCommandParametersLeft)
2167	buslogicCommandComplete(pBusLogic, fSuppressIrq);
2168
2169	return rc;
2170	}
2171
2172	/**
2173	* Read a register from the BusLogic adapter.
2174	*
2175	* @returns VBox status code.
2176	* @param pBusLogic Pointer to the BusLogic instance data.
2177	* @param iRegister The index of the register to read.
2178	* @param pu32 Where to store the register content.
2179	*/
2180	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
2181	{
2182	int rc = VINF_SUCCESS;
2183
2184	switch (iRegister)
2185	{
2186	case BUSLOGIC_REGISTER_STATUS:
2187	{
2188	*pu32 = pBusLogic->regStatus;
2189
2190	/* If the diagnostic active bit is set, we are in a guest-initiated
2191	* hard reset. If the guest reads the status register and waits for
2192	* the host adapter ready bit to be set, we terminate the reset right
2193	* away. However, guests may also expect the reset condition to clear
2194	* automatically after a period of time, in which case we can't show
2195	* the DIAG bit at all.
2196	*/
2197	if (pBusLogic->regStatus & BL_STAT_DACT)
2198	{
2199	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
2200
2201	pBusLogic->regStatus &= ~BL_STAT_DACT;
2202	pBusLogic->regStatus \|= BL_STAT_HARDY;
2203
2204	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
2205	{
2206	/* If reset already expired, let the guest see that right away. */
2207	*pu32 = pBusLogic->regStatus;
2208	pBusLogic->u64ResetTime = 0;
2209	}
2210	}
2211	break;
2212	}
2213	case BUSLOGIC_REGISTER_DATAIN:
2214	{
2215	if (pBusLogic->fUseLocalRam)
2216	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
2217	else
2218	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
2219
2220	/* Careful about underflow - guest can read data register even if
2221	* no data is available.
2222	*/
2223	if (pBusLogic->cbReplyParametersLeft)
2224	{
2225	pBusLogic->iReply++;
2226	pBusLogic->cbReplyParametersLeft--;
2227	if (!pBusLogic->cbReplyParametersLeft)
2228	{
2229	/*
2230	* Reply finished, set command complete bit, unset data-in ready bit and
2231	* interrupt the guest if enabled.
2232	*/
2233	buslogicCommandComplete(pBusLogic, false);
2234	}
2235	}
2236	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
2237	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
2238	break;
2239	}
2240	case BUSLOGIC_REGISTER_INTERRUPT:
2241	{
2242	*pu32 = pBusLogic->regInterrupt;
2243	break;
2244	}
2245	case BUSLOGIC_REGISTER_GEOMETRY:
2246	{
2247	*pu32 = pBusLogic->regGeometry;
2248	break;
2249	}
2250	default:
2251	*pu32 = UINT32_C(0xffffffff);
2252	}
2253
2254	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2255	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
2256
2257	return rc;
2258	}
2259
2260	/**
2261	* Write a value to a register.
2262	*
2263	* @returns VBox status code.
2264	* @param pBusLogic Pointer to the BusLogic instance data.
2265	* @param iRegister The index of the register to read.
2266	* @param uVal The value to write.
2267	*/
2268	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
2269	{
2270	int rc = VINF_SUCCESS;
2271
2272	switch (iRegister)
2273	{
2274	case BUSLOGIC_REGISTER_CONTROL:
2275	{
2276	if ((uVal & BL_CTRL_RHARD) \|\| (uVal & BL_CTRL_RSOFT))
2277	{
2278	#ifdef IN_RING3
2279	bool fHardReset = !!(uVal & BL_CTRL_RHARD);
2280
2281	LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft"));
2282	buslogicR3InitiateReset(pBusLogic, fHardReset);
2283	#else
2284	rc = VINF_IOM_R3_IOPORT_WRITE;
2285	#endif
2286	break;
2287	}
2288
2289	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
2290	if (rc != VINF_SUCCESS)
2291	return rc;
2292
2293	#ifdef LOG_ENABLED
2294	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
2295	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
2296	#endif
2297
2298	if (uVal & BL_CTRL_RINT)
2299	buslogicClearInterrupt(pBusLogic);
2300
2301	PDMCritSectLeave(&pBusLogic->CritSectIntr);
2302
2303	break;
2304	}
2305	case BUSLOGIC_REGISTER_COMMAND:
2306	{
2307	/* Fast path for mailbox execution command. */
2308	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
2309	{
2310	/* If there are no mailboxes configured, don't even try to do anything. */
2311	if (pBusLogic->cMailbox)
2312	{
2313	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
2314	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSent, true))
2315	{
2316	/* Send new notification to the queue. */
2317	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
2318	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2319	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2320	}
2321	}
2322
2323	return rc;
2324	}
2325
2326	/*
2327	* Check if we are already fetch command parameters from the guest.
2328	* If not we initialize executing a new command.
2329	*/
2330	if (pBusLogic->uOperationCode == 0xff)
2331	{
2332	pBusLogic->uOperationCode = uVal;
2333	pBusLogic->iParameter = 0;
2334
2335	/* Mark host adapter as busy and clear the invalid status bit. */
2336	pBusLogic->regStatus &= ~(BL_STAT_HARDY \| BL_STAT_CMDINV);
2337
2338	/* Get the number of bytes for parameters from the command code. */
2339	switch (pBusLogic->uOperationCode)
2340	{
2341	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
2342	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
2343	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
2344	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
2345	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
2346	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
2347	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2348	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2349	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2350	pBusLogic->cbCommandParametersLeft = 0;
2351	break;
2352	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
2353	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
2354	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
2355	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
2356	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2357	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2358	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2359	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2360	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2361	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2362	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2363	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2364	pBusLogic->cbCommandParametersLeft = 1;
2365	break;
2366	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
2367	pBusLogic->cbCommandParametersLeft = 2;
2368	break;
2369	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2370	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2371	pBusLogic->cbCommandParametersLeft = 3;
2372	break;
2373	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
2374	pBusLogic->cbCommandParametersLeft = 4;
2375	break;
2376	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
2377	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitMbx);
2378	break;
2379	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
2380	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
2381	break;
2382	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
2383	/* There must be at least one byte following this command. */
2384	pBusLogic->cbCommandParametersLeft = 1;
2385	break;
2386	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
2387	/* 12 bytes + variable-length CDB. */
2388	pBusLogic->cbCommandParametersLeft = 12;
2389	break;
2390	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2391	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2392	/* Invalid commands. */
2393	pBusLogic->cbCommandParametersLeft = 0;
2394	break;
2395	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
2396	default:
2397	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
2398	}
2399	}
2400	else
2401	{
2402	#ifndef IN_RING3
2403	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
2404	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
2405	{
2406	rc = VINF_IOM_R3_IOPORT_WRITE;
2407	break;
2408	}
2409	#endif
2410	/*
2411	* The real adapter would set the Command register busy bit in the status register.
2412	* The guest has to wait until it is unset.
2413	* We don't need to do it because the guest does not continue execution while we are in this
2414	* function.
2415	*/
2416	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
2417	pBusLogic->iParameter++;
2418	pBusLogic->cbCommandParametersLeft--;
2419	}
2420
2421	/* Start execution of command if there are no parameters left. */
2422	if (!pBusLogic->cbCommandParametersLeft)
2423	{
2424	rc = buslogicProcessCommand(pBusLogic);
2425	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
2426	}
2427	break;
2428	}
2429
2430	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
2431	* That is different from Adaptec 154x where those are read only.
2432	*/
2433	case BUSLOGIC_REGISTER_INTERRUPT:
2434	pBusLogic->regInterrupt = uVal;
2435	break;
2436
2437	case BUSLOGIC_REGISTER_GEOMETRY:
2438	pBusLogic->regGeometry = uVal;
2439	break;
2440
2441	default:
2442	AssertMsgFailed(("Register not available\n"));
2443	rc = VERR_IOM_IOPORT_UNUSED;
2444	}
2445
2446	return rc;
2447	}
2448
2449	/**
2450	* Memory mapped I/O Handler for read operations.
2451	*
2452	* @returns VBox status code.
2453	*
2454	* @param pDevIns The device instance.
2455	* @param pvUser User argument.
2456	* @param GCPhysAddr Physical address (in GC) where the read starts.
2457	* @param pv Where to store the result.
2458	* @param cb Number of bytes read.
2459	*/
2460	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void pv, unsigned cb)
2461	{
2462	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2463
2464	/* the linux driver does not make use of the MMIO area. */
2465	AssertMsgFailed(("MMIO Read\n"));
2466	return VINF_SUCCESS;
2467	}
2468
2469	/**
2470	* Memory mapped I/O Handler for write operations.
2471	*
2472	* @returns VBox status code.
2473	*
2474	* @param pDevIns The device instance.
2475	* @param pvUser User argument.
2476	* @param GCPhysAddr Physical address (in GC) where the read starts.
2477	* @param pv Where to fetch the result.
2478	* @param cb Number of bytes to write.
2479	*/
2480	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void const pv, unsigned cb)
2481	{
2482	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2483
2484	/* the linux driver does not make use of the MMIO area. */
2485	AssertMsgFailed(("MMIO Write\n"));
2486	return VINF_SUCCESS;
2487	}
2488
2489	/**
2490	* Port I/O Handler for IN operations.
2491	*
2492	* @returns VBox status code.
2493	*
2494	* @param pDevIns The device instance.
2495	* @param pvUser User argument.
2496	* @param uPort Port number used for the IN operation.
2497	* @param pu32 Where to store the result.
2498	* @param cb Number of bytes read.
2499	*/
2500	PDMBOTHCBDECL(int) buslogicIOPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2501	{
2502	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2503	unsigned iRegister = uPort % 4;
2504	RT_NOREF_PV(pvUser); RT_NOREF_PV(cb);
2505
2506	Assert(cb == 1);
2507
2508	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2509	}
2510
2511	/**
2512	* Port I/O Handler for OUT operations.
2513	*
2514	* @returns VBox status code.
2515	*
2516	* @param pDevIns The device instance.
2517	* @param pvUser User argument.
2518	* @param uPort Port number used for the IN operation.
2519	* @param u32 The value to output.
2520	* @param cb The value size in bytes.
2521	*/
2522	PDMBOTHCBDECL(int) buslogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2523	{
2524	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2525	unsigned iRegister = uPort % 4;
2526	uint8_t uVal = (uint8_t)u32;
2527	RT_NOREF2(pvUser, cb);
2528
2529	Assert(cb == 1);
2530
2531	int rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2532
2533	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x rc=%Rrc\n",
2534	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort, rc));
2535
2536	return rc;
2537	}
2538
2539	#ifdef IN_RING3
2540
2541	static int buslogicR3PrepareBIOSSCSIRequest(PBUSLOGIC pThis)
2542	{
2543	uint32_t uTargetDevice;
2544	uint32_t uLun;
2545	uint8_t *pbCdb;
2546	size_t cbCdb;
2547	size_t cbBuf;
2548
2549	int rc = vboxscsiSetupRequest(&pThis->VBoxSCSI, &uLun, &pbCdb, &cbCdb, &cbBuf, &uTargetDevice);
2550	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2551
2552	if ( uTargetDevice < RT_ELEMENTS(pThis->aDeviceStates)
2553	&& pThis->aDeviceStates[uTargetDevice].pDrvBase)
2554	{
2555	PBUSLOGICDEVICE pTgtDev = &pThis->aDeviceStates[uTargetDevice];
2556	PDMMEDIAEXIOREQ hIoReq;
2557	PBUSLOGICREQ pReq;
2558
2559	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
2560	0, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
2561	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2562
2563	pReq->fBIOS = true;
2564	pReq->hIoReq = hIoReq;
2565	pReq->pTargetDevice = pTgtDev;
2566
2567	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
2568
2569	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
2570	pbCdb, cbCdb, PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN,
2571	cbBuf, NULL, 0, &pReq->u8ScsiSts, 30 * RT_MS_1SEC);
2572	if (rc == VINF_SUCCESS \|\| rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2573	{
2574	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2575	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2576	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
2577	}
2578	else if (rc == VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2579	rc = VINF_SUCCESS;
2580
2581	return rc;
2582	}
2583
2584	/* Device is not present. */
2585	AssertMsg(pbCdb[0] == SCSI_INQUIRY,
2586	("Device is not present but command is not inquiry\n"));
2587
2588	SCSIINQUIRYDATA ScsiInquiryData;
2589
2590	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2591	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2592	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2593
2594	memcpy(pThis->VBoxSCSI.pbBuf, &ScsiInquiryData, 5);
2595
2596	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, SCSI_STATUS_OK);
2597	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2598
2599	return rc;
2600	}
2601
2602
2603	/**
2604	* Port I/O Handler for IN operations - BIOS port.
2605	*
2606	* @returns VBox status code.
2607	*
2608	* @param pDevIns The device instance.
2609	* @param pvUser User argument.
2610	* @param uPort Port number used for the IN operation.
2611	* @param pu32 Where to store the result.
2612	* @param cb Number of bytes read.
2613	*/
2614	static DECLCALLBACK(int) buslogicR3BiosIoPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2615	{
2616	RT_NOREF(pvUser, cb);
2617	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2618
2619	Assert(cb == 1);
2620
2621	int rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), pu32);
2622
2623	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2624	// __FUNCTION__, pu32, 1, pu32, (uPort - BUSLOGIC_BIOS_IO_PORT), rc));
2625
2626	return rc;
2627	}
2628
2629	/**
2630	* Port I/O Handler for OUT operations - BIOS port.
2631	*
2632	* @returns VBox status code.
2633	*
2634	* @param pDevIns The device instance.
2635	* @param pvUser User argument.
2636	* @param uPort Port number used for the IN operation.
2637	* @param u32 The value to output.
2638	* @param cb The value size in bytes.
2639	*/
2640	static DECLCALLBACK(int) buslogicR3BiosIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2641	{
2642	RT_NOREF(pvUser, cb);
2643	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2644	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort));
2645
2646	/*
2647	* If there is already a request form the BIOS pending ignore this write
2648	* because it should not happen.
2649	*/
2650	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2651	return VINF_SUCCESS;
2652
2653	Assert(cb == 1);
2654
2655	int rc = vboxscsiWriteRegister(&pThis->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2656	if (rc == VERR_MORE_DATA)
2657	{
2658	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2659	/* Send a notifier to the PDM queue that there are pending requests. */
2660	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2661	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2662	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2663	rc = VINF_SUCCESS;
2664	}
2665	else if (RT_FAILURE(rc))
2666	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2667
2668	return VINF_SUCCESS;
2669	}
2670
2671	/**
2672	* Port I/O Handler for primary port range OUT string operations.
2673	* @see FNIOMIOPORTOUTSTRING for details.
2674	*/
2675	static DECLCALLBACK(int) buslogicR3BiosIoPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2676	uint8_t const pbSrc, uint32_t pcTransfers, unsigned cb)
2677	{
2678	RT_NOREF(pvUser);
2679	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2680	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2681
2682	/*
2683	* If there is already a request form the BIOS pending ignore this write
2684	* because it should not happen.
2685	*/
2686	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2687	return VINF_SUCCESS;
2688
2689	int rc = vboxscsiWriteString(pDevIns, &pThis->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pbSrc, pcTransfers, cb);
2690	if (rc == VERR_MORE_DATA)
2691	{
2692	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2693	/* Send a notifier to the PDM queue that there are pending requests. */
2694	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2695	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2696	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2697	}
2698	else if (RT_FAILURE(rc))
2699	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2700
2701	return VINF_SUCCESS;
2702	}
2703
2704	/**
2705	* Port I/O Handler for primary port range IN string operations.
2706	* @see FNIOMIOPORTINSTRING for details.
2707	*/
2708	static DECLCALLBACK(int) buslogicR3BiosIoPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2709	uint8_t pbDst, uint32_t pcTransfers, unsigned cb)
2710	{
2711	RT_NOREF(pvUser);
2712	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2713	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2714
2715	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2716	pbDst, pcTransfers, cb);
2717	}
2718
2719	/**
2720	* Update the ISA I/O range.
2721	*
2722	* @returns nothing.
2723	* @param pBusLogic Pointer to the BusLogic device instance.
2724	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2725	*/
2726	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2727	{
2728	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2729	uint16_t uNewBase = g_aISABases[uCode];
2730	int rc = VINF_SUCCESS;
2731
2732	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2733
2734	/* Check if the same port range is already registered. */
2735	if (uNewBase != pBusLogic->IOISABase)
2736	{
2737	/* Unregister the old range, if any. */
2738	if (pBusLogic->IOISABase)
2739	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2740
2741	if (RT_SUCCESS(rc))
2742	{
2743	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2744	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2745
2746	if (uNewBase)
2747	{
2748	/* Register the new range if requested. */
2749	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2750	buslogicIOPortWrite, buslogicIOPortRead,
2751	NULL, NULL,
2752	"BusLogic ISA");
2753	if (RT_SUCCESS(rc))
2754	{
2755	pBusLogic->IOISABase = uNewBase;
2756	pBusLogic->uISABaseCode = uCode;
2757	}
2758	}
2759	}
2760	if (RT_SUCCESS(rc))
2761	{
2762	if (uNewBase)
2763	{
2764	Log(("ISA I/O base: %x\n", uNewBase));
2765	LogRel(("BusLogic: ISA I/O base: %x\n", uNewBase));
2766	}
2767	else
2768	{
2769	Log(("Disabling ISA I/O ports.\n"));
2770	LogRel(("BusLogic: ISA I/O disabled\n"));
2771	}
2772	}
2773
2774	}
2775	return rc;
2776	}
2777
2778
2779	/**
2780	* @callback_method_impl{FNPCIIOREGIONMAP}
2781	*/
2782	static DECLCALLBACK(int) buslogicR3MmioMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
2783	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
2784	{
2785	RT_NOREF(pPciDev, iRegion);
2786	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2787	int rc = VINF_SUCCESS;
2788
2789	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%RGp\n", __FUNCTION__, GCPhysAddress, cb));
2790
2791	Assert(cb >= 32);
2792
2793	if (enmType == PCI_ADDRESS_SPACE_MEM)
2794	{
2795	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2796	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2797	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2798	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2799	if (RT_FAILURE(rc))
2800	return rc;
2801
2802	if (pThis->fR0Enabled)
2803	{
2804	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2805	"buslogicMMIOWrite", "buslogicMMIORead");
2806	if (RT_FAILURE(rc))
2807	return rc;
2808	}
2809
2810	if (pThis->fGCEnabled)
2811	{
2812	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2813	"buslogicMMIOWrite", "buslogicMMIORead");
2814	if (RT_FAILURE(rc))
2815	return rc;
2816	}
2817
2818	pThis->MMIOBase = GCPhysAddress;
2819	}
2820	else if (enmType == PCI_ADDRESS_SPACE_IO)
2821	{
2822	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2823	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2824	if (RT_FAILURE(rc))
2825	return rc;
2826
2827	if (pThis->fR0Enabled)
2828	{
2829	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2830	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2831	if (RT_FAILURE(rc))
2832	return rc;
2833	}
2834
2835	if (pThis->fGCEnabled)
2836	{
2837	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2838	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2839	if (RT_FAILURE(rc))
2840	return rc;
2841	}
2842
2843	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2844	}
2845	else
2846	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2847
2848	return rc;
2849	}
2850
2851	static int buslogicR3ReqComplete(PBUSLOGIC pThis, PBUSLOGICREQ pReq, int rcReq)
2852	{
2853	RT_NOREF(rcReq);
2854	PBUSLOGICDEVICE pTgtDev = pReq->pTargetDevice;
2855
2856	LogFlowFunc(("before decrement %u\n", pTgtDev->cOutstandingRequests));
2857	ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
2858	LogFlowFunc(("after decrement %u\n", pTgtDev->cOutstandingRequests));
2859
2860	if (pReq->fBIOS)
2861	{
2862	int rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, pReq->u8ScsiSts);
2863	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2864	}
2865	else
2866	{
2867	if (pReq->pbSenseBuffer)
2868	buslogicR3SenseBufferFree(pReq, (pReq->u8ScsiSts != SCSI_STATUS_OK));
2869
2870	if (pReq->u8ScsiSts == SCSI_STATUS_OK)
2871	buslogicR3SendIncomingMailbox(pThis, pReq->GCPhysAddrCCB, &pReq->CCBGuest,
2872	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2873	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2874	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2875	else if (pReq->u8ScsiSts == SCSI_STATUS_CHECK_CONDITION)
2876	buslogicR3SendIncomingMailbox(pThis, pReq->GCPhysAddrCCB, &pReq->CCBGuest,
2877	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2878	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2879	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2880	else
2881	AssertMsgFailed(("invalid completion status %d\n", pReq->u8ScsiSts));
2882	}
2883
2884	#ifdef LOG_ENABLED
2885	buslogicR3DumpCCBInfo(&pReq->CCBGuest, pReq->fIs24Bit);
2886	#endif
2887
2888	if (pTgtDev->cOutstandingRequests == 0 && pThis->fSignalIdle)
2889	PDMDevHlpAsyncNotificationCompleted(pThis->pDevInsR3);
2890
2891	return VINF_SUCCESS;
2892	}
2893
2894	static DECLCALLBACK(int) buslogicR3QueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2895	uint32_t piInstance, uint32_t piLUN)
2896	{
2897	PBUSLOGICDEVICE pBusLogicDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaPort);
2898	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2899
2900	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2901	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2902	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2903
2904	*ppcszController = pDevIns->pReg->szName;
2905	*piInstance = pDevIns->iInstance;
2906	*piLUN = pBusLogicDevice->iLUN;
2907
2908	return VINF_SUCCESS;
2909	}
2910
2911	/**
2912	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyFromBuf}
2913	*/
2914	static DECLCALLBACK(int) buslogicR3IoReqCopyFromBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2915	void *pvIoReqAlloc, uint32_t offDst, PRTSGBUF pSgBuf,
2916	size_t cbCopy)
2917	{
2918	RT_NOREF1(hIoReq);
2919	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2920	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
2921
2922	size_t cbCopied = 0;
2923	if (RT_UNLIKELY(pReq->fBIOS))
2924	cbCopied = vboxscsiCopyToBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offDst, cbCopy);
2925	else
2926	cbCopied = buslogicR3CopySgBufToGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offDst, cbCopy);
2927	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_OVERFLOW;
2928	}
2929
2930	/**
2931	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyToBuf}
2932	*/
2933	static DECLCALLBACK(int) buslogicR3IoReqCopyToBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2934	void *pvIoReqAlloc, uint32_t offSrc, PRTSGBUF pSgBuf,
2935	size_t cbCopy)
2936	{
2937	RT_NOREF1(hIoReq);
2938	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2939	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
2940
2941	size_t cbCopied = 0;
2942	if (RT_UNLIKELY(pReq->fBIOS))
2943	cbCopied = vboxscsiCopyFromBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offSrc, cbCopy);
2944	else
2945	cbCopied = buslogicR3CopySgBufFromGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offSrc, cbCopy);
2946	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_UNDERRUN;
2947	}
2948
2949	/**
2950	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCompleteNotify}
2951	*/
2952	static DECLCALLBACK(int) buslogicR3IoReqCompleteNotify(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2953	void *pvIoReqAlloc, int rcReq)
2954	{
2955	RT_NOREF(hIoReq);
2956	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2957	buslogicR3ReqComplete(pTgtDev->CTX_SUFF(pBusLogic), (PBUSLOGICREQ)pvIoReqAlloc, rcReq);
2958	return VINF_SUCCESS;
2959	}
2960
2961	/**
2962	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqStateChanged}
2963	*/
2964	static DECLCALLBACK(void) buslogicR3IoReqStateChanged(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2965	void *pvIoReqAlloc, PDMMEDIAEXIOREQSTATE enmState)
2966	{
2967	RT_NOREF3(hIoReq, pvIoReqAlloc, enmState);
2968	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2969
2970	switch (enmState)
2971	{
2972	case PDMMEDIAEXIOREQSTATE_SUSPENDED:
2973	{
2974	/* Make sure the request is not accounted for so the VM can suspend successfully. */
2975	uint32_t cTasksActive = ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
2976	if (!cTasksActive && pTgtDev->CTX_SUFF(pBusLogic)->fSignalIdle)
2977	PDMDevHlpAsyncNotificationCompleted(pTgtDev->CTX_SUFF(pBusLogic)->pDevInsR3);
2978	break;
2979	}
2980	case PDMMEDIAEXIOREQSTATE_ACTIVE:
2981	/* Make sure the request is accounted for so the VM suspends only when the request is complete. */
2982	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
2983	break;
2984	default:
2985	AssertMsgFailed(("Invalid request state given %u\n", enmState));
2986	}
2987	}
2988
2989	/**
2990	* @interface_method_impl{PDMIMEDIAEXPORT,pfnMediumEjected}
2991	*/
2992	static DECLCALLBACK(void) buslogicR3MediumEjected(PPDMIMEDIAEXPORT pInterface)
2993	{
2994	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2995	PBUSLOGIC pThis = pTgtDev->CTX_SUFF(pBusLogic);
2996
2997	RT_NOREF(pThis); /** @todo */
2998	}
2999
3000	static int buslogicR3DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3001	{
3002	int rc = VINF_SUCCESS;
3003	uint8_t uTargetIdCCB;
3004	CCBU CCBGuest;
3005
3006	/* Fetch the CCB from guest memory. */
3007	/** @todo How much do we really have to read? */
3008	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3009	&CCBGuest, sizeof(CCB32));
3010
3011	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3012	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3013	{
3014	PBUSLOGICDEVICE pTgtDev = &pBusLogic->aDeviceStates[uTargetIdCCB];
3015
3016	#ifdef LOG_ENABLED
3017	buslogicR3DumpCCBInfo(&CCBGuest, pBusLogic->fMbxIs24Bit);
3018	#endif
3019
3020	/* Check if device is present on bus. If not return error immediately and don't process this further. */
3021	if (RT_LIKELY(pTgtDev->fPresent))
3022	{
3023	PDMMEDIAEXIOREQ hIoReq;
3024	PBUSLOGICREQ pReq;
3025	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
3026	GCPhysAddrCCB, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
3027	if (RT_SUCCESS(rc))
3028	{
3029	pReq->pTargetDevice = pTgtDev;
3030	pReq->GCPhysAddrCCB = GCPhysAddrCCB;
3031	pReq->fBIOS = false;
3032	pReq->hIoReq = hIoReq;
3033	pReq->fIs24Bit = pBusLogic->fMbxIs24Bit;
3034
3035	/* Make a copy of the CCB */
3036	memcpy(&pReq->CCBGuest, &CCBGuest, sizeof(CCBGuest));
3037
3038	/* Alloc required buffers. */
3039	rc = buslogicR3SenseBufferAlloc(pReq);
3040	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
3041
3042	size_t cbBuf = 0;
3043	rc = buslogicR3QueryDataBufferSize(pBusLogic->CTX_SUFF(pDevIns), &pReq->CCBGuest, pReq->fIs24Bit, &cbBuf);
3044	AssertRC(rc);
3045
3046	uint32_t uLun = pReq->fIs24Bit ? pReq->CCBGuest.o.uLogicalUnit
3047	: pReq->CCBGuest.n.uLogicalUnit;
3048
3049	PDMMEDIAEXIOREQSCSITXDIR enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN;
3050	size_t cbSense = buslogicR3ConvertSenseBufferLength(CCBGuest.c.cbSenseData);
3051
3052	if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
3053	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_NONE;
3054	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
3055	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_TO_DEVICE;
3056	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
3057	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_FROM_DEVICE;
3058
3059	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3060	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
3061	&pReq->CCBGuest.c.abCDB[0], pReq->CCBGuest.c.cbCDB,
3062	enmXferDir, cbBuf, pReq->pbSenseBuffer, cbSense,
3063	&pReq->u8ScsiSts, 30 * RT_MS_1SEC);
3064	if (rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
3065	buslogicR3ReqComplete(pBusLogic, pReq, rc);
3066	}
3067	else
3068	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3069	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3070	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3071	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3072	}
3073	else
3074	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3075	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3076	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3077	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3078	}
3079	else
3080	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3081	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3082	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3083	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3084
3085	return rc;
3086	}
3087
3088	static int buslogicR3DeviceSCSIRequestAbort(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3089	{
3090	int rc = VINF_SUCCESS;
3091	uint8_t uTargetIdCCB;
3092	CCBU CCBGuest;
3093
3094	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3095	&CCBGuest, sizeof(CCB32));
3096
3097	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3098	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3099	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3100	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED,
3101	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3102	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND);
3103	else
3104	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3105	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3106	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3107	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3108
3109	return rc;
3110	}
3111
3112	/**
3113	* Read a mailbox from guest memory. Convert 24-bit mailboxes to
3114	* 32-bit format.
3115	*
3116	* @returns Mailbox guest physical address.
3117	* @param pBusLogic Pointer to the BusLogic instance data.
3118	* @param pMbx Pointer to the mailbox to read into.
3119	*/
3120	static RTGCPHYS buslogicR3ReadOutgoingMailbox(PBUSLOGIC pBusLogic, PMailbox32 pMbx)
3121	{
3122	RTGCPHYS GCMailbox;
3123
3124	if (pBusLogic->fMbxIs24Bit)
3125	{
3126	Mailbox24 Mbx24;
3127
3128	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox24));
3129	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3130	pMbx->u32PhysAddrCCB = ADDR_TO_U32(Mbx24.aPhysAddrCCB);
3131	pMbx->u.out.uActionCode = Mbx24.uCmdState;
3132	}
3133	else
3134	{
3135	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox32));
3136	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, pMbx, sizeof(Mailbox32));
3137	}
3138
3139	return GCMailbox;
3140	}
3141
3142	/**
3143	* Read mailbox from the guest and execute command.
3144	*
3145	* @returns VBox status code.
3146	* @param pBusLogic Pointer to the BusLogic instance data.
3147	*/
3148	static int buslogicR3ProcessMailboxNext(PBUSLOGIC pBusLogic)
3149	{
3150	RTGCPHYS GCPhysAddrMailboxCurrent;
3151	Mailbox32 MailboxGuest;
3152	int rc = VINF_SUCCESS;
3153
3154	if (!pBusLogic->fStrictRoundRobinMode)
3155	{
3156	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
3157	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
3158
3159	do
3160	{
3161	/* Fetch mailbox from guest memory. */
3162	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3163
3164	/* Check the next mailbox. */
3165	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3166	} while ( MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
3167	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
3168	}
3169	else
3170	{
3171	/* Fetch mailbox from guest memory. */
3172	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3173	}
3174
3175	/*
3176	* Check if the mailbox is actually loaded.
3177	* It might be possible that the guest notified us without
3178	* a loaded mailbox. Do nothing in that case but leave a
3179	* log entry.
3180	*/
3181	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
3182	{
3183	Log(("No loaded mailbox left\n"));
3184	return VERR_NO_DATA;
3185	}
3186
3187	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB));
3188	#ifdef LOG_ENABLED
3189	buslogicR3DumpMailboxInfo(&MailboxGuest, true);
3190	#endif
3191
3192	/* We got the mailbox, mark it as free in the guest. */
3193	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
3194	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
3195	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
3196
3197	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
3198	rc = buslogicR3DeviceSCSIRequestSetup(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3199	else if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
3200	{
3201	LogFlow(("Aborting mailbox\n"));
3202	rc = buslogicR3DeviceSCSIRequestAbort(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3203	}
3204	else
3205	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", MailboxGuest.u.out.uActionCode));
3206
3207	AssertRC(rc);
3208
3209	/* Advance to the next mailbox. */
3210	if (pBusLogic->fStrictRoundRobinMode)
3211	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3212
3213	return rc;
3214	}
3215
3216	/**
3217	* Transmit queue consumer
3218	* Queue a new async task.
3219	*
3220	* @returns Success indicator.
3221	* If false the item will not be removed and the flushing will stop.
3222	* @param pDevIns The device instance.
3223	* @param pItem The item to consume. Upon return this item will be freed.
3224	*/
3225	static DECLCALLBACK(bool) buslogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
3226	{
3227	RT_NOREF(pItem);
3228	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3229
3230	int rc = SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3231	AssertRC(rc);
3232
3233	return true;
3234	}
3235
3236	/** @callback_method_impl{FNSSMDEVLIVEEXEC} */
3237	static DECLCALLBACK(int) buslogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
3238	{
3239	RT_NOREF(uPass);
3240	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3241
3242	/* Save the device config. */
3243	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3244	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
3245
3246	return VINF_SSM_DONT_CALL_AGAIN;
3247	}
3248
3249	/** @callback_method_impl{FNSSMDEVSAVEEXEC} */
3250	static DECLCALLBACK(int) buslogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3251	{
3252	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3253	uint32_t cReqsSuspended = 0;
3254
3255	/* Every device first. */
3256	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3257	{
3258	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3259
3260	AssertMsg(!pDevice->cOutstandingRequests,
3261	("There are still outstanding requests on this device\n"));
3262	SSMR3PutBool(pSSM, pDevice->fPresent);
3263	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
3264
3265	if (pDevice->fPresent)
3266	cReqsSuspended += pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3267	}
3268	/* Now the main device state. */
3269	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
3270	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
3271	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
3272	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3273	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
3274	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3275	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
3276	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
3277	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
3278	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3279	SSMR3PutU8 (pSSM, pBusLogic->iReply);
3280	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
3281	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
3282	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
3283	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
3284	SSMR3PutBool (pSSM, pBusLogic->fMbxIs24Bit);
3285	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
3286	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
3287	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
3288	SSMR3PutBool (pSSM, pBusLogic->fNotificationSent);
3289	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
3290	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
3291	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
3292	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
3293
3294	vboxscsiR3SaveExec(&pBusLogic->VBoxSCSI, pSSM);
3295
3296	SSMR3PutU32(pSSM, cReqsSuspended);
3297
3298	/* Save the physical CCB address of all suspended requests. */
3299	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates) && cReqsSuspended; i++)
3300	{
3301	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3302	if (pDevice->fPresent)
3303	{
3304	uint32_t cThisReqsSuspended = pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3305
3306	cReqsSuspended -= cThisReqsSuspended;
3307	if (cThisReqsSuspended)
3308	{
3309	PDMMEDIAEXIOREQ hIoReq;
3310	PBUSLOGICREQ pReq;
3311	int rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedStart(pDevice->pDrvMediaEx, &hIoReq,
3312	(void **)&pReq);
3313	AssertRCBreak(rc);
3314
3315	for (;;)
3316	{
3317	SSMR3PutU32(pSSM, (uint32_t)pReq->GCPhysAddrCCB);
3318
3319	cThisReqsSuspended--;
3320	if (!cThisReqsSuspended)
3321	break;
3322
3323	rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedNext(pDevice->pDrvMediaEx, hIoReq,
3324	&hIoReq, (void **)&pReq);
3325	AssertRCBreak(rc);
3326	}
3327	}
3328	}
3329	}
3330
3331	return SSMR3PutU32(pSSM, UINT32_MAX);
3332	}
3333
3334	/** @callback_method_impl{FNSSMDEVLOADDONE} */
3335	static DECLCALLBACK(int) buslogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3336	{
3337	RT_NOREF(pSSM);
3338	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3339
3340	buslogicR3RegisterISARange(pThis, pThis->uISABaseCode);
3341
3342	/* Kick of any requests we might need to redo. */
3343	if (pThis->VBoxSCSI.fBusy)
3344	{
3345
3346	/* The BIOS had a request active when we got suspended. Resume it. */
3347	int rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3348	AssertRC(rc);
3349	}
3350	else if (pThis->cReqsRedo)
3351	{
3352	for (unsigned i = 0; i < pThis->cReqsRedo; i++)
3353	{
3354	int rc = buslogicR3DeviceSCSIRequestSetup(pThis, pThis->paGCPhysAddrCCBRedo[i]);
3355	AssertRC(rc);
3356	}
3357
3358	RTMemFree(pThis->paGCPhysAddrCCBRedo);
3359	pThis->paGCPhysAddrCCBRedo = NULL;
3360	pThis->cReqsRedo = 0;
3361	}
3362
3363	return VINF_SUCCESS;
3364	}
3365
3366	/** @callback_method_impl{FNSSMDEVLOADEXEC} */
3367	static DECLCALLBACK(int) buslogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3368	{
3369	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3370	int rc = VINF_SUCCESS;
3371
3372	/* We support saved states only from this and older versions. */
3373	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
3374	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3375
3376	/* Every device first. */
3377	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3378	{
3379	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3380
3381	AssertMsg(!pDevice->cOutstandingRequests,
3382	("There are still outstanding requests on this device\n"));
3383	bool fPresent;
3384	rc = SSMR3GetBool(pSSM, &fPresent);
3385	AssertRCReturn(rc, rc);
3386	if (pDevice->fPresent != fPresent)
3387	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
3388
3389	if (uPass == SSM_PASS_FINAL)
3390	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
3391	}
3392
3393	if (uPass != SSM_PASS_FINAL)
3394	return VINF_SUCCESS;
3395
3396	/* Now the main device state. */
3397	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
3398	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
3399	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
3400	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3401	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
3402	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE)
3403	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3404	else
3405	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, BUSLOGIC_COMMAND_SIZE_OLD);
3406	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
3407	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
3408	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
3409	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3410	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
3411	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
3412	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
3413	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
3414	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
3415	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX)
3416	SSMR3GetBool (pSSM, &pBusLogic->fMbxIs24Bit);
3417	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
3418	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
3419	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
3420	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSent);
3421	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
3422	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
3423	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
3424	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
3425
3426	rc = vboxscsiR3LoadExec(&pBusLogic->VBoxSCSI, pSSM);
3427	if (RT_FAILURE(rc))
3428	{
3429	LogRel(("BusLogic: Failed to restore BIOS state: %Rrc.\n", rc));
3430	return PDMDEV_SET_ERROR(pDevIns, rc,
3431	N_("BusLogic: Failed to restore BIOS state\n"));
3432	}
3433
3434	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
3435	{
3436	/* Check if there are pending tasks saved. */
3437	uint32_t cTasks = 0;
3438
3439	SSMR3GetU32(pSSM, &cTasks);
3440
3441	if (cTasks)
3442	{
3443	pBusLogic->paGCPhysAddrCCBRedo = (PRTGCPHYS)RTMemAllocZ(cTasks * sizeof(RTGCPHYS));
3444	if (RT_LIKELY(pBusLogic->paGCPhysAddrCCBRedo))
3445	{
3446	pBusLogic->cReqsRedo = cTasks;
3447
3448	for (uint32_t i = 0; i < cTasks; i++)
3449	{
3450	uint32_t u32PhysAddrCCB;
3451
3452	rc = SSMR3GetU32(pSSM, &u32PhysAddrCCB);
3453	if (RT_FAILURE(rc))
3454	break;
3455
3456	pBusLogic->paGCPhysAddrCCBRedo[i] = u32PhysAddrCCB;
3457	}
3458	}
3459	else
3460	rc = VERR_NO_MEMORY;
3461	}
3462	}
3463
3464	if (RT_SUCCESS(rc))
3465	{
3466	uint32_t u32;
3467	rc = SSMR3GetU32(pSSM, &u32);
3468	if (RT_SUCCESS(rc))
3469	AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3470	}
3471
3472	return rc;
3473	}
3474
3475	/**
3476	* Gets the pointer to the status LED of a device - called from the SCSI driver.
3477	*
3478	* @returns VBox status code.
3479	* @param pInterface Pointer to the interface structure containing the called function pointer.
3480	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
3481	* doesn't know about other LUN's.
3482	* @param ppLed Where to store the LED pointer.
3483	*/
3484	static DECLCALLBACK(int) buslogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3485	{
3486	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, ILed);
3487	if (iLUN == 0)
3488	{
3489	*ppLed = &pDevice->Led;
3490	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3491	return VINF_SUCCESS;
3492	}
3493	return VERR_PDM_LUN_NOT_FOUND;
3494	}
3495
3496	/**
3497	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3498	*/
3499	static DECLCALLBACK(void ) buslogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
3500	{
3501	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IBase);
3502	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
3503	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDevice->IMediaPort);
3504	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAEXPORT, &pDevice->IMediaExPort);
3505	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
3506	return NULL;
3507	}
3508
3509	/**
3510	* Gets the pointer to the status LED of a unit.
3511	*
3512	* @returns VBox status code.
3513	* @param pInterface Pointer to the interface structure containing the called function pointer.
3514	* @param iLUN The unit which status LED we desire.
3515	* @param ppLed Where to store the LED pointer.
3516	*/
3517	static DECLCALLBACK(int) buslogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3518	{
3519	PBUSLOGIC pBusLogic = RT_FROM_MEMBER(pInterface, BUSLOGIC, ILeds);
3520	if (iLUN < BUSLOGIC_MAX_DEVICES)
3521	{
3522	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
3523	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3524	return VINF_SUCCESS;
3525	}
3526	return VERR_PDM_LUN_NOT_FOUND;
3527	}
3528
3529	/**
3530	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3531	*/
3532	static DECLCALLBACK(void ) buslogicR3StatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
3533	{
3534	PBUSLOGIC pThis = RT_FROM_MEMBER(pInterface, BUSLOGIC, IBase);
3535	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3536	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
3537	return NULL;
3538	}
3539
3540	/**
3541	* The worker thread processing requests from the guest.
3542	*
3543	* @returns VBox status code.
3544	* @param pDevIns The device instance.
3545	* @param pThread The thread structure.
3546	*/
3547	static DECLCALLBACK(int) buslogicR3Worker(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3548	{
3549	RT_NOREF(pDevIns);
3550	PBUSLOGIC pThis = (PBUSLOGIC)pThread->pvUser;
3551	int rc = VINF_SUCCESS;
3552
3553	if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
3554	return VINF_SUCCESS;
3555
3556	while (pThread->enmState == PDMTHREADSTATE_RUNNING)
3557	{
3558	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, true);
3559	bool fNotificationSent = ASMAtomicXchgBool(&pThis->fNotificationSent, false);
3560	if (!fNotificationSent)
3561	{
3562	Assert(ASMAtomicReadBool(&pThis->fWrkThreadSleeping));
3563	rc = SUPSemEventWaitNoResume(pThis->pSupDrvSession, pThis->hEvtProcess, RT_INDEFINITE_WAIT);
3564	AssertLogRelMsgReturn(RT_SUCCESS(rc) \|\| rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
3565	if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING))
3566	break;
3567	LogFlowFunc(("Woken up with rc=%Rrc\n", rc));
3568	ASMAtomicWriteBool(&pThis->fNotificationSent, false);
3569	}
3570
3571	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, false);
3572
3573	/* Check whether there is a BIOS request pending and process it first. */
3574	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
3575	{
3576	rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3577	AssertRC(rc);
3578	ASMAtomicXchgBool(&pThis->fBiosReqPending, false);
3579	}
3580	else
3581	{
3582	ASMAtomicXchgU32(&pThis->cMailboxesReady, 0); /** @todo Actually not required anymore but to stay compatible with older saved states. */
3583
3584	/* Process mailboxes. */
3585	do
3586	{
3587	rc = buslogicR3ProcessMailboxNext(pThis);
3588	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
3589	} while (RT_SUCCESS(rc));
3590	}
3591	} /* While running */
3592
3593	return VINF_SUCCESS;
3594	}
3595
3596
3597	/**
3598	* Unblock the worker thread so it can respond to a state change.
3599	*
3600	* @returns VBox status code.
3601	* @param pDevIns The device instance.
3602	* @param pThread The send thread.
3603	*/
3604	static DECLCALLBACK(int) buslogicR3WorkerWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3605	{
3606	RT_NOREF(pThread);
3607	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3608	return SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3609	}
3610
3611	/**
3612	* BusLogic debugger info callback.
3613	*
3614	* @param pDevIns The device instance.
3615	* @param pHlp The output helpers.
3616	* @param pszArgs The arguments.
3617	*/
3618	static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
3619	{
3620	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3621	unsigned i;
3622	bool fVerbose = false;
3623
3624	/* Parse arguments. */
3625	if (pszArgs)
3626	fVerbose = strstr(pszArgs, "verbose") != NULL;
3627
3628	/* Show basic information. */
3629	pHlp->pfnPrintf(pHlp,
3630	"%s#%d: PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u GC=%RTbool R0=%RTbool\n",
3631	pDevIns->pReg->szName,
3632	pDevIns->iInstance,
3633	pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
3634	PCIDevGetInterruptLine(&pThis->dev),
3635	!!pThis->fGCEnabled, !!pThis->fR0Enabled);
3636
3637	/* Print mailbox state. */
3638	if (pThis->regStatus & BL_STAT_INREQ)
3639	pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n");
3640	else
3641	pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp (%d LUN CCBs)\n",
3642	pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox,
3643	pThis->GCPhysAddrMailboxOutgoingBase,
3644	pThis->fMbxIs24Bit ? 8 : pThis->fExtendedLunCCBFormat ? 64 : 8);
3645
3646	/* Print register contents. */
3647	pHlp->pfnPrintf(pHlp, "Registers: STAT=%02x INTR=%02x GEOM=%02x\n",
3648	pThis->regStatus, pThis->regInterrupt, pThis->regGeometry);
3649
3650	/* Print miscellaneous state. */
3651	pHlp->pfnPrintf(pHlp, "HAC interrupts: %s\n",
3652	pThis->fIRQEnabled ? "on" : "off");
3653
3654	/* Print the current command, if any. */
3655	if (pThis->uOperationCode != 0xff )
3656	pHlp->pfnPrintf(pHlp, "Current command: %02X\n", pThis->uOperationCode);
3657
3658	if (fVerbose && (pThis->regStatus & BL_STAT_INREQ) == 0)
3659	{
3660	RTGCPHYS GCMailbox;
3661
3662	/* Dump the mailbox contents. */
3663	if (pThis->fMbxIs24Bit)
3664	{
3665	Mailbox24 Mbx24;
3666
3667	/* Outgoing mailbox, 24-bit format. */
3668	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3669	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (24-bit) at %06X:\n", GCMailbox);
3670	for (i = 0; i < pThis->cMailbox; ++i)
3671	{
3672	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3673	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X action code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3674	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3675	GCMailbox += sizeof(Mailbox24);
3676	}
3677
3678	/* Incoming mailbox, 24-bit format. */
3679	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox24));
3680	pHlp->pfnPrintf(pHlp, " Incoming mailbox entries (24-bit) at %06X:\n", GCMailbox);
3681	for (i = 0; i < pThis->cMailbox; ++i)
3682	{
3683	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3684	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X completion code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3685	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxIncomingPositionCurrent == i ? " *" : "");
3686	GCMailbox += sizeof(Mailbox24);
3687	}
3688
3689	}
3690	else
3691	{
3692	Mailbox32 Mbx32;
3693
3694	/* Outgoing mailbox, 32-bit format. */
3695	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3696	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3697	for (i = 0; i < pThis->cMailbox; ++i)
3698	{
3699	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3700	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X action code %02X", i, Mbx32.u32PhysAddrCCB, Mbx32.u.out.uActionCode);
3701	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3702	GCMailbox += sizeof(Mailbox32);
3703	}
3704
3705	/* Incoming mailbox, 32-bit format. */
3706	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox32));
3707	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3708	for (i = 0; i < pThis->cMailbox; ++i)
3709	{
3710	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3711	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X completion code %02X BTSTAT %02X SDSTAT %02X", i,
3712	Mbx32.u32PhysAddrCCB, Mbx32.u.in.uCompletionCode, Mbx32.u.in.uHostAdapterStatus, Mbx32.u.in.uTargetDeviceStatus);
3713	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3714	GCMailbox += sizeof(Mailbox32);
3715	}
3716
3717	}
3718	}
3719	}
3720
3721	/* -=-=-=-=- Helper -=-=-=-=- */
3722
3723	/**
3724	* Checks if all asynchronous I/O is finished.
3725	*
3726	* Used by buslogicR3Reset, buslogicR3Suspend and buslogicR3PowerOff.
3727	*
3728	* @returns true if quiesced, false if busy.
3729	* @param pDevIns The device instance.
3730	*/
3731	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
3732	{
3733	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3734
3735	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3736	{
3737	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3738	if (pThisDevice->pDrvBase)
3739	{
3740	if (pThisDevice->cOutstandingRequests != 0)
3741	return false;
3742	}
3743	}
3744
3745	return true;
3746	}
3747
3748	/**
3749	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff.
3750	*
3751	* @returns true if we've quiesced, false if we're still working.
3752	* @param pDevIns The device instance.
3753	*/
3754	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3755	{
3756	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3757	return false;
3758
3759	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3760	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3761	return true;
3762	}
3763
3764	/**
3765	* Common worker for buslogicR3Suspend and buslogicR3PowerOff.
3766	*/
3767	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns)
3768	{
3769	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3770
3771	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3772	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3773	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3774	else
3775	{
3776	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3777	AssertMsg(!pThis->fNotificationSent, ("The PDM Queue should be empty at this point\n"));
3778	}
3779	}
3780
3781	/**
3782	* Suspend notification.
3783	*
3784	* @param pDevIns The device instance data.
3785	*/
3786	static DECLCALLBACK(void) buslogicR3Suspend(PPDMDEVINS pDevIns)
3787	{
3788	Log(("buslogicR3Suspend\n"));
3789	buslogicR3SuspendOrPowerOff(pDevIns);
3790	}
3791
3792	/**
3793	* Detach notification.
3794	*
3795	* One harddisk at one port has been unplugged.
3796	* The VM is suspended at this point.
3797	*
3798	* @param pDevIns The device instance.
3799	* @param iLUN The logical unit which is being detached.
3800	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3801	*/
3802	static DECLCALLBACK(void) buslogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3803	{
3804	RT_NOREF(fFlags);
3805	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3806	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3807
3808	Log(("%s:\n", __FUNCTION__));
3809
3810	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3811	("BusLogic: Device does not support hotplugging\n"));
3812
3813	/*
3814	* Zero some important members.
3815	*/
3816	pDevice->fPresent = false;
3817	pDevice->pDrvBase = NULL;
3818	pDevice->pDrvMedia = NULL;
3819	pDevice->pDrvMediaEx = NULL;
3820	}
3821
3822	/**
3823	* Attach command.
3824	*
3825	* This is called when we change block driver.
3826	*
3827	* @returns VBox status code.
3828	* @param pDevIns The device instance.
3829	* @param iLUN The logical unit which is being detached.
3830	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3831	*/
3832	static DECLCALLBACK(int) buslogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3833	{
3834	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3835	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3836	int rc;
3837
3838	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3839	("BusLogic: Device does not support hotplugging\n"),
3840	VERR_INVALID_PARAMETER);
3841
3842	/* the usual paranoia */
3843	AssertRelease(!pDevice->pDrvBase);
3844	AssertRelease(!pDevice->pDrvMedia);
3845	AssertRelease(!pDevice->pDrvMediaEx);
3846	Assert(pDevice->iLUN == iLUN);
3847
3848	/*
3849	* Try attach the SCSI driver and get the interfaces,
3850	* required as well as optional.
3851	*/
3852	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3853	if (RT_SUCCESS(rc))
3854	{
3855	/* Query the media interface. */
3856	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
3857	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
3858	("BusLogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
3859	VERR_PDM_MISSING_INTERFACE);
3860
3861	/* Get the extended media interface. */
3862	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
3863	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
3864	("BusLogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
3865	VERR_PDM_MISSING_INTERFACE);
3866
3867	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
3868	AssertMsgRCReturn(rc, ("BusLogic configuration error: LUN#%u: Failed to set I/O request size!", pDevice->iLUN),
3869	rc);
3870
3871	pDevice->fPresent = true;
3872	}
3873	else
3874	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3875
3876	if (RT_FAILURE(rc))
3877	{
3878	pDevice->fPresent = false;
3879	pDevice->pDrvBase = NULL;
3880	pDevice->pDrvMedia = NULL;
3881	pDevice->pDrvMediaEx = NULL;
3882	}
3883	return rc;
3884	}
3885
3886	/**
3887	* Callback employed by buslogicR3Reset.
3888	*
3889	* @returns true if we've quiesced, false if we're still working.
3890	* @param pDevIns The device instance.
3891	*/
3892	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3893	{
3894	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3895
3896	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3897	return false;
3898	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3899
3900	buslogicR3HwReset(pThis, true);
3901	return true;
3902	}
3903
3904	/**
3905	* @copydoc FNPDMDEVRESET
3906	*/
3907	static DECLCALLBACK(void) buslogicR3Reset(PPDMDEVINS pDevIns)
3908	{
3909	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3910
3911	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3912	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3913	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
3914	else
3915	{
3916	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3917	buslogicR3HwReset(pThis, true);
3918	}
3919	}
3920
3921	static DECLCALLBACK(void) buslogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
3922	{
3923	RT_NOREF(offDelta);
3924	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3925
3926	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3927	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3928
3929	for (uint32_t i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
3930	{
3931	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3932
3933	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3934	}
3935
3936	}
3937
3938	/**
3939	* Poweroff notification.
3940	*
3941	* @param pDevIns Pointer to the device instance
3942	*/
3943	static DECLCALLBACK(void) buslogicR3PowerOff(PPDMDEVINS pDevIns)
3944	{
3945	Log(("buslogicR3PowerOff\n"));
3946	buslogicR3SuspendOrPowerOff(pDevIns);
3947	}
3948
3949	/**
3950	* Destroy a driver instance.
3951	*
3952	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
3953	* resources can be freed correctly.
3954	*
3955	* @param pDevIns The device instance data.
3956	*/
3957	static DECLCALLBACK(int) buslogicR3Destruct(PPDMDEVINS pDevIns)
3958	{
3959	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3960	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
3961
3962	PDMR3CritSectDelete(&pThis->CritSectIntr);
3963
3964	if (pThis->hEvtProcess != NIL_SUPSEMEVENT)
3965	{
3966	SUPSemEventClose(pThis->pSupDrvSession, pThis->hEvtProcess);
3967	pThis->hEvtProcess = NIL_SUPSEMEVENT;
3968	}
3969
3970	return VINF_SUCCESS;
3971	}
3972
3973	/**
3974	* @interface_method_impl{PDMDEVREG,pfnConstruct}
3975	*/
3976	static DECLCALLBACK(int) buslogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3977	{
3978	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3979	int rc = VINF_SUCCESS;
3980	bool fBootable = true;
3981	char achISACompat[16];
3982	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3983
3984	/*
3985	* Init instance data (do early because of constructor).
3986	*/
3987	pThis->pDevInsR3 = pDevIns;
3988	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3989	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3990	pThis->IBase.pfnQueryInterface = buslogicR3StatusQueryInterface;
3991	pThis->ILeds.pfnQueryStatusLed = buslogicR3StatusQueryStatusLed;
3992
3993	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
3994	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
3995	PCIDevSetCommand (&pThis->dev, 0x0003);
3996	PCIDevSetRevisionId (&pThis->dev, 0x01);
3997	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
3998	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
3999	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
4000	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
4001	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
4002	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
4003	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
4004	PCIDevSetInterruptLine (&pThis->dev, 0x00);
4005	PCIDevSetInterruptPin (&pThis->dev, 0x01);
4006
4007	/*
4008	* Validate and read configuration.
4009	*/
4010	if (!CFGMR3AreValuesValid(pCfg,
4011	"GCEnabled\0"
4012	"R0Enabled\0"
4013	"Bootable\0"
4014	"ISACompat\0"))
4015	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4016	N_("BusLogic configuration error: unknown option specified"));
4017
4018	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
4019	if (RT_FAILURE(rc))
4020	return PDMDEV_SET_ERROR(pDevIns, rc,
4021	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
4022	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
4023
4024	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
4025	if (RT_FAILURE(rc))
4026	return PDMDEV_SET_ERROR(pDevIns, rc,
4027	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
4028	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
4029	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
4030	if (RT_FAILURE(rc))
4031	return PDMDEV_SET_ERROR(pDevIns, rc,
4032	N_("BusLogic configuration error: failed to read Bootable as boolean"));
4033	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
4034
4035	/* Only the first instance defaults to having the ISA compatibility ports enabled. */
4036	if (iInstance == 0)
4037	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
4038	else
4039	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Disabled");
4040	if (RT_FAILURE(rc))
4041	return PDMDEV_SET_ERROR(pDevIns, rc,
4042	N_("BusLogic configuration error: failed to read ISACompat as string"));
4043	Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
4044
4045	/* Grok the ISACompat setting. */
4046	if (!strcmp(achISACompat, "Disabled"))
4047	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
4048	else if (!strcmp(achISACompat, "Primary"))
4049	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
4050	else if (!strcmp(achISACompat, "Alternate"))
4051	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
4052	else
4053	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4054	N_("BusLogic configuration error: invalid ISACompat setting"));
4055
4056	/*
4057	* Register the PCI device and its I/O regions.
4058	*/
4059	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
4060	if (RT_FAILURE(rc))
4061	return rc;
4062
4063	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
4064	if (RT_FAILURE(rc))
4065	return rc;
4066
4067	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
4068	if (RT_FAILURE(rc))
4069	return rc;
4070
4071	if (fBootable)
4072	{
4073	/* Register I/O port space for BIOS access. */
4074	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL,
4075	buslogicR3BiosIoPortWrite, buslogicR3BiosIoPortRead,
4076	buslogicR3BiosIoPortWriteStr, buslogicR3BiosIoPortReadStr,
4077	"BusLogic BIOS");
4078	if (RT_FAILURE(rc))
4079	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
4080	}
4081
4082	/* Set up the compatibility I/O range. */
4083	rc = buslogicR3RegisterISARange(pThis, pThis->uDefaultISABaseCode);
4084	if (RT_FAILURE(rc))
4085	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
4086
4087	/* Initialize task queue. */
4088	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
4089	buslogicR3NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
4090	if (RT_FAILURE(rc))
4091	return rc;
4092	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
4093	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
4094
4095	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
4096	if (RT_FAILURE(rc))
4097	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic: cannot create critical section"));
4098
4099	/*
4100	* Create event semaphore and worker thread.
4101	*/
4102	rc = SUPSemEventCreate(pThis->pSupDrvSession, &pThis->hEvtProcess);
4103	if (RT_FAILURE(rc))
4104	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4105	N_("BusLogic: Failed to create SUP event semaphore"));
4106
4107	char szDevTag[20];
4108	RTStrPrintf(szDevTag, sizeof(szDevTag), "BUSLOGIC-%u", iInstance);
4109
4110	rc = PDMDevHlpThreadCreate(pDevIns, &pThis->pThreadWrk, pThis, buslogicR3Worker,
4111	buslogicR3WorkerWakeUp, 0, RTTHREADTYPE_IO, szDevTag);
4112	if (RT_FAILURE(rc))
4113	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4114	N_("BusLogic: Failed to create worker thread %s"), szDevTag);
4115
4116	/* Initialize per device state. */
4117	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
4118	{
4119	char szName[24];
4120	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
4121
4122	RTStrPrintf(szName, sizeof(szName), "Device%u", i);
4123
4124	/* Initialize static parts of the device. */
4125	pDevice->iLUN = i;
4126	pDevice->pBusLogicR3 = pThis;
4127	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
4128	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
4129	pDevice->Led.u32Magic = PDMLED_MAGIC;
4130	pDevice->IBase.pfnQueryInterface = buslogicR3DeviceQueryInterface;
4131	pDevice->IMediaPort.pfnQueryDeviceLocation = buslogicR3QueryDeviceLocation;
4132	pDevice->IMediaExPort.pfnIoReqCompleteNotify = buslogicR3IoReqCompleteNotify;
4133	pDevice->IMediaExPort.pfnIoReqCopyFromBuf = buslogicR3IoReqCopyFromBuf;
4134	pDevice->IMediaExPort.pfnIoReqCopyToBuf = buslogicR3IoReqCopyToBuf;
4135	pDevice->IMediaExPort.pfnIoReqQueryDiscardRanges = NULL;
4136	pDevice->IMediaExPort.pfnIoReqStateChanged = buslogicR3IoReqStateChanged;
4137	pDevice->IMediaExPort.pfnMediumEjected = buslogicR3MediumEjected;
4138	pDevice->ILed.pfnQueryStatusLed = buslogicR3DeviceQueryStatusLed;
4139
4140	/* Attach SCSI driver. */
4141	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, szName);
4142	if (RT_SUCCESS(rc))
4143	{
4144	/* Query the media interface. */
4145	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
4146	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
4147	("Buslogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
4148	VERR_PDM_MISSING_INTERFACE);
4149
4150	/* Get the extended media interface. */
4151	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
4152	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
4153	("Buslogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
4154	VERR_PDM_MISSING_INTERFACE);
4155
4156	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
4157	if (RT_FAILURE(rc))
4158	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4159	N_("Buslogic configuration error: LUN#%u: Failed to set I/O request size!"),
4160	pDevice->iLUN);
4161
4162	pDevice->fPresent = true;
4163	}
4164	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
4165	{
4166	pDevice->fPresent = false;
4167	pDevice->pDrvBase = NULL;
4168	pDevice->pDrvMedia = NULL;
4169	pDevice->pDrvMediaEx = NULL;
4170	rc = VINF_SUCCESS;
4171	Log(("BusLogic: no driver attached to device %s\n", szName));
4172	}
4173	else
4174	{
4175	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
4176	return rc;
4177	}
4178	}
4179
4180	/*
4181	* Attach status driver (optional).
4182	*/
4183	PPDMIBASE pBase;
4184	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
4185	if (RT_SUCCESS(rc))
4186	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
4187	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
4188	{
4189	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
4190	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
4191	}
4192
4193	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
4194	NULL, buslogicR3LiveExec, NULL,
4195	NULL, buslogicR3SaveExec, NULL,
4196	NULL, buslogicR3LoadExec, buslogicR3LoadDone);
4197	if (RT_FAILURE(rc))
4198	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
4199
4200	/*
4201	* Register the debugger info callback.
4202	*/
4203	char szTmp[128];
4204	RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance);
4205	PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicR3Info);
4206
4207	rc = buslogicR3HwReset(pThis, true);
4208	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
4209
4210	return rc;
4211	}
4212
4213	/**
4214	* The device registration structure.
4215	*/
4216	const PDMDEVREG g_DeviceBusLogic =
4217	{
4218	/* u32Version */
4219	PDM_DEVREG_VERSION,
4220	/* szName */
4221	"buslogic",
4222	/* szRCMod */
4223	"VBoxDDRC.rc",
4224	/* szR0Mod */
4225	"VBoxDDR0.r0",
4226	/* pszDescription */
4227	"BusLogic BT-958 SCSI host adapter.\n",
4228	/* fFlags */
4229	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
4230	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
4231	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
4232	/* fClass */
4233	PDM_DEVREG_CLASS_STORAGE,
4234	/* cMaxInstances */
4235	~0U,
4236	/* cbInstance */
4237	sizeof(BUSLOGIC),
4238	/* pfnConstruct */
4239	buslogicR3Construct,
4240	/* pfnDestruct */
4241	buslogicR3Destruct,
4242	/* pfnRelocate */
4243	buslogicR3Relocate,
4244	/* pfnMemSetup */
4245	NULL,
4246	/* pfnPowerOn */
4247	NULL,
4248	/* pfnReset */
4249	buslogicR3Reset,
4250	/* pfnSuspend */
4251	buslogicR3Suspend,
4252	/* pfnResume */
4253	NULL,
4254	/* pfnAttach */
4255	buslogicR3Attach,
4256	/* pfnDetach */
4257	buslogicR3Detach,
4258	/* pfnQueryInterface. */
4259	NULL,
4260	/* pfnInitComplete */
4261	NULL,
4262	/* pfnPowerOff */
4263	buslogicR3PowerOff,
4264	/* pfnSoftReset */
4265	NULL,
4266	/* u32VersionEnd */
4267	PDM_DEVREG_VERSION
4268	};
4269
4270	#endif /* IN_RING3 */
4271	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 64401

Download in other formats: