VirtualBox

Changeset 64387 in vbox


Ignore:
Timestamp:
Oct 24, 2016 2:06:02 PM (8 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
111495
Message:

PDM,Devices: Some PCI device type cleanup.

Location:
trunk
Files:
35 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/vmm/pdmdev.h

    r64373 r64387  
    547547     * @remarks Caller enters the PDM critical section.
    548548     */
    549     DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t fFlags,
     549    DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
    550550                                             uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
    551551
     
    31633163     *                              The pointer is saved, so don't free or changed.
    31643164     */
    3165     DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
     3165    DECLR3CALLBACKMEMBER(int, pfnPCIRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
    31663166                                              uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
    31673167
     
    51955195 * @copydoc PDMDEVHLPR3::pfnPCIRegister
    51965196 */
    5197 DECLINLINE(int) PDMDevHlpPCIRegisterEx(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
     5197DECLINLINE(int) PDMDevHlpPCIRegisterEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
    51985198                                       uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName)
    51995199{
  • trunk/include/VBox/vmm/pdmpcidev.h

    r64373 r64387  
    3636 */
    3737
    38 /** @deprecated. */
    39 typedef PPDMPCIDEV          PPCIDEVICE;
    40 /** @deprecated. */
    41 typedef struct PDMPCIDEV    PCIDEVICE;
    42 /** Legacy type name.
    43  * @deprecated  */
    44 #define PCIDevice           PDMPCIDEV
    45 
    46 
    4738/**
    4839 * Callback function for reading from the PCI configuration space.
     
    111102 * @todo add pDevIns parameter and fix iRegion type.
    112103 */
    113 typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     104typedef DECLCALLBACK(int) FNPCIIOREGIONMAP(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    114105                                           RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
    115106/** Pointer to a FNPCIIOREGIONMAP() function. */
  • trunk/include/VBox/vmm/pdmpcidevint.h

    r64376 r64387  
    11/* $Id$ */
    22/** @file
    3  * DevPCI - PDM PCI Internal header - Only for hiding bits of PCIDEVICE.
     3 * DevPCI - PDM PCI Internal header - Only for hiding bits of PDMPCIDEV.
    44 */
    55
     
    108108 * PDM PCI Device - Internal data.
    109109 *
    110  * @sa PDMPCIDEVICE
     110 * @sa PDMPCIDEV
    111111 */
    112112typedef struct PDMPCIDEVICEINT
     
    209209AssertCompileSize(PDMPCIDEVICEINT, HC_ARCH_BITS == 32 ? 264 : 384);
    210210
    211 /** Indicate that PCIDEVICE::Int.s can be declared. */
     211/** Indicate that PDMPCIDEV::Int.s can be declared. */
    212212#define PDMPCIDEVICEINT_DECLARED
    213213
  • trunk/src/VBox/Devices/Audio/DevHDA.cpp

    r64373 r64387  
    769769{
    770770    /** The PCI device structure. */
    771     PCIDevice                          PciDev;
     771    PDMPCIDEV                          PciDev;
    772772    /** R3 Pointer to the device instance. */
    773773    PPDMDEVINSR3                       pDevInsR3;
     
    47694769 * @callback_method_impl{FNPCIIOREGIONMAP}
    47704770 */
    4771 static DECLCALLBACK(int)  hdaPciIoRegionMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     4771static DECLCALLBACK(int)  hdaPciIoRegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    47724772                                            RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    47734773{
  • trunk/src/VBox/Devices/Audio/DevIchAc97.cpp

    r64385 r64387  
    355355{
    356356    /** The PCI device state. */
    357     PCIDevice               PciDev;
     357    PDMPCIDEV               PciDev;
    358358    /** R3 Pointer to the device instance. */
    359359    PPDMDEVINSR3            pDevInsR3;
     
    22972297 * @callback_method_impl{FNPCIIOREGIONMAP}
    22982298 */
    2299 static DECLCALLBACK(int) ichac97IOPortMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     2299static DECLCALLBACK(int) ichac97IOPortMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    23002300                                          RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    23012301{
  • trunk/src/VBox/Devices/Bus/DevPCI.cpp

    r64373 r64387  
    6767{
    6868    /** The PCI device of the bridge. */
    69     PCIDEVICE dev;
     69    PDMPCIDEV dev;
    7070} PIIX3State, PIIX3, *PPIIX3;
    7171
     
    8787    {
    8888        /** Array of PCI devices. */
    89         R3PTRTYPE(PPCIDEVICE) apDevices[256];
     89        R3PTRTYPE(PPDMPCIDEV) apDevices[256];
    9090        /** @deprecated   */
    91         R3PTRTYPE(PPCIDEVICE) devices[256];
     91        R3PTRTYPE(PPDMPCIDEV) devices[256];
    9292    };
    9393    /** Array of bridges attached to the bus. */
    94     R3PTRTYPE(PPCIDEVICE *) papBridgesR3;
     94    R3PTRTYPE(PPDMPCIDEV *) papBridgesR3;
    9595
    9696    /** R3 pointer to the device instance. */
     
    110110
    111111    /** The PCI device for the PCI bridge. */
    112     PCIDEVICE           PciDev;
     112    PDMPCIDEV           PciDev;
    113113
    114114} PCIBUS;
     
    223223RT_C_DECLS_BEGIN
    224224
    225 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTag);
    226 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTag);
     225PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTag);
     226PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTag);
    227227PDMBOTHCBDECL(int)  pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
    228228PDMBOTHCBDECL(int)  pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
     
    231231
    232232#ifdef IN_RING3
    233 DECLINLINE(PPCIDEVICE) pciR3FindBridge(PPCIBUS pBus, uint8_t iBus);
     233DECLINLINE(PPDMPCIDEV) pciR3FindBridge(PPCIBUS pBus, uint8_t iBus);
    234234#endif
    235235
     
    252252#ifdef IN_RING3
    253253
    254 static void pci_update_mappings(PCIDevice *d)
     254static void pci_update_mappings(PDMPCIDEV *d)
    255255{
    256256    PPCIBUS pBus = d->Int.s.CTX_SUFF(pBus);
     
    349349
    350350
    351 static DECLCALLBACK(uint32_t) pci_default_read_config(PPDMDEVINS pDevIns, PCIDevice *d, uint32_t address, unsigned len)
     351static DECLCALLBACK(uint32_t) pci_default_read_config(PPDMDEVINS pDevIns, PDMPCIDEV *d, uint32_t address, unsigned len)
    352352{
    353353    NOREF(pDevIns);
     
    368368}
    369369
    370 static DECLCALLBACK(void) pci_default_write_config(PPDMDEVINS pDevIns, PCIDevice *d, uint32_t address, uint32_t val, unsigned len)
     370static DECLCALLBACK(void) pci_default_write_config(PPDMDEVINS pDevIns, PDMPCIDEV *d, uint32_t address, uint32_t val, unsigned len)
    371371{
    372372    NOREF(pDevIns);
     
    515515        {
    516516#ifdef IN_RING3 /** @todo do lookup in R0/RC too! */
    517             PPCIDEVICE pBridgeDevice = pciR3FindBridge(&pGlobals->PciBus, iBus);
     517            PPDMPCIDEV pBridgeDevice = pciR3FindBridge(&pGlobals->PciBus, iBus);
    518518            if (pBridgeDevice)
    519519            {
     
    529529    else
    530530    {
    531         R3PTRTYPE(PCIDevice *) pci_dev = pGlobals->PciBus.devices[iDevice];
     531        R3PTRTYPE(PDMPCIDEV *) pci_dev = pGlobals->PciBus.devices[iDevice];
    532532        if (pci_dev)
    533533        {
     
    562562        {
    563563#ifdef IN_RING3 /** @todo do lookup in R0/RC too! */
    564             PPCIDEVICE pBridgeDevice = pciR3FindBridge(&pGlobals->PciBus, iBus);
     564            PPDMPCIDEV pBridgeDevice = pciR3FindBridge(&pGlobals->PciBus, iBus);
    565565            if (pBridgeDevice)
    566566            {
     
    576576    else
    577577    {
    578         R3PTRTYPE(PCIDevice *) pci_dev = pGlobals->PciBus.devices[iDevice];
     578        R3PTRTYPE(PDMPCIDEV *) pci_dev = pGlobals->PciBus.devices[iDevice];
    579579        if (pci_dev)
    580580        {
     
    615615}
    616616
    617 static void apic_set_irq(PPCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel, int acpi_irq, uint32_t uTagSrc)
     617static void apic_set_irq(PPCIBUS pBus, uint8_t uDevFn, PDMPCIDEV *pPciDev, int irq_num1, int iLevel, int acpi_irq, uint32_t uTagSrc)
    618618{
    619619    /* This is only allowed to be called with a pointer to the host bus. */
     
    669669 *          PIRQ value.
    670670 */
    671 static void pciSetIrqInternal(PPCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
     671static void pciSetIrqInternal(PPCIGLOBALS pGlobals, uint8_t uDevFn, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
    672672{
    673673    PPCIBUS     pBus =     &pGlobals->PciBus;
     
    761761 * @interface_method_impl{PDMPCIBUSREG,pfnSetIrqR3}
    762762 */
    763 PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
     763PDMBOTHCBDECL(void) pciSetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
    764764{
    765765    pciSetIrqInternal(PDMINS_2_DATA(pDevIns, PPCIGLOBALS), pPciDev->devfn, pPciDev, iIrq, iLevel, uTagSrc);
     
    776776 * @param  iBus    Destination bus number.
    777777 */
    778 DECLINLINE(PPCIDEVICE) pciR3FindBridge(PPCIBUS pBus, uint8_t iBus)
     778DECLINLINE(PPDMPCIDEV) pciR3FindBridge(PPCIBUS pBus, uint8_t iBus)
    779779{
    780780    /* Search for a fitting bridge. */
     
    785785         * If the target bus is in the range we pass the request on to the bridge.
    786786         */
    787         PPCIDEVICE pBridgeTemp = pBus->papBridgesR3[iBridge];
     787        PPDMPCIDEV pBridgeTemp = pBus->papBridgesR3[iBridge];
    788788        AssertMsg(pBridgeTemp && pciDevIsPci2PciBridge(pBridgeTemp),
    789789                  ("Device is not a PCI bridge but on the list of PCI bridges\n"));
     
    12711271    for (uint32_t i = 0; i < RT_ELEMENTS(pBus->devices); i++)
    12721272    {
    1273         PPCIDEVICE pDev = pBus->devices[i];
     1273        PPDMPCIDEV pDev = pBus->devices[i];
    12741274        if (pDev)
    12751275        {
     
    13271327 * @param   fIsBridge           Whether this is a bridge device or not.
    13281328 */
    1329 static void pciR3CommonRestoreConfig(PPCIDEVICE pDev, uint8_t const *pbSrcConfig, bool fIsBridge)
     1329static void pciR3CommonRestoreConfig(PPDMPCIDEV pDev, uint8_t const *pbSrcConfig, bool fIsBridge)
    13301330{
    13311331    /*
     
    15131513    for (i = 0; i < RT_ELEMENTS(pBus->devices); i++)
    15141514    {
    1515         PPCIDEVICE pDev = pBus->devices[i];
     1515        PPDMPCIDEV pDev = pBus->devices[i];
    15161516        if (pDev)
    15171517        {
     
    15281528    for (i = 0;; i++)
    15291529    {
    1530         PCIDEVICE   DevTmp;
    1531         PPCIDEVICE  pDev;
     1530        PDMPCIDEV   DevTmp;
     1531        PPDMPCIDEV  pDev;
    15321532
    15331533        /* index / terminator */
     
    16591659 * @interface_method_impl{PDMPCIBUSREG,pfnIORegionRegisterR3}
    16601660 */
    1661 static DECLCALLBACK(int) pciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, RTGCPHYS cbRegion,
     1661static DECLCALLBACK(int) pciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
    16621662                                                     PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
    16631663{
     
    17041704 */
    17051705static DECLCALLBACK(void)
    1706 pciR3CommonSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
     1706pciR3CommonSetConfigCallbacks(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
    17071707                              PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
    17081708{
     
    18431843    for (uint32_t iDev = 0; iDev < RT_ELEMENTS(pBus->devices); iDev++)
    18441844    {
    1845         PPCIDEVICE pPciDev = pBus->devices[iDev];
     1845        PPDMPCIDEV pPciDev = pBus->devices[iDev];
    18461846        if (pPciDev != NULL)
    18471847        {
     
    20492049    pGlobals->PciBus.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    20502050    pGlobals->PciBus.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    2051     pGlobals->PciBus.papBridgesR3 = (PPCIDEVICE *)PDMDevHlpMMHeapAllocZ(pDevIns,   sizeof(PPCIDEVICE)
     2051    pGlobals->PciBus.papBridgesR3 = (PPDMPCIDEV *)PDMDevHlpMMHeapAllocZ(pDevIns,   sizeof(PPDMPCIDEV)
    20522052                                                                                 * RT_ELEMENTS(pGlobals->PciBus.devices));
    20532053
     
    22152215 * @interface_method_impl{PDMPCIBUSREG,pfnSetIrqR3}
    22162216 */
    2217 PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
     2217PDMBOTHCBDECL(void) pcibridgeSetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
    22182218{
    22192219    /*
     
    22252225     */
    22262226    PPCIBUS    pBus          = PDMINS_2_DATA(pDevIns, PPCIBUS);
    2227     PPCIDEVICE pPciDevBus    = pPciDev;
     2227    PPDMPCIDEV pPciDevBus    = pPciDev;
    22282228    int        iIrqPinBridge = iIrq;
    22292229    uint8_t    uDevFnBridge  = 0;
     
    22582258    if (iBus != pBus->PciDev.config[VBOX_PCI_SECONDARY_BUS])
    22592259    {
    2260         PPCIDEVICE pBridgeDevice = pciR3FindBridge(pBus, iBus);
     2260        PPDMPCIDEV pBridgeDevice = pciR3FindBridge(pBus, iBus);
    22612261        if (pBridgeDevice)
    22622262        {
     
    22682268    {
    22692269        /* This is the target bus, pass the write to the device. */
    2270         PPCIDEVICE pPciDev = pBus->devices[iDevice];
     2270        PPDMPCIDEV pPciDev = pBus->devices[iDevice];
    22712271        if (pPciDev)
    22722272        {
     
    22912291    if (iBus != pBus->PciDev.config[VBOX_PCI_SECONDARY_BUS])
    22922292    {
    2293         PPCIDEVICE pBridgeDevice = pciR3FindBridge(pBus, iBus);
     2293        PPDMPCIDEV pBridgeDevice = pciR3FindBridge(pBus, iBus);
    22942294        if (pBridgeDevice)
    22952295        {
     
    23012301    {
    23022302        /* This is the target bus, pass the read to the device. */
    2303         PPCIDEVICE pPciDev = pBus->devices[iDevice];
     2303        PPDMPCIDEV pPciDev = pBus->devices[iDevice];
    23042304        if (pPciDev)
    23052305        {
     
    24012401    pBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    24022402    pBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    2403     pBus->papBridgesR3 = (PPCIDEVICE *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPCIDEVICE) * RT_ELEMENTS(pBus->devices));
     2403    pBus->papBridgesR3 = (PPDMPCIDEV *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPDMPCIDEV) * RT_ELEMENTS(pBus->devices));
    24042404
    24052405    PDMPCIBUSREG PciBusReg;
  • trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

    r64373 r64387  
    5757
    5858    /** Array of PCI devices. We assume 32 slots, each with 8 functions. */
    59     R3PTRTYPE(PPCIDEVICE)   apDevices[256];
     59    R3PTRTYPE(PPDMPCIDEV)   apDevices[256];
    6060    /** Array of bridges attached to the bus. */
    61     R3PTRTYPE(PPCIDEVICE *) papBridgesR3;
     61    R3PTRTYPE(PPDMPCIDEV *) papBridgesR3;
    6262
    6363    /** R3 pointer to the device instance. */
     
    7777
    7878    /** The PCI device for the PCI bridge. */
    79     PCIDEVICE           aPciDev;
     79    PDMPCIDEV           aPciDev;
    8080
    8181    /** Start device number - always zero (only for DevPCI source compat). */
     
    177177
    178178/* Prototypes */
    179 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev,
     179static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPDMPCIDEV pPciDev,
    180180                                  int iIrq, int iLevel, uint32_t uTagSrc);
    181181#ifdef IN_RING3
    182182static void ich9pcibridgeReset(PPDMDEVINS pDevIns);
    183 static void ich9pciUpdateMappings(PCIDevice *pDev);
     183static void ich9pciUpdateMappings(PDMPCIDEV *pDev);
    184184static DECLCALLBACK(uint32_t) ich9pciConfigReadDev(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t u32Address, unsigned len);
    185185static DECLCALLBACK(void)     ich9pciConfigWriteDev(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t u32Address, uint32_t val, unsigned len);
    186 DECLINLINE(PPCIDEVICE) ich9pciFindBridge(PICH9PCIBUS pBus, uint8_t iBus);
     186DECLINLINE(PPDMPCIDEV) ich9pciFindBridge(PICH9PCIBUS pBus, uint8_t iBus);
    187187static void ich9pciBiosInitDevice(PICH9PCIGLOBALS pGlobals, uint8_t uBus, uint8_t uDevFn);
    188188#endif
     
    205205}
    206206
    207 PDMBOTHCBDECL(void) ich9pciSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
     207PDMBOTHCBDECL(void) ich9pciSetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
    208208{
    209209    LogFlowFunc(("invoked by %p/%d: iIrq=%d iLevel=%d uTagSrc=%#x\n", pDevIns, pDevIns->iInstance, iIrq, iLevel, uTagSrc));
     
    211211}
    212212
    213 PDMBOTHCBDECL(void) ich9pcibridgeSetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
     213PDMBOTHCBDECL(void) ich9pcibridgeSetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc)
    214214{
    215215    /*
     
    221221     */
    222222    PICH9PCIBUS    pBus          = PDMINS_2_DATA(pDevIns, PICH9PCIBUS);
    223     PPCIDEVICE     pPciDevBus    = pPciDev;
     223    PPDMPCIDEV     pPciDevBus    = pPciDev;
    224224    int            iIrqPinBridge = iIrq;
    225225    uint8_t        uDevFnBridge  = 0;
     
    330330        {
    331331#ifdef IN_RING3 /** @todo do lookup in R0/RC too! */
    332             PPCIDEVICE pBridgeDevice = ich9pciFindBridge(&pGlobals->aPciBus, pAddr->iBus);
     332            PPDMPCIDEV pBridgeDevice = ich9pciFindBridge(&pGlobals->aPciBus, pAddr->iBus);
    333333            if (pBridgeDevice)
    334334            {
     
    344344    else                    /* forward to directly connected device */
    345345    {
    346         R3PTRTYPE(PCIDevice *) pPciDev = pGlobals->aPciBus.apDevices[pAddr->iDeviceFunc];
     346        R3PTRTYPE(PDMPCIDEV *) pPciDev = pGlobals->aPciBus.apDevices[pAddr->iDeviceFunc];
    347347        if (pPciDev)
    348348        {
     
    443443        {
    444444#ifdef IN_RING3 /** @todo do lookup in R0/RC too! */
    445             PPCIDEVICE pBridgeDevice = ich9pciFindBridge(&pGlobals->aPciBus, pPciAddr->iBus);
     445            PPDMPCIDEV pBridgeDevice = ich9pciFindBridge(&pGlobals->aPciBus, pPciAddr->iBus);
    446446            if (pBridgeDevice)
    447447            {
     
    460460    else                    /* forward to directly connected device */
    461461    {
    462         R3PTRTYPE(PCIDevice *) pPciDev = pGlobals->aPciBus.apDevices[pPciAddr->iDeviceFunc];
     462        R3PTRTYPE(PDMPCIDEV *) pPciDev = pGlobals->aPciBus.apDevices[pPciAddr->iDeviceFunc];
    463463        if (pPciDev)
    464464        {
     
    575575}
    576576
    577 static void ich9pciApicSetIrq(PICH9PCIBUS pBus, uint8_t uDevFn, PCIDevice *pPciDev, int irq_num1, int iLevel,
     577static void ich9pciApicSetIrq(PICH9PCIBUS pBus, uint8_t uDevFn, PDMPCIDEV *pPciDev, int irq_num1, int iLevel,
    578578                              uint32_t uTagSrc, int iForcedIrq)
    579579{
     
    618618}
    619619
    620 static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPCIDEVICE pPciDev,
     620static void ich9pciSetIrqInternal(PICH9PCIGLOBALS pGlobals, uint8_t uDevFn, PPDMPCIDEV pPciDev,
    621621                                  int iIrq, int iLevel, uint32_t uTagSrc)
    622622{
     
    789789
    790790
    791 DECLINLINE(PPCIDEVICE) ich9pciFindBridge(PICH9PCIBUS pBus, uint8_t iBus)
     791DECLINLINE(PPDMPCIDEV) ich9pciFindBridge(PICH9PCIBUS pBus, uint8_t iBus)
    792792{
    793793    /* Search for a fitting bridge. */
     
    798798         * If the target bus is in the range we pass the request on to the bridge.
    799799         */
    800         PPCIDEVICE pBridge = pBus->papBridgesR3[iBridge];
     800        PPDMPCIDEV pBridge = pBus->papBridgesR3[iBridge];
    801801        AssertMsg(pBridge && pciDevIsPci2PciBridge(pBridge),
    802802                  ("Device is not a PCI bridge but on the list of PCI bridges\n"));
     
    840840#define INVALID_PCI_ADDRESS ~0U
    841841
    842 static int  ich9pciUnmapRegion(PPCIDEVICE pDev, int iRegion)
     842static int  ich9pciUnmapRegion(PPDMPCIDEV pDev, int iRegion)
    843843{
    844844    PCIIORegion* pRegion = &pDev->Int.s.aIORegions[iRegion];
     
    877877}
    878878
    879 static void ich9pciUpdateMappings(PCIDevice* pDev)
     879static void ich9pciUpdateMappings(PDMPCIDEV* pDev)
    880880{
    881881    uint64_t uLast, uNew;
     
    962962
    963963
    964 static DECLCALLBACK(int) ich9pciRegisterMsi(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg)
     964static DECLCALLBACK(int) ich9pciRegisterMsi(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg)
    965965{
    966966    NOREF(pDevIns);
     
    979979
    980980
    981 static DECLCALLBACK(int) ich9pciIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, RTGCPHYS cbRegion,
     981static DECLCALLBACK(int) ich9pciIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
    982982                                                 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
    983983{
     
    10361036}
    10371037
    1038 static DECLCALLBACK(void) ich9pciSetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
     1038static DECLCALLBACK(void) ich9pciSetConfigCallbacks(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
    10391039                                                    PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
    10401040{
     
    10571057    for (uint32_t i = 0; i < RT_ELEMENTS(pBus->apDevices); i++)
    10581058    {
    1059         PPCIDEVICE pDev = pBus->apDevices[i];
     1059        PPDMPCIDEV pDev = pBus->apDevices[i];
    10601060        if (pDev)
    10611061        {
     
    11401140    if (iBus != PCIDevGetByte(&pBus->aPciDev, VBOX_PCI_SECONDARY_BUS))
    11411141    {
    1142         PPCIDEVICE pBridgeDevice = ich9pciFindBridge(pBus, iBus);
     1142        PPDMPCIDEV pBridgeDevice = ich9pciFindBridge(pBus, iBus);
    11431143        if (pBridgeDevice)
    11441144        {
     
    11501150    {
    11511151        /* This is the target bus, pass the write to the device. */
    1152         PPCIDEVICE pPciDev = pBus->apDevices[iDevice];
     1152        PPDMPCIDEV pPciDev = pBus->apDevices[iDevice];
    11531153        if (pPciDev)
    11541154        {
     
    11691169    if (iBus != PCIDevGetByte(&pBus->aPciDev, VBOX_PCI_SECONDARY_BUS))
    11701170    {
    1171         PPCIDEVICE pBridgeDevice = ich9pciFindBridge(pBus, iBus);
     1171        PPDMPCIDEV pBridgeDevice = ich9pciFindBridge(pBus, iBus);
    11721172        if (pBridgeDevice)
    11731173        {
     
    11811181    {
    11821182        /* This is the target bus, pass the read to the device. */
    1183         PPCIDEVICE pPciDev = pBus->apDevices[iDevice];
     1183        PPDMPCIDEV pPciDev = pBus->apDevices[iDevice];
    11841184        if (pPciDev)
    11851185        {
     
    12021202 * @param   fIsBridge           Whether this is a bridge device or not.
    12031203 */
    1204 static void pciR3CommonRestoreConfig(PPCIDEVICE pDev, uint8_t const *pbSrcConfig, bool fIsBridge)
     1204static void pciR3CommonRestoreConfig(PPDMPCIDEV pDev, uint8_t const *pbSrcConfig, bool fIsBridge)
    12051205{
    12061206    /*
     
    13911391    for (i = 0; i < RT_ELEMENTS(pBus->apDevices); i++)
    13921392    {
    1393         PPCIDEVICE pDev = pBus->apDevices[i];
     1393        PPDMPCIDEV pDev = pBus->apDevices[i];
    13941394        if (pDev)
    13951395        {
     
    14091409    for (i = 0;; i++)
    14101410    {
    1411         PPCIDEVICE  pDev;
    1412         PCIDEVICE   DevTmp;
     1411        PPDMPCIDEV  pDev;
     1412        PDMPCIDEV   DevTmp;
    14131413
    14141414        /* index / terminator */
     
    18551855            while (1)
    18561856            {
    1857                 PPCIDEVICE pBridge = ich9pciFindBridge(pBus, uBus);
     1857                PPDMPCIDEV pBridge = ich9pciFindBridge(pBus, uBus);
    18581858                if (!pBridge)
    18591859                {
     
    18991899                                      unsigned uBusSecondary)
    19001900{
    1901     PPCIDEVICE pBridgeDev = &pBus->aPciDev;
     1901    PPDMPCIDEV pBridgeDev = &pBus->aPciDev;
    19021902
    19031903    /* Set only if we are not on the root bus, it has no primary bus attached. */
     
    19101910    for (uint32_t iBridge = 0; iBridge < pBus->cBridges; iBridge++)
    19111911    {
    1912         PPCIDEVICE pBridge = pBus->papBridgesR3[iBridge];
     1912        PPDMPCIDEV pBridge = pBus->papBridgesR3[iBridge];
    19131913        AssertMsg(pBridge && pciDevIsPci2PciBridge(pBridge),
    19141914                  ("Device is not a PCI bridge but on the list of PCI bridges\n"));
     
    22382238    for (uint32_t iDev = 0; iDev < RT_ELEMENTS(pBus->apDevices); iDev++)
    22392239    {
    2240         PPCIDEVICE pPciDev = pBus->apDevices[iDev];
     2240        PPDMPCIDEV pPciDev = pBus->apDevices[iDev];
    22412241        if (pPciDev != NULL)
    22422242        {
     
    24512451    pGlobals->aPciBus.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    24522452    pGlobals->aPciBus.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    2453     pGlobals->aPciBus.papBridgesR3 = (PPCIDEVICE *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPCIDEVICE) * RT_ELEMENTS(pGlobals->aPciBus.apDevices));
     2453    pGlobals->aPciBus.papBridgesR3 = (PPDMPCIDEV *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPDMPCIDEV) * RT_ELEMENTS(pGlobals->aPciBus.apDevices));
    24542454
    24552455    /*
     
    25702570}
    25712571
    2572 static void ich9pciResetDevice(PPCIDEVICE pDev)
     2572static void ich9pciResetDevice(PPDMPCIDEV pDev)
    25732573{
    25742574    /* Clear regions */
     
    26452645}
    26462646
    2647 static void ich9pciRelocateDevice(PPCIDEVICE pDev, RTGCINTPTR offDelta)
     2647static void ich9pciRelocateDevice(PPDMPCIDEV pDev, RTGCINTPTR offDelta)
    26482648{
    26492649    if (pDev)
     
    27102710    pBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    27112711    pBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    2712     pBus->papBridgesR3 = (PPCIDEVICE *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPCIDEVICE) * RT_ELEMENTS(pBus->apDevices));
     2712    pBus->papBridgesR3 = (PPDMPCIDEV *)PDMDevHlpMMHeapAllocZ(pDevIns, sizeof(PPDMPCIDEV) * RT_ELEMENTS(pBus->apDevices));
    27132713
    27142714    PDMPCIBUSREG PciBusReg;
  • trunk/src/VBox/Devices/Bus/MsiCommon.cpp

    r64373 r64387  
    2727#include "PciInline.h"
    2828
    29 DECLINLINE(uint16_t) msiGetMessageControl(PPCIDEVICE pDev)
     29DECLINLINE(uint16_t) msiGetMessageControl(PPDMPCIDEV pDev)
    3030{
    3131    uint32_t idxMessageControl = pDev->Int.s.u8MsiCapOffset + VBOX_MSI_CAP_MESSAGE_CONTROL;
     
    3838}
    3939
    40 DECLINLINE(bool) msiIs64Bit(PPCIDEVICE pDev)
     40DECLINLINE(bool) msiIs64Bit(PPDMPCIDEV pDev)
    4141{
    4242    return pciDevIsMsi64Capable(pDev);
    4343}
    4444
    45 DECLINLINE(uint32_t*) msiGetMaskBits(PPCIDEVICE pDev)
     45DECLINLINE(uint32_t*) msiGetMaskBits(PPDMPCIDEV pDev)
    4646{
    4747    uint8_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_MASK_BITS_64 : VBOX_MSI_CAP_MASK_BITS_32;
     
    5353}
    5454
    55 DECLINLINE(uint32_t*) msiGetPendingBits(PPCIDEVICE pDev)
     55DECLINLINE(uint32_t*) msiGetPendingBits(PPDMPCIDEV pDev)
    5656{
    5757    uint8_t iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_PENDING_BITS_64 : VBOX_MSI_CAP_PENDING_BITS_32;
     
    6363}
    6464
    65 DECLINLINE(bool) msiIsEnabled(PPCIDEVICE pDev)
     65DECLINLINE(bool) msiIsEnabled(PPDMPCIDEV pDev)
    6666{
    6767    return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_ENABLE) != 0;
    6868}
    6969
    70 DECLINLINE(uint8_t) msiGetMme(PPCIDEVICE pDev)
     70DECLINLINE(uint8_t) msiGetMme(PPDMPCIDEV pDev)
    7171{
    7272    return (msiGetMessageControl(pDev) & VBOX_PCI_MSI_FLAGS_QSIZE) >> 4;
    7373}
    7474
    75 DECLINLINE(RTGCPHYS) msiGetMsiAddress(PPCIDEVICE pDev)
     75DECLINLINE(RTGCPHYS) msiGetMsiAddress(PPDMPCIDEV pDev)
    7676{
    7777    if (msiIs64Bit(pDev))
     
    8787}
    8888
    89 DECLINLINE(uint32_t) msiGetMsiData(PPCIDEVICE pDev, int32_t iVector)
     89DECLINLINE(uint32_t) msiGetMsiData(PPDMPCIDEV pDev, int32_t iVector)
    9090{
    9191    int16_t  iOff = msiIs64Bit(pDev) ? VBOX_MSI_CAP_MESSAGE_DATA_64 : VBOX_MSI_CAP_MESSAGE_DATA_32;
     
    117117}
    118118
    119 void     MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev,
     119void     MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev,
    120120                           uint32_t u32Address, uint32_t val, unsigned len)
    121121{
     
    202202}
    203203
    204 uint32_t MsiPciConfigRead (PPDMDEVINS pDevIns, PPCIDEVICE pDev, uint32_t u32Address, unsigned len)
     204uint32_t MsiPciConfigRead (PPDMDEVINS pDevIns, PPDMPCIDEV pDev, uint32_t u32Address, unsigned len)
    205205{
    206206    RT_NOREF1(pDevIns);
     
    231231}
    232232
    233 int MsiInit(PPCIDEVICE pDev, PPDMMSIREG pMsiReg)
     233int MsiInit(PPDMPCIDEV pDev, PPDMMSIREG pMsiReg)
    234234{
    235235    if (pMsiReg->cMsiVectors == 0)
     
    284284
    285285
    286 bool     MsiIsEnabled(PPCIDEVICE pDev)
     286bool     MsiIsEnabled(PPDMPCIDEV pDev)
    287287{
    288288    return pciDevIsMsiCapable(pDev) && msiIsEnabled(pDev);
    289289}
    290290
    291 void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc)
     291void MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, int iVector, int iLevel, uint32_t uTagSrc)
    292292{
    293293    AssertMsg(msiIsEnabled(pDev), ("Must be enabled to use that"));
  • trunk/src/VBox/Devices/Bus/MsiCommon.h

    r62518 r64387  
    3030#ifdef IN_RING3
    3131/* Init MSI support in the device. */
    32 int      MsiInit(PPCIDEVICE pDev, PPDMMSIREG pMsiReg);
     32int      MsiInit(PPDMPCIDEV pDev, PPDMMSIREG pMsiReg);
    3333#endif
    3434
    3535/* If MSI is enabled, so that MSINotify() shall be used for notifications.  */
    36 bool     MsiIsEnabled(PPCIDEVICE pDev);
     36bool     MsiIsEnabled(PPDMPCIDEV pDev);
    3737
    3838/* Device notification (aka interrupt). */
    39 void     MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc);
     39void     MsiNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, int iVector, int iLevel, uint32_t uTagSrc);
    4040
    4141#ifdef IN_RING3
    4242/* PCI config space accessors for MSI registers */
    43 void     MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t u32Address, uint32_t val, unsigned len);
    44 uint32_t MsiPciConfigRead (PPDMDEVINS pDevIns, PPCIDEVICE pDev, uint32_t u32Address, unsigned len);
     43void     MsiPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, uint32_t u32Address, uint32_t val, unsigned len);
     44uint32_t MsiPciConfigRead (PPDMDEVINS pDevIns, PPDMPCIDEV pDev, uint32_t u32Address, unsigned len);
    4545#endif
    4646
    4747#ifdef IN_RING3
    4848/* Init MSI-X support in the device. */
    49 int      MsixInit(PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, PPDMMSIREG pMsiReg);
     49int      MsixInit(PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, PPDMMSIREG pMsiReg);
    5050#endif
    5151
    5252/* If MSI-X is enabled, so that MSIXNotify() shall be used for notifications.  */
    53 bool     MsixIsEnabled(PPCIDEVICE pDev);
     53bool     MsixIsEnabled(PPDMPCIDEV pDev);
    5454
    5555/* Device notification (aka interrupt). */
    56 void     MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc);
     56void     MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, int iVector, int iLevel, uint32_t uTagSrc);
    5757
    5858#ifdef IN_RING3
    5959/* PCI config space accessors for MSI-X */
    60 void     MsixPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t u32Address, uint32_t val, unsigned len);
    61 uint32_t MsixPciConfigRead (PPDMDEVINS pDevIns, PPCIDEVICE pDev, uint32_t u32Address, unsigned len);
     60void     MsixPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, uint32_t u32Address, uint32_t val, unsigned len);
     61uint32_t MsixPciConfigRead (PPDMDEVINS pDevIns, PPDMPCIDEV pDev, uint32_t u32Address, unsigned len);
    6262#endif
  • trunk/src/VBox/Devices/Bus/MsixCommon.cpp

    r64373 r64387  
    4040
    4141/** @todo use accessors so that raw PCI devices work correctly with MSI-X. */
    42 DECLINLINE(uint16_t)  msixGetMessageControl(PPCIDEVICE pDev)
     42DECLINLINE(uint16_t)  msixGetMessageControl(PPDMPCIDEV pDev)
    4343{
    4444    return PCIDevGetWord(pDev, pDev->Int.s.u8MsixCapOffset + VBOX_MSIX_CAP_MESSAGE_CONTROL);
    4545}
    4646
    47 DECLINLINE(bool)      msixIsEnabled(PPCIDEVICE pDev)
     47DECLINLINE(bool)      msixIsEnabled(PPDMPCIDEV pDev)
    4848{
    4949    return (msixGetMessageControl(pDev) & VBOX_PCI_MSIX_FLAGS_ENABLE) != 0;
    5050}
    5151
    52 DECLINLINE(bool)      msixIsMasked(PPCIDEVICE pDev)
     52DECLINLINE(bool)      msixIsMasked(PPDMPCIDEV pDev)
    5353{
    5454    return (msixGetMessageControl(pDev) & VBOX_PCI_MSIX_FLAGS_FUNCMASK) != 0;
    5555}
    5656
    57 DECLINLINE(uint16_t)  msixTableSize(PPCIDEVICE pDev)
     57DECLINLINE(uint16_t)  msixTableSize(PPDMPCIDEV pDev)
    5858{
    5959    return (msixGetMessageControl(pDev) & 0x3ff) + 1;
    6060}
    6161
    62 DECLINLINE(uint8_t*)  msixGetPageOffset(PPCIDEVICE pDev, uint32_t off)
     62DECLINLINE(uint8_t*)  msixGetPageOffset(PPDMPCIDEV pDev, uint32_t off)
    6363{
    6464    return (uint8_t*)pDev->Int.s.CTX_SUFF(pMsixPage) + off;
    6565}
    6666
    67 DECLINLINE(MsixTableRecord*) msixGetVectorRecord(PPCIDEVICE pDev, uint32_t iVector)
     67DECLINLINE(MsixTableRecord*) msixGetVectorRecord(PPDMPCIDEV pDev, uint32_t iVector)
    6868{
    6969    return (MsixTableRecord*)msixGetPageOffset(pDev, iVector * VBOX_MSIX_ENTRY_SIZE);
    7070}
    7171
    72 DECLINLINE(RTGCPHYS)  msixGetMsiAddress(PPCIDEVICE pDev, uint32_t iVector)
     72DECLINLINE(RTGCPHYS)  msixGetMsiAddress(PPDMPCIDEV pDev, uint32_t iVector)
    7373{
    7474    MsixTableRecord* pRec = msixGetVectorRecord(pDev, iVector);
     
    7676}
    7777
    78 DECLINLINE(uint32_t)  msixGetMsiData(PPCIDEVICE pDev, uint32_t iVector)
     78DECLINLINE(uint32_t)  msixGetMsiData(PPDMPCIDEV pDev, uint32_t iVector)
    7979{
    8080    return msixGetVectorRecord(pDev, iVector)->u32MsgData;
    8181}
    8282
    83 DECLINLINE(uint32_t)  msixIsVectorMasked(PPCIDEVICE pDev, uint32_t iVector)
     83DECLINLINE(uint32_t)  msixIsVectorMasked(PPDMPCIDEV pDev, uint32_t iVector)
    8484{
    8585    return (msixGetVectorRecord(pDev, iVector)->u32VectorControl & 0x1) != 0;
    8686}
    8787
    88 DECLINLINE(uint8_t*)  msixPendingByte(PPCIDEVICE pDev, uint32_t iVector)
     88DECLINLINE(uint8_t*)  msixPendingByte(PPDMPCIDEV pDev, uint32_t iVector)
    8989{
    9090    return msixGetPageOffset(pDev, 0x800 + iVector / 8);
    9191}
    9292
    93 DECLINLINE(void)      msixSetPending(PPCIDEVICE pDev, uint32_t iVector)
     93DECLINLINE(void)      msixSetPending(PPDMPCIDEV pDev, uint32_t iVector)
    9494{
    9595    *msixPendingByte(pDev, iVector) |= (1 << (iVector & 0x7));
    9696}
    9797
    98 DECLINLINE(void)      msixClearPending(PPCIDEVICE pDev, uint32_t iVector)
     98DECLINLINE(void)      msixClearPending(PPDMPCIDEV pDev, uint32_t iVector)
    9999{
    100100    *msixPendingByte(pDev, iVector) &= ~(1 << (iVector & 0x7));
    101101}
    102102
    103 DECLINLINE(bool)      msixIsPending(PPCIDEVICE pDev, uint32_t iVector)
     103DECLINLINE(bool)      msixIsPending(PPDMPCIDEV pDev, uint32_t iVector)
    104104{
    105105    return (*msixPendingByte(pDev, iVector) & (1 << (iVector & 0x7))) != 0;
    106106}
    107107
    108 static void msixCheckPendingVector(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t iVector)
     108static void msixCheckPendingVector(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, uint32_t iVector)
    109109{
    110110    if (msixIsPending(pDev, iVector) && !msixIsVectorMasked(pDev, iVector))
     
    123123
    124124    uint32_t off = (uint32_t)(GCPhysAddr & 0xfff);
    125     PPCIDEVICE pPciDev = (PPCIDEVICE)pvUser;
     125    PPDMPCIDEV pPciDev = (PPDMPCIDEV)pvUser;
    126126
    127127    *(uint32_t*)pv = *(uint32_t*)msixGetPageOffset(pPciDev, off);
     
    136136                    ("MSI-X must be accessed with 4-byte reads"),
    137137                    VERR_INTERNAL_ERROR);
    138     PPCIDEVICE pPciDev = (PPCIDEVICE)pvUser;
     138    PPDMPCIDEV pPciDev = (PPDMPCIDEV)pvUser;
    139139
    140140    uint32_t off = (uint32_t)(GCPhysAddr & 0xfff);
     
    152152 * @callback_method_impl{FNPCIIOREGIONMAP}
    153153 */
    154 static DECLCALLBACK(int) msixMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     154static DECLCALLBACK(int) msixMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    155155                                 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    156156{
     
    168168}
    169169
    170 int MsixInit(PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, PPDMMSIREG pMsiReg)
     170int MsixInit(PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, PPDMMSIREG pMsiReg)
    171171{
    172172    if (pMsiReg->cMsixVectors == 0)
     
    236236#endif
    237237
    238 bool     MsixIsEnabled(PPCIDEVICE pDev)
     238bool     MsixIsEnabled(PPDMPCIDEV pDev)
    239239{
    240240    return pciDevIsMsixCapable(pDev) && msixIsEnabled(pDev);
    241241}
    242242
    243 void MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, int iVector, int iLevel, uint32_t uTagSrc)
     243void MsixNotify(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, int iVector, int iLevel, uint32_t uTagSrc)
    244244{
    245245    AssertMsg(msixIsEnabled(pDev), ("Must be enabled to use that"));
     
    277277}
    278278
    279 static void msixCheckPendingVectors(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev)
     279static void msixCheckPendingVectors(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev)
    280280{
    281281    for (uint32_t i = 0; i < msixTableSize(pDev); i++)
     
    284284
    285285
    286 void MsixPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPCIDEVICE pDev, uint32_t u32Address, uint32_t val, unsigned len)
     286void MsixPciConfigWrite(PPDMDEVINS pDevIns, PCPDMPCIHLP pPciHlp, PPDMPCIDEV pDev, uint32_t u32Address, uint32_t val, unsigned len)
    287287{
    288288    int32_t iOff = u32Address - pDev->Int.s.u8MsixCapOffset;
     
    330330
    331331
    332 uint32_t MsixPciConfigRead(PPDMDEVINS pDevIns, PPCIDEVICE pDev, uint32_t u32Address, unsigned len)
     332uint32_t MsixPciConfigRead(PPDMDEVINS pDevIns, PPDMPCIDEV pDev, uint32_t u32Address, unsigned len)
    333333{
    334334    NOREF(pDevIns);
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp

    r64373 r64387  
    37623762 * @callback_method_impl{FNPCIIOREGIONMAP}
    37633763 */
    3764 DECLCALLBACK(int) vmsvgaR3IORegionMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     3764DECLCALLBACK(int) vmsvgaR3IORegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    37653765                                      RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    37663766{
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h

    r64373 r64387  
    4343#define VMSVGA_ACTION_CHANGEMODE        RT_BIT(VMSVGA_ACTION_CHANGEMODE_BIT)
    4444
    45 DECLCALLBACK(int) vmsvgaR3IORegionMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     45DECLCALLBACK(int) vmsvgaR3IORegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    4646                                      RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);
    4747
  • trunk/src/VBox/Devices/Graphics/DevVGA.cpp

    r64373 r64387  
    54005400 * @callback_method_impl{FNPCIIOREGIONMAP, Mapping/unmapping the VRAM MMI2 region}
    54015401 */
    5402 static DECLCALLBACK(int) vgaR3IORegionMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     5402static DECLCALLBACK(int) vgaR3IORegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    54035403                                          RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    54045404{
  • trunk/src/VBox/Devices/Graphics/DevVGA.h

    r62951 r64387  
    502502    PDMCRITSECT                 CritSect;
    503503    /** The PCI device. */
    504     PCIDEVICE                   Dev;
     504    PDMPCIDEV                   Dev;
    505505
    506506    STAMPROFILE                 StatRZMemoryRead;
  • trunk/src/VBox/Devices/Network/DevE1000.cpp

    r64373 r64387  
    10791079    RTIOPORT    IOPortBase;
    10801080    /** EMT: */
    1081     PCIDEVICE   pciDevice;
     1081    PDMPCIDEV   pciDevice;
    10821082    /** EMT: Last time the interrupt was acknowledged.  */
    10831083    uint64_t    u64AckedAt;
     
    61046104 * @callback_method_impl{FNPCIIOREGIONMAP}
    61056105 */
    6106 static DECLCALLBACK(int) e1kMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     6106static DECLCALLBACK(int) e1kMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    61076107                                RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    61086108{
     
    74227422 * @thread  EMT
    74237423 */
    7424 static DECLCALLBACK(void) e1kConfigurePciDev(PPCIDEVICE pPciDev, E1KCHIP eChip)
     7424static DECLCALLBACK(void) e1kConfigurePciDev(PPDMPCIDEV pPciDev, E1KCHIP eChip)
    74257425{
    74267426    Assert(eChip < RT_ELEMENTS(g_aChips));
  • trunk/src/VBox/Devices/Network/DevPCNet.cpp

    r64373 r64387  
    247247 * PCNET state.
    248248 *
    249  * @extends     PCIDEVICE
     249 * @extends     PDMPCIDEV
    250250 * @implements  PDMIBASE
    251251 * @implements  PDMINETWORKDOWN
     
    255255typedef struct PCNETSTATE
    256256{
    257     PCIDEVICE                           PciDev;
     257    PDMPCIDEV                           PciDev;
    258258
    259259    /** Pointer to the device instance - R3. */
     
    38673867 * @callback_method_impl{FNPCIIOREGIONMAP, For the PC-NET I/O Ports.}
    38683868 */
    3869 static DECLCALLBACK(int) pcnetIOPortMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     3869static DECLCALLBACK(int) pcnetIOPortMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    38703870                                        RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    38713871{
     
    39183918 * @callback_method_impl{FNPCIIOREGIONMAP, For the PC-Net MMIO region.}
    39193919 */
    3920 static DECLCALLBACK(int) pcnetMMIOMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     3920static DECLCALLBACK(int) pcnetMMIOMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    39213921                                      RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    39223922{
  • trunk/src/VBox/Devices/Network/DevVirtioNet.cpp

    r64373 r64387  
    17781778 * @callback_method_impl{FNPCIIOREGIONMAP}
    17791779 */
    1780 static DECLCALLBACK(int) vnetMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     1780static DECLCALLBACK(int) vnetMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    17811781                                 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    17821782{
  • trunk/src/VBox/Devices/PC/DevACPI.cpp

    r64373 r64387  
    282282typedef struct ACPIState
    283283{
    284     PCIDevice           dev;
     284    PDMPCIDEV           dev;
    285285    /** Critical section protecting the ACPI state. */
    286286    PDMCRITSECT         CritSect;
     
    32663266 * @callback_method_impl{FNPCICONFIGREAD}
    32673267 */
    3268 static DECLCALLBACK(uint32_t) acpiR3PciConfigRead(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t Address, unsigned cb)
     3268static DECLCALLBACK(uint32_t) acpiR3PciConfigRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t Address, unsigned cb)
    32693269{
    32703270    ACPIState *pThis   = PDMINS_2_DATA(pDevIns, ACPIState *);
     
    32773277 * @callback_method_impl{FNPCICONFIGWRITE}
    32783278 */
    3279 static DECLCALLBACK(void) acpiR3PciConfigWrite(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t Address,
     3279static DECLCALLBACK(void) acpiR3PciConfigWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t Address,
    32803280                                               uint32_t u32Value, unsigned cb)
    32813281{
  • trunk/src/VBox/Devices/PC/DevLPC.cpp

    r64373 r64387  
    6565{
    6666    /** PCI device structure. */
    67     PCIDEVICE      dev;
     67    PDMPCIDEV      dev;
    6868
    6969    /** Pointer to the device instance. - R3 ptr. */
  • trunk/src/VBox/Devices/Samples/DevPlayground.cpp

    r64373 r64387  
    9696 * @callback_method_impl{FNPCIIOREGIONMAP}
    9797 */
    98 static DECLCALLBACK(int) devPlaygroundMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     98static DECLCALLBACK(int) devPlaygroundMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    9999                                          RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    100100{
  • trunk/src/VBox/Devices/Serial/DevSerial.cpp

    r64373 r64387  
    230230
    231231#ifdef VBOX_SERIAL_PCI
    232     PCIDEVICE                       PciDev;
     232    PDMPCIDEV                       PciDev;
    233233#endif /* VBOX_SERIAL_PCI */
    234234} DEVSERIAL;
     
    10511051 * @callback_method_impl{FNPCIIOREGIONMAP}
    10521052 */
    1053 static DECLCALLBACK(int) serialIOPortRegionMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     1053static DECLCALLBACK(int) serialIOPortRegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    10541054                                               RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    10551055{
  • trunk/src/VBox/Devices/Storage/DevAHCI.cpp

    r64373 r64387  
    482482{
    483483    /** The PCI device structure. */
    484     PCIDEVICE                       dev;
     484    PDMPCIDEV                       dev;
    485485    /** Pointer to the device instance - R3 ptr */
    486486    PPDMDEVINSR3                    pDevInsR3;
     
    24492449 * @callback_method_impl{FNPCIIOREGIONMAP}
    24502450 */
    2451 static DECLCALLBACK(int) ahciR3MMIOMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     2451static DECLCALLBACK(int) ahciR3MMIOMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    24522452                                       RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    24532453{
     
    24932493 *      controller.}
    24942494 */
    2495 static DECLCALLBACK(int) ahciR3LegacyFakeIORangeMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     2495static DECLCALLBACK(int) ahciR3LegacyFakeIORangeMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    24962496                                                    RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    24972497{
     
    25332533 *      Map the BMDMA I/O port range (used for the Index/Data pair register access)}
    25342534 */
    2535 static DECLCALLBACK(int) ahciR3IdxDataIORangeMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     2535static DECLCALLBACK(int) ahciR3IdxDataIORangeMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    25362536                                                 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    25372537{
  • trunk/src/VBox/Devices/Storage/DevATA.cpp

    r64373 r64387  
    480480 * The state of the ATA PCI device.
    481481 *
    482  * @extends     PCIDEVICE
     482 * @extends     PDMPCIDEV
    483483 * @implements  PDMILEDPORTS
    484484 */
    485485typedef struct PCIATAState
    486486{
    487     PCIDEVICE           dev;
     487    PDMPCIDEV           dev;
    488488    /** The controllers. */
    489489    ATACONTROLLER       aCts[2];
     
    61126112 * @callback_method_impl{FNPCIIOREGIONMAP}
    61136113 */
    6114 static DECLCALLBACK(int) ataR3BMDMAIORangeMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     6114static DECLCALLBACK(int) ataR3BMDMAIORangeMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    61156115                                              RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    61166116{
  • trunk/src/VBox/Devices/Storage/DevBusLogic.cpp

    r64373 r64387  
    322322 * Main BusLogic device state.
    323323 *
    324  * @extends     PCIDEVICE
     324 * @extends     PDMPCIDEV
    325325 * @implements  PDMILEDPORTS
    326326 */
     
    328328{
    329329    /** The PCI device structure. */
    330     PCIDEVICE                       dev;
     330    PDMPCIDEV                       dev;
    331331    /** Pointer to the device instance - HC ptr */
    332332    PPDMDEVINSR3                    pDevInsR3;
     
    27802780 * @callback_method_impl{FNPCIIOREGIONMAP}
    27812781 */
    2782 static DECLCALLBACK(int) buslogicR3MmioMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     2782static DECLCALLBACK(int) buslogicR3MmioMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    27832783                                           RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    27842784{
  • trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.cpp

    r64373 r64387  
    189189{
    190190    /** PCI device structure. */
    191     PCIDEVICE            PciDev;
     191    PDMPCIDEV            PciDev;
    192192    /** Pointer to the device instance. - R3 ptr. */
    193193    PPDMDEVINSR3         pDevInsR3;
     
    39903990 * @callback_method_impl{FNPCIIOREGIONMAP}
    39913991 */
    3992 static DECLCALLBACK(int) lsilogicR3Map(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     3992static DECLCALLBACK(int) lsilogicR3Map(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    39933993                                       RTGCPHYS GCPhysAddress, RTGCPHYS cb,
    39943994                                       PCIADDRESSSPACE enmType)
  • trunk/src/VBox/Devices/USB/DevOHCI.cpp

    r64373 r64387  
    264264{
    265265    /** The PCI device. */
    266     PCIDEVICE           PciDev;
     266    PDMPCIDEV           PciDev;
    267267
    268268    /** Pointer to the device instance - R3 ptr. */
     
    53645364 * @callback_method_impl{FNPCIIOREGIONMAP}
    53655365 */
    5366 static DECLCALLBACK(int) ohciR3Map(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     5366static DECLCALLBACK(int) ohciR3Map(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    53675367                                   RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    53685368{
  • trunk/src/VBox/Devices/VMMDev/VMMDev.cpp

    r64373 r64387  
    28792879 * @callback_method_impl{FNPCIIOREGIONMAP,MMIO/MMIO2 regions}
    28802880 */
    2881 static DECLCALLBACK(int) vmmdevIORAMRegionMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     2881static DECLCALLBACK(int) vmmdevIORAMRegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    28822882                                              RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    28832883{
     
    29472947 * @callback_method_impl{FNPCIIOREGIONMAP,I/O Port Region}
    29482948 */
    2949 static DECLCALLBACK(int) vmmdevIOPortRegionMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     2949static DECLCALLBACK(int) vmmdevIOPortRegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    29502950                                               RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    29512951{
  • trunk/src/VBox/Devices/VMMDev/VMMDevState.h

    r62503 r64387  
    115115{
    116116    /** The PCI device structure. */
    117     PCIDevice           PciDev;
     117    PDMPCIDEV           PciDev;
    118118    /** The critical section for this device.
    119119     * @remarks We use this rather than the default one, it's simpler with all
  • trunk/src/VBox/Devices/VirtIO/Virtio.cpp

    r64301 r64387  
    626626 * @thread  EMT
    627627 */
    628 DECLINLINE(void) vpciCfgSetU8(PCIDEVICE& refPciDev, uint32_t uOffset, uint8_t u8Value)
     628DECLINLINE(void) vpciCfgSetU8(PDMPCIDEV& refPciDev, uint32_t uOffset, uint8_t u8Value)
    629629{
    630630    Assert(uOffset < sizeof(refPciDev.config));
     
    639639 * @thread  EMT
    640640 */
    641 DECLINLINE(void) vpciCfgSetU16(PCIDEVICE& refPciDev, uint32_t uOffset, uint16_t u16Value)
     641DECLINLINE(void) vpciCfgSetU16(PDMPCIDEV& refPciDev, uint32_t uOffset, uint16_t u16Value)
    642642{
    643643    Assert(uOffset+sizeof(u16Value) <= sizeof(refPciDev.config));
     
    653653 * @thread  EMT
    654654 */
    655 DECLINLINE(void) vpciCfgSetU32(PCIDEVICE& refPciDev, uint32_t uOffset, uint32_t u32Value)
     655DECLINLINE(void) vpciCfgSetU32(PDMPCIDEV& refPciDev, uint32_t uOffset, uint32_t u32Value)
    656656{
    657657    Assert(uOffset+sizeof(u32Value) <= sizeof(refPciDev.config));
     
    800800 * @thread  EMT
    801801 */
    802 static DECLCALLBACK(void) vpciConfigure(PCIDEVICE& pci,
     802static DECLCALLBACK(void) vpciConfigure(PDMPCIDEV& pci,
    803803                                        uint16_t uDeviceId,
    804804                                        uint16_t uClass)
  • trunk/src/VBox/Devices/VirtIO/Virtio.h

    r62504 r64387  
    188188
    189189    /** TODO */
    190     PCIDEVICE              pciDevice;
     190    PDMPCIDEV              pciDevice;
    191191    /** Base port of I/O space region. */
    192192    RTIOPORT               IOPortBase;
  • trunk/src/VBox/Devices/testcase/tstDeviceStructSize.cpp

    r64351 r64387  
    281281    /* Basic alignment checks. */
    282282    CHECK_MEMBER_ALIGNMENT(PDMDEVINS, achInstanceData, 64);
    283     CHECK_MEMBER_ALIGNMENT(PCIDEVICE, Int.s, 16);
    284     CHECK_MEMBER_ALIGNMENT(PCIDEVICE, Int.s.aIORegions, 16);
     283    CHECK_MEMBER_ALIGNMENT(PDMPCIDEV, Int.s, 16);
     284    CHECK_MEMBER_ALIGNMENT(PDMPCIDEV, Int.s.aIORegions, 16);
    285285
    286286    /*
  • trunk/src/VBox/Devices/testcase/tstDeviceStructSizeRC.cpp

    r64373 r64387  
    151151    GEN_CHECK_SIZE(PDMPCIDEVICEINT);
    152152    GEN_CHECK_SIZE(PCIIOREGION);
    153     GEN_CHECK_OFF(PCIDEVICE, config);
    154     GEN_CHECK_OFF(PCIDEVICE, devfn);
    155     GEN_CHECK_OFF(PCIDEVICE, name);
    156     GEN_CHECK_OFF(PCIDEVICE, pDevIns);
    157     GEN_CHECK_OFF(PCIDEVICE, Int);
    158     GEN_CHECK_OFF(PCIDEVICE, Int.s.aIORegions);
    159     GEN_CHECK_OFF(PCIDEVICE, Int.s.aIORegions[1]);
    160     GEN_CHECK_OFF(PCIDEVICE, Int.s.aIORegions[VBOX_PCI_NUM_REGIONS - 1]);
    161     GEN_CHECK_OFF(PCIDEVICE, Int.s.aIORegions[0].addr);
    162     GEN_CHECK_OFF(PCIDEVICE, Int.s.aIORegions[0].size);
    163     GEN_CHECK_OFF(PCIDEVICE, Int.s.aIORegions[0].type);
    164     GEN_CHECK_OFF(PCIDEVICE, Int.s.aIORegions[0].padding);
    165     GEN_CHECK_OFF(PCIDEVICE, Int.s.pBusR3);
    166     GEN_CHECK_OFF(PCIDEVICE, Int.s.pBusR0);
    167     GEN_CHECK_OFF(PCIDEVICE, Int.s.pBusRC);
    168     GEN_CHECK_OFF(PCIDEVICE, Int.s.pfnConfigRead);
    169     GEN_CHECK_OFF(PCIDEVICE, Int.s.pfnConfigWrite);
    170     GEN_CHECK_OFF(PCIDEVICE, Int.s.fFlags);
    171     GEN_CHECK_OFF(PCIDEVICE, Int.s.uIrqPinState);
    172     GEN_CHECK_OFF(PCIDEVICE, Int.s.pfnBridgeConfigRead);
    173     GEN_CHECK_OFF(PCIDEVICE, Int.s.pfnBridgeConfigWrite);
    174     GEN_CHECK_PADDING(PCIDEVICE, Int, 8);
     153    GEN_CHECK_OFF(PDMPCIDEV, config);
     154    GEN_CHECK_OFF(PDMPCIDEV, devfn);
     155    GEN_CHECK_OFF(PDMPCIDEV, name);
     156    GEN_CHECK_OFF(PDMPCIDEV, pDevIns);
     157    GEN_CHECK_OFF(PDMPCIDEV, Int);
     158    GEN_CHECK_OFF(PDMPCIDEV, Int.s.aIORegions);
     159    GEN_CHECK_OFF(PDMPCIDEV, Int.s.aIORegions[1]);
     160    GEN_CHECK_OFF(PDMPCIDEV, Int.s.aIORegions[VBOX_PCI_NUM_REGIONS - 1]);
     161    GEN_CHECK_OFF(PDMPCIDEV, Int.s.aIORegions[0].addr);
     162    GEN_CHECK_OFF(PDMPCIDEV, Int.s.aIORegions[0].size);
     163    GEN_CHECK_OFF(PDMPCIDEV, Int.s.aIORegions[0].type);
     164    GEN_CHECK_OFF(PDMPCIDEV, Int.s.aIORegions[0].padding);
     165    GEN_CHECK_OFF(PDMPCIDEV, Int.s.pBusR3);
     166    GEN_CHECK_OFF(PDMPCIDEV, Int.s.pBusR0);
     167    GEN_CHECK_OFF(PDMPCIDEV, Int.s.pBusRC);
     168    GEN_CHECK_OFF(PDMPCIDEV, Int.s.pfnConfigRead);
     169    GEN_CHECK_OFF(PDMPCIDEV, Int.s.pfnConfigWrite);
     170    GEN_CHECK_OFF(PDMPCIDEV, Int.s.fFlags);
     171    GEN_CHECK_OFF(PDMPCIDEV, Int.s.uIrqPinState);
     172    GEN_CHECK_OFF(PDMPCIDEV, Int.s.pfnBridgeConfigRead);
     173    GEN_CHECK_OFF(PDMPCIDEV, Int.s.pfnBridgeConfigWrite);
     174    GEN_CHECK_PADDING(PDMPCIDEV, Int, 8);
    175175    GEN_CHECK_SIZE(PIIX3State);
    176176    GEN_CHECK_SIZE(PCIBUS);
  • trunk/src/VBox/VMM/VMMR0/PDMR0Device.cpp

    r64378 r64387  
    6969
    7070/** @interface_method_impl{PDMDEVHLPR0,pfnPCIPhysRead} */
    71 static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, RTGCPHYS GCPhys,
     71static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
    7272                                                 void *pvBuf, size_t cbRead)
    7373{
     
    9696
    9797/** @interface_method_impl{PDMDEVHLPR0,pfnPCIPhysWrite} */
    98 static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, RTGCPHYS GCPhys,
     98static DECLCALLBACK(int) pdmR0DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
    9999                                                  const void *pvBuf, size_t cbWrite)
    100100{
     
    123123
    124124/** @interface_method_impl{PDMDEVHLPR0,pfnPCISetIrq} */
    125 static DECLCALLBACK(void) pdmR0DevHlp_PCISetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)
     125static DECLCALLBACK(void) pdmR0DevHlp_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
    126126{
    127127    PDMDEV_ASSERT_DEVINS(pDevIns);
  • trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

    r64378 r64387  
    428428 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
    429429 */
    430 static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion, RTGCPHYS cb,
     430static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cb,
    431431                                                   uint32_t fFlags, void **ppv, const char *pszDesc)
    432432{
     
    452452 */
    453453static DECLCALLBACK(int)
    454 pdmR3DevHlp_MMIOExPreRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, uint32_t fFlags,
     454pdmR3DevHlp_MMIOExPreRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, uint32_t fFlags,
    455455                              const char *pszDesc,
    456456                              RTHCPTR pvUser, PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
     
    542542 * @copydoc PDMDEVHLPR3::pfnMMIOExDeregister
    543543 */
    544 static DECLCALLBACK(int) pdmR3DevHlp_MMIOExDeregister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion)
     544static DECLCALLBACK(int) pdmR3DevHlp_MMIOExDeregister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion)
    545545{
    546546    PDMDEV_ASSERT_DEVINS(pDevIns);
     
    562562 * @copydoc PDMDEVHLPR3::pfnMMIOExMap
    563563 */
    564 static DECLCALLBACK(int) pdmR3DevHlp_MMIOExMap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
     564static DECLCALLBACK(int) pdmR3DevHlp_MMIOExMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
    565565{
    566566    PDMDEV_ASSERT_DEVINS(pDevIns);
     
    580580 * @copydoc PDMDEVHLPR3::pfnMMIOExUnmap
    581581 */
    582 static DECLCALLBACK(int) pdmR3DevHlp_MMIOExUnmap(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
     582static DECLCALLBACK(int) pdmR3DevHlp_MMIOExUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS GCPhys)
    583583{
    584584    PDMDEV_ASSERT_DEVINS(pDevIns);
     
    598598 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
    599599 */
    600 static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion, RTGCPHYS off,
     600static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off,
    601601                                                     RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
    602602{
     
    625625 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
    626626 */
    627 static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion, RTGCPHYS off,
     627static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS off,
    628628                                                    RTGCPHYS cb,const char *pszDesc, PRTR0PTR pR0Ptr)
    629629{
     
    12151215 * @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister}
    12161216 */
    1217 static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
     1217static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t idxDevCfg, uint32_t fFlags,
    12181218                                                 uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName)
    12191219{
     
    14591459
    14601460/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegisterMsi} */
    1461 static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg)
     1461static DECLCALLBACK(int) pdmR3DevHlp_PCIRegisterMsi(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg)
    14621462{
    14631463    PDMDEV_ASSERT_DEVINS(pDevIns);
     
    14841484
    14851485/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
    1486 static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t iRegion,
     1486static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    14871487                                                         RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
    14881488{
     
    15841584
    15851585/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
    1586 static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
     1586static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
    15871587                                                            PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
    15881588{
     
    16221622/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysRead} */
    16231623static DECLCALLBACK(int)
    1624 pdmR3DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
     1624pdmR3DevHlp_PCIPhysRead(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    16251625{
    16261626    PDMDEV_ASSERT_DEVINS(pDevIns);
     
    16491649/** @interface_method_impl{PDMDEVHLPR3,pfnPCIPhysWrite} */
    16501650static DECLCALLBACK(int)
    1651 pdmR3DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     1651pdmR3DevHlp_PCIPhysWrite(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    16521652{
    16531653    PDMDEV_ASSERT_DEVINS(pDevIns);
     
    16751675
    16761676/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
    1677 static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)
     1677static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
    16781678{
    16791679    PDMDEV_ASSERT_DEVINS(pDevIns);
     
    17211721
    17221722/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
    1723 static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel)
     1723static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel)
    17241724{
    17251725    pdmR3DevHlp_PCISetIrq(pDevIns, pPciDev, iIrq, iLevel);
     
    42124212        {
    42134213            /* Same as pdmR3DevHlp_PCISetIrq, except we've got a tag already. */
    4214             PPCIDEVICE pPciDev = pTask->u.PciSetIRQ.pPciDevR3;
     4214            PPDMPCIDEV pPciDev = pTask->u.PciSetIRQ.pPciDevR3;
    42154215            if (pPciDev)
    42164216            {
  • trunk/src/VBox/VMM/include/PDMInternal.h

    r64374 r64387  
    704704    PPDMDEVINSR3                    pDevInsR3;
    705705    /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
    706     DECLR3CALLBACKMEMBER(void,      pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
     706    DECLR3CALLBACKMEMBER(void,      pfnSetIrqR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
    707707    /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
    708     DECLR3CALLBACKMEMBER(int,       pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, uint32_t fFlags,
     708    DECLR3CALLBACKMEMBER(int,       pfnRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
    709709                                                   uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName));
    710710    /** @copydoc PDMPCIBUSREG::pfnRegisterMsiR3 */
    711     DECLR3CALLBACKMEMBER(int,       pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
     711    DECLR3CALLBACKMEMBER(int,       pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
    712712    /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
    713     DECLR3CALLBACKMEMBER(int,       pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, RTGCPHYS cbRegion,
     713    DECLR3CALLBACKMEMBER(int,       pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
    714714                                                           PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
    715715    /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
    716     DECLR3CALLBACKMEMBER(void,      pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
     716    DECLR3CALLBACKMEMBER(void,      pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PFNPCICONFIGREAD pfnRead,
    717717                                                             PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
    718718    /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
     
    722722    R0PTRTYPE(PPDMDEVINS)           pDevInsR0;
    723723    /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
    724     DECLR0CALLBACKMEMBER(void,      pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
     724    DECLR0CALLBACKMEMBER(void,      pfnSetIrqR0,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
    725725
    726726    /** Pointer to PCI Bus device instance. */
    727727    PPDMDEVINSRC                    pDevInsRC;
    728728    /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
    729     DECLRCCALLBACKMEMBER(void,      pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
     729    DECLRCCALLBACKMEMBER(void,      pfnSetIrqRC,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iIrq, int iLevel, uint32_t uTagSrc));
    730730} PDMPCIBUS;
    731731
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