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source: vbox/trunk/src/VBox/Devices/VirtIO/Virtio_1_0.h@ 81810

Last change on this file since 81810 was 81678, checked in by vboxsync, 5 years ago

Virtio_1_0,DevVirtioScsi: s/virtio/virtioCore/ + s/VIRTIOSTATE/VIRTIOCORE/. bugref:9218 bugref:9440
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1/* $Id: Virtio_1_0.h 81678 2019-11-05 16:58:45Z vboxsync $ */
2/** @file
3 * Virtio_1_0.h - Virtio Declarations
4 */
5
6/*
7 * Copyright (C) 2009-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef VBOX_INCLUDED_SRC_VirtIO_Virtio_1_0_h
19#define VBOX_INCLUDED_SRC_VirtIO_Virtio_1_0_h
20#ifndef RT_WITHOUT_PRAGMA_ONCE
21# pragma once
22#endif
23
24#include <iprt/ctype.h>
25#include <iprt/sg.h>
26
27/** Pointer to the shared VirtIO state. */
28typedef struct VIRTIOCORE *PVIRTIOCORE;
29/** Pointer to the ring-3 VirtIO state. */
30typedef struct VIRTIOCORER3 *PVIRTIOCORER3;
31/** Pointer to the ring-0 VirtIO state. */
32typedef struct VIRTIOCORER0 *PVIRTIOCORER0;
33/** Pointer to the raw-mode VirtIO state. */
34typedef struct VIRTIOCORERC *PVIRTIOCORERC;
35/** Pointer to the instance data for the current context. */
36typedef CTX_SUFF(PVIRTIOCORE) PVIRTIOCORECC;
37
38
39/**
40 * Important sizing and bounds params for this impl. of VirtIO 1.0 PCI device
41 */
42 /**
43 * TEMPORARY NOTE: Some of these values are experimental during development and will likely change.
44 */
45#define VIRTIO_MAX_QUEUE_NAME_SIZE 32 /**< Maximum length of a queue name */
46#define VIRTQ_MAX_SIZE 1024 /**< Max size (# desc elements) of a virtq */
47#define VIRTQ_MAX_CNT 24 /**< Max queues we allow guest to create */
48#define VIRTIO_NOTIFY_OFFSET_MULTIPLIER 2 /**< VirtIO Notify Cap. MMIO config param */
49#define VIRTIO_REGION_PCI_CAP 2 /**< BAR for VirtIO Cap. MMIO (impl specific) */
50#define VIRTIO_REGION_MSIX_CAP 0 /**< Bar for MSI-X handling */
51
52#ifdef LOG_ENABLED
53# define VIRTIO_HEX_DUMP(logLevel, pv, cb, base, title) \
54 do { \
55 if (LogIsItEnabled(logLevel, LOG_GROUP)) \
56 virtioCoreHexDump((pv), (cb), (base), (title)); \
57 } while (0)
58#else
59# define VIRTIO_HEX_DUMP(logLevel, pv, cb, base, title) do { } while (0)
60#endif
61
62
63/**
64 * The following structure holds the pre-processed context of descriptor chain pulled from a virtio queue
65 * to conduct a transaction between the client of this virtio implementation and the guest VM's virtio driver.
66 * It contains the head index of the descriptor chain, the output data from the client that has been
67 * converted to a contiguous virtual memory and a physical memory scatter-gather buffer for use by by
68 * the virtio framework to complete the transaction in the final phase of round-trip processing.
69 *
70 * The client should not modify the contents of this buffer. The primary field of interest to the
71 * client is pVirtSrc, which contains the VirtIO "OUT" (to device) buffer from the guest.
72 *
73 * Typical use is, When the client (worker thread) detects available data on the queue, it pulls the
74 * next one of these descriptor chain structs off the queue using virtioCoreR3QueueGet(), processes the
75 * virtual memory buffer pVirtSrc, produces result data to pass back to the guest driver and calls
76 * virtioCoreR3QueuePut() to return the result data to the client.
77 */
78typedef struct VIRTIO_DESC_CHAIN
79{
80 uint32_t uHeadIdx; /**< Head idx of associated desc chain */
81 uint32_t cbPhysSend; /**< Total size of src buffer */
82 PRTSGBUF pSgPhysSend; /**< Phys S/G/ buf for data from guest */
83 uint32_t cbPhysReturn; /**< Total size of dst buffer */
84 PRTSGBUF pSgPhysReturn; /**< Phys S/G buf to store result for guest */
85} VIRTIO_DESC_CHAIN_T, *PVIRTIO_DESC_CHAIN_T, **PPVIRTIO_DESC_CHAIN_T;
86
87/**
88 * The following structure is used to pass the PCI parameters from the consumer
89 * to this generic VirtIO framework. This framework provides the Vendor ID as Virtio.
90 */
91typedef struct VIRTIOPCIPARAMS
92{
93 uint16_t uDeviceId; /**< PCI Cfg Device ID */
94 uint16_t uClassBase; /**< PCI Cfg Base Class */
95 uint16_t uClassSub; /**< PCI Cfg Subclass */
96 uint16_t uClassProg; /**< PCI Cfg Programming Interface Class */
97 uint16_t uSubsystemId; /**< PCI Cfg Card Manufacturer Vendor ID */
98 uint16_t uSubsystemVendorId; /**< PCI Cfg Chipset Manufacturer Vendor ID */
99 uint16_t uRevisionId; /**< PCI Cfg Revision ID */
100 uint16_t uInterruptLine; /**< PCI Cfg Interrupt line */
101 uint16_t uInterruptPin; /**< PCI Cfg Interrupt pin */
102} VIRTIOPCIPARAMS, *PVIRTIOPCIPARAMS;
103
104
105#define VIRTIO_F_VERSION_1 RT_BIT_64(32) /**< Required feature bit for 1.0 devices */
106
107#define VIRTIO_F_INDIRECT_DESC RT_BIT_64(28) /**< Allow descs to point to list of descs */
108#define VIRTIO_F_EVENT_IDX RT_BIT_64(29) /**< Allow notification disable for n elems */
109#define VIRTIO_F_RING_INDIRECT_DESC RT_BIT_64(28) /**< Doc bug: Goes under two names in spec */
110#define VIRTIO_F_RING_EVENT_IDX RT_BIT_64(29) /**< Doc bug: Goes under two names in spec */
111
112#define VIRTIO_DEV_INDEPENDENT_FEATURES_OFFERED ( 0 ) /**< TBD: Add VIRTIO_F_INDIRECT_DESC */
113
114#define VIRTIO_ISR_VIRTQ_INTERRUPT RT_BIT_32(0) /**< Virtq interrupt bit of ISR register */
115#define VIRTIO_ISR_DEVICE_CONFIG RT_BIT_32(1) /**< Device configuration changed bit of ISR */
116#define DEVICE_PCI_VENDOR_ID_VIRTIO 0x1AF4 /**< Guest driver locates dev via (mandatory) */
117#define DEVICE_PCI_REVISION_ID_VIRTIO 1 /**< VirtIO 1.0 non-transitional drivers >= 1 */
118
119/** Reserved (*negotiated*) Feature Bits (e.g. device independent features, VirtIO 1.0 spec,section 6) */
120
121#define VIRTIO_MSI_NO_VECTOR 0xffff /**< Vector value to disable MSI for queue */
122
123/** Device Status field constants (from Virtio 1.0 spec) */
124#define VIRTIO_STATUS_ACKNOWLEDGE 0x01 /**< Guest driver: Located this VirtIO device */
125#define VIRTIO_STATUS_DRIVER 0x02 /**< Guest driver: Can drive this VirtIO dev. */
126#define VIRTIO_STATUS_DRIVER_OK 0x04 /**< Guest driver: Driver set-up and ready */
127#define VIRTIO_STATUS_FEATURES_OK 0x08 /**< Guest driver: Feature negotiation done */
128#define VIRTIO_STATUS_FAILED 0x80 /**< Guest driver: Fatal error, gave up */
129#define VIRTIO_STATUS_DEVICE_NEEDS_RESET 0x40 /**< Device experienced unrecoverable error */
130
131/** @def Virtio Device PCI Capabilities type codes */
132#define VIRTIO_PCI_CAP_COMMON_CFG 1 /**< Common configuration PCI capability ID */
133#define VIRTIO_PCI_CAP_NOTIFY_CFG 2 /**< Notification area PCI capability ID */
134#define VIRTIO_PCI_CAP_ISR_CFG 3 /**< ISR PCI capability id */
135#define VIRTIO_PCI_CAP_DEVICE_CFG 4 /**< Device-specific PCI cfg capability ID */
136#define VIRTIO_PCI_CAP_PCI_CFG 5 /**< PCI CFG capability ID */
137
138#define VIRTIO_PCI_CAP_ID_VENDOR 0x09 /**< Vendor-specific PCI CFG Device Cap. ID */
139
140/**
141 * The following is the PCI capability struct common to all VirtIO capability types
142 */
143typedef struct virtio_pci_cap
144{
145 /* All little-endian */
146 uint8_t uCapVndr; /**< Generic PCI field: PCI_CAP_ID_VNDR */
147 uint8_t uCapNext; /**< Generic PCI field: next ptr. */
148 uint8_t uCapLen; /**< Generic PCI field: capability length */
149 uint8_t uCfgType; /**< Identifies the structure. */
150 uint8_t uBar; /**< Where to find it. */
151 uint8_t uPadding[3]; /**< Pad to full dword. */
152 uint32_t uOffset; /**< Offset within bar. (L.E.) */
153 uint32_t uLength; /**< Length of struct, in bytes. (L.E.) */
154} VIRTIO_PCI_CAP_T, *PVIRTIO_PCI_CAP_T;
155
156/**
157 * Local implementation's usage context of a queue (e.g. not part of VirtIO specification)
158 */
159typedef struct VIRTQSTATE
160{
161 char szVirtqName[32]; /**< Dev-specific name of queue */
162 uint16_t uAvailIdx; /**< Consumer's position in avail ring */
163 uint16_t uUsedIdx; /**< Consumer's position in used ring */
164 bool fEventThresholdReached; /**< Don't lose track while queueing ahead */
165} VIRTQSTATE, *PVIRTQSTATE;
166
167/**
168 * VirtIO 1.0 Capabilities' related MMIO-mapped structs:
169 *
170 * Note: virtio_pci_device_cap is dev-specific, implemented by client. Definition unknown here.
171 */
172typedef struct virtio_pci_common_cfg
173{
174 /* Per device fields */
175 uint32_t uDeviceFeaturesSelect; /**< RW (driver selects device features) */
176 uint32_t uDeviceFeatures; /**< RO (device reports features to driver) */
177 uint32_t uDriverFeaturesSelect; /**< RW (driver selects driver features) */
178 uint32_t uDriverFeatures; /**< RW (driver-accepted device features) */
179 uint16_t uMsixConfig; /**< RW (driver sets MSI-X config vector) */
180 uint16_t uNumQueues; /**< RO (device specifies max queues) */
181 uint8_t uDeviceStatus; /**< RW (driver writes device status, 0=reset) */
182 uint8_t uConfigGeneration; /**< RO (device changes when changing configs) */
183
184 /* Per virtqueue fields (as determined by uQueueSelect) */
185 uint16_t uQueueSelect; /**< RW (selects queue focus for these fields) */
186 uint16_t uQueueSize; /**< RW (queue size, 0 - 2^n) */
187 uint16_t uQueueMsixVector; /**< RW (driver selects MSI-X queue vector) */
188 uint16_t uQueueEnable; /**< RW (driver controls usability of queue) */
189 uint16_t uQueueNotifyOff; /**< RO (offset uto virtqueue; see spec) */
190 uint64_t aGCPhysQueueDesc; /**< RW (driver writes desc table phys addr) */
191 uint64_t aGCPhysQueueAvail; /**< RW (driver writes avail ring phys addr) */
192 uint64_t aGCPhysQueueUsed; /**< RW (driver writes used ring phys addr) */
193} VIRTIO_PCI_COMMON_CFG_T, *PVIRTIO_PCI_COMMON_CFG_T;
194
195typedef struct virtio_pci_notify_cap
196{
197 struct virtio_pci_cap pciCap; /**< Notification MMIO mapping capability */
198 uint32_t uNotifyOffMultiplier; /**< notify_off_multiplier */
199} VIRTIO_PCI_NOTIFY_CAP_T, *PVIRTIO_PCI_NOTIFY_CAP_T;
200
201typedef struct virtio_pci_cfg_cap
202{
203 struct virtio_pci_cap pciCap; /**< Cap. defines the BAR/off/len to access */
204 uint8_t uPciCfgData[4]; /**< I/O buf for above cap. */
205} VIRTIO_PCI_CFG_CAP_T, *PVIRTIO_PCI_CFG_CAP_T;
206
207/**
208 * PCI capability data locations (PCI CFG and MMIO).
209 */
210typedef struct VIRTIO_PCI_CAP_LOCATIONS_T
211{
212 uint16_t offMmio;
213 uint16_t cbMmio;
214 uint16_t offPci;
215 uint16_t cbPci;
216} VIRTIO_PCI_CAP_LOCATIONS_T;
217
218/**
219 * The core/common state of the VirtIO PCI devices, shared edition.
220 */
221typedef struct VIRTIOCORE
222{
223 char szInstance[16]; /**< Instance name, e.g. "VIRTIOSCSI0" */
224
225 RTGCPHYS aGCPhysQueueDesc[VIRTQ_MAX_CNT]; /**< (MMIO) PhysAdr per-Q desc structs GUEST */
226 RTGCPHYS aGCPhysQueueAvail[VIRTQ_MAX_CNT]; /**< (MMIO) PhysAdr per-Q avail structs GUEST */
227 RTGCPHYS aGCPhysQueueUsed[VIRTQ_MAX_CNT]; /**< (MMIO) PhysAdr per-Q used structs GUEST */
228 uint16_t uQueueNotifyOff[VIRTQ_MAX_CNT]; /**< (MMIO) per-Q notify offset HOST */
229 uint16_t uQueueMsixVector[VIRTQ_MAX_CNT]; /**< (MMIO) Per-queue vector for MSI-X GUEST */
230 uint16_t uQueueEnable[VIRTQ_MAX_CNT]; /**< (MMIO) Per-queue enable GUEST */
231 uint16_t uQueueSize[VIRTQ_MAX_CNT]; /**< (MMIO) Per-queue size HOST/GUEST */
232 uint16_t uQueueSelect; /**< (MMIO) queue selector GUEST */
233 uint16_t padding;
234 uint64_t uDeviceFeatures; /**< (MMIO) Host features offered HOST */
235 uint64_t uDriverFeatures; /**< (MMIO) Host features accepted GUEST */
236 uint32_t uDeviceFeaturesSelect; /**< (MMIO) hi/lo select uDeviceFeatures GUEST */
237 uint32_t uDriverFeaturesSelect; /**< (MMIO) hi/lo select uDriverFeatures GUEST */
238 uint32_t uMsixConfig; /**< (MMIO) MSI-X vector GUEST */
239 uint32_t uNumQueues; /**< (MMIO) Actual number of queues GUEST
240 * @todo r=bird: This value is always VIRTQ_MAX_CNT
241 * and only used in for loops. Guest always see
242 * VIRTQ_MAX_CNT regardless of this value, so
243 * what's the point of having this? */
244 uint8_t uDeviceStatus; /**< (MMIO) Device Status GUEST */
245 uint8_t uPrevDeviceStatus; /**< (MMIO) Prev Device Status GUEST */
246 uint8_t uConfigGeneration; /**< (MMIO) Device config sequencer HOST */
247
248 VIRTQSTATE virtqState[VIRTQ_MAX_CNT]; /**< Local impl-specific queue context */
249
250 /** @name The locations of the capability structures in PCI config space and the BAR.
251 * @{ */
252 VIRTIO_PCI_CAP_LOCATIONS_T LocPciCfgCap; /**< VIRTIO_PCI_CFG_CAP_T */
253 VIRTIO_PCI_CAP_LOCATIONS_T LocNotifyCap; /**< VIRTIO_PCI_NOTIFY_CAP_T */
254 VIRTIO_PCI_CAP_LOCATIONS_T LocCommonCfgCap; /**< VIRTIO_PCI_CAP_T */
255 VIRTIO_PCI_CAP_LOCATIONS_T LocIsrCap; /**< VIRTIO_PCI_CAP_T */
256 VIRTIO_PCI_CAP_LOCATIONS_T LocDeviceCap; /**< VIRTIO_PCI_CAP_T + custom data. */
257 /** @} */
258
259 bool fGenUpdatePending; /**< If set, update cfg gen after driver reads */
260 uint8_t uPciCfgDataOff;
261 uint8_t uISR; /**< Interrupt Status Register. */
262 uint8_t fMsiSupport;
263
264
265 /** The MMIO handle for the PCI capability region (\#2). */
266 IOMMMIOHANDLE hMmioPciCap;
267} VIRTIOCORE;
268
269
270/**
271 * The core/common state of the VirtIO PCI devices, ring-3 edition.
272 */
273typedef struct VIRTIOCORER3
274{
275 /** @name Callbacks filled by the device before calling virtioCoreR3Init.
276 * @{ */
277 /**
278 * Implementation-specific client callback to notify client of significant device status
279 * changes.
280 *
281 * @param pVirtio Pointer to the shared virtio state.
282 * @param pVirtioCC Pointer to the ring-3 virtio state.
283 * @param fDriverOk True if guest driver is okay (thus queues, etc... are
284 * valid)
285 */
286 DECLCALLBACKMEMBER(void, pfnStatusChanged)(PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC, uint32_t fDriverOk);
287
288 /**
289 * When guest-to-host queue notifications are enabled, the guest driver notifies the host
290 * that the avail queue has buffers, and this callback informs the client.
291 *
292 * @param pVirtio Pointer to the shared virtio state.
293 * @param pVirtioCC Pointer to the ring-3 virtio state.
294 * @param idxQueue Index of the notified queue
295 */
296 DECLCALLBACKMEMBER(void, pfnQueueNotified)(PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC, uint16_t idxQueue);
297
298 /**
299 * Implementation-specific client callback to access VirtIO Device-specific capabilities
300 * (other VirtIO capabilities and features are handled in VirtIO implementation)
301 *
302 * @param pDevIns The device instance.
303 * @param offCap Offset within device specific capabilities struct.
304 * @param pvBuf Buffer in which to save read data.
305 * @param cbToRead Number of bytes to read.
306 */
307 DECLCALLBACKMEMBER(int, pfnDevCapRead)(PPDMDEVINS pDevIns, uint32_t offCap, void *pvBuf, uint32_t cbToRead);
308
309 /**
310 * Implementation-specific client ballback to access VirtIO Device-specific capabilities
311 * (other VirtIO capabilities and features are handled in VirtIO implementation)
312 *
313 * @param pDevIns The device instance.
314 * @param offCap Offset within device specific capabilities struct.
315 * @param pvBuf Buffer with the bytes to write.
316 * @param cbToWrite Number of bytes to write.
317 */
318 DECLCALLBACKMEMBER(int, pfnDevCapWrite)(PPDMDEVINS pDevIns, uint32_t offCap, const void *pvBuf, uint32_t cbWrite);
319 /** @} */
320
321 R3PTRTYPE(PVIRTIO_PCI_CFG_CAP_T) pPciCfgCap; /**< Pointer to struct in the PCI configuration area. */
322 R3PTRTYPE(PVIRTIO_PCI_NOTIFY_CAP_T) pNotifyCap; /**< Pointer to struct in the PCI configuration area. */
323 R3PTRTYPE(PVIRTIO_PCI_CAP_T) pCommonCfgCap; /**< Pointer to struct in the PCI configuration area. */
324 R3PTRTYPE(PVIRTIO_PCI_CAP_T) pIsrCap; /**< Pointer to struct in the PCI configuration area. */
325 R3PTRTYPE(PVIRTIO_PCI_CAP_T) pDeviceCap; /**< Pointer to struct in the PCI configuration area. */
326
327 uint32_t cbDevSpecificCfg; /**< Size of client's dev-specific config data */
328 R3PTRTYPE(uint8_t *) pbDevSpecificCfg; /**< Pointer to client's struct */
329 R3PTRTYPE(uint8_t *) pbPrevDevSpecificCfg; /**< Previous read dev-specific cfg of client */
330 bool fGenUpdatePending; /**< If set, update cfg gen after driver reads */
331} VIRTIOCORER3;
332
333
334/**
335 * The core/common state of the VirtIO PCI devices, ring-0 edition.
336 */
337typedef struct VIRTIOCORER0
338{
339 uint64_t uUnusedAtTheMoment;
340} VIRTIOCORER0;
341
342
343/**
344 * The core/common state of the VirtIO PCI devices, raw-mode edition.
345 */
346typedef struct VIRTIOCORERC
347{
348 uint64_t uUnusedAtTheMoment;
349} VIRTIOCORERC;
350
351
352/** @typedef VIRTIOCORECC
353 * The instance data for the current context. */
354typedef CTX_SUFF(VIRTIOCORE) VIRTIOCORECC;
355
356
357/** @name virtq related flags
358 * @{ */
359#define VIRTQ_DESC_F_NEXT 1 /**< Indicates this descriptor chains to next */
360#define VIRTQ_DESC_F_WRITE 2 /**< Marks buffer as write-only (default ro) */
361#define VIRTQ_DESC_F_INDIRECT 4 /**< Buffer is list of buffer descriptors */
362
363#define VIRTQ_USED_F_NO_NOTIFY 1 /**< Dev to Drv: Don't notify when buf added */
364#define VIRTQ_AVAIL_F_NO_INTERRUPT 1 /**< Drv to Dev: Don't notify when buf eaten */
365/** @} */
366
367
368/** @name API for VirtIO parent device
369 * @{ */
370
371int virtioCoreR3QueueAttach(PVIRTIOCORE pVirtio, uint16_t idxQueue, const char *pcszName);
372#if 0 /* no such function */
373/**
374 * Detaches from queue and release resources
375 *
376 * @param hVirtio Handle for VirtIO framework
377 * @param idxQueue Queue number
378 */
379int virtioCoreR3QueueDetach(PVIRTIOCORE pVirtio, uint16_t idxQueue);
380#endif
381int virtioCoreR3QueueGet(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue,
382 PPVIRTIO_DESC_CHAIN_T ppDescChain, bool fRemove);
383int virtioCoreR3QueuePut(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue, PRTSGBUF pSgVirtReturn,
384 PVIRTIO_DESC_CHAIN_T pDescChain, bool fFence);
385int virtioCoreQueueSync(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue);
386bool virtioCoreQueueIsEmpty(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, uint16_t idxQueue);
387void virtioCoreQueueEnable(PVIRTIOCORE pVirtio, uint16_t idxQueue, bool fEnabled);
388
389/**
390 * Return queue enable state
391 *
392 * @param pVirtio Pointer to the virtio state.
393 * @param idxQueue Queue number.
394 * @param fEnabled Flag indicating whether to enable queue or not
395 */
396DECLINLINE(bool) virtioCoreIsQueueEnabled(PVIRTIOCORE pVirtio, uint16_t idxQueue)
397{
398 Assert(idxQueue < RT_ELEMENTS(pVirtio->virtqState));
399 return pVirtio->uQueueEnable[idxQueue] != 0;
400}
401
402
403/**
404 * Get name of queue, by idxQueue, assigned at virtioCoreR3QueueAttach()
405 *
406 * @param pVirtio Pointer to the virtio state.
407 * @param idxQueue Queue number.
408 *
409 * @returns Pointer to read-only queue name.
410 */
411DECLINLINE(const char *) virtioCoreQueueGetName(PVIRTIOCORE pVirtio, uint16_t idxQueue)
412{
413 Assert((size_t)idxQueue < RT_ELEMENTS(pVirtio->virtqState));
414 return pVirtio->virtqState[idxQueue].szVirtqName;
415}
416
417/**
418 * Get the features VirtIO is running withnow.
419 *
420 * @returns Features the guest driver has accepted, finalizing the operational features
421 */
422DECLINLINE(uint64_t) virtioCoreGetNegotiatedFeatures(PVIRTIOCORE pVirtio)
423{
424 return pVirtio->uDriverFeatures;
425}
426
427/**
428 * Get VirtIO accepted host-side features
429 *
430 * @returns feature bits selected or 0 if selector out of range.
431 *
432 * @param pState Virtio state
433 */
434DECLINLINE(uint64_t) virtioCoreGetAcceptedFeatures(PVIRTIOCORE pVirtio)
435{
436 return pVirtio->uDriverFeatures;
437}
438
439
440void virtioCoreLogMappedIoValue(const char *pszFunc, const char *pszMember, uint32_t uMemberSize,
441 const void *pv, uint32_t cb, uint32_t uOffset,
442 int fWrite, int fHasIndex, uint32_t idx);
443void virtioCoreHexDump(uint8_t *pv, uint32_t cb, uint32_t uBase, const char *pszTitle);
444
445
446int virtioCoreR3SaveExec(PVIRTIOCORE pVirtio, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM);
447int virtioCoreR3LoadExec(PVIRTIOCORE pVirtio, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM);
448#if 0 /** @todo unused */
449void virtioCoreResetAll(PVIRTIOCORE pVirtio);
450#endif
451void virtioCoreR3PropagateResetNotification(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio);
452void virtioCoreR3PropagateResumeNotification(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio);
453void virtioCoreR3Term(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC);
454int virtioCoreR3Init(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC, PVIRTIOPCIPARAMS pPciParams,
455 const char *pcszInstance, uint64_t fDevSpecificFeatures, void *pvDevSpecificCfg, uint16_t cbDevSpecificCfg);
456int virtioCoreRZInit(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, PVIRTIOCORECC pVirtioCC);
457/** @} */
458
459
460#endif /* !VBOX_INCLUDED_SRC_VirtIO_Virtio_1_0_h */
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