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source: vbox/trunk/src/VBox/Disassembler/testcase/tstDisasmArmv8-1-asm.S@ 106624

Last change on this file since 106624 was 106616, checked in by vboxsync, 4 months ago

Disassembler: Fix decoding instructions which take sp as a register instead of of xzr/wzr, bugref:10394

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  • Property svn:keywords set to Author Date Id Revision
File size: 31.9 KB
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1/* $Id: tstDisasmArmv8-1-asm.S 106616 2024-10-23 10:41:19Z vboxsync $ */
2/** @file
3 * VBox disassembler - Tables for ARMv8 A64.
4 */
5
6/*
7 * Copyright (C) 2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28.private_extern _TestProcA64
29_TestProcA64:
30
31 ; Miscellaneous instructions without a parameter
32 nop
33 yield
34 wfe
35 wfi
36 sev
37 sevl
38 dgh
39 xpaclri
40
41 ; Control flow instructions
42 svc #0xfefe
43 hvc #0xdead
44 smc #0xcafe
45 brk #0xd0d0
46 hlt #0xc0de
47; tcancel #0xd00f Requires FEAT_TME
48 dcps1 #0xdeca
49 dcps2 #0xdec0
50 dcps3 #0xfeed
51 b #0x100
52 b #-0x100
53 bl #0x100
54 bl #-0x100
55 b.ne #+0x1000
56 b.eq #-0x1000
57; bc.ne #+0x1000 Requires FEAT_HBC
58; bc.eq #-0x1000 Requires FEAT_HBC
59 cbz x0, #+0x100
60 cbz x0, #-0x100
61 cbz w0, #+0x100
62 cbnz x0, #+0x100
63 cbnz x0, #-0x100
64 cbnz w0, #+0x100
65 tbz w0, #13, #+0x100
66 tbz x0, #63, #-0x100
67 tbz w0, #8, #+0x100
68 ret x30
69 ret x1
70 ret x2
71 ret x15
72 br x15
73 blr x15
74
75 ; System register access instructions
76 msr ttbr0_el1, x0
77 mrs x0, ttbr0_el1
78
79 ; Arithmetic instructions
80 add x0, x0, #0x0
81 add x0, x1, #0x10000
82 add x0, x1, #65536
83 add x0, x0, x0
84 add x0, x1, x29
85 add x0, x1, x28, LSL #1
86 add x0, x1, x28, LSL #63
87 add x0, x1, x28, LSR #1
88 add x0, x1, x28, LSR #63
89 add x0, x1, x28, ASR #1
90 add x0, x1, x28, ASR #63
91 ; ROR is reserved
92
93 add w0, w1, #0x0
94 add w0, w1, #0x10000
95 add w0, w1, #65536
96 add w0, w1, w29
97 add w0, w1, w28, LSL #1
98 add w0, w1, w28, LSL #31
99 add w0, w1, w28, LSR #1
100 add w0, w1, w28, LSR #31
101 add w0, w1, w28, ASR #1
102 add w0, w1, w28, ASR #31
103 ; ROR is reserved
104
105 adds x0, x0, #0x0
106 adds x0, x1, #0x10000
107 adds x0, x1, #65536
108 adds x0, x0, x0
109 adds x0, x1, x29
110 adds x0, x1, x28, LSL #1
111 adds x0, x1, x28, LSL #63
112 adds x0, x1, x28, LSR #1
113 adds x0, x1, x28, LSR #63
114 adds x0, x1, x28, ASR #1
115 adds x0, x1, x28, ASR #63
116 ; ROR is reserved
117
118 adds w0, w1, #0x0
119 adds w0, w1, #0x10000
120 adds w0, w1, #65536
121 adds w0, w1, w29
122 adds w0, w1, w28, LSL #1
123 adds w0, w1, w28, LSL #31
124 adds w0, w1, w28, LSR #1
125 adds w0, w1, w28, LSR #31
126 adds w0, w1, w28, ASR #1
127 adds w0, w1, w28, ASR #31
128 ; ROR is reserved
129
130 sub x0, x0, #0x0
131 sub x0, x1, #0x10000
132 sub x0, x1, #65536
133 sub x0, x0, x0
134 sub x0, x1, x29
135 sub x0, x1, x28, LSL #1
136 sub x0, x1, x28, LSL #63
137 sub x0, x1, x28, LSR #1
138 sub x0, x1, x28, LSR #63
139 sub x0, x1, x28, ASR #1
140 sub x0, x1, x28, ASR #63
141 ; ROR is reserved
142
143 sub w0, w1, #0x0
144 sub w0, w1, #0x10000
145 sub w0, w1, #65536
146 sub w0, w1, w29
147 sub w0, w1, w28, LSL #1
148 sub w0, w1, w28, LSL #31
149 sub w0, w1, w28, LSR #1
150 sub w0, w1, w28, LSR #31
151 sub w0, w1, w28, ASR #1
152 sub w0, w1, w28, ASR #31
153 ; ROR is reserved
154
155 subs x0, x0, #0x0
156 subs x0, x1, #0x10000
157 subs x0, x1, #65536
158 subs x0, x0, x0
159 subs x0, x1, x29
160 subs x0, x1, x28, LSL #1
161 subs x0, x1, x28, LSL #63
162 subs x0, x1, x28, LSR #1
163 subs x0, x1, x28, LSR #63
164 subs x0, x1, x28, ASR #1
165 subs x0, x1, x28, ASR #63
166 ; ROR is reserved
167
168 subs w0, w1, #0x0
169 subs w0, w1, #0x10000
170 subs w0, w1, #65536
171 subs w0, w1, w29
172 subs w0, w1, w28, LSL #1
173 subs w0, w1, w28, LSL #31
174 subs w0, w1, w28, LSR #1
175 subs w0, w1, w28, LSR #31
176 subs w0, w1, w28, ASR #1
177 subs w0, w1, w28, ASR #31
178 ; ROR is reserved
179
180 ; Aliases of subs -> cmp
181 cmp x0, x1
182 cmp w0, w1
183 cmp x0, x1, LSL #1
184 cmp w0, w1, LSL #1
185
186 ; Logical instructions
187 and x0, x0, #0xffff
188 and w0, wzr, #0xffff
189
190 ands x0, x0, #0x00ffff00
191 ands w10, w23, #0x55555555
192
193 orr x0, x0, #0xffff
194 orr w0, wzr, #0xffff
195
196 mov x0, x1 ; Alias of orr
197 mov w0, w1 ; Alias of orr
198
199 eor x0, x0, #0x00ffff00
200 eor w10, w23, #0x55555555
201
202 sbfm x0, x0, #0x1, #0x2
203 sbfm w0, w0, #0xf, #0x9
204 bfm x0, x0, #0x1, #0x2
205 bfm w0, w0, #0xf, #0x9
206 ubfm x0, x0, #0x1, #0x2
207 ubfm w0, w0, #0xf, #0x9
208
209 movn x0, #0xffff
210 movn x0, #0xffff, LSL #16
211 movn w0, #0xffff
212 movn w0, #0xffff, LSL #16
213
214 movz x0, #0xffff
215 movz x0, #0xffff, LSL #48
216 movz w0, #0xffff
217 movz w0, #0xffff, LSL #16
218
219 movk x0, #0xffff
220 movk x0, #0xffff, LSL #32
221 movk w0, #0xffff
222 movk w0, #0xffff, LSL #16
223
224 ; Logical instructions with a shifted register
225 and w0, w0, w27
226 and w0, w1, w28, LSL #1
227 and w0, w1, w28, LSL #31
228 and w0, w1, w28, LSR #1
229 and w0, w1, w28, LSR #31
230 and w0, w1, w28, ASR #1
231 and w0, w1, w28, ASR #31
232 and w0, w1, w28, ROR #1
233 and w0, w1, w28, ROR #31
234
235 and x0, x0, x27
236 and x0, x1, x28, LSL #1
237 and x0, x1, x28, LSL #63
238 and x0, x1, x28, LSR #1
239 and x0, x1, x28, LSR #63
240 and x0, x1, x28, ASR #1
241 and x0, x1, x28, ASR #63
242 and x0, x1, x28, ROR #1
243 and x0, x1, x28, ROR #63
244
245 orr w0, w0, w27
246 orr w0, w1, w28, LSL #1
247 orr w0, w1, w28, LSL #31
248 orr w0, w1, w28, LSR #1
249 orr w0, w1, w28, LSR #31
250 orr w0, w1, w28, ASR #1
251 orr w0, w1, w28, ASR #31
252 orr w0, w1, w28, ROR #1
253 orr w0, w1, w28, ROR #31
254
255 orr x0, x0, x27
256 orr x0, x1, x28, LSL #1
257 orr x0, x1, x28, LSL #63
258 orr x0, x1, x28, LSR #1
259 orr x0, x1, x28, LSR #63
260 orr x0, x1, x28, ASR #1
261 orr x0, x1, x28, ASR #63
262 orr x0, x1, x28, ROR #1
263 orr x0, x1, x28, ROR #63
264
265 eor w0, w0, w27
266 eor w0, w1, w28, LSL #1
267 eor w0, w1, w28, LSL #31
268 eor w0, w1, w28, LSR #1
269 eor w0, w1, w28, LSR #31
270 eor w0, w1, w28, ASR #1
271 eor w0, w1, w28, ASR #31
272 eor w0, w1, w28, ROR #1
273 eor w0, w1, w28, ROR #31
274
275 eor x0, x0, x27
276 eor x0, x1, x28, LSL #1
277 eor x0, x1, x28, LSL #63
278 eor x0, x1, x28, LSR #1
279 eor x0, x1, x28, LSR #63
280 eor x0, x1, x28, ASR #1
281 eor x0, x1, x28, ASR #63
282 eor x0, x1, x28, ROR #1
283 eor x0, x1, x28, ROR #63
284
285 ands x0, x0, x27
286 ands x0, x1, x28, LSL #1
287 ands x0, x1, x28, LSL #63
288 ands x0, x1, x28, LSR #1
289 ands x0, x1, x28, LSR #63
290 ands x0, x1, x28, ASR #1
291 ands x0, x1, x28, ASR #63
292 ands x0, x1, x28, ROR #1
293 ands x0, x1, x28, ROR #63
294
295 bic w0, w0, w27
296 bic w0, w1, w28, LSL #1
297 bic w0, w1, w28, LSL #31
298 bic w0, w1, w28, LSR #1
299 bic w0, w1, w28, LSR #31
300 bic w0, w1, w28, ASR #1
301 bic w0, w1, w28, ASR #31
302 bic w0, w1, w28, ROR #1
303 bic w0, w1, w28, ROR #31
304
305 bic wzr, wzr, wzr
306 bic wzr, wzr, wzr, LSL #1
307 bic wzr, wzr, wzr, LSL #31
308 bic wzr, wzr, wzr, LSR #1
309 bic wzr, wzr, wzr, LSR #31
310 bic wzr, wzr, wzr, ASR #1
311 bic wzr, wzr, wzr, ASR #31
312 bic wzr, wzr, wzr, ROR #1
313 bic wzr, wzr, wzr, ROR #31
314
315 bic x0, x0, x27
316 bic x0, x1, x28, LSL #1
317 bic x0, x1, x28, LSL #63
318 bic x0, x1, x28, LSR #1
319 bic x0, x1, x28, LSR #63
320 bic x0, x1, x28, ASR #1
321 bic x0, x1, x28, ASR #63
322 bic x0, x1, x28, ROR #1
323 bic x0, x1, x28, ROR #63
324
325 bic xzr, xzr, xzr
326 bic xzr, xzr, xzr, LSL #1
327 bic xzr, xzr, xzr, LSL #63
328 bic xzr, xzr, xzr, LSR #1
329 bic xzr, xzr, xzr, LSR #63
330 bic xzr, xzr, xzr, ASR #1
331 bic xzr, xzr, xzr, ASR #63
332 bic xzr, xzr, xzr, ROR #1
333 bic xzr, xzr, xzr, ROR #63
334
335 orn w0, w0, w27
336 orn w0, w1, w28, LSL #1
337 orn w0, w1, w28, LSL #31
338 orn w0, w1, w28, LSR #1
339 orn w0, w1, w28, LSR #31
340 orn w0, w1, w28, ASR #1
341 orn w0, w1, w28, ASR #31
342 orn w0, w1, w28, ROR #1
343 orn w0, w1, w28, ROR #31
344
345 orn wzr, wzr, wzr
346 orn wzr, wzr, wzr, LSL #1
347 orn wzr, wzr, wzr, LSL #31
348 orn wzr, wzr, wzr, LSR #1
349 orn wzr, wzr, wzr, LSR #31
350 orn wzr, wzr, wzr, ASR #1
351 orn wzr, wzr, wzr, ASR #31
352 orn wzr, wzr, wzr, ROR #1
353 orn wzr, wzr, wzr, ROR #31
354
355 orn x0, x0, x27
356 orn x0, x1, x28, LSL #1
357 orn x0, x1, x28, LSL #63
358 orn x0, x1, x28, LSR #1
359 orn x0, x1, x28, LSR #63
360 orn x0, x1, x28, ASR #1
361 orn x0, x1, x28, ASR #63
362 orn x0, x1, x28, ROR #1
363 orn x0, x1, x28, ROR #63
364
365 orn xzr, xzr, xzr
366 orn xzr, xzr, xzr, LSL #1
367 orn xzr, xzr, xzr, LSL #63
368 orn xzr, xzr, xzr, LSR #1
369 orn xzr, xzr, xzr, LSR #63
370 orn xzr, xzr, xzr, ASR #1
371 orn xzr, xzr, xzr, ASR #63
372 orn xzr, xzr, xzr, ROR #1
373 orn xzr, xzr, xzr, ROR #63
374
375 eon w0, w0, w27
376 eon w0, w1, w28, LSL #1
377 eon w0, w1, w28, LSL #31
378 eon w0, w1, w28, LSR #1
379 eon w0, w1, w28, LSR #31
380 eon w0, w1, w28, ASR #1
381 eon w0, w1, w28, ASR #31
382 eon w0, w1, w28, ROR #1
383 eon w0, w1, w28, ROR #31
384
385 eon wzr, wzr, wzr
386 eon wzr, wzr, wzr, LSL #1
387 eon wzr, wzr, wzr, LSL #31
388 eon wzr, wzr, wzr, LSR #1
389 eon wzr, wzr, wzr, LSR #31
390 eon wzr, wzr, wzr, ASR #1
391 eon wzr, wzr, wzr, ASR #31
392 eon wzr, wzr, wzr, ROR #1
393 eon wzr, wzr, wzr, ROR #31
394
395 eon x0, x0, x27
396 eon x0, x1, x28, LSL #1
397 eon x0, x1, x28, LSL #63
398 eon x0, x1, x28, LSR #1
399 eon x0, x1, x28, LSR #63
400 eon x0, x1, x28, ASR #1
401 eon x0, x1, x28, ASR #63
402 eon x0, x1, x28, ROR #1
403 eon x0, x1, x28, ROR #63
404
405 eon xzr, xzr, xzr
406 eon xzr, xzr, xzr, LSL #1
407 eon xzr, xzr, xzr, LSL #63
408 eon xzr, xzr, xzr, LSR #1
409 eon xzr, xzr, xzr, LSR #63
410 eon xzr, xzr, xzr, ASR #1
411 eon xzr, xzr, xzr, ASR #63
412 eon xzr, xzr, xzr, ROR #1
413 eon xzr, xzr, xzr, ROR #63
414
415 bics w0, w0, w27
416 bics w0, w1, w28, LSL #1
417 bics w0, w1, w28, LSL #31
418 bics w0, w1, w28, LSR #1
419 bics w0, w1, w28, LSR #31
420 bics w0, w1, w28, ASR #1
421 bics w0, w1, w28, ASR #31
422 bics w0, w1, w28, ROR #1
423 bics w0, w1, w28, ROR #31
424
425 bics wzr, wzr, wzr
426 bics wzr, wzr, wzr, LSL #1
427 bics wzr, wzr, wzr, LSL #31
428 bics wzr, wzr, wzr, LSR #1
429 bics wzr, wzr, wzr, LSR #31
430 bics wzr, wzr, wzr, ASR #1
431 bics wzr, wzr, wzr, ASR #31
432 bics wzr, wzr, wzr, ROR #1
433 bics wzr, wzr, wzr, ROR #31
434
435 bics x0, x0, x27
436 bics x0, x1, x28, LSL #1
437 bics x0, x1, x28, LSL #63
438 bics x0, x1, x28, LSR #1
439 bics x0, x1, x28, LSR #63
440 bics x0, x1, x28, ASR #1
441 bics x0, x1, x28, ASR #63
442 bics x0, x1, x28, ROR #1
443 bics x0, x1, x28, ROR #63
444
445 bics xzr, xzr, xzr
446 bics xzr, xzr, xzr, LSL #1
447 bics xzr, xzr, xzr, LSL #63
448 bics xzr, xzr, xzr, LSR #1
449 bics xzr, xzr, xzr, LSR #63
450 bics xzr, xzr, xzr, ASR #1
451 bics xzr, xzr, xzr, ASR #63
452 bics xzr, xzr, xzr, ROR #1
453 bics xzr, xzr, xzr, ROR #63
454
455 ; Memory loads
456 ldrb w0, [x28]
457 ldrb w0, [x28, #1]
458 ldrb w0, [x28, #4095]
459
460 ldrb w0, [sp]
461 ldrb w0, [sp, #1]
462 ldrb w0, [sp, #4095]
463
464 ldrsb w0, [x28]
465 ldrsb w0, [x28, #1]
466 ldrsb w0, [x28, #4095]
467
468 ldrsb w0, [sp]
469 ldrsb w0, [sp, #1]
470 ldrsb w0, [sp, #4095]
471
472 ldrsb x0, [x28]
473 ldrsb x0, [x28, #1]
474 ldrsb x0, [x28, #4095]
475
476 ldrsb x0, [sp]
477 ldrsb x0, [sp, #1]
478 ldrsb x0, [sp, #4095]
479
480 ldrh w0, [x28]
481 ldrh w0, [x28, #2]
482 ldrh w0, [x28, #1024]
483
484 ldrh w0, [sp]
485 ldrh w0, [sp, #2]
486 ldrh w0, [sp, #1024]
487
488 ldrsh w0, [x28]
489 ldrsh w0, [x28, #2]
490 ldrsh w0, [x28, #1024]
491
492 ldrsh w0, [sp]
493 ldrsh w0, [sp, #2]
494 ldrsh w0, [sp, #1024]
495
496 ldrsh x0, [x28]
497 ldrsh x0, [x28, #2]
498 ldrsh x0, [x28, #1024]
499
500 ldrsh x0, [sp]
501 ldrsh x0, [sp, #2]
502 ldrsh x0, [sp, #1024]
503
504 ldr x0, [x28]
505 ldr x0, [x28, #8]
506 ldr x0, [x28, #32760]
507
508 ldr x0, [sp]
509 ldr x0, [sp, #8]
510 ldr x0, [sp, #32760]
511
512 ldr w0, [x28]
513 ldr w0, [x28, #4]
514 ldr w0, [x28, #16380]
515
516 ldr w0, [sp]
517 ldr w0, [sp, #4]
518 ldr w0, [sp, #16380]
519
520 ldrsw x0, [x28]
521 ldrsw x0, [x28, #4]
522 ldrsw x0, [x28, #16380]
523
524 ldrsw x0, [sp]
525 ldrsw x0, [sp, #4]
526 ldrsw x0, [sp, #16380]
527
528 ldurb w0, [x28]
529 ldurb w0, [x28, #-256]
530 ldurb w0, [x28, #255]
531
532 ldurb w0, [sp]
533 ldurb w0, [sp, #-256]
534 ldurb w0, [sp, #255]
535
536 ldursb w0, [x28]
537 ldursb w0, [x28, #-256]
538 ldursb w0, [x28, #255]
539
540 ldursb w0, [sp]
541 ldursb w0, [sp, #-256]
542 ldursb w0, [sp, #255]
543
544 ldursb x0, [x28]
545 ldursb x0, [x28, #-256]
546 ldursb x0, [x28, #255]
547
548 ldursb x0, [sp]
549 ldursb x0, [sp, #-256]
550 ldursb x0, [sp, #255]
551
552 ldurh w0, [x28]
553 ldurh w0, [x28, #-256]
554 ldurh w0, [x28, #255]
555
556 ldurh w0, [sp]
557 ldurh w0, [sp, #-256]
558 ldurh w0, [sp, #255]
559
560 ldursh w0, [x28]
561 ldursh w0, [x28, #-256]
562 ldursh w0, [x28, #255]
563
564 ldursh w0, [sp]
565 ldursh w0, [sp, #-256]
566 ldursh w0, [sp, #255]
567
568 ldursh x0, [x28]
569 ldursh x0, [x28, #-256]
570 ldursh x0, [x28, #255]
571
572 ldursh x0, [sp]
573 ldursh x0, [sp, #-256]
574 ldursh x0, [sp, #255]
575
576 ldur x0, [x28]
577 ldur x0, [x28, #-256]
578 ldur x0, [x28, #255]
579
580 ldur x0, [sp]
581 ldur x0, [sp, #-256]
582 ldur x0, [sp, #255]
583
584 ldur w0, [x28]
585 ldur w0, [x28, #-256]
586 ldur w0, [x28, #255]
587
588 ldur w0, [sp]
589 ldur w0, [sp, #-256]
590 ldur w0, [sp, #255]
591
592 ldursw x0, [x28]
593 ldursw x0, [x28, #-256]
594 ldursw x0, [x28, #255]
595
596 ldursw x0, [sp]
597 ldursw x0, [sp, #-256]
598 ldursw x0, [sp, #255]
599
600 ldp w0, w1, [x28]
601 ldp w0, w1, [x28, #4]
602 ldp w0, w1, [x28, #-256]
603 ldp w0, w1, [x28, #252]
604
605 ldp w0, w1, [sp]
606 ldp w0, w1, [sp, #4]
607 ldp w0, w1, [sp, #-256]
608 ldp w0, w1, [sp, #252]
609
610 ldp x0, x1, [x28]
611 ldp x0, x1, [x28, #8]
612 ldp x0, x1, [x28, #-512]
613 ldp x0, x1, [x28, #504]
614
615 ldp x0, x1, [sp]
616 ldp x0, x1, [sp, #8]
617 ldp x0, x1, [sp, #-512]
618 ldp x0, x1, [sp, #504]
619
620 ldp w0, w1, [x28, #4]!
621 ldp w0, w1, [x28, #-256]!
622 ldp w0, w1, [x28, #252]!
623
624 ldp w0, w1, [sp, #4]!
625 ldp w0, w1, [sp, #-256]!
626 ldp w0, w1, [sp, #252]!
627
628 ldp x0, x1, [x28, #8]!
629 ldp x0, x1, [x28, #-512]!
630 ldp x0, x1, [x28, #504]!
631
632 ldp x0, x1, [sp, #8]!
633 ldp x0, x1, [sp, #-512]!
634 ldp x0, x1, [sp, #504]!
635
636 ldp w0, w1, [x28], #4
637 ldp w0, w1, [x28], #-256
638 ldp w0, w1, [x28], #252
639
640 ldp w0, w1, [sp], #4
641 ldp w0, w1, [sp], #-256
642 ldp w0, w1, [sp], #252
643
644 ldp x0, x1, [x28], #8
645 ldp x0, x1, [x28], #-512
646 ldp x0, x1, [x28], #504
647
648 ldp x0, x1, [sp], #8
649 ldp x0, x1, [sp], #-512
650 ldp x0, x1, [sp], #504
651
652 ldr x0, [x1, x2]
653 ldr w0, [x1, x2]
654 ldr x0, [x1, x2, SXTX #0]
655 ldr x0, [x1, x2, LSL #3] ; UXTX
656 ldr x0, [x1, x2, SXTX #3]
657 ldr w0, [x1, w2, UXTW #0]
658 ldr w0, [x1, w2, SXTW #0]
659 ldr w0, [x1, w2, UXTW #2]
660 ldr w0, [x1, w2, SXTW #2]
661
662 ldr x0, [sp, x2]
663 ldr w0, [sp, x2]
664 ldr x0, [sp, x2, SXTX #0]
665 ldr x0, [sp, x2, LSL #3] ; UXTX
666 ldr x0, [sp, x2, SXTX #3]
667 ldr w0, [sp, w2, UXTW #0]
668 ldr w0, [sp, w2, SXTW #0]
669 ldr w0, [sp, w2, UXTW #2]
670 ldr w0, [sp, w2, SXTW #2]
671
672 ldrb w0, [x1, x2]
673 ldrb w0, [x1, x2, LSL #0] ; UXTX
674 ldrb w0, [x1, x2, SXTX #0]
675 ldrb w0, [x1, w2, UXTW #0]
676 ldrb w0, [x1, w2, SXTW #0]
677
678 ldrb w0, [sp, x2]
679 ldrb w0, [sp, x2, LSL #0] ; UXTX
680 ldrb w0, [sp, x2, SXTX #0]
681 ldrb w0, [sp, w2, UXTW #0]
682 ldrb w0, [sp, w2, SXTW #0]
683
684 ldrsb w0, [x1, x2]
685 ldrsb w0, [x1, x2, LSL #0] ; UXTX
686 ldrsb w0, [x1, x2, SXTX #0]
687 ldrsb w0, [x1, w2, UXTW #0]
688 ldrsb w0, [x1, w2, SXTW #0]
689
690 ldrsb w0, [sp, x2]
691 ldrsb w0, [sp, x2, LSL #0] ; UXTX
692 ldrsb w0, [sp, x2, SXTX #0]
693 ldrsb w0, [sp, w2, UXTW #0]
694 ldrsb w0, [sp, w2, SXTW #0]
695
696 ldrh w0, [x1, x2]
697 ;ldrh w0, [x1, x2, LSL #0] ; UXTX
698 ldrh w0, [x1, x2, SXTX #0]
699 ldrh w0, [x1, x2, LSL #1] ; UXTX
700 ldrh w0, [x1, x2, SXTX #1]
701 ldrh w0, [x1, w2, UXTW #0]
702 ldrh w0, [x1, w2, SXTW #0]
703 ldrh w0, [x1, w2, UXTW #1]
704 ldrh w0, [x1, w2, SXTW #1]
705
706 ldrh w0, [sp, x2]
707 ;ldrh w0, [sp, x2, LSL #0] ; UXTX
708 ldrh w0, [sp, x2, SXTX #0]
709 ldrh w0, [sp, x2, LSL #1] ; UXTX
710 ldrh w0, [sp, x2, SXTX #1]
711 ldrh w0, [sp, w2, UXTW #0]
712 ldrh w0, [sp, w2, SXTW #0]
713 ldrh w0, [sp, w2, UXTW #1]
714 ldrh w0, [sp, w2, SXTW #1]
715
716 ldrsh w0, [x1, x2]
717 ;ldrsh w0, [x1, x2, LSL #0] ; UXTX
718 ldrsh w0, [x1, x2, SXTX #0]
719 ldrsh w0, [x1, x2, LSL #1] ; UXTX
720 ldrsh w0, [x1, x2, SXTX #1]
721 ldrsh w0, [x1, w2, UXTW #0]
722 ldrsh w0, [x1, w2, SXTW #0]
723 ldrsh w0, [x1, w2, UXTW #1]
724 ldrsh w0, [x1, w2, SXTW #1]
725
726 ldrsh w0, [sp, x2]
727 ;ldrsh w0, [sp, x2, LSL #0] ; UXTX
728 ldrsh w0, [sp, x2, SXTX #0]
729 ldrsh w0, [sp, x2, LSL #1] ; UXTX
730 ldrsh w0, [sp, x2, SXTX #1]
731 ldrsh w0, [sp, w2, UXTW #0]
732 ldrsh w0, [sp, w2, SXTW #0]
733 ldrsh w0, [sp, w2, UXTW #1]
734 ldrsh w0, [sp, w2, SXTW #1]
735
736 ldrsw x0, [x1, x2]
737 ;ldrsw x0, [x1, x2, LSL #0] ; UXTX
738 ldrsw x0, [x1, x2, SXTX #0]
739 ldrsw x0, [x1, x2, LSL #2] ; UXTX
740 ldrsw x0, [x1, x2, SXTX #2]
741 ldrsw x0, [x1, w2, UXTW #0]
742 ldrsw x0, [x1, w2, SXTW #0]
743 ldrsw x0, [x1, w2, UXTW #2]
744 ldrsw x0, [x1, w2, SXTW #2]
745
746 ldrsw x0, [sp, x2]
747 ;ldrsw x0, [sp, x2, LSL #0] ; UXTX
748 ldrsw x0, [sp, x2, SXTX #0]
749 ldrsw x0, [sp, x2, LSL #2] ; UXTX
750 ldrsw x0, [sp, x2, SXTX #2]
751 ldrsw x0, [sp, w2, UXTW #0]
752 ldrsw x0, [sp, w2, SXTW #0]
753 ldrsw x0, [sp, w2, UXTW #2]
754 ldrsw x0, [sp, w2, SXTW #2]
755
756 ; Memory stores
757 strb w0, [x28]
758 strb w0, [x28, #1]
759 strb w0, [x28, #4095]
760
761 strb w0, [sp]
762 strb w0, [sp, #1]
763 strb w0, [sp, #4095]
764
765 strh w0, [x28]
766 strh w0, [x28, #2]
767 strh w0, [x28, #1024]
768
769 strh w0, [sp]
770 strh w0, [sp, #2]
771 strh w0, [sp, #1024]
772
773 str x0, [x28]
774 str x0, [x28, #8]
775 str x0, [x28, #32760]
776
777 str x0, [sp]
778 str x0, [sp, #8]
779 str x0, [sp, #32760]
780
781 str w0, [x28]
782 str w0, [x28, #4]
783 str w0, [x28, #16380]
784
785 str w0, [sp]
786 str w0, [sp, #4]
787 str w0, [sp, #16380]
788
789 sturb w0, [x28]
790 sturb w0, [x28, #-256]
791 sturb w0, [x28, #255]
792
793 sturb w0, [sp]
794 sturb w0, [sp, #-256]
795 sturb w0, [sp, #255]
796
797 sturh w0, [x28]
798 sturh w0, [x28, #-256]
799 sturh w0, [x28, #255]
800
801 sturh w0, [sp]
802 sturh w0, [sp, #-256]
803 sturh w0, [sp, #255]
804
805 stur x0, [x28]
806 stur x0, [x28, #-256]
807 stur x0, [x28, #255]
808
809 stur x0, [sp]
810 stur x0, [sp, #-256]
811 stur x0, [sp, #255]
812
813 stur w0, [x28]
814 stur w0, [x28, #-256]
815 stur w0, [x28, #255]
816
817 stur w0, [sp]
818 stur w0, [sp, #-256]
819 stur w0, [sp, #255]
820
821 stp w0, w1, [x28]
822 stp w0, w1, [x28, #4]
823 stp w0, w1, [x28, #-256]
824 stp w0, w1, [x28, #252]
825
826 stp w0, w1, [sp]
827 stp w0, w1, [sp, #4]
828 stp w0, w1, [sp, #-256]
829 stp w0, w1, [sp, #252]
830
831 stp x0, x1, [x28]
832 stp x0, x1, [x28, #8]
833 stp x0, x1, [x28, #-512]
834 stp x0, x1, [x28, #504]
835
836 stp x0, x1, [sp]
837 stp x0, x1, [sp, #8]
838 stp x0, x1, [sp, #-512]
839 stp x0, x1, [sp, #504]
840
841 stp w0, w1, [x28, #4]!
842 stp w0, w1, [x28, #-256]!
843 stp w0, w1, [x28, #252]!
844
845 stp w0, w1, [sp, #4]!
846 stp w0, w1, [sp, #-256]!
847 stp w0, w1, [sp, #252]!
848
849 stp x0, x1, [x28, #8]!
850 stp x0, x1, [x28, #-512]!
851 stp x0, x1, [x28, #504]!
852
853 stp x0, x1, [sp, #8]!
854 stp x0, x1, [sp, #-512]!
855 stp x0, x1, [sp, #504]!
856
857 stp w0, w1, [x28], #4
858 stp w0, w1, [x28], #-256
859 stp w0, w1, [x28], #252
860
861 stp w0, w1, [sp], #4
862 stp w0, w1, [sp], #-256
863 stp w0, w1, [sp], #252
864
865 stp x0, x1, [x28], #8
866 stp x0, x1, [x28], #-512
867 stp x0, x1, [x28], #504
868
869 stp x0, x1, [sp], #8
870 stp x0, x1, [sp], #-512
871 stp x0, x1, [sp], #504
872
873 str x0, [x1, x2]
874 str w0, [x1, x2]
875 str x0, [x1, x2, SXTX #0]
876 str x0, [x1, x2, LSL #3] ; UXTX
877 str x0, [x1, x2, SXTX #3]
878 str w0, [x1, w2, UXTW #0]
879 str w0, [x1, w2, SXTW #0]
880 str w0, [x1, w2, UXTW #2]
881 str w0, [x1, w2, SXTW #2]
882
883 str x0, [sp, x2]
884 str w0, [sp, x2]
885 str x0, [sp, x2, SXTX #0]
886 str x0, [sp, x2, LSL #3] ; UXTX
887 str x0, [sp, x2, SXTX #3]
888 str w0, [sp, w2, UXTW #0]
889 str w0, [sp, w2, SXTW #0]
890 str w0, [sp, w2, UXTW #2]
891 str w0, [sp, w2, SXTW #2]
892
893 strb w0, [x1, x2]
894 strb w0, [x1, x2, LSL #0x0]
895 strb w0, [x1, x2, SXTX #0x0]
896 strb w0, [x1, w2, UXTW #0x0]
897 strb w0, [x1, w2, SXTW #0x0]
898
899 strb w0, [sp, x2]
900 strb w0, [sp, x2, LSL #0x0]
901 strb w0, [sp, x2, SXTX #0x0]
902 strb w0, [sp, w2, UXTW #0x0]
903 strb w0, [sp, w2, SXTW #0x0]
904
905 strh w0, [x1, x2]
906 ;strh w0, [x1, x2, LSL #0x0] ; UXTX
907 strh w0, [x1, x2, SXTX #0x0]
908 strh w0, [x1, x2, LSL #1] ; UXTX
909 strh w0, [x1, x2, SXTX #1]
910 strh w0, [x1, w2, UXTW #0x0]
911 strh w0, [x1, w2, SXTW #0x0]
912 strh w0, [x1, w2, UXTW #1]
913 strh w0, [x1, w2, SXTW #1]
914
915 strh w0, [sp, x2]
916 ;strh w0, [sp, x2, LSL #0x0] ; UXTX
917 strh w0, [sp, x2, SXTX #0x0]
918 strh w0, [sp, x2, LSL #1] ; UXTX
919 strh w0, [sp, x2, SXTX #1]
920 strh w0, [sp, w2, UXTW #0x0]
921 strh w0, [sp, w2, SXTW #0x0]
922 strh w0, [sp, w2, UXTW #1]
923 strh w0, [sp, w2, SXTW #1]
924
925 ; Conditional compare
926 ccmp x0, x1, #0x3, eq
927 ccmp w0, w1, #0xf, eq
928 ccmp x0, x1, #0x3, ne
929 ccmp w0, w1, #0xf, ne
930 ccmp x0, x1, #0x3, cs
931 ccmp w0, w1, #0xf, cc
932 ccmp x0, x1, #0x3, mi
933 ccmp w0, w1, #0xf, mi
934 ccmp x0, x1, #0x3, pl
935 ccmp w0, w1, #0xf, vs
936 ccmp x0, x1, #0x3, vc
937 ccmp w0, w1, #0xf, vc
938 ccmp x0, x1, #0x3, hi
939 ccmp w0, w1, #0xf, hi
940 ccmp x0, x1, #0x3, ls
941 ccmp w0, w1, #0xf, ls
942 ccmp x0, x1, #0x3, ge
943 ccmp w0, w1, #0xf, ge
944 ccmp x0, x1, #0x3, lt
945 ccmp w0, w1, #0xf, lt
946 ccmp x0, x1, #0x3, gt
947 ccmp w0, w1, #0xf, gt
948 ccmp x0, x1, #0x3, le
949 ccmp w0, w1, #0xf, le
950 ccmp x0, x1, #0x3, al
951 ccmp w0, w1, #0xf, al
952
953 ccmn x0, x1, #0x3, eq
954 ccmn w0, w1, #0xf, eq
955 ccmn x0, x1, #0x3, ne
956 ccmn w0, w1, #0xf, ne
957 ccmn x0, x1, #0x3, cs
958 ccmn w0, w1, #0xf, cc
959 ccmn x0, x1, #0x3, mi
960 ccmn w0, w1, #0xf, mi
961 ccmn x0, x1, #0x3, pl
962 ccmn w0, w1, #0xf, vs
963 ccmn x0, x1, #0x3, vc
964 ccmn w0, w1, #0xf, vc
965 ccmn x0, x1, #0x3, hi
966 ccmn w0, w1, #0xf, hi
967 ccmn x0, x1, #0x3, ls
968 ccmn w0, w1, #0xf, ls
969 ccmn x0, x1, #0x3, ge
970 ccmn w0, w1, #0xf, ge
971 ccmn x0, x1, #0x3, lt
972 ccmn w0, w1, #0xf, lt
973 ccmn x0, x1, #0x3, gt
974 ccmn w0, w1, #0xf, gt
975 ccmn x0, x1, #0x3, le
976 ccmn w0, w1, #0xf, le
977 ccmn x0, x1, #0x3, al
978 ccmn w0, w1, #0xf, al
979
980 msr spsel, #1
981 msr spsel, #0
982 msr daifset, #0
983 msr daifset, #15
984 msr daifclr, #0
985 msr daifclr, #15
986 msr uao, #1
987 msr uao, #0
988 msr pan, #1
989 msr pan, #0
990 ; msr allint, #1 Not supported by the toolchain
991 ; msr allint, #0 Not supported by the toolchain
992 ;msr pm, #1 Not supported by the maca1 toolchain
993 ;msr pm, #0 Not supported by the maca1 toolchain
994 msr ssbs, #1
995 msr ssbs, #0
996 msr dit, #1
997 msr dit, #0
998 ; msr tco, #1 Not supported by the toolchain
999 ; msr tco, #0 Not supported by the toolchain
1000 ; msr svcrsm, #1 Not supported by the toolchain
1001 ; msr svcrsm, #0 Not supported by the toolchain
1002 ; msr svcrza, #1 Not supported by the toolchain
1003 ; msr svcrza, #0 Not supported by the toolchain
1004 ; msr svcrsma, #1 Not supported by the toolchain
1005 ; msr svcrsma, #0 Not supported by the toolchain
1006
1007 ; Floating Point instructions.
1008 fmadd s0, s1, s3, s31
1009 fmadd d0, d1, d3, d31
1010 fmadd h0, h1, h3, h31
1011
1012 fmsub s0, s1, s3, s31
1013 fmsub d0, d1, d3, d31
1014 fmsub h0, h1, h3, h31
1015
1016 fnmadd s0, s1, s3, s31
1017 fnmadd d0, d1, d3, d31
1018 fnmadd h0, h1, h3, h31
1019
1020 fnmsub s0, s1, s3, s31
1021 fnmsub d0, d1, d3, d31
1022 fnmsub h0, h1, h3, h31
1023
1024 fcvtzu x0, s0, #1
1025 fcvtzu x0, s0, #31
1026 fcvtzu x0, s0, #63
1027 fcvtzu w0, s0, #1
1028 fcvtzu w0, s0, #32
1029
1030 fcvtzu x0, d0, #1
1031 fcvtzu x0, d0, #31
1032 fcvtzu x0, d0, #63
1033 fcvtzu w0, d0, #1
1034 fcvtzu w0, d0, #32
1035
1036 fcvtzu x0, h0, #1
1037 fcvtzu x0, h0, #31
1038 fcvtzu x0, h0, #63
1039 fcvtzu w0, h0, #1
1040 fcvtzu w0, h0, #32
1041
1042 fcvtzs x0, s0, #1
1043 fcvtzs x0, s0, #31
1044 fcvtzs x0, s0, #63
1045 fcvtzs w0, s0, #1
1046 fcvtzs w0, s0, #32
1047
1048 fcvtzs x0, d0, #1
1049 fcvtzs x0, d0, #31
1050 fcvtzs x0, d0, #63
1051 fcvtzs w0, d0, #1
1052 fcvtzs w0, d0, #32
1053
1054 fcvtzs x0, h0, #1
1055 fcvtzs x0, h0, #31
1056 fcvtzs x0, h0, #63
1057 fcvtzs w0, h0, #1
1058 fcvtzs w0, h0, #32
1059
1060 ucvtf s0, x0, #1
1061 ucvtf s0, x0, #31
1062 ucvtf s0, x0, #63
1063 ucvtf s0, w0, #1
1064 ucvtf s0, w0, #32
1065
1066 ucvtf d0, x0, #1
1067 ucvtf d0, x0, #31
1068 ucvtf d0, x0, #63
1069 ucvtf d0, w0, #1
1070 ucvtf d0, w0, #32
1071
1072 ucvtf h0, x0, #1
1073 ucvtf h0, x0, #31
1074 ucvtf h0, x0, #63
1075 ucvtf h0, w0, #1
1076 ucvtf h0, w0, #32
1077
1078 scvtf s0, x0, #1
1079 scvtf s0, x0, #31
1080 scvtf s0, x0, #63
1081 scvtf s0, w0, #1
1082 scvtf s0, w0, #32
1083
1084 scvtf d0, x0, #1
1085 scvtf d0, x0, #31
1086 scvtf d0, x0, #63
1087 scvtf d0, w0, #1
1088 scvtf d0, w0, #32
1089
1090 scvtf h0, x0, #1
1091 scvtf h0, x0, #31
1092 scvtf h0, x0, #63
1093 scvtf h0, w0, #1
1094 scvtf h0, w0, #32
1095
1096 fcsel s0, s1, s2, eq
1097 fcsel d0, d1, d2, eq
1098 fcsel h0, h1, h2, eq
1099
1100 fmul s0, s1, s2
1101 fmul d0, d1, d2
1102 fmul h0, h1, h2
1103
1104 fdiv s0, s1, s2
1105 fdiv d0, d1, d2
1106 fdiv h0, h1, h2
1107
1108 fadd s0, s1, s2
1109 fadd d0, d1, d2
1110 fadd h0, h1, h2
1111
1112 fsub s0, s1, s2
1113 fsub d0, d1, d2
1114 fsub h0, h1, h2
1115
1116 fmax s0, s1, s2
1117 fmax d0, d1, d2
1118 fmax h0, h1, h2
1119
1120 fmin s0, s1, s2
1121 fmin d0, d1, d2
1122 fmin h0, h1, h2
1123
1124 fmaxnm s0, s1, s2
1125 fmaxnm d0, d1, d2
1126 fmaxnm h0, h1, h2
1127
1128 fminnm s0, s1, s2
1129 fminnm d0, d1, d2
1130 fminnm h0, h1, h2
1131
1132 fnmul s0, s1, s2
1133 fnmul d0, d1, d2
1134 fnmul h0, h1, h2
1135
1136 fccmp s0, s1, #0, eq
1137 fccmp s0, s1, #15, ne
1138 fccmp d0, d1, #0, eq
1139 fccmp d0, d1, #15, ne
1140 fccmp h0, h1, #0, eq
1141 fccmp h0, h1, #15, ne
1142
1143 fccmpe s0, s1, #0, eq
1144 fccmpe s0, s1, #15, ne
1145 fccmpe d0, d1, #0, eq
1146 fccmpe d0, d1, #15, ne
1147 fccmpe h0, h1, #0, eq
1148 fccmpe h0, h1, #15, ne
1149
1150 ;fmov s0, #1 @todo Needs FP immediate parsing
1151
1152 fcmp s0, s1
1153 ;fcmp s0, #0.0
1154 fcmp d0, d1
1155 ;fcmp d0, #0.0
1156 fcmp h0, h1
1157 ;fcmp h0, #0.0
1158
1159 fcmpe s0, s1
1160 ;fcmpe s0, #0.0
1161 fcmpe d0, d1
1162 ;fcmpe d0, #0.0
1163 fcmpe h0, h1
1164 ;fcmpe h0, #0.0
1165
1166 fmov s0, s1
1167 fmov d0, d1
1168 fmov h0, h1
1169
1170 fabs s0, s1
1171 fabs d0, d1
1172 fabs h0, h1
1173
1174 fneg s0, s1
1175 fneg d0, d1
1176 fneg h0, h1
1177
1178 fsqrt s0, s1
1179 fsqrt d0, d1
1180 fsqrt h0, h1
1181
1182 fcvt s0, d1
1183 fcvt s0, h1
1184 fcvt d0, s1
1185 fcvt d0, h1
1186 fcvt h0, s1
1187 fcvt h0, d1
1188
1189 frintn s0, s1
1190 frintn d0, d1
1191 frintn h0, h1
1192
1193 frintp s0, s1
1194 frintp d0, d1
1195 frintp h0, h1
1196
1197 frintm s0, s1
1198 frintm d0, d1
1199 frintm h0, h1
1200
1201 frintz s0, s1
1202 frintz d0, d1
1203 frintz h0, h1
1204
1205 frinta s0, s1
1206 frinta d0, d1
1207 frinta h0, h1
1208
1209 frintx s0, s1
1210 frintx d0, d1
1211 frintx h0, h1
1212
1213 frinti s0, s1
1214 frinti d0, d1
1215 frinti h0, h1
1216
1217 frint32z s0, s1
1218 frint32z d0, d1
1219
1220 frint32x s0, s1
1221 frint32x d0, d1
1222
1223 frint64z s0, s1
1224 frint64z d0, d1
1225
1226 frint64x s0, s1
1227 frint64x d0, d1
1228
1229 sshr d0, d1, #1
1230 sshr d0, d1, #64
1231
1232 ssra d0, d1, #1
1233 ssra d0, d1, #64
1234
1235 srshr d0, d1, #1
1236 srshr d0, d1, #64
1237
1238 srsra d0, d1, #1
1239 srsra d0, d1, #64
1240
1241 ; @todo
1242 ;shl d0, d1, #0
1243 ;shl d0, d1, #63
1244
1245 ;sqshl d0, d1, #0
1246 ;sqshl d0, d1, #63
1247
1248 ;sqshrn q0, q1, #1
1249 ;sqshrn q0, q1, #64
1250
1251 ;sqrshrn q0, dq, #1
1252 ;sqrshrn q0, q1, #64
1253
1254 dsb #0
1255 dsb #1
1256 dsb #2
1257 dsb #3
1258 dsb #4
1259 dsb #5
1260 dsb #6
1261 dsb #7
1262 dsb #8
1263 dsb #9
1264 dsb #0xa
1265 dsb #0xb
1266 dsb #0xc
1267 dsb #0xd
1268 dsb #0xe
1269 dsb #0xf
1270
1271 ;
1272 ; Keep last so the testcase can catch errors in
1273 ; the disassembly of the last instruction.
1274 ;
1275 nop
1276
1277.private_extern _TestProcA64_EndProc
1278_TestProcA64_EndProc:
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