VirtualBox

source: vbox/trunk/src/VBox/Disassembler/testcase/tstDisasmArmv8-1-asm.S@ 107464

Last change on this file since 107464 was 106817, checked in by vboxsync, 3 months ago

Disassembler: Decode SIMD load/store multiple structures (post-indexed) instructions immediate, bugref:10394
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 122.8 KB
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1/* $Id: tstDisasmArmv8-1-asm.S 106817 2024-11-01 10:06:53Z vboxsync $ */
2/** @file
3 * VBox disassembler - Tables for ARMv8 A64.
4 */
5
6/*
7 * Copyright (C) 2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28.private_extern _TestProcA64
29_TestProcA64:
30
31 ; Miscellaneous instructions without a parameter
32 nop
33 yield
34 wfe
35 wfi
36 sev
37 sevl
38 dgh
39 xpaclri
40
41 pacia1716
42 pacib1716
43 autia1716
44 autib1716
45 esb
46 ;psb csync - Requires FEAT_SPE
47 tsb csync
48 ;gcsb dsync - Not supported by buildbox toolchain
49 csdb
50 ;clrbhb - Not supported by buildbox toolchain
51 paciaz
52 paciasp
53 pacibz
54 pacibsp
55 autiaz
56 autiasp
57 autibz
58 autibsp
59
60 bti
61 bti j
62 bti c
63 bti jc
64
65 ;chkfeat x16 - Not supported by buildbox toolchain
66
67 ; Barrier instructions
68
69 isb #0
70 isb #8
71 isb #15
72
73 sb
74
75 ;tcommit - Requires FEAT_TME
76
77 ; Control flow instructions
78 svc #0xfefe
79 hvc #0xdead
80 smc #0xcafe
81 brk #0xd0d0
82 hlt #0xc0de
83; tcancel #0xd00f Requires FEAT_TME
84 dcps1 #0xdeca
85 dcps2 #0xdec0
86 dcps3 #0xfeed
87 b #0x100
88 b #-0x100
89 bl #0x100
90 bl #-0x100
91 b.ne #+0x1000
92 b.eq #-0x1000
93; bc.ne #+0x1000 Requires FEAT_HBC
94; bc.eq #-0x1000 Requires FEAT_HBC
95 cbz x0, #+0x100
96 cbz x0, #-0x100
97 cbz w0, #+0x100
98 cbnz x0, #+0x100
99 cbnz x0, #-0x100
100 cbnz w0, #+0x100
101 tbz w0, #13, #+0x100
102 tbz x0, #63, #-0x100
103 tbz w0, #8, #+0x100
104 ret x30
105 ret x1
106 ret x2
107 ret x15
108 retaa
109 retab
110 br x15
111 braaz x15
112 brabz xzr
113 blr x15
114 blraaz x15
115 blrabz xzr
116 eret
117 eretaa
118 eretab
119 drps
120 braa xzr, sp
121 braa x0, x1
122 brab xzr, sp
123 brab x0, x1
124 blraa xzr, sp
125 blraa x0, x1
126 blrab xzr, sp
127 blrab x0, x1
128
129 ; System register access instructions
130 msr ttbr0_el1, x0
131 mrs x0, ttbr0_el1
132
133 ; Arithmetic instructions
134 add x0, x0, #0x0
135 add x0, x1, #0x10000
136 add x0, x1, #65536
137 add x0, x0, x0
138 add x0, x1, x29
139 add x0, x1, x28, LSL #1
140 add x0, x1, x28, LSL #63
141 add x0, x1, x28, LSR #1
142 add x0, x1, x28, LSR #63
143 add x0, x1, x28, ASR #1
144 add x0, x1, x28, ASR #63
145 ; ROR is reserved
146
147 add w0, w1, #0x0
148 add w0, w1, #0x10000
149 add w0, w1, #65536
150 add w0, w1, w29
151 add w0, w1, w28, LSL #1
152 add w0, w1, w28, LSL #31
153 add w0, w1, w28, LSR #1
154 add w0, w1, w28, LSR #31
155 add w0, w1, w28, ASR #1
156 add w0, w1, w28, ASR #31
157 ; ROR is reserved
158
159 adds x0, x0, #0x0
160 adds x0, x1, #0x10000
161 adds x0, x1, #65536
162 adds x0, x0, x0
163 adds x0, x1, x29
164 adds x0, x1, x28, LSL #1
165 adds x0, x1, x28, LSL #63
166 adds x0, x1, x28, LSR #1
167 adds x0, x1, x28, LSR #63
168 adds x0, x1, x28, ASR #1
169 adds x0, x1, x28, ASR #63
170 ; ROR is reserved
171
172 adds w0, w1, #0x0
173 adds w0, w1, #0x10000
174 adds w0, w1, #65536
175 adds w0, w1, w29
176 adds w0, w1, w28, LSL #1
177 adds w0, w1, w28, LSL #31
178 adds w0, w1, w28, LSR #1
179 adds w0, w1, w28, LSR #31
180 adds w0, w1, w28, ASR #1
181 adds w0, w1, w28, ASR #31
182 ; ROR is reserved
183
184 sub x0, x0, #0x0
185 sub x0, x1, #0x10000
186 sub x0, x1, #65536
187 sub x0, x0, x0
188 sub x0, x1, x29
189 sub x0, x1, x28, LSL #1
190 sub x0, x1, x28, LSL #63
191 sub x0, x1, x28, LSR #1
192 sub x0, x1, x28, LSR #63
193 sub x0, x1, x28, ASR #1
194 sub x0, x1, x28, ASR #63
195 ; ROR is reserved
196
197 sub w0, w1, #0x0
198 sub w0, w1, #0x10000
199 sub w0, w1, #65536
200 sub w0, w1, w29
201 sub w0, w1, w28, LSL #1
202 sub w0, w1, w28, LSL #31
203 sub w0, w1, w28, LSR #1
204 sub w0, w1, w28, LSR #31
205 sub w0, w1, w28, ASR #1
206 sub w0, w1, w28, ASR #31
207 ; ROR is reserved
208
209 subs x0, x0, #0x0
210 subs x0, x1, #0x10000
211 subs x0, x1, #65536
212 subs x0, x0, x0
213 subs x0, x1, x29
214 subs x0, x1, x28, LSL #1
215 subs x0, x1, x28, LSL #63
216 subs x0, x1, x28, LSR #1
217 subs x0, x1, x28, LSR #63
218 subs x0, x1, x28, ASR #1
219 subs x0, x1, x28, ASR #63
220 ; ROR is reserved
221
222 subs w0, w1, #0x0
223 subs w0, w1, #0x10000
224 subs w0, w1, #65536
225 subs w0, w1, w29
226 subs w0, w1, w28, LSL #1
227 subs w0, w1, w28, LSL #31
228 subs w0, w1, w28, LSR #1
229 subs w0, w1, w28, LSR #31
230 subs w0, w1, w28, ASR #1
231 subs w0, w1, w28, ASR #31
232 ; ROR is reserved
233
234 ; Aliases of subs -> cmp
235 cmp x0, x1
236 cmp w0, w1
237 cmp x0, x1, LSL #1
238 cmp w0, w1, LSL #1
239
240 ; Add/Sub extended register
241 add w0, w1, w2
242
243 add x0, x1, x2
244 add sp, sp, xzr
245
246 add w0, w1, w2, UXTB #1
247 add w0, w1, w2, UXTB #2
248 add w0, w1, w2, UXTB #3
249 add w0, w1, w2, UXTB #4
250 add w28, w29, wzr, UXTB #1
251 add w28, w29, wzr, UXTB #2
252 add w28, w29, wzr, UXTB #3
253 add w28, w29, wzr, UXTB #4
254
255 add x0, x1, w2, UXTB #1
256 add x0, x1, w2, UXTB #2
257 add x0, x1, w2, UXTB #3
258 add x0, x1, w2, UXTB #4
259 add sp, sp, wzr, UXTB #1
260 add sp, sp, wzr, UXTB #2
261 add sp, sp, wzr, UXTB #3
262 add sp, sp, wzr, UXTB #4
263
264 add w0, w1, w2, UXTH #1
265 add w0, w1, w2, UXTH #2
266 add w0, w1, w2, UXTH #3
267 add w0, w1, w2, UXTH #4
268 add w28, w29, wzr, UXTH #1
269 add w28, w29, wzr, UXTH #2
270 add w28, w29, wzr, UXTH #3
271 add w28, w29, wzr, UXTH #4
272
273 add x0, x1, w2, UXTH #1
274 add x0, x1, w2, UXTH #2
275 add x0, x1, w2, UXTH #3
276 add x0, x1, w2, UXTH #4
277 add sp, sp, wzr, UXTH #1
278 add sp, sp, wzr, UXTH #2
279 add sp, sp, wzr, UXTH #3
280 add sp, sp, wzr, UXTH #4
281
282 add w0, w1, w2, UXTW #1
283 add w0, w1, w2, UXTW #2
284 add w0, w1, w2, UXTW #3
285 add w0, w1, w2, UXTW #4
286 add w28, w29, wzr, UXTW #1
287 add w28, w29, wzr, UXTW #2
288 add w28, w29, wzr, UXTW #3
289 add w28, w29, wzr, UXTW #4
290
291 add x0, x1, w2, UXTW #1
292 add x0, x1, w2, UXTW #2
293 add x0, x1, w2, UXTW #3
294 add x0, x1, w2, UXTW #4
295 add sp, sp, wzr, UXTW #1
296 add sp, sp, wzr, UXTW #2
297 add sp, sp, wzr, UXTW #3
298 add sp, sp, wzr, UXTW #4
299
300 add w0, w1, w2, UXTX #1
301 add w0, w1, w2, UXTX #2
302 add w0, w1, w2, UXTX #3
303 add w0, w1, w2, UXTX #4
304 add w28, w29, wzr, UXTX #1
305 add w28, w29, wzr, UXTX #2
306 add w28, w29, wzr, UXTX #3
307 add w28, w29, wzr, UXTX #4
308
309 add x0, x1, x2, UXTX #1
310 add x0, x1, x2, UXTX #2
311 add x0, x1, x2, UXTX #3
312 add x0, x1, x2, UXTX #4
313 add sp, sp, xzr, UXTX #1
314 add sp, sp, xzr, UXTX #2
315 add sp, sp, xzr, UXTX #3
316 add sp, sp, xzr, UXTX #4
317
318 add w0, w1, w2, SXTB #1
319 add w0, w1, w2, SXTB #2
320 add w0, w1, w2, SXTB #3
321 add w0, w1, w2, SXTB #4
322 add w28, w29, wzr, SXTB #1
323 add w28, w29, wzr, SXTB #2
324 add w28, w29, wzr, SXTB #3
325 add w28, w29, wzr, SXTB #4
326
327 add x0, x1, w2, SXTB #1
328 add x0, x1, w2, SXTB #2
329 add x0, x1, w2, SXTB #3
330 add x0, x1, w2, SXTB #4
331 add sp, sp, wzr, SXTB #1
332 add sp, sp, wzr, SXTB #2
333 add sp, sp, wzr, SXTB #3
334 add sp, sp, wzr, SXTB #4
335
336 add w0, w1, w2, SXTH #1
337 add w0, w1, w2, SXTH #2
338 add w0, w1, w2, SXTH #3
339 add w0, w1, w2, SXTH #4
340 add w28, w29, wzr, SXTH #1
341 add w28, w29, wzr, SXTH #2
342 add w28, w29, wzr, SXTH #3
343 add w28, w29, wzr, SXTH #4
344
345 add x0, x1, w2, SXTH #1
346 add x0, x1, w2, SXTH #2
347 add x0, x1, w2, SXTH #3
348 add x0, x1, w2, SXTH #4
349 add sp, sp, wzr, SXTH #1
350 add sp, sp, wzr, SXTH #2
351 add sp, sp, wzr, SXTH #3
352 add sp, sp, wzr, SXTH #4
353
354 add w0, w1, w2, SXTW #1
355 add w0, w1, w2, SXTW #2
356 add w0, w1, w2, SXTW #3
357 add w0, w1, w2, SXTW #4
358 add w28, w29, wzr, SXTW #1
359 add w28, w29, wzr, SXTW #2
360 add w28, w29, wzr, SXTW #3
361 add w28, w29, wzr, SXTW #4
362
363 add x0, x1, w2, SXTW #1
364 add x0, x1, w2, SXTW #2
365 add x0, x1, w2, SXTW #3
366 add x0, x1, w2, SXTW #4
367 add sp, sp, wzr, SXTW #1
368 add sp, sp, wzr, SXTW #2
369 add sp, sp, wzr, SXTW #3
370 add sp, sp, wzr, SXTW #4
371
372 add w0, w1, w2, SXTX #1
373 add w0, w1, w2, SXTX #2
374 add w0, w1, w2, SXTX #3
375 add w0, w1, w2, SXTX #4
376 add w28, w29, wzr, SXTX #1
377 add w28, w29, wzr, SXTX #2
378 add w28, w29, wzr, SXTX #3
379 add w28, w29, wzr, SXTX #4
380
381 add x0, x1, x2, SXTX #1
382 add x0, x1, x2, SXTX #2
383 add x0, x1, x2, SXTX #3
384 add x0, x1, x2, SXTX #4
385 add sp, sp, xzr, SXTX #1
386 add sp, sp, xzr, SXTX #2
387 add sp, sp, xzr, SXTX #3
388 add sp, sp, xzr, SXTX #4
389
390
391 adds w0, w1, w2
392 adds x0, x1, x2
393 adds xzr, sp, x2
394
395 adds w0, w1, w2, UXTB #1
396 adds w0, w1, w2, UXTB #2
397 adds w0, w1, w2, UXTB #3
398 adds w0, w1, w2, UXTB #4
399 adds w28, w29, wzr, UXTB #1
400 adds w28, w29, wzr, UXTB #2
401 adds w28, w29, wzr, UXTB #3
402 adds w28, w29, wzr, UXTB #4
403
404 adds x0, x1, w2, UXTB #1
405 adds x0, x1, w2, UXTB #2
406 adds x0, x1, w2, UXTB #3
407 adds x0, x1, w2, UXTB #4
408 adds xzr, sp, wzr, UXTB #1
409 adds xzr, sp, wzr, UXTB #2
410 adds xzr, sp, wzr, UXTB #3
411 adds xzr, sp, wzr, UXTB #4
412
413 adds w0, w1, w2, UXTH #1
414 adds w0, w1, w2, UXTH #2
415 adds w0, w1, w2, UXTH #3
416 adds w0, w1, w2, UXTH #4
417 adds w28, w29, wzr, UXTH #1
418 adds w28, w29, wzr, UXTH #2
419 adds w28, w29, wzr, UXTH #3
420 adds w28, w29, wzr, UXTH #4
421
422 adds x0, x1, w2, UXTH #1
423 adds x0, x1, w2, UXTH #2
424 adds x0, x1, w2, UXTH #3
425 adds x0, x1, w2, UXTH #4
426 adds xzr, sp, wzr, UXTH #1
427 adds xzr, sp, wzr, UXTH #2
428 adds xzr, sp, wzr, UXTH #3
429 adds xzr, sp, wzr, UXTH #4
430
431 adds w0, w1, w2, UXTW #1
432 adds w0, w1, w2, UXTW #2
433 adds w0, w1, w2, UXTW #3
434 adds w0, w1, w2, UXTW #4
435 adds w28, w29, wzr, UXTW #1
436 adds w28, w29, wzr, UXTW #2
437 adds w28, w29, wzr, UXTW #3
438 adds w28, w29, wzr, UXTW #4
439
440 adds x0, x1, w2, UXTW #1
441 adds x0, x1, w2, UXTW #2
442 adds x0, x1, w2, UXTW #3
443 adds x0, x1, w2, UXTW #4
444 adds xzr, sp, wzr, UXTW #1
445 adds xzr, sp, wzr, UXTW #2
446 adds xzr, sp, wzr, UXTW #3
447 adds xzr, sp, wzr, UXTW #4
448
449 adds w0, w1, w2, UXTX #1
450 adds w0, w1, w2, UXTX #2
451 adds w0, w1, w2, UXTX #3
452 adds w0, w1, w2, UXTX #4
453 adds w28, w29, wzr, UXTX #1
454 adds w28, w29, wzr, UXTX #2
455 adds w28, w29, wzr, UXTX #3
456 adds w28, w29, wzr, UXTX #4
457
458 adds x0, x1, x2, UXTX #1
459 adds x0, x1, x2, UXTX #2
460 adds x0, x1, x2, UXTX #3
461 adds x0, x1, x2, UXTX #4
462 adds xzr, sp, xzr, UXTX #1
463 adds xzr, sp, xzr, UXTX #2
464 adds xzr, sp, xzr, UXTX #3
465 adds xzr, sp, xzr, UXTX #4
466
467 adds w0, w1, w2, SXTB #1
468 adds w0, w1, w2, SXTB #2
469 adds w0, w1, w2, SXTB #3
470 adds w0, w1, w2, SXTB #4
471 adds w28, w29, wzr, SXTB #1
472 adds w28, w29, wzr, SXTB #2
473 adds w28, w29, wzr, SXTB #3
474 adds w28, w29, wzr, SXTB #4
475
476 adds x0, x1, w2, SXTB #1
477 adds x0, x1, w2, SXTB #2
478 adds x0, x1, w2, SXTB #3
479 adds x0, x1, w2, SXTB #4
480 adds xzr, sp, wzr, SXTB #1
481 adds xzr, sp, wzr, SXTB #2
482 adds xzr, sp, wzr, SXTB #3
483 adds xzr, sp, wzr, SXTB #4
484
485 adds w0, w1, w2, SXTH #1
486 adds w0, w1, w2, SXTH #2
487 adds w0, w1, w2, SXTH #3
488 adds w0, w1, w2, SXTH #4
489 adds w28, w29, wzr, SXTH #1
490 adds w28, w29, wzr, SXTH #2
491 adds w28, w29, wzr, SXTH #3
492 adds w28, w29, wzr, SXTH #4
493
494 adds x0, x1, w2, SXTH #1
495 adds x0, x1, w2, SXTH #2
496 adds x0, x1, w2, SXTH #3
497 adds x0, x1, w2, SXTH #4
498 adds xzr, sp, wzr, SXTH #1
499 adds xzr, sp, wzr, SXTH #2
500 adds xzr, sp, wzr, SXTH #3
501 adds xzr, sp, wzr, SXTH #4
502
503 adds w0, w1, w2, SXTW #1
504 adds w0, w1, w2, SXTW #2
505 adds w0, w1, w2, SXTW #3
506 adds w0, w1, w2, SXTW #4
507 adds w28, w29, wzr, SXTW #1
508 adds w28, w29, wzr, SXTW #2
509 adds w28, w29, wzr, SXTW #3
510 adds w28, w29, wzr, SXTW #4
511
512 adds x0, x1, w2, SXTW #1
513 adds x0, x1, w2, SXTW #2
514 adds x0, x1, w2, SXTW #3
515 adds x0, x1, w2, SXTW #4
516 adds xzr, sp, wzr, SXTW #1
517 adds xzr, sp, wzr, SXTW #2
518 adds xzr, sp, wzr, SXTW #3
519 adds xzr, sp, wzr, SXTW #4
520
521 adds w0, w1, w2, SXTX #1
522 adds w0, w1, w2, SXTX #2
523 adds w0, w1, w2, SXTX #3
524 adds w0, w1, w2, SXTX #4
525 adds w28, w29, wzr, SXTX #1
526 adds w28, w29, wzr, SXTX #2
527 adds w28, w29, wzr, SXTX #3
528 adds w28, w29, wzr, SXTX #4
529
530 adds x0, x1, x2, SXTX #1
531 adds x0, x1, x2, SXTX #2
532 adds x0, x1, x2, SXTX #3
533 adds x0, x1, x2, SXTX #4
534 adds xzr, sp, xzr, SXTX #1
535 adds xzr, sp, xzr, SXTX #2
536 adds xzr, sp, xzr, SXTX #3
537 adds xzr, sp, xzr, SXTX #4
538
539
540 sub w0, w1, w2
541
542 sub w0, w1, w2, UXTB #1
543 sub w0, w1, w2, UXTB #2
544 sub w0, w1, w2, UXTB #3
545 sub w0, w1, w2, UXTB #4
546 sub w28, w29, wzr, UXTB #1
547 sub w28, w29, wzr, UXTB #2
548 sub w28, w29, wzr, UXTB #3
549 sub w28, w29, wzr, UXTB #4
550
551 sub x0, x1, w2, UXTB #1
552 sub x0, x1, w2, UXTB #2
553 sub x0, x1, w2, UXTB #3
554 sub x0, x1, w2, UXTB #4
555 sub sp, sp, wzr, UXTB #1
556 sub sp, sp, wzr, UXTB #2
557 sub sp, sp, wzr, UXTB #3
558 sub sp, sp, wzr, UXTB #4
559
560 sub w0, w1, w2, UXTH #1
561 sub w0, w1, w2, UXTH #2
562 sub w0, w1, w2, UXTH #3
563 sub w0, w1, w2, UXTH #4
564 sub w28, w29, wzr, UXTH #1
565 sub w28, w29, wzr, UXTH #2
566 sub w28, w29, wzr, UXTH #3
567 sub w28, w29, wzr, UXTH #4
568
569 sub x0, x1, w2, UXTH #1
570 sub x0, x1, w2, UXTH #2
571 sub x0, x1, w2, UXTH #3
572 sub x0, x1, w2, UXTH #4
573 sub sp, sp, wzr, UXTH #1
574 sub sp, sp, wzr, UXTH #2
575 sub sp, sp, wzr, UXTH #3
576 sub sp, sp, wzr, UXTH #4
577
578 sub w0, w1, w2, UXTW #1
579 sub w0, w1, w2, UXTW #2
580 sub w0, w1, w2, UXTW #3
581 sub w0, w1, w2, UXTW #4
582 sub w28, w29, wzr, UXTW #1
583 sub w28, w29, wzr, UXTW #2
584 sub w28, w29, wzr, UXTW #3
585 sub w28, w29, wzr, UXTW #4
586
587 sub x0, x1, w2, UXTW #1
588 sub x0, x1, w2, UXTW #2
589 sub x0, x1, w2, UXTW #3
590 sub x0, x1, w2, UXTW #4
591 sub sp, sp, wzr, UXTW #1
592 sub sp, sp, wzr, UXTW #2
593 sub sp, sp, wzr, UXTW #3
594 sub sp, sp, wzr, UXTW #4
595
596 sub w0, w1, w2, UXTX #1
597 sub w0, w1, w2, UXTX #2
598 sub w0, w1, w2, UXTX #3
599 sub w0, w1, w2, UXTX #4
600 sub w28, w29, wzr, UXTX #1
601 sub w28, w29, wzr, UXTX #2
602 sub w28, w29, wzr, UXTX #3
603 sub w28, w29, wzr, UXTX #4
604
605 sub x0, x1, x2, UXTX #1
606 sub x0, x1, x2, UXTX #2
607 sub x0, x1, x2, UXTX #3
608 sub x0, x1, x2, UXTX #4
609 sub sp, sp, xzr, UXTX #1
610 sub sp, sp, xzr, UXTX #2
611 sub sp, sp, xzr, UXTX #3
612 sub sp, sp, xzr, UXTX #4
613
614 sub w0, w1, w2, SXTB #1
615 sub w0, w1, w2, SXTB #2
616 sub w0, w1, w2, SXTB #3
617 sub w0, w1, w2, SXTB #4
618 sub w28, w29, wzr, SXTB #1
619 sub w28, w29, wzr, SXTB #2
620 sub w28, w29, wzr, SXTB #3
621 sub w28, w29, wzr, SXTB #4
622
623 sub x0, x1, w2, SXTB #1
624 sub x0, x1, w2, SXTB #2
625 sub x0, x1, w2, SXTB #3
626 sub x0, x1, w2, SXTB #4
627 sub sp, sp, wzr, SXTB #1
628 sub sp, sp, wzr, SXTB #2
629 sub sp, sp, wzr, SXTB #3
630 sub sp, sp, wzr, SXTB #4
631
632 sub w0, w1, w2, SXTH #1
633 sub w0, w1, w2, SXTH #2
634 sub w0, w1, w2, SXTH #3
635 sub w0, w1, w2, SXTH #4
636 sub w28, w29, wzr, SXTH #1
637 sub w28, w29, wzr, SXTH #2
638 sub w28, w29, wzr, SXTH #3
639 sub w28, w29, wzr, SXTH #4
640
641 sub x0, x1, w2, SXTH #1
642 sub x0, x1, w2, SXTH #2
643 sub x0, x1, w2, SXTH #3
644 sub x0, x1, w2, SXTH #4
645 sub sp, sp, wzr, SXTH #1
646 sub sp, sp, wzr, SXTH #2
647 sub sp, sp, wzr, SXTH #3
648 sub sp, sp, wzr, SXTH #4
649
650 sub w0, w1, w2, SXTW #1
651 sub w0, w1, w2, SXTW #2
652 sub w0, w1, w2, SXTW #3
653 sub w0, w1, w2, SXTW #4
654 sub w28, w29, wzr, SXTW #1
655 sub w28, w29, wzr, SXTW #2
656 sub w28, w29, wzr, SXTW #3
657 sub w28, w29, wzr, SXTW #4
658
659 sub x0, x1, w2, SXTW #1
660 sub x0, x1, w2, SXTW #2
661 sub x0, x1, w2, SXTW #3
662 sub x0, x1, w2, SXTW #4
663 sub sp, sp, wzr, SXTW #1
664 sub sp, sp, wzr, SXTW #2
665 sub sp, sp, wzr, SXTW #3
666 sub sp, sp, wzr, SXTW #4
667
668 sub w0, w1, w2, SXTX #1
669 sub w0, w1, w2, SXTX #2
670 sub w0, w1, w2, SXTX #3
671 sub w0, w1, w2, SXTX #4
672 sub w28, w29, wzr, SXTX #1
673 sub w28, w29, wzr, SXTX #2
674 sub w28, w29, wzr, SXTX #3
675 sub w28, w29, wzr, SXTX #4
676
677 sub x0, x1, x2, SXTX #1
678 sub x0, x1, x2, SXTX #2
679 sub x0, x1, x2, SXTX #3
680 sub x0, x1, x2, SXTX #4
681 sub sp, sp, xzr, SXTX #1
682 sub sp, sp, xzr, SXTX #2
683 sub sp, sp, xzr, SXTX #3
684 sub sp, sp, xzr, SXTX #4
685
686
687 subs w0, w1, w2
688 subs x0, sp, xzr
689
690 subs w0, w1, w2, UXTB #1
691 subs w0, w1, w2, UXTB #2
692 subs w0, w1, w2, UXTB #3
693 subs w0, w1, w2, UXTB #4
694 subs w28, w29, wzr, UXTB #1
695 subs w28, w29, wzr, UXTB #2
696 subs w28, w29, wzr, UXTB #3
697 subs w28, w29, wzr, UXTB #4
698
699 subs x0, x1, w2, UXTB #1
700 subs x0, x1, w2, UXTB #2
701 subs x0, x1, w2, UXTB #3
702 subs x0, x1, w2, UXTB #4
703 subs x28, sp, wzr, UXTB #1 ; targetting xzr would produce an cmp alias instruction
704 subs x28, sp, wzr, UXTB #2
705 subs x28, sp, wzr, UXTB #3
706 subs x28, sp, wzr, UXTB #4
707
708 subs w0, w1, w2, UXTH #1
709 subs w0, w1, w2, UXTH #2
710 subs w0, w1, w2, UXTH #3
711 subs w0, w1, w2, UXTH #4
712 subs w28, w29, wzr, UXTH #1
713 subs w28, w29, wzr, UXTH #2
714 subs w28, w29, wzr, UXTH #3
715 subs w28, w29, wzr, UXTH #4
716
717 subs x0, x1, w2, UXTH #1
718 subs x0, x1, w2, UXTH #2
719 subs x0, x1, w2, UXTH #3
720 subs x0, x1, w2, UXTH #4
721 subs x28, sp, wzr, UXTH #1
722 subs x28, sp, wzr, UXTH #2
723 subs x28, sp, wzr, UXTH #3
724 subs x28, sp, wzr, UXTH #4
725
726 subs w0, w1, w2, UXTW #1
727 subs w0, w1, w2, UXTW #2
728 subs w0, w1, w2, UXTW #3
729 subs w0, w1, w2, UXTW #4
730 subs w28, w29, wzr, UXTW #1
731 subs w28, w29, wzr, UXTW #2
732 subs w28, w29, wzr, UXTW #3
733 subs w28, w29, wzr, UXTW #4
734
735 subs x0, x1, w2, UXTW #1
736 subs x0, x1, w2, UXTW #2
737 subs x0, x1, w2, UXTW #3
738 subs x0, x1, w2, UXTW #4
739 subs x28, sp, wzr, UXTW #1
740 subs x28, sp, wzr, UXTW #2
741 subs x28, sp, wzr, UXTW #3
742 subs x28, sp, wzr, UXTW #4
743
744 subs w0, w1, w2, UXTX #1
745 subs w0, w1, w2, UXTX #2
746 subs w0, w1, w2, UXTX #3
747 subs w0, w1, w2, UXTX #4
748 subs w28, w29, wzr, UXTX #1
749 subs w28, w29, wzr, UXTX #2
750 subs w28, w29, wzr, UXTX #3
751 subs w28, w29, wzr, UXTX #4
752
753 subs x0, x1, x2, UXTX #1
754 subs x0, x1, x2, UXTX #2
755 subs x0, x1, x2, UXTX #3
756 subs x0, x1, x2, UXTX #4
757 subs x28, sp, xzr, UXTX #1
758 subs x28, sp, xzr, UXTX #2
759 subs x28, sp, xzr, UXTX #3
760 subs x28, sp, xzr, UXTX #4
761
762 subs w0, w1, w2, SXTB #1
763 subs w0, w1, w2, SXTB #2
764 subs w0, w1, w2, SXTB #3
765 subs w0, w1, w2, SXTB #4
766 subs w28, w29, wzr, SXTB #1
767 subs w28, w29, wzr, SXTB #2
768 subs w28, w29, wzr, SXTB #3
769 subs w28, w29, wzr, SXTB #4
770
771 subs x0, x1, w2, SXTB #1
772 subs x0, x1, w2, SXTB #2
773 subs x0, x1, w2, SXTB #3
774 subs x0, x1, w2, SXTB #4
775 subs x28, sp, wzr, SXTB #1
776 subs x28, sp, wzr, SXTB #2
777 subs x28, sp, wzr, SXTB #3
778 subs x28, sp, wzr, SXTB #4
779
780 subs w0, w1, w2, SXTH #1
781 subs w0, w1, w2, SXTH #2
782 subs w0, w1, w2, SXTH #3
783 subs w0, w1, w2, SXTH #4
784 subs w28, w29, wzr, SXTH #1
785 subs w28, w29, wzr, SXTH #2
786 subs w28, w29, wzr, SXTH #3
787 subs w28, w29, wzr, SXTH #4
788
789 subs x0, x1, w2, SXTH #1
790 subs x0, x1, w2, SXTH #2
791 subs x0, x1, w2, SXTH #3
792 subs x0, x1, w2, SXTH #4
793 subs x28, sp, wzr, SXTH #1
794 subs x28, sp, wzr, SXTH #2
795 subs x28, sp, wzr, SXTH #3
796 subs x28, sp, wzr, SXTH #4
797
798 subs w0, w1, w2, SXTW #1
799 subs w0, w1, w2, SXTW #2
800 subs w0, w1, w2, SXTW #3
801 subs w0, w1, w2, SXTW #4
802 subs w28, w29, wzr, SXTW #1
803 subs w28, w29, wzr, SXTW #2
804 subs w28, w29, wzr, SXTW #3
805 subs w28, w29, wzr, SXTW #4
806
807 subs x0, x1, w2, SXTW #1
808 subs x0, x1, w2, SXTW #2
809 subs x0, x1, w2, SXTW #3
810 subs x0, x1, w2, SXTW #4
811 subs x28, sp, wzr, SXTW #1
812 subs x28, sp, wzr, SXTW #2
813 subs x28, sp, wzr, SXTW #3
814 subs x28, sp, wzr, SXTW #4
815
816 subs w0, w1, w2, SXTX #1
817 subs w0, w1, w2, SXTX #2
818 subs w0, w1, w2, SXTX #3
819 subs w0, w1, w2, SXTX #4
820 subs w28, w29, wzr, SXTX #1
821 subs w28, w29, wzr, SXTX #2
822 subs w28, w29, wzr, SXTX #3
823 subs w28, w29, wzr, SXTX #4
824
825 subs x0, x1, x2, SXTX #1
826 subs x0, x1, x2, SXTX #2
827 subs x0, x1, x2, SXTX #3
828 subs x0, x1, x2, SXTX #4
829 subs x28, sp, xzr, SXTX #1
830 subs x28, sp, xzr, SXTX #2
831 subs x28, sp, xzr, SXTX #3
832 subs x28, sp, xzr, SXTX #4
833
834
835 ; Logical instructions
836 and x0, x0, #0xffff
837 and w0, wzr, #0xffff
838
839 ands x0, x0, #0x00ffff00
840 ands w10, w23, #0x55555555
841
842 orr x0, x0, #0xffff
843 orr w0, wzr, #0xffff
844
845 mov x0, x1 ; Alias of orr
846 mov w0, w1 ; Alias of orr
847
848 eor x0, x0, #0x00ffff00
849 eor w10, w23, #0x55555555
850
851 sbfm x0, x0, #0x1, #0x2
852 sbfm w0, w0, #0xf, #0x9
853 bfm x0, x0, #0x1, #0x2
854 bfm w0, w0, #0xf, #0x9
855 ubfm x0, x0, #0x1, #0x2
856 ubfm w0, w0, #0xf, #0x9
857
858 movn x0, #0xffff
859 movn x0, #0xffff, LSL #16
860 movn w0, #0xffff
861 movn w0, #0xffff, LSL #16
862
863 movz x0, #0xffff
864 movz x0, #0xffff, LSL #48
865 movz w0, #0xffff
866 movz w0, #0xffff, LSL #16
867
868 movk x0, #0xffff
869 movk x0, #0xffff, LSL #32
870 movk w0, #0xffff
871 movk w0, #0xffff, LSL #16
872
873 ; Logical instructions with a shifted register
874 and w0, w0, w27
875 and w0, w1, w28, LSL #1
876 and w0, w1, w28, LSL #31
877 and w0, w1, w28, LSR #1
878 and w0, w1, w28, LSR #31
879 and w0, w1, w28, ASR #1
880 and w0, w1, w28, ASR #31
881 and w0, w1, w28, ROR #1
882 and w0, w1, w28, ROR #31
883
884 and x0, x0, x27
885 and x0, x1, x28, LSL #1
886 and x0, x1, x28, LSL #63
887 and x0, x1, x28, LSR #1
888 and x0, x1, x28, LSR #63
889 and x0, x1, x28, ASR #1
890 and x0, x1, x28, ASR #63
891 and x0, x1, x28, ROR #1
892 and x0, x1, x28, ROR #63
893
894 orr w0, w0, w27
895 orr w0, w1, w28, LSL #1
896 orr w0, w1, w28, LSL #31
897 orr w0, w1, w28, LSR #1
898 orr w0, w1, w28, LSR #31
899 orr w0, w1, w28, ASR #1
900 orr w0, w1, w28, ASR #31
901 orr w0, w1, w28, ROR #1
902 orr w0, w1, w28, ROR #31
903
904 orr x0, x0, x27
905 orr x0, x1, x28, LSL #1
906 orr x0, x1, x28, LSL #63
907 orr x0, x1, x28, LSR #1
908 orr x0, x1, x28, LSR #63
909 orr x0, x1, x28, ASR #1
910 orr x0, x1, x28, ASR #63
911 orr x0, x1, x28, ROR #1
912 orr x0, x1, x28, ROR #63
913
914 eor w0, w0, w27
915 eor w0, w1, w28, LSL #1
916 eor w0, w1, w28, LSL #31
917 eor w0, w1, w28, LSR #1
918 eor w0, w1, w28, LSR #31
919 eor w0, w1, w28, ASR #1
920 eor w0, w1, w28, ASR #31
921 eor w0, w1, w28, ROR #1
922 eor w0, w1, w28, ROR #31
923
924 eor x0, x0, x27
925 eor x0, x1, x28, LSL #1
926 eor x0, x1, x28, LSL #63
927 eor x0, x1, x28, LSR #1
928 eor x0, x1, x28, LSR #63
929 eor x0, x1, x28, ASR #1
930 eor x0, x1, x28, ASR #63
931 eor x0, x1, x28, ROR #1
932 eor x0, x1, x28, ROR #63
933
934 ands x0, x0, x27
935 ands x0, x1, x28, LSL #1
936 ands x0, x1, x28, LSL #63
937 ands x0, x1, x28, LSR #1
938 ands x0, x1, x28, LSR #63
939 ands x0, x1, x28, ASR #1
940 ands x0, x1, x28, ASR #63
941 ands x0, x1, x28, ROR #1
942 ands x0, x1, x28, ROR #63
943
944 bic w0, w0, w27
945 bic w0, w1, w28, LSL #1
946 bic w0, w1, w28, LSL #31
947 bic w0, w1, w28, LSR #1
948 bic w0, w1, w28, LSR #31
949 bic w0, w1, w28, ASR #1
950 bic w0, w1, w28, ASR #31
951 bic w0, w1, w28, ROR #1
952 bic w0, w1, w28, ROR #31
953
954 bic wzr, wzr, wzr
955 bic wzr, wzr, wzr, LSL #1
956 bic wzr, wzr, wzr, LSL #31
957 bic wzr, wzr, wzr, LSR #1
958 bic wzr, wzr, wzr, LSR #31
959 bic wzr, wzr, wzr, ASR #1
960 bic wzr, wzr, wzr, ASR #31
961 bic wzr, wzr, wzr, ROR #1
962 bic wzr, wzr, wzr, ROR #31
963
964 bic x0, x0, x27
965 bic x0, x1, x28, LSL #1
966 bic x0, x1, x28, LSL #63
967 bic x0, x1, x28, LSR #1
968 bic x0, x1, x28, LSR #63
969 bic x0, x1, x28, ASR #1
970 bic x0, x1, x28, ASR #63
971 bic x0, x1, x28, ROR #1
972 bic x0, x1, x28, ROR #63
973
974 bic xzr, xzr, xzr
975 bic xzr, xzr, xzr, LSL #1
976 bic xzr, xzr, xzr, LSL #63
977 bic xzr, xzr, xzr, LSR #1
978 bic xzr, xzr, xzr, LSR #63
979 bic xzr, xzr, xzr, ASR #1
980 bic xzr, xzr, xzr, ASR #63
981 bic xzr, xzr, xzr, ROR #1
982 bic xzr, xzr, xzr, ROR #63
983
984 orn w0, w0, w27
985 orn w0, w1, w28, LSL #1
986 orn w0, w1, w28, LSL #31
987 orn w0, w1, w28, LSR #1
988 orn w0, w1, w28, LSR #31
989 orn w0, w1, w28, ASR #1
990 orn w0, w1, w28, ASR #31
991 orn w0, w1, w28, ROR #1
992 orn w0, w1, w28, ROR #31
993
994 orn wzr, wzr, wzr
995 orn wzr, wzr, wzr, LSL #1
996 orn wzr, wzr, wzr, LSL #31
997 orn wzr, wzr, wzr, LSR #1
998 orn wzr, wzr, wzr, LSR #31
999 orn wzr, wzr, wzr, ASR #1
1000 orn wzr, wzr, wzr, ASR #31
1001 orn wzr, wzr, wzr, ROR #1
1002 orn wzr, wzr, wzr, ROR #31
1003
1004 orn x0, x0, x27
1005 orn x0, x1, x28, LSL #1
1006 orn x0, x1, x28, LSL #63
1007 orn x0, x1, x28, LSR #1
1008 orn x0, x1, x28, LSR #63
1009 orn x0, x1, x28, ASR #1
1010 orn x0, x1, x28, ASR #63
1011 orn x0, x1, x28, ROR #1
1012 orn x0, x1, x28, ROR #63
1013
1014 orn xzr, xzr, xzr
1015 orn xzr, xzr, xzr, LSL #1
1016 orn xzr, xzr, xzr, LSL #63
1017 orn xzr, xzr, xzr, LSR #1
1018 orn xzr, xzr, xzr, LSR #63
1019 orn xzr, xzr, xzr, ASR #1
1020 orn xzr, xzr, xzr, ASR #63
1021 orn xzr, xzr, xzr, ROR #1
1022 orn xzr, xzr, xzr, ROR #63
1023
1024 eon w0, w0, w27
1025 eon w0, w1, w28, LSL #1
1026 eon w0, w1, w28, LSL #31
1027 eon w0, w1, w28, LSR #1
1028 eon w0, w1, w28, LSR #31
1029 eon w0, w1, w28, ASR #1
1030 eon w0, w1, w28, ASR #31
1031 eon w0, w1, w28, ROR #1
1032 eon w0, w1, w28, ROR #31
1033
1034 eon wzr, wzr, wzr
1035 eon wzr, wzr, wzr, LSL #1
1036 eon wzr, wzr, wzr, LSL #31
1037 eon wzr, wzr, wzr, LSR #1
1038 eon wzr, wzr, wzr, LSR #31
1039 eon wzr, wzr, wzr, ASR #1
1040 eon wzr, wzr, wzr, ASR #31
1041 eon wzr, wzr, wzr, ROR #1
1042 eon wzr, wzr, wzr, ROR #31
1043
1044 eon x0, x0, x27
1045 eon x0, x1, x28, LSL #1
1046 eon x0, x1, x28, LSL #63
1047 eon x0, x1, x28, LSR #1
1048 eon x0, x1, x28, LSR #63
1049 eon x0, x1, x28, ASR #1
1050 eon x0, x1, x28, ASR #63
1051 eon x0, x1, x28, ROR #1
1052 eon x0, x1, x28, ROR #63
1053
1054 eon xzr, xzr, xzr
1055 eon xzr, xzr, xzr, LSL #1
1056 eon xzr, xzr, xzr, LSL #63
1057 eon xzr, xzr, xzr, LSR #1
1058 eon xzr, xzr, xzr, LSR #63
1059 eon xzr, xzr, xzr, ASR #1
1060 eon xzr, xzr, xzr, ASR #63
1061 eon xzr, xzr, xzr, ROR #1
1062 eon xzr, xzr, xzr, ROR #63
1063
1064 bics w0, w0, w27
1065 bics w0, w1, w28, LSL #1
1066 bics w0, w1, w28, LSL #31
1067 bics w0, w1, w28, LSR #1
1068 bics w0, w1, w28, LSR #31
1069 bics w0, w1, w28, ASR #1
1070 bics w0, w1, w28, ASR #31
1071 bics w0, w1, w28, ROR #1
1072 bics w0, w1, w28, ROR #31
1073
1074 bics wzr, wzr, wzr
1075 bics wzr, wzr, wzr, LSL #1
1076 bics wzr, wzr, wzr, LSL #31
1077 bics wzr, wzr, wzr, LSR #1
1078 bics wzr, wzr, wzr, LSR #31
1079 bics wzr, wzr, wzr, ASR #1
1080 bics wzr, wzr, wzr, ASR #31
1081 bics wzr, wzr, wzr, ROR #1
1082 bics wzr, wzr, wzr, ROR #31
1083
1084 bics x0, x0, x27
1085 bics x0, x1, x28, LSL #1
1086 bics x0, x1, x28, LSL #63
1087 bics x0, x1, x28, LSR #1
1088 bics x0, x1, x28, LSR #63
1089 bics x0, x1, x28, ASR #1
1090 bics x0, x1, x28, ASR #63
1091 bics x0, x1, x28, ROR #1
1092 bics x0, x1, x28, ROR #63
1093
1094 bics xzr, xzr, xzr
1095 bics xzr, xzr, xzr, LSL #1
1096 bics xzr, xzr, xzr, LSL #63
1097 bics xzr, xzr, xzr, LSR #1
1098 bics xzr, xzr, xzr, LSR #63
1099 bics xzr, xzr, xzr, ASR #1
1100 bics xzr, xzr, xzr, ASR #63
1101 bics xzr, xzr, xzr, ROR #1
1102 bics xzr, xzr, xzr, ROR #63
1103
1104 extr wzr, w0, w1, #0
1105 extr wzr, w0, w1, #31
1106
1107 extr xzr, x0, x1, #0
1108 extr xzr, x0, x1, #63
1109
1110 csel xzr, x1, x2, eq
1111 csel wzr, w1, w2, eq
1112
1113 csinc xzr, x1, x2, eq
1114 csinc wzr, w1, w2, eq
1115
1116 csinv xzr, x1, x2, eq
1117 csinv wzr, w1, w2, eq
1118
1119 csneg xzr, x1, x2, eq
1120 csneg wzr, w1, w2, eq
1121
1122 madd wzr, w0, w1, w2
1123 madd xzr, x0, x1, x2
1124
1125 msub wzr, w0, w1, w2
1126 msub xzr, x0, x1, x2
1127
1128 smaddl xzr, w0, w1, x2
1129 smsubl xzr, w0, w1, x2
1130 umaddl xzr, w0, w1, x2
1131 umsubl xzr, w0, w1, x2
1132
1133 smulh xzr, x1, x2
1134 umulh xzr, x1, x2
1135
1136
1137 ; Memory loads
1138 ldrb w0, [x28]
1139 ldrb w0, [x28, #1]
1140 ldrb w0, [x28, #4095]
1141
1142 ldrb w0, [sp]
1143 ldrb w0, [sp, #1]
1144 ldrb w0, [sp, #4095]
1145
1146 ldrsb w0, [x28]
1147 ldrsb w0, [x28, #1]
1148 ldrsb w0, [x28, #4095]
1149
1150 ldrsb w0, [sp]
1151 ldrsb w0, [sp, #1]
1152 ldrsb w0, [sp, #4095]
1153
1154 ldrsb x0, [x28]
1155 ldrsb x0, [x28, #1]
1156 ldrsb x0, [x28, #4095]
1157
1158 ldrsb x0, [sp]
1159 ldrsb x0, [sp, #1]
1160 ldrsb x0, [sp, #4095]
1161
1162 ldrh w0, [x28]
1163 ldrh w0, [x28, #2]
1164 ldrh w0, [x28, #1024]
1165
1166 ldrh w0, [sp]
1167 ldrh w0, [sp, #2]
1168 ldrh w0, [sp, #1024]
1169
1170 ldrsh w0, [x28]
1171 ldrsh w0, [x28, #2]
1172 ldrsh w0, [x28, #1024]
1173
1174 ldrsh w0, [sp]
1175 ldrsh w0, [sp, #2]
1176 ldrsh w0, [sp, #1024]
1177
1178 ldrsh x0, [x28]
1179 ldrsh x0, [x28, #2]
1180 ldrsh x0, [x28, #1024]
1181
1182 ldrsh x0, [sp]
1183 ldrsh x0, [sp, #2]
1184 ldrsh x0, [sp, #1024]
1185
1186 ldr x0, [x28]
1187 ldr x0, [x28, #8]
1188 ldr x0, [x28, #32760]
1189
1190 ldr x0, [sp]
1191 ldr x0, [sp, #8]
1192 ldr x0, [sp, #32760]
1193
1194 ldr w0, [x28]
1195 ldr w0, [x28, #4]
1196 ldr w0, [x28, #16380]
1197
1198 ldr w0, [sp]
1199 ldr w0, [sp, #4]
1200 ldr w0, [sp, #16380]
1201
1202 ldrsw x0, [x28]
1203 ldrsw x0, [x28, #4]
1204 ldrsw x0, [x28, #16380]
1205
1206 ldrsw x0, [sp]
1207 ldrsw x0, [sp, #4]
1208 ldrsw x0, [sp, #16380]
1209
1210 ldrb w0, [x28, #0]!
1211 ldrb w0, [x28, #-256]!
1212 ldrb w0, [x28, #255]!
1213
1214 ldrb w0, [sp, #0]!
1215 ldrb w0, [sp, #-256]!
1216 ldrb w0, [sp, #255]!
1217
1218 ldrsb w0, [x28, #0]!
1219 ldrsb w0, [x28, #-256]!
1220 ldrsb w0, [x28, #255]!
1221
1222 ldrsb w0, [sp, #0]!
1223 ldrsb w0, [sp, #-256]!
1224 ldrsb w0, [sp, #255]!
1225
1226 ldrsb x0, [x28, #0]!
1227 ldrsb x0, [x28, #-256]!
1228 ldrsb x0, [x28, #255]!
1229
1230 ldrsb x0, [sp, #0]!
1231 ldrsb x0, [sp, #-256]!
1232 ldrsb x0, [sp, #255]!
1233
1234 ldrh w0, [x28, #0]!
1235 ldrh w0, [x28, #-256]!
1236 ldrh w0, [x28, #255]!
1237
1238 ldrh w0, [sp, #0]!
1239 ldrh w0, [sp, #-256]!
1240 ldrh w0, [sp, #255]!
1241
1242 ldrsh w0, [x28, #0]!
1243 ldrsh w0, [x28, #-256]!
1244 ldrsh w0, [x28, #255]!
1245
1246 ldrsh w0, [sp, #0]!
1247 ldrsh w0, [sp, #-256]!
1248 ldrsh w0, [sp, #255]!
1249
1250 ldrsh x0, [x28, #0]!
1251 ldrsh x0, [x28, #-256]!
1252 ldrsh x0, [x28, #255]!
1253
1254 ldrsh x0, [sp, #0]!
1255 ldrsh x0, [sp, #-256]!
1256 ldrsh x0, [sp, #255]!
1257
1258 ldr x0, [x28, #0]!
1259 ldr x0, [x28, #-256]!
1260 ldr x0, [x28, #255]!
1261
1262 ldr x0, [sp, #0]!
1263 ldr x0, [sp, #-256]!
1264 ldr x0, [sp, #255]!
1265
1266 ldr w0, [x28, #0]!
1267 ldr w0, [x28, #-256]!
1268 ldr w0, [x28, #255]!
1269
1270 ldr w0, [sp, #0]!
1271 ldr w0, [sp, #-256]!
1272 ldr w0, [sp, #255]!
1273
1274 ldrsw x0, [x28, #0]!
1275 ldrsw x0, [x28, #-256]!
1276 ldrsw x0, [x28, #255]!
1277
1278 ldrsw x0, [sp, #0]!
1279 ldrsw x0, [sp, #-256]!
1280 ldrsw x0, [sp, #255]!
1281
1282 ldrb w0, [x28], #0
1283 ldrb w0, [x28], #-256
1284 ldrb w0, [x28], #255
1285
1286 ldrb w0, [sp], #0
1287 ldrb w0, [sp], #-256
1288 ldrb w0, [sp], #255
1289
1290 ldrsb w0, [x28], #0
1291 ldrsb w0, [x28], #-256
1292 ldrsb w0, [x28], #255
1293
1294 ldrsb w0, [sp], #0
1295 ldrsb w0, [sp], #-256
1296 ldrsb w0, [sp], #255
1297
1298 ldrsb x0, [x28], #0
1299 ldrsb x0, [x28], #-256
1300 ldrsb x0, [x28], #255
1301
1302 ldrsb x0, [sp], #0
1303 ldrsb x0, [sp], #-256
1304 ldrsb x0, [sp], #255
1305
1306 ldrh w0, [x28], #0
1307 ldrh w0, [x28], #-256
1308 ldrh w0, [x28], #255
1309
1310 ldrh w0, [sp], #0
1311 ldrh w0, [sp], #-256
1312 ldrh w0, [sp], #255
1313
1314 ldrsh w0, [x28], #0
1315 ldrsh w0, [x28], #-256
1316 ldrsh w0, [x28], #255
1317
1318 ldrsh w0, [sp], #0
1319 ldrsh w0, [sp], #-256
1320 ldrsh w0, [sp], #255
1321
1322 ldrsh x0, [x28], #0
1323 ldrsh x0, [x28], #-256
1324 ldrsh x0, [x28], #255
1325
1326 ldrsh x0, [sp], #0
1327 ldrsh x0, [sp], #-256
1328 ldrsh x0, [sp], #255
1329
1330 ldr x0, [x28], #0
1331 ldr x0, [x28], #-256
1332 ldr x0, [x28], #255
1333
1334 ldr x0, [sp], #0
1335 ldr x0, [sp], #-256
1336 ldr x0, [sp], #255
1337
1338 ldr w0, [x28], #0
1339 ldr w0, [x28], #-256
1340 ldr w0, [x28], #255
1341
1342 ldr w0, [sp], #0
1343 ldr w0, [sp], #-256
1344 ldr w0, [sp], #255
1345
1346 ldrsw x0, [x28], #0
1347 ldrsw x0, [x28], #-256
1348 ldrsw x0, [x28], #255
1349
1350 ldrsw x0, [sp], #0
1351 ldrsw x0, [sp], #-256
1352 ldrsw x0, [sp], #255
1353
1354
1355 ldurb w0, [x28]
1356 ldurb w0, [x28, #-256]
1357 ldurb w0, [x28, #255]
1358
1359 ldurb w0, [sp]
1360 ldurb w0, [sp, #-256]
1361 ldurb w0, [sp, #255]
1362
1363 ldursb w0, [x28]
1364 ldursb w0, [x28, #-256]
1365 ldursb w0, [x28, #255]
1366
1367 ldursb w0, [sp]
1368 ldursb w0, [sp, #-256]
1369 ldursb w0, [sp, #255]
1370
1371 ldursb x0, [x28]
1372 ldursb x0, [x28, #-256]
1373 ldursb x0, [x28, #255]
1374
1375 ldursb x0, [sp]
1376 ldursb x0, [sp, #-256]
1377 ldursb x0, [sp, #255]
1378
1379 ldurh w0, [x28]
1380 ldurh w0, [x28, #-256]
1381 ldurh w0, [x28, #255]
1382
1383 ldurh w0, [sp]
1384 ldurh w0, [sp, #-256]
1385 ldurh w0, [sp, #255]
1386
1387 ldursh w0, [x28]
1388 ldursh w0, [x28, #-256]
1389 ldursh w0, [x28, #255]
1390
1391 ldursh w0, [sp]
1392 ldursh w0, [sp, #-256]
1393 ldursh w0, [sp, #255]
1394
1395 ldursh x0, [x28]
1396 ldursh x0, [x28, #-256]
1397 ldursh x0, [x28, #255]
1398
1399 ldursh x0, [sp]
1400 ldursh x0, [sp, #-256]
1401 ldursh x0, [sp, #255]
1402
1403 ldur x0, [x28]
1404 ldur x0, [x28, #-256]
1405 ldur x0, [x28, #255]
1406
1407 ldur x0, [sp]
1408 ldur x0, [sp, #-256]
1409 ldur x0, [sp, #255]
1410
1411 ldur w0, [x28]
1412 ldur w0, [x28, #-256]
1413 ldur w0, [x28, #255]
1414
1415 ldur w0, [sp]
1416 ldur w0, [sp, #-256]
1417 ldur w0, [sp, #255]
1418
1419 ldursw x0, [x28]
1420 ldursw x0, [x28, #-256]
1421 ldursw x0, [x28, #255]
1422
1423 ldursw x0, [sp]
1424 ldursw x0, [sp, #-256]
1425 ldursw x0, [sp, #255]
1426
1427
1428 ldtrb w0, [x28]
1429 ldtrb w0, [x28, #-256]
1430 ldtrb w0, [x28, #255]
1431
1432 ldtrb w0, [sp]
1433 ldtrb w0, [sp, #-256]
1434 ldtrb w0, [sp, #255]
1435
1436 ldtrsb w0, [x28]
1437 ldtrsb w0, [x28, #-256]
1438 ldtrsb w0, [x28, #255]
1439
1440 ldtrsb w0, [sp]
1441 ldtrsb w0, [sp, #-256]
1442 ldtrsb w0, [sp, #255]
1443
1444 ldtrsb x0, [x28]
1445 ldtrsb x0, [x28, #-256]
1446 ldtrsb x0, [x28, #255]
1447
1448 ldtrsb x0, [sp]
1449 ldtrsb x0, [sp, #-256]
1450 ldtrsb x0, [sp, #255]
1451
1452 ldtrh w0, [x28]
1453 ldtrh w0, [x28, #-256]
1454 ldtrh w0, [x28, #255]
1455
1456 ldtrh w0, [sp]
1457 ldtrh w0, [sp, #-256]
1458 ldtrh w0, [sp, #255]
1459
1460 ldtrsh w0, [x28]
1461 ldtrsh w0, [x28, #-256]
1462 ldtrsh w0, [x28, #255]
1463
1464 ldtrsh w0, [sp]
1465 ldtrsh w0, [sp, #-256]
1466 ldtrsh w0, [sp, #255]
1467
1468 ldtrsh x0, [x28]
1469 ldtrsh x0, [x28, #-256]
1470 ldtrsh x0, [x28, #255]
1471
1472 ldtrsh x0, [sp]
1473 ldtrsh x0, [sp, #-256]
1474 ldtrsh x0, [sp, #255]
1475
1476 ldtr x0, [x28]
1477 ldtr x0, [x28, #-256]
1478 ldtr x0, [x28, #255]
1479
1480 ldtr x0, [sp]
1481 ldtr x0, [sp, #-256]
1482 ldtr x0, [sp, #255]
1483
1484 ldtr w0, [x28]
1485 ldtr w0, [x28, #-256]
1486 ldtr w0, [x28, #255]
1487
1488 ldtr w0, [sp]
1489 ldtr w0, [sp, #-256]
1490 ldtr w0, [sp, #255]
1491
1492 ldtrsw x0, [x28]
1493 ldtrsw x0, [x28, #-256]
1494 ldtrsw x0, [x28, #255]
1495
1496 ldtrsw x0, [sp]
1497 ldtrsw x0, [sp, #-256]
1498 ldtrsw x0, [sp, #255]
1499
1500
1501 ldp w0, w1, [x28]
1502 ldp w0, w1, [x28, #4]
1503 ldp w0, w1, [x28, #-256]
1504 ldp w0, w1, [x28, #252]
1505
1506 ldp w0, w1, [sp]
1507 ldp w0, w1, [sp, #4]
1508 ldp w0, w1, [sp, #-256]
1509 ldp w0, w1, [sp, #252]
1510
1511 ldp x0, x1, [x28]
1512 ldp x0, x1, [x28, #8]
1513 ldp x0, x1, [x28, #-512]
1514 ldp x0, x1, [x28, #504]
1515
1516 ldp x0, x1, [sp]
1517 ldp x0, x1, [sp, #8]
1518 ldp x0, x1, [sp, #-512]
1519 ldp x0, x1, [sp, #504]
1520
1521 ldp w0, w1, [x28, #4]!
1522 ldp w0, w1, [x28, #-256]!
1523 ldp w0, w1, [x28, #252]!
1524
1525 ldp w0, w1, [sp, #4]!
1526 ldp w0, w1, [sp, #-256]!
1527 ldp w0, w1, [sp, #252]!
1528
1529 ldp x0, x1, [x28, #8]!
1530 ldp x0, x1, [x28, #-512]!
1531 ldp x0, x1, [x28, #504]!
1532
1533 ldp x0, x1, [sp, #8]!
1534 ldp x0, x1, [sp, #-512]!
1535 ldp x0, x1, [sp, #504]!
1536
1537 ldp w0, w1, [x28], #4
1538 ldp w0, w1, [x28], #-256
1539 ldp w0, w1, [x28], #252
1540
1541 ldp w0, w1, [sp], #4
1542 ldp w0, w1, [sp], #-256
1543 ldp w0, w1, [sp], #252
1544
1545 ldp x0, x1, [x28], #8
1546 ldp x0, x1, [x28], #-512
1547 ldp x0, x1, [x28], #504
1548
1549 ldp x0, x1, [sp], #8
1550 ldp x0, x1, [sp], #-512
1551 ldp x0, x1, [sp], #504
1552
1553 ldnp w0, w1, [x28]
1554 ldnp w0, w1, [x28, #4]
1555 ldnp w0, w1, [x28, #-256]
1556 ldnp w0, w1, [x28, #252]
1557
1558 ldnp w0, w1, [sp]
1559 ldnp w0, w1, [sp, #4]
1560 ldnp w0, w1, [sp, #-256]
1561 ldnp w0, w1, [sp, #252]
1562
1563 ldnp x0, x1, [x28]
1564 ldnp x0, x1, [x28, #8]
1565 ldnp x0, x1, [x28, #-512]
1566 ldnp x0, x1, [x28, #504]
1567
1568 ldnp x0, x1, [sp]
1569 ldnp x0, x1, [sp, #8]
1570 ldnp x0, x1, [sp, #-512]
1571 ldnp x0, x1, [sp, #504]
1572
1573 ldr x0, [x1, x2]
1574 ldr w0, [x1, x2]
1575 ldr x0, [x1, x2, SXTX #0]
1576 ldr x0, [x1, x2, LSL #3] ; UXTX
1577 ldr x0, [x1, x2, SXTX #3]
1578 ldr w0, [x1, w2, UXTW #0]
1579 ldr w0, [x1, w2, SXTW #0]
1580 ldr w0, [x1, w2, UXTW #2]
1581 ldr w0, [x1, w2, SXTW #2]
1582
1583 ldr x0, [sp, x2]
1584 ldr w0, [sp, x2]
1585 ldr x0, [sp, x2, SXTX #0]
1586 ldr x0, [sp, x2, LSL #3] ; UXTX
1587 ldr x0, [sp, x2, SXTX #3]
1588 ldr w0, [sp, w2, UXTW #0]
1589 ldr w0, [sp, w2, SXTW #0]
1590 ldr w0, [sp, w2, UXTW #2]
1591 ldr w0, [sp, w2, SXTW #2]
1592
1593 ldrb w0, [x1, x2]
1594 ldrb w0, [x1, x2, LSL #0] ; UXTX
1595 ldrb w0, [x1, x2, SXTX #0]
1596 ldrb w0, [x1, w2, UXTW #0]
1597 ldrb w0, [x1, w2, SXTW #0]
1598
1599 ldrb w0, [sp, x2]
1600 ldrb w0, [sp, x2, LSL #0] ; UXTX
1601 ldrb w0, [sp, x2, SXTX #0]
1602 ldrb w0, [sp, w2, UXTW #0]
1603 ldrb w0, [sp, w2, SXTW #0]
1604
1605 ldrsb w0, [x1, x2]
1606 ldrsb w0, [x1, x2, LSL #0] ; UXTX
1607 ldrsb w0, [x1, x2, SXTX #0]
1608 ldrsb w0, [x1, w2, UXTW #0]
1609 ldrsb w0, [x1, w2, SXTW #0]
1610
1611 ldrsb w0, [sp, x2]
1612 ldrsb w0, [sp, x2, LSL #0] ; UXTX
1613 ldrsb w0, [sp, x2, SXTX #0]
1614 ldrsb w0, [sp, w2, UXTW #0]
1615 ldrsb w0, [sp, w2, SXTW #0]
1616
1617 ldrh w0, [x1, x2]
1618 ;ldrh w0, [x1, x2, LSL #0] ; UXTX
1619 ldrh w0, [x1, x2, SXTX #0]
1620 ldrh w0, [x1, x2, LSL #1] ; UXTX
1621 ldrh w0, [x1, x2, SXTX #1]
1622 ldrh w0, [x1, w2, UXTW #0]
1623 ldrh w0, [x1, w2, SXTW #0]
1624 ldrh w0, [x1, w2, UXTW #1]
1625 ldrh w0, [x1, w2, SXTW #1]
1626
1627 ldrh w0, [sp, x2]
1628 ;ldrh w0, [sp, x2, LSL #0] ; UXTX
1629 ldrh w0, [sp, x2, SXTX #0]
1630 ldrh w0, [sp, x2, LSL #1] ; UXTX
1631 ldrh w0, [sp, x2, SXTX #1]
1632 ldrh w0, [sp, w2, UXTW #0]
1633 ldrh w0, [sp, w2, SXTW #0]
1634 ldrh w0, [sp, w2, UXTW #1]
1635 ldrh w0, [sp, w2, SXTW #1]
1636
1637 ldrsh w0, [x1, x2]
1638 ;ldrsh w0, [x1, x2, LSL #0] ; UXTX
1639 ldrsh w0, [x1, x2, SXTX #0]
1640 ldrsh w0, [x1, x2, LSL #1] ; UXTX
1641 ldrsh w0, [x1, x2, SXTX #1]
1642 ldrsh w0, [x1, w2, UXTW #0]
1643 ldrsh w0, [x1, w2, SXTW #0]
1644 ldrsh w0, [x1, w2, UXTW #1]
1645 ldrsh w0, [x1, w2, SXTW #1]
1646
1647 ldrsh w0, [sp, x2]
1648 ;ldrsh w0, [sp, x2, LSL #0] ; UXTX
1649 ldrsh w0, [sp, x2, SXTX #0]
1650 ldrsh w0, [sp, x2, LSL #1] ; UXTX
1651 ldrsh w0, [sp, x2, SXTX #1]
1652 ldrsh w0, [sp, w2, UXTW #0]
1653 ldrsh w0, [sp, w2, SXTW #0]
1654 ldrsh w0, [sp, w2, UXTW #1]
1655 ldrsh w0, [sp, w2, SXTW #1]
1656
1657 ldrsw x0, [x1, x2]
1658 ;ldrsw x0, [x1, x2, LSL #0] ; UXTX
1659 ldrsw x0, [x1, x2, SXTX #0]
1660 ldrsw x0, [x1, x2, LSL #2] ; UXTX
1661 ldrsw x0, [x1, x2, SXTX #2]
1662 ldrsw x0, [x1, w2, UXTW #0]
1663 ldrsw x0, [x1, w2, SXTW #0]
1664 ldrsw x0, [x1, w2, UXTW #2]
1665 ldrsw x0, [x1, w2, SXTW #2]
1666
1667 ldrsw x0, [sp, x2]
1668 ;ldrsw x0, [sp, x2, LSL #0] ; UXTX
1669 ldrsw x0, [sp, x2, SXTX #0]
1670 ldrsw x0, [sp, x2, LSL #2] ; UXTX
1671 ldrsw x0, [sp, x2, SXTX #2]
1672 ldrsw x0, [sp, w2, UXTW #0]
1673 ldrsw x0, [sp, w2, SXTW #0]
1674 ldrsw x0, [sp, w2, UXTW #2]
1675 ldrsw x0, [sp, w2, SXTW #2]
1676
1677
1678 ; FEAT_PAuth memory loads
1679
1680 ldraa x0, [x1]
1681 ldraa x0, [x1, #-1024]
1682 ldraa x0, [x1, #-4096]
1683 ldraa x0, [x1, #4088]
1684
1685 ldraa xzr, [sp]
1686 ldraa xzr, [sp, #-1024]
1687 ldraa xzr, [sp, #-4096]
1688 ldraa xzr, [sp, #4088]
1689
1690 ldraa x0, [x1, #0]!
1691 ldraa x0, [x1, #-1024]!
1692 ldraa x0, [x1, #-4096]!
1693 ldraa x0, [x1, #4088]!
1694
1695 ldraa xzr, [sp, #0]!
1696 ldraa xzr, [sp, #-1024]!
1697 ldraa xzr, [sp, #-4096]!
1698 ldraa xzr, [sp, #4088]!
1699
1700
1701 ldrab x0, [x1]
1702 ldrab x0, [x1, #-1024]
1703 ldrab x0, [x1, #-4096]
1704 ldrab x0, [x1, #4088]
1705
1706 ldrab xzr, [sp]
1707 ldrab xzr, [sp, #-1024]
1708 ldrab xzr, [sp, #-4096]
1709 ldrab xzr, [sp, #4088]
1710
1711 ldrab x0, [x1, #0]!
1712 ldrab x0, [x1, #-1024]!
1713 ldrab x0, [x1, #-4096]!
1714 ldrab x0, [x1, #4088]!
1715
1716 ldrab xzr, [sp, #0]!
1717 ldrab xzr, [sp, #-1024]!
1718 ldrab xzr, [sp, #-4096]!
1719 ldrab xzr, [sp, #4088]!
1720
1721
1722 ; Memory stores
1723 strb w0, [x28]
1724 strb w0, [x28, #1]
1725 strb w0, [x28, #4095]
1726
1727 strb w0, [sp]
1728 strb w0, [sp, #1]
1729 strb w0, [sp, #4095]
1730
1731 strh w0, [x28]
1732 strh w0, [x28, #2]
1733 strh w0, [x28, #1024]
1734
1735 strh w0, [sp]
1736 strh w0, [sp, #2]
1737 strh w0, [sp, #1024]
1738
1739 str x0, [x28]
1740 str x0, [x28, #8]
1741 str x0, [x28, #32760]
1742
1743 str x0, [sp]
1744 str x0, [sp, #8]
1745 str x0, [sp, #32760]
1746
1747 str w0, [x28]
1748 str w0, [x28, #4]
1749 str w0, [x28, #16380]
1750
1751 str w0, [sp]
1752 str w0, [sp, #4]
1753 str w0, [sp, #16380]
1754
1755 strb w0, [x28, #0]!
1756 strb w0, [x28, #-256]!
1757 strb w0, [x28, #255]!
1758
1759 strb w0, [sp, #0]!
1760 strb w0, [sp, #-256]!
1761 strb w0, [sp, #255]!
1762
1763 strh w0, [x28, #0]!
1764 strh w0, [x28, #-256]!
1765 strh w0, [x28, #255]!
1766
1767 strh w0, [sp, #0]!
1768 strh w0, [sp, #-256]!
1769 strh w0, [sp, #255]!
1770
1771 str x0, [x28, #0]!
1772 str x0, [x28, #-256]!
1773 str x0, [x28, #255]!
1774
1775 str x0, [sp, #0]!
1776 str x0, [sp, #-256]!
1777 str x0, [sp, #255]!
1778
1779 str w0, [x28, #0]!
1780 str w0, [x28, #-256]!
1781 str w0, [x28, #255]!
1782
1783 str w0, [sp, #0]!
1784 str w0, [sp, #-256]!
1785 str w0, [sp, #255]!
1786
1787
1788 strb w0, [x28], #0
1789 strb w0, [x28], #-256
1790 strb w0, [x28], #255
1791
1792 strb w0, [sp], #0
1793 strb w0, [sp], #-256
1794 strb w0, [sp], #255
1795
1796 strh w0, [x28], #0
1797 strh w0, [x28], #-256
1798 strh w0, [x28], #255
1799
1800 strh w0, [sp], #0
1801 strh w0, [sp], #-256
1802 strh w0, [sp], #255
1803
1804 str x0, [x28], #0
1805 str x0, [x28], #-256
1806 str x0, [x28], #255
1807
1808 str x0, [sp], #0
1809 str x0, [sp], #-256
1810 str x0, [sp], #255
1811
1812 str w0, [x28], #0
1813 str w0, [x28], #-256
1814 str w0, [x28], #255
1815
1816 str w0, [sp], #0
1817 str w0, [sp], #-256
1818 str w0, [sp], #255
1819
1820 sturb w0, [x28]
1821 sturb w0, [x28, #-256]
1822 sturb w0, [x28, #255]
1823
1824 sturb w0, [sp]
1825 sturb w0, [sp, #-256]
1826 sturb w0, [sp, #255]
1827
1828 sturh w0, [x28]
1829 sturh w0, [x28, #-256]
1830 sturh w0, [x28, #255]
1831
1832 sturh w0, [sp]
1833 sturh w0, [sp, #-256]
1834 sturh w0, [sp, #255]
1835
1836 stur x0, [x28]
1837 stur x0, [x28, #-256]
1838 stur x0, [x28, #255]
1839
1840 stur x0, [sp]
1841 stur x0, [sp, #-256]
1842 stur x0, [sp, #255]
1843
1844 stur w0, [x28]
1845 stur w0, [x28, #-256]
1846 stur w0, [x28, #255]
1847
1848 stur w0, [sp]
1849 stur w0, [sp, #-256]
1850 stur w0, [sp, #255]
1851
1852
1853 sttrb w0, [x28]
1854 sttrb w0, [x28, #-256]
1855 sttrb w0, [x28, #255]
1856
1857 sttrb w0, [sp]
1858 sttrb w0, [sp, #-256]
1859 sttrb w0, [sp, #255]
1860
1861 sttrh w0, [x28]
1862 sttrh w0, [x28, #-256]
1863 sttrh w0, [x28, #255]
1864
1865 sttrh w0, [sp]
1866 sttrh w0, [sp, #-256]
1867 sttrh w0, [sp, #255]
1868
1869 sttr x0, [x28]
1870 sttr x0, [x28, #-256]
1871 sttr x0, [x28, #255]
1872
1873 sttr x0, [sp]
1874 sttr x0, [sp, #-256]
1875 sttr x0, [sp, #255]
1876
1877 sttr w0, [x28]
1878 sttr w0, [x28, #-256]
1879 sttr w0, [x28, #255]
1880
1881 sttr w0, [sp]
1882 sttr w0, [sp, #-256]
1883 sttr w0, [sp, #255]
1884
1885
1886 stp w0, w1, [x28]
1887 stp w0, w1, [x28, #4]
1888 stp w0, w1, [x28, #-256]
1889 stp w0, w1, [x28, #252]
1890
1891 stp w0, w1, [sp]
1892 stp w0, w1, [sp, #4]
1893 stp w0, w1, [sp, #-256]
1894 stp w0, w1, [sp, #252]
1895
1896 stp x0, x1, [x28]
1897 stp x0, x1, [x28, #8]
1898 stp x0, x1, [x28, #-512]
1899 stp x0, x1, [x28, #504]
1900
1901 stp x0, x1, [sp]
1902 stp x0, x1, [sp, #8]
1903 stp x0, x1, [sp, #-512]
1904 stp x0, x1, [sp, #504]
1905
1906 stp w0, w1, [x28, #4]!
1907 stp w0, w1, [x28, #-256]!
1908 stp w0, w1, [x28, #252]!
1909
1910 stp w0, w1, [sp, #4]!
1911 stp w0, w1, [sp, #-256]!
1912 stp w0, w1, [sp, #252]!
1913
1914 stp x0, x1, [x28, #8]!
1915 stp x0, x1, [x28, #-512]!
1916 stp x0, x1, [x28, #504]!
1917
1918 stp x0, x1, [sp, #8]!
1919 stp x0, x1, [sp, #-512]!
1920 stp x0, x1, [sp, #504]!
1921
1922 stp w0, w1, [x28], #4
1923 stp w0, w1, [x28], #-256
1924 stp w0, w1, [x28], #252
1925
1926 stp w0, w1, [sp], #4
1927 stp w0, w1, [sp], #-256
1928 stp w0, w1, [sp], #252
1929
1930 stp x0, x1, [x28], #8
1931 stp x0, x1, [x28], #-512
1932 stp x0, x1, [x28], #504
1933
1934 stp x0, x1, [sp], #8
1935 stp x0, x1, [sp], #-512
1936 stp x0, x1, [sp], #504
1937
1938
1939 stnp w0, w1, [x28]
1940 stnp w0, w1, [x28, #4]
1941 stnp w0, w1, [x28, #-256]
1942 stnp w0, w1, [x28, #252]
1943
1944 stnp w0, w1, [sp]
1945 stnp w0, w1, [sp, #4]
1946 stnp w0, w1, [sp, #-256]
1947 stnp w0, w1, [sp, #252]
1948
1949 stnp x0, x1, [x28]
1950 stnp x0, x1, [x28, #8]
1951 stnp x0, x1, [x28, #-512]
1952 stnp x0, x1, [x28, #504]
1953
1954 stnp x0, x1, [sp]
1955 stnp x0, x1, [sp, #8]
1956 stnp x0, x1, [sp, #-512]
1957 stnp x0, x1, [sp, #504]
1958
1959
1960 str x0, [x1, x2]
1961 str w0, [x1, x2]
1962 str x0, [x1, x2, SXTX #0]
1963 str x0, [x1, x2, LSL #3] ; UXTX
1964 str x0, [x1, x2, SXTX #3]
1965 str w0, [x1, w2, UXTW #0]
1966 str w0, [x1, w2, SXTW #0]
1967 str w0, [x1, w2, UXTW #2]
1968 str w0, [x1, w2, SXTW #2]
1969
1970 str x0, [sp, x2]
1971 str w0, [sp, x2]
1972 str x0, [sp, x2, SXTX #0]
1973 str x0, [sp, x2, LSL #3] ; UXTX
1974 str x0, [sp, x2, SXTX #3]
1975 str w0, [sp, w2, UXTW #0]
1976 str w0, [sp, w2, SXTW #0]
1977 str w0, [sp, w2, UXTW #2]
1978 str w0, [sp, w2, SXTW #2]
1979
1980 strb w0, [x1, x2]
1981 strb w0, [x1, x2, LSL #0x0]
1982 strb w0, [x1, x2, SXTX #0x0]
1983 strb w0, [x1, w2, UXTW #0x0]
1984 strb w0, [x1, w2, SXTW #0x0]
1985
1986 strb w0, [sp, x2]
1987 strb w0, [sp, x2, LSL #0x0]
1988 strb w0, [sp, x2, SXTX #0x0]
1989 strb w0, [sp, w2, UXTW #0x0]
1990 strb w0, [sp, w2, SXTW #0x0]
1991
1992 strh w0, [x1, x2]
1993 ;strh w0, [x1, x2, LSL #0x0] ; UXTX
1994 strh w0, [x1, x2, SXTX #0x0]
1995 strh w0, [x1, x2, LSL #1] ; UXTX
1996 strh w0, [x1, x2, SXTX #1]
1997 strh w0, [x1, w2, UXTW #0x0]
1998 strh w0, [x1, w2, SXTW #0x0]
1999 strh w0, [x1, w2, UXTW #1]
2000 strh w0, [x1, w2, SXTW #1]
2001
2002 strh w0, [sp, x2]
2003 ;strh w0, [sp, x2, LSL #0x0] ; UXTX
2004 strh w0, [sp, x2, SXTX #0x0]
2005 strh w0, [sp, x2, LSL #1] ; UXTX
2006 strh w0, [sp, x2, SXTX #1]
2007 strh w0, [sp, w2, UXTW #0x0]
2008 strh w0, [sp, w2, SXTW #0x0]
2009 strh w0, [sp, w2, UXTW #1]
2010 strh w0, [sp, w2, SXTW #1]
2011
2012
2013 ; SIMD memory loads
2014 ldr b0, [x0]
2015 ldr b0, [x0, #4095]
2016
2017 ldr b31, [sp]
2018 ldr b31, [sp, #4095]
2019
2020 ldr h0, [x0]
2021 ldr h0, [x0, #8190]
2022
2023 ldr h31, [sp]
2024 ldr h31, [sp, #8190]
2025
2026 ldr s0, [x0]
2027 ldr s0, [x0, #16380]
2028
2029 ldr s31, [sp]
2030 ldr s31, [sp, #16380]
2031
2032 ldr d0, [x0]
2033 ldr d0, [x0, #32760]
2034
2035 ldr d31, [sp]
2036 ldr d31, [sp, #32760]
2037
2038 ldr q0, [x0]
2039 ldr q0, [x0, #65520]
2040
2041 ldr q31, [sp]
2042 ldr q31, [sp, #65520]
2043
2044
2045 ldr b0, [x1, x2]
2046 ldr b31, [x1, x2]
2047 ldr b0, [x1, x2, SXTX #0]
2048 ldr b0, [x1, x2, LSL #0] ; UXTX
2049 ldr b0, [x1, x2, SXTX #0]
2050 ldr b31, [x1, w2, UXTW #0]
2051 ldr b31, [x1, w2, SXTW #0]
2052 ldr b31, [x1, w2, UXTW #0]
2053 ldr b31, [x1, w2, SXTW #0]
2054
2055 ldr b0, [sp, x2]
2056 ldr b31, [sp, x2]
2057 ldr b0, [sp, x2, SXTX #0]
2058 ldr b0, [sp, x2, LSL #0] ; UXTX
2059 ldr b0, [sp, x2, SXTX #0]
2060 ldr b31, [sp, w2, UXTW #0]
2061 ldr b31, [sp, w2, SXTW #0]
2062 ldr b31, [sp, w2, UXTW #0]
2063 ldr b31, [sp, w2, SXTW #0]
2064
2065
2066 ldr h0, [x1, x2]
2067 ldr h31, [x1, x2]
2068 ldr h0, [x1, x2, SXTX #1]
2069 ldr h0, [x1, x2, LSL #1] ; UXTX
2070 ldr h0, [x1, x2, SXTX #1]
2071 ldr h31, [x1, w2, UXTW #0]
2072 ldr h31, [x1, w2, SXTW #0]
2073 ldr h31, [x1, w2, UXTW #1]
2074 ldr h31, [x1, w2, SXTW #1]
2075
2076 ldr h0, [sp, x2]
2077 ldr h31, [sp, x2]
2078 ldr h0, [sp, x2, SXTX #1]
2079 ldr h0, [sp, x2, LSL #1] ; UXTX
2080 ldr h0, [sp, x2, SXTX #1]
2081 ldr h31, [sp, w2, UXTW #0]
2082 ldr h31, [sp, w2, SXTW #0]
2083 ldr h31, [sp, w2, UXTW #1]
2084 ldr h31, [sp, w2, SXTW #1]
2085
2086
2087 ldr s0, [x1, x2]
2088 ldr s31, [x1, x2]
2089 ldr s0, [x1, x2, SXTX #2]
2090 ldr s0, [x1, x2, LSL #2] ; UXTX
2091 ldr s0, [x1, x2, SXTX #2]
2092 ldr s31, [x1, w2, UXTW #0]
2093 ldr s31, [x1, w2, SXTW #0]
2094 ldr s31, [x1, w2, UXTW #2]
2095 ldr s31, [x1, w2, SXTW #2]
2096
2097 ldr s0, [sp, x2]
2098 ldr s31, [sp, x2]
2099 ldr s0, [sp, x2, SXTX #2]
2100 ldr s0, [sp, x2, LSL #2] ; UXTX
2101 ldr s0, [sp, x2, SXTX #2]
2102 ldr s31, [sp, w2, UXTW #0]
2103 ldr s31, [sp, w2, SXTW #0]
2104 ldr s31, [sp, w2, UXTW #2]
2105 ldr s31, [sp, w2, SXTW #2]
2106
2107
2108 ldr d0, [x1, x2]
2109 ldr d31, [x1, x2]
2110 ldr d0, [x1, x2, SXTX #3]
2111 ldr d0, [x1, x2, LSL #3] ; UXTX
2112 ldr d0, [x1, x2, SXTX #3]
2113 ldr d31, [x1, w2, UXTW #0]
2114 ldr d31, [x1, w2, SXTW #0]
2115 ldr d31, [x1, w2, UXTW #3]
2116 ldr d31, [x1, w2, SXTW #3]
2117
2118 ldr d0, [sp, x2]
2119 ldr d31, [sp, x2]
2120 ldr d0, [sp, x2, SXTX #3]
2121 ldr d0, [sp, x2, LSL #3] ; UXTX
2122 ldr d0, [sp, x2, SXTX #3]
2123 ldr d31, [sp, w2, UXTW #0]
2124 ldr d31, [sp, w2, SXTW #0]
2125 ldr d31, [sp, w2, UXTW #3]
2126 ldr d31, [sp, w2, SXTW #3]
2127
2128
2129 ldr q0, [x1, x2]
2130 ldr q31, [x1, x2]
2131 ldr q0, [x1, x2, SXTX #4]
2132 ldr q0, [x1, x2, LSL #4] ; UXTX
2133 ldr q0, [x1, x2, SXTX #4]
2134 ldr q31, [x1, w2, UXTW #0]
2135 ldr q31, [x1, w2, SXTW #0]
2136 ldr q31, [x1, w2, UXTW #4]
2137 ldr q31, [x1, w2, SXTW #4]
2138
2139 ldr q0, [sp, x2]
2140 ldr q31, [sp, x2]
2141 ldr q0, [sp, x2, SXTX #4]
2142 ldr q0, [sp, x2, LSL #4] ; UXTX
2143 ldr q0, [sp, x2, SXTX #4]
2144 ldr q31, [sp, w2, UXTW #0]
2145 ldr q31, [sp, w2, SXTW #0]
2146 ldr q31, [sp, w2, UXTW #4]
2147 ldr q31, [sp, w2, SXTW #4]
2148
2149
2150 ldur b0, [x0]
2151 ldur b0, [x0, #-256]
2152 ldur b31, [x0, #255]
2153
2154 ldur b0, [sp]
2155 ldur b0, [sp, #-256]
2156 ldur b31, [sp, #255]
2157
2158 ldur h0, [x0]
2159 ldur h0, [x0, #-256]
2160 ldur h31, [x0, #255]
2161
2162 ldur h0, [sp]
2163 ldur h0, [sp, #-256]
2164 ldur h31, [sp, #255]
2165
2166 ldur s0, [x0]
2167 ldur s0, [x0, #-256]
2168 ldur s31, [x0, #255]
2169
2170 ldur s0, [sp]
2171 ldur s0, [sp, #-256]
2172 ldur s31, [sp, #255]
2173
2174 ldur d0, [x0]
2175 ldur d0, [x0, #-256]
2176 ldur d31, [x0, #255]
2177
2178 ldur d0, [sp]
2179 ldur d0, [sp, #-256]
2180 ldur d31, [sp, #255]
2181
2182 ldur q0, [x0]
2183 ldur q0, [x0, #-256]
2184 ldur q31, [x0, #255]
2185
2186 ldur q0, [sp]
2187 ldur q0, [sp, #-256]
2188 ldur q31, [sp, #255]
2189
2190
2191 ldnp s0, s1, [x0]
2192 ldnp s30, s31, [x0, #-256]
2193 ldnp s23, s24, [x0, #252]
2194
2195 ldnp d0, d1, [x0]
2196 ldnp d30, d31, [x0, #-512]
2197 ldnp d23, d24, [x0, #504]
2198
2199 ldnp q0, q1, [x0]
2200 ldnp q30, q31, [x0, #-1024]
2201 ldnp q23, q24, [x0, #1008]
2202
2203
2204 ldr b0, [x28], #0
2205 ldr b0, [x28], #-256
2206 ldr b0, [x28], #255
2207
2208 ldr b31, [sp], #0
2209 ldr b31, [sp], #-256
2210 ldr b31, [sp], #255
2211
2212 ldr h0, [x28], #0
2213 ldr h0, [x28], #-256
2214 ldr h0, [x28], #255
2215
2216 ldr h31, [sp], #0
2217 ldr h31, [sp], #-256
2218 ldr h31, [sp], #255
2219
2220 ldr s0, [x28], #0
2221 ldr s0, [x28], #-256
2222 ldr s0, [x28], #255
2223
2224 ldr s31, [sp], #0
2225 ldr s31, [sp], #-256
2226 ldr s31, [sp], #255
2227
2228 ldr d0, [x28], #0
2229 ldr d0, [x28], #-256
2230 ldr d0, [x28], #255
2231
2232 ldr d31, [sp], #0
2233 ldr d31, [sp], #-256
2234 ldr d31, [sp], #255
2235
2236 ldr q0, [x28], #0
2237 ldr q0, [x28], #-256
2238 ldr q0, [x28], #255
2239
2240 ldr q31, [sp], #0
2241 ldr q31, [sp], #-256
2242 ldr q31, [sp], #255
2243
2244
2245 ldr b0, [x28, #0]!
2246 ldr b0, [x28, #-256]!
2247 ldr b0, [x28, #255]!
2248
2249 ldr b31, [sp, #0]!
2250 ldr b31, [sp, #-256]!
2251 ldr b31, [sp, #255]!
2252
2253 ldr h0, [x28, #0]!
2254 ldr h0, [x28, #-256]!
2255 ldr h0, [x28, #255]!
2256
2257 ldr h31, [sp, #0]!
2258 ldr h31, [sp, #-256]!
2259 ldr h31, [sp, #255]!
2260
2261 ldr s0, [x28, #0]!
2262 ldr s0, [x28, #-256]!
2263 ldr s0, [x28, #255]!
2264
2265 ldr s31, [sp, #0]!
2266 ldr s31, [sp, #-256]!
2267 ldr s31, [sp, #255]!
2268
2269 ldr d0, [x28, #0]!
2270 ldr d0, [x28, #-256]!
2271 ldr d0, [x28, #255]!
2272
2273 ldr d31, [sp, #0]!
2274 ldr d31, [sp, #-256]!
2275 ldr d31, [sp, #255]!
2276
2277 ldr q0, [x28, #0]!
2278 ldr q0, [x28, #-256]!
2279 ldr q0, [x28, #255]!
2280
2281 ldr q31, [sp, #0]!
2282 ldr q31, [sp, #-256]!
2283 ldr q31, [sp, #255]!
2284
2285
2286 ; SIMD memory stores
2287 str b0, [x0]
2288 str b0, [x0, #4095]
2289
2290 str b31, [sp]
2291 str b31, [sp, #4095]
2292
2293 str h0, [x0]
2294 str h0, [x0, #8190]
2295
2296 str h31, [sp]
2297 str h31, [sp, #8190]
2298
2299 str s0, [x0]
2300 str s0, [x0, #16380]
2301
2302 str s31, [sp]
2303 str s31, [sp, #16380]
2304
2305 str d0, [x0]
2306 str d0, [x0, #32760]
2307
2308 str d31, [sp]
2309 str d31, [sp, #32760]
2310
2311 str q0, [x0]
2312 str q0, [x0, #65520]
2313
2314 str q31, [sp]
2315 str q31, [sp, #65520]
2316
2317
2318 str b0, [x1, x2]
2319 str b31, [x1, x2]
2320 str b0, [x1, x2, SXTX #0]
2321 str b0, [x1, x2, LSL #0] ; UXTX
2322 str b0, [x1, x2, SXTX #0]
2323 str b31, [x1, w2, UXTW #0]
2324 str b31, [x1, w2, SXTW #0]
2325 str b31, [x1, w2, UXTW #0]
2326 str b31, [x1, w2, SXTW #0]
2327
2328 str b0, [sp, x2]
2329 str b31, [sp, x2]
2330 str b0, [sp, x2, SXTX #0]
2331 str b0, [sp, x2, LSL #0] ; UXTX
2332 str b0, [sp, x2, SXTX #0]
2333 str b31, [sp, w2, UXTW #0]
2334 str b31, [sp, w2, SXTW #0]
2335 str b31, [sp, w2, UXTW #0]
2336 str b31, [sp, w2, SXTW #0]
2337
2338
2339 str h0, [x1, x2]
2340 str h31, [x1, x2]
2341 str h0, [x1, x2, SXTX #1]
2342 str h0, [x1, x2, LSL #1] ; UXTX
2343 str h0, [x1, x2, SXTX #1]
2344 str h31, [x1, w2, UXTW #0]
2345 str h31, [x1, w2, SXTW #0]
2346 str h31, [x1, w2, UXTW #1]
2347 str h31, [x1, w2, SXTW #1]
2348
2349 str h0, [sp, x2]
2350 str h31, [sp, x2]
2351 str h0, [sp, x2, SXTX #1]
2352 str h0, [sp, x2, LSL #1] ; UXTX
2353 str h0, [sp, x2, SXTX #1]
2354 str h31, [sp, w2, UXTW #0]
2355 str h31, [sp, w2, SXTW #0]
2356 str h31, [sp, w2, UXTW #1]
2357 str h31, [sp, w2, SXTW #1]
2358
2359
2360 str s0, [x1, x2]
2361 str s31, [x1, x2]
2362 str s0, [x1, x2, SXTX #2]
2363 str s0, [x1, x2, LSL #2] ; UXTX
2364 str s0, [x1, x2, SXTX #2]
2365 str s31, [x1, w2, UXTW #0]
2366 str s31, [x1, w2, SXTW #0]
2367 str s31, [x1, w2, UXTW #2]
2368 str s31, [x1, w2, SXTW #2]
2369
2370 str s0, [sp, x2]
2371 str s31, [sp, x2]
2372 str s0, [sp, x2, SXTX #2]
2373 str s0, [sp, x2, LSL #2] ; UXTX
2374 str s0, [sp, x2, SXTX #2]
2375 str s31, [sp, w2, UXTW #0]
2376 str s31, [sp, w2, SXTW #0]
2377 str s31, [sp, w2, UXTW #2]
2378 str s31, [sp, w2, SXTW #2]
2379
2380
2381 str d0, [x1, x2]
2382 str d31, [x1, x2]
2383 str d0, [x1, x2, SXTX #3]
2384 str d0, [x1, x2, LSL #3] ; UXTX
2385 str d0, [x1, x2, SXTX #3]
2386 str d31, [x1, w2, UXTW #0]
2387 str d31, [x1, w2, SXTW #0]
2388 str d31, [x1, w2, UXTW #3]
2389 str d31, [x1, w2, SXTW #3]
2390
2391 str d0, [sp, x2]
2392 str d31, [sp, x2]
2393 str d0, [sp, x2, SXTX #3]
2394 str d0, [sp, x2, LSL #3] ; UXTX
2395 str d0, [sp, x2, SXTX #3]
2396 str d31, [sp, w2, UXTW #0]
2397 str d31, [sp, w2, SXTW #0]
2398 str d31, [sp, w2, UXTW #3]
2399 str d31, [sp, w2, SXTW #3]
2400
2401
2402 str q0, [x1, x2]
2403 str q31, [x1, x2]
2404 str q0, [x1, x2, SXTX #4]
2405 str q0, [x1, x2, LSL #4] ; UXTX
2406 str q0, [x1, x2, SXTX #4]
2407 str q31, [x1, w2, UXTW #0]
2408 str q31, [x1, w2, SXTW #0]
2409 str q31, [x1, w2, UXTW #4]
2410 str q31, [x1, w2, SXTW #4]
2411
2412 str q0, [sp, x2]
2413 str q31, [sp, x2]
2414 str q0, [sp, x2, SXTX #4]
2415 str q0, [sp, x2, LSL #4] ; UXTX
2416 str q0, [sp, x2, SXTX #4]
2417 str q31, [sp, w2, UXTW #0]
2418 str q31, [sp, w2, SXTW #0]
2419 str q31, [sp, w2, UXTW #4]
2420 str q31, [sp, w2, SXTW #4]
2421
2422
2423 stur b0, [x0]
2424 stur b0, [x0, #-256]
2425 stur b31, [x0, #255]
2426
2427 stur b0, [sp]
2428 stur b0, [sp, #-256]
2429 stur b31, [sp, #255]
2430
2431 stur h0, [x0]
2432 stur h0, [x0, #-256]
2433 stur h31, [x0, #255]
2434
2435 stur h0, [sp]
2436 stur h0, [sp, #-256]
2437 stur h31, [sp, #255]
2438
2439 stur s0, [x0]
2440 stur s0, [x0, #-256]
2441 stur s31, [x0, #255]
2442
2443 stur s0, [sp]
2444 stur s0, [sp, #-256]
2445 stur s31, [sp, #255]
2446
2447 stur d0, [x0]
2448 stur d0, [x0, #-256]
2449 stur d31, [x0, #255]
2450
2451 stur d0, [sp]
2452 stur d0, [sp, #-256]
2453 stur d31, [sp, #255]
2454
2455 stur q0, [x0]
2456 stur q0, [x0, #-256]
2457 stur q31, [x0, #255]
2458
2459 stur q0, [sp]
2460 stur q0, [sp, #-256]
2461 stur q31, [sp, #255]
2462
2463
2464 stnp s0, s1, [x0]
2465 stnp s30, s31, [x0, #-256]
2466 stnp s23, s24, [x0, #252]
2467
2468 stnp d0, d1, [x0]
2469 stnp d30, d31, [x0, #-512]
2470 stnp d23, d24, [x0, #504]
2471
2472 stnp q0, q1, [x0]
2473 stnp q30, q31, [x0, #-1024]
2474 stnp q23, q24, [x0, #1008]
2475
2476
2477 str b0, [x28], #0
2478 str b0, [x28], #-256
2479 str b0, [x28], #255
2480
2481 str b31, [sp], #0
2482 str b31, [sp], #-256
2483 str b31, [sp], #255
2484
2485 str h0, [x28], #0
2486 str h0, [x28], #-256
2487 str h0, [x28], #255
2488
2489 str h31, [sp], #0
2490 str h31, [sp], #-256
2491 str h31, [sp], #255
2492
2493 str s0, [x28], #0
2494 str s0, [x28], #-256
2495 str s0, [x28], #255
2496
2497 str s31, [sp], #0
2498 str s31, [sp], #-256
2499 str s31, [sp], #255
2500
2501 str d0, [x28], #0
2502 str d0, [x28], #-256
2503 str d0, [x28], #255
2504
2505 str d31, [sp], #0
2506 str d31, [sp], #-256
2507 str d31, [sp], #255
2508
2509 str q0, [x28], #0
2510 str q0, [x28], #-256
2511 str q0, [x28], #255
2512
2513 str q31, [sp], #0
2514 str q31, [sp], #-256
2515 str q31, [sp], #255
2516
2517
2518 str b0, [x28, #0]!
2519 str b0, [x28, #-256]!
2520 str b0, [x28, #255]!
2521
2522 str b31, [sp, #0]!
2523 str b31, [sp, #-256]!
2524 str b31, [sp, #255]!
2525
2526 str h0, [x28, #0]!
2527 str h0, [x28, #-256]!
2528 str h0, [x28, #255]!
2529
2530 str h31, [sp, #0]!
2531 str h31, [sp, #-256]!
2532 str h31, [sp, #255]!
2533
2534 str s0, [x28, #0]!
2535 str s0, [x28, #-256]!
2536 str s0, [x28, #255]!
2537
2538 str s31, [sp, #0]!
2539 str s31, [sp, #-256]!
2540 str s31, [sp, #255]!
2541
2542 str d0, [x28, #0]!
2543 str d0, [x28, #-256]!
2544 str d0, [x28, #255]!
2545
2546 str d31, [sp, #0]!
2547 str d31, [sp, #-256]!
2548 str d31, [sp, #255]!
2549
2550 str q0, [x28, #0]!
2551 str q0, [x28, #-256]!
2552 str q0, [x28, #255]!
2553
2554 str q31, [sp, #0]!
2555 str q31, [sp, #-256]!
2556 str q31, [sp, #255]!
2557
2558
2559 ; Add/subtract with carry
2560
2561 adc w0, w1, wzr
2562 adc x0, x1, xzr
2563
2564 adcs w0, w1, wzr
2565 adcs x0, x1, xzr
2566
2567 sbc w0, w1, wzr
2568 sbc x0, x1, xzr
2569
2570 sbcs w0, w1, wzr
2571 sbcs x0, x1, xzr
2572
2573
2574 rmif x0, #0, #0
2575 rmif xzr, #63, #0xf
2576
2577
2578 setf8 w0
2579 setf8 wzr
2580
2581 setf16 w0
2582 setf16 wzr
2583
2584
2585 ; Conditional compare
2586 ccmp x0, x1, #0x3, eq
2587 ccmp w0, w1, #0xf, eq
2588 ccmp x0, x1, #0x3, ne
2589 ccmp w0, w1, #0xf, ne
2590 ccmp x0, x1, #0x3, cs
2591 ccmp w0, w1, #0xf, cc
2592 ccmp x0, x1, #0x3, mi
2593 ccmp w0, w1, #0xf, mi
2594 ccmp x0, x1, #0x3, pl
2595 ccmp w0, w1, #0xf, vs
2596 ccmp x0, x1, #0x3, vc
2597 ccmp w0, w1, #0xf, vc
2598 ccmp x0, x1, #0x3, hi
2599 ccmp w0, w1, #0xf, hi
2600 ccmp x0, x1, #0x3, ls
2601 ccmp w0, w1, #0xf, ls
2602 ccmp x0, x1, #0x3, ge
2603 ccmp w0, w1, #0xf, ge
2604 ccmp x0, x1, #0x3, lt
2605 ccmp w0, w1, #0xf, lt
2606 ccmp x0, x1, #0x3, gt
2607 ccmp w0, w1, #0xf, gt
2608 ccmp x0, x1, #0x3, le
2609 ccmp w0, w1, #0xf, le
2610 ccmp x0, x1, #0x3, al
2611 ccmp w0, w1, #0xf, al
2612
2613 ccmn x0, x1, #0x3, eq
2614 ccmn w0, w1, #0xf, eq
2615 ccmn x0, x1, #0x3, ne
2616 ccmn w0, w1, #0xf, ne
2617 ccmn x0, x1, #0x3, cs
2618 ccmn w0, w1, #0xf, cc
2619 ccmn x0, x1, #0x3, mi
2620 ccmn w0, w1, #0xf, mi
2621 ccmn x0, x1, #0x3, pl
2622 ccmn w0, w1, #0xf, vs
2623 ccmn x0, x1, #0x3, vc
2624 ccmn w0, w1, #0xf, vc
2625 ccmn x0, x1, #0x3, hi
2626 ccmn w0, w1, #0xf, hi
2627 ccmn x0, x1, #0x3, ls
2628 ccmn w0, w1, #0xf, ls
2629 ccmn x0, x1, #0x3, ge
2630 ccmn w0, w1, #0xf, ge
2631 ccmn x0, x1, #0x3, lt
2632 ccmn w0, w1, #0xf, lt
2633 ccmn x0, x1, #0x3, gt
2634 ccmn w0, w1, #0xf, gt
2635 ccmn x0, x1, #0x3, le
2636 ccmn w0, w1, #0xf, le
2637 ccmn x0, x1, #0x3, al
2638 ccmn w0, w1, #0xf, al
2639
2640 ccmp x0, #31, #0x3, eq
2641 ccmp w0, #30, #0xf, eq
2642 ccmp x0, #29, #0x3, ne
2643 ccmp w0, #28, #0xf, ne
2644 ccmp x0, #27, #0x3, cs
2645 ccmp w0, #26, #0xf, cc
2646 ccmp x0, #25, #0x3, mi
2647 ccmp w0, #24, #0xf, mi
2648 ccmp x0, #23, #0x3, pl
2649 ccmp w0, #22, #0xf, vs
2650 ccmp x0, #21, #0x3, vc
2651 ccmp w0, #20, #0xf, vc
2652 ccmp x0, #19, #0x3, hi
2653 ccmp w0, #18, #0xf, hi
2654 ccmp x0, #17, #0x3, ls
2655 ccmp w0, #16, #0xf, ls
2656 ccmp x0, #15, #0x3, ge
2657 ccmp w0, #14, #0xf, ge
2658 ccmp x0, #13, #0x3, lt
2659 ccmp w0, #12, #0xf, lt
2660 ccmp x0, #11, #0x3, gt
2661 ccmp w0, #10, #0xf, gt
2662 ccmp x0, #9, #0x3, le
2663 ccmp w0, #8, #0xf, le
2664 ccmp x0, #7, #0x3, al
2665 ccmp w0, #0, #0xf, al
2666
2667 ccmn x0, #31, #0x3, eq
2668 ccmn w0, #30, #0xf, eq
2669 ccmn x0, #29, #0x3, ne
2670 ccmn w0, #28, #0xf, ne
2671 ccmn x0, #27, #0x3, cs
2672 ccmn w0, #26, #0xf, cc
2673 ccmn x0, #25, #0x3, mi
2674 ccmn w0, #24, #0xf, mi
2675 ccmn x0, #23, #0x3, pl
2676 ccmn w0, #22, #0xf, vs
2677 ccmn x0, #21, #0x3, vc
2678 ccmn w0, #20, #0xf, vc
2679 ccmn x0, #19, #0x3, hi
2680 ccmn w0, #18, #0xf, hi
2681 ccmn x0, #17, #0x3, ls
2682 ccmn w0, #16, #0xf, ls
2683 ccmn x0, #15, #0x3, ge
2684 ccmn w0, #8, #0xf, ge
2685 ccmn x0, #7, #0x3, lt
2686 ccmn w0, #6, #0xf, lt
2687 ccmn x0, #5, #0x3, gt
2688 ccmn w0, #4, #0xf, gt
2689 ccmn x0, #3, #0x3, le
2690 ccmn w0, #2, #0xf, le
2691 ccmn x0, #1, #0x3, al
2692 ccmn w0, #0, #0xf, al
2693
2694 msr spsel, #1
2695 msr spsel, #0
2696 msr daifset, #0
2697 msr daifset, #15
2698 msr daifclr, #0
2699 msr daifclr, #15
2700 msr uao, #1
2701 msr uao, #0
2702 msr pan, #1
2703 msr pan, #0
2704 ; msr allint, #1 Not supported by the toolchain
2705 ; msr allint, #0 Not supported by the toolchain
2706 ;msr pm, #1 Not supported by the maca1 toolchain
2707 ;msr pm, #0 Not supported by the maca1 toolchain
2708 msr ssbs, #1
2709 msr ssbs, #0
2710 msr dit, #1
2711 msr dit, #0
2712 ; msr tco, #1 Not supported by the toolchain
2713 ; msr tco, #0 Not supported by the toolchain
2714 ; msr svcrsm, #1 Not supported by the toolchain
2715 ; msr svcrsm, #0 Not supported by the toolchain
2716 ; msr svcrza, #1 Not supported by the toolchain
2717 ; msr svcrza, #0 Not supported by the toolchain
2718 ; msr svcrsma, #1 Not supported by the toolchain
2719 ; msr svcrsma, #0 Not supported by the toolchain
2720
2721 ; Add/subtract immediate with tags
2722
2723 ;addg x0, x1, #0, #0 - Requires FEAT_MTE
2724 ;addg sp, sp, #1008, #0x0f - Requires FEAT_MTE
2725
2726 ;subg x0, x1, #0, #0 - Requires FEAT_MTE
2727 ;subg sp, sp, #1008, #0x0f - Requires FEAT_MTE
2728
2729 ; Floating Point instructions.
2730 fmadd s0, s1, s3, s31
2731 fmadd d0, d1, d3, d31
2732 fmadd h0, h1, h3, h31
2733
2734 fmsub s0, s1, s3, s31
2735 fmsub d0, d1, d3, d31
2736 fmsub h0, h1, h3, h31
2737
2738 fnmadd s0, s1, s3, s31
2739 fnmadd d0, d1, d3, d31
2740 fnmadd h0, h1, h3, h31
2741
2742 fnmsub s0, s1, s3, s31
2743 fnmsub d0, d1, d3, d31
2744 fnmsub h0, h1, h3, h31
2745
2746 fcvtzu x0, s0, #1
2747 fcvtzu x0, s0, #31
2748 fcvtzu x0, s0, #63
2749 fcvtzu w0, s0, #1
2750 fcvtzu w0, s0, #32
2751
2752 fcvtzu x0, d0, #1
2753 fcvtzu x0, d0, #31
2754 fcvtzu x0, d0, #63
2755 fcvtzu w0, d0, #1
2756 fcvtzu w0, d0, #32
2757
2758 fcvtzu x0, h0, #1
2759 fcvtzu x0, h0, #31
2760 fcvtzu x0, h0, #63
2761 fcvtzu w0, h0, #1
2762 fcvtzu w0, h0, #32
2763
2764 fcvtzs x0, s0, #1
2765 fcvtzs x0, s0, #31
2766 fcvtzs x0, s0, #63
2767 fcvtzs w0, s0, #1
2768 fcvtzs w0, s0, #32
2769
2770 fcvtzs x0, d0, #1
2771 fcvtzs x0, d0, #31
2772 fcvtzs x0, d0, #63
2773 fcvtzs w0, d0, #1
2774 fcvtzs w0, d0, #32
2775
2776 fcvtzs x0, h0, #1
2777 fcvtzs x0, h0, #31
2778 fcvtzs x0, h0, #63
2779 fcvtzs w0, h0, #1
2780 fcvtzs w0, h0, #32
2781
2782 ucvtf s0, x0, #1
2783 ucvtf s0, x0, #31
2784 ucvtf s0, x0, #63
2785 ucvtf s0, w0, #1
2786 ucvtf s0, w0, #32
2787
2788 ucvtf d0, x0, #1
2789 ucvtf d0, x0, #31
2790 ucvtf d0, x0, #63
2791 ucvtf d0, w0, #1
2792 ucvtf d0, w0, #32
2793
2794 ucvtf h0, x0, #1
2795 ucvtf h0, x0, #31
2796 ucvtf h0, x0, #63
2797 ucvtf h0, w0, #1
2798 ucvtf h0, w0, #32
2799
2800 scvtf s0, x0, #1
2801 scvtf s0, x0, #31
2802 scvtf s0, x0, #63
2803 scvtf s0, w0, #1
2804 scvtf s0, w0, #32
2805
2806 scvtf d0, x0, #1
2807 scvtf d0, x0, #31
2808 scvtf d0, x0, #63
2809 scvtf d0, w0, #1
2810 scvtf d0, w0, #32
2811
2812 scvtf h0, x0, #1
2813 scvtf h0, x0, #31
2814 scvtf h0, x0, #63
2815 scvtf h0, w0, #1
2816 scvtf h0, w0, #32
2817
2818 fcsel s0, s1, s2, eq
2819 fcsel d0, d1, d2, eq
2820 fcsel h0, h1, h2, eq
2821
2822 fmul s0, s1, s2
2823 fmul d0, d1, d2
2824 fmul h0, h1, h2
2825
2826 fdiv s0, s1, s2
2827 fdiv d0, d1, d2
2828 fdiv h0, h1, h2
2829
2830 fadd s0, s1, s2
2831 fadd d0, d1, d2
2832 fadd h0, h1, h2
2833
2834 fsub s0, s1, s2
2835 fsub d0, d1, d2
2836 fsub h0, h1, h2
2837
2838 fmax s0, s1, s2
2839 fmax d0, d1, d2
2840 fmax h0, h1, h2
2841
2842 fmin s0, s1, s2
2843 fmin d0, d1, d2
2844 fmin h0, h1, h2
2845
2846 fmaxnm s0, s1, s2
2847 fmaxnm d0, d1, d2
2848 fmaxnm h0, h1, h2
2849
2850 fminnm s0, s1, s2
2851 fminnm d0, d1, d2
2852 fminnm h0, h1, h2
2853
2854 fnmul s0, s1, s2
2855 fnmul d0, d1, d2
2856 fnmul h0, h1, h2
2857
2858 fccmp s0, s1, #0, eq
2859 fccmp s0, s1, #15, ne
2860 fccmp d0, d1, #0, eq
2861 fccmp d0, d1, #15, ne
2862 fccmp h0, h1, #0, eq
2863 fccmp h0, h1, #15, ne
2864
2865 fccmpe s0, s1, #0, eq
2866 fccmpe s0, s1, #15, ne
2867 fccmpe d0, d1, #0, eq
2868 fccmpe d0, d1, #15, ne
2869 fccmpe h0, h1, #0, eq
2870 fccmpe h0, h1, #15, ne
2871
2872 ;fmov s0, #1 @todo Needs FP immediate parsing
2873
2874 fcmp s0, s1
2875 ;fcmp s0, #0.0
2876 fcmp d0, d1
2877 ;fcmp d0, #0.0
2878 fcmp h0, h1
2879 ;fcmp h0, #0.0
2880
2881 fcmpe s0, s1
2882 ;fcmpe s0, #0.0
2883 fcmpe d0, d1
2884 ;fcmpe d0, #0.0
2885 fcmpe h0, h1
2886 ;fcmpe h0, #0.0
2887
2888 fmov s0, s1
2889 fmov d0, d1
2890 fmov h0, h1
2891
2892 fabs s0, s1
2893 fabs d0, d1
2894 fabs h0, h1
2895
2896 fneg s0, s1
2897 fneg d0, d1
2898 fneg h0, h1
2899
2900 fsqrt s0, s1
2901 fsqrt d0, d1
2902 fsqrt h0, h1
2903
2904 fcvt s0, d1
2905 fcvt s0, h1
2906 fcvt d0, s1
2907 fcvt d0, h1
2908 fcvt h0, s1
2909 fcvt h0, d1
2910
2911 frintn s0, s1
2912 frintn d0, d1
2913 frintn h0, h1
2914
2915 frintp s0, s1
2916 frintp d0, d1
2917 frintp h0, h1
2918
2919 frintm s0, s1
2920 frintm d0, d1
2921 frintm h0, h1
2922
2923 frintz s0, s1
2924 frintz d0, d1
2925 frintz h0, h1
2926
2927 frinta s0, s1
2928 frinta d0, d1
2929 frinta h0, h1
2930
2931 frintx s0, s1
2932 frintx d0, d1
2933 frintx h0, h1
2934
2935 frinti s0, s1
2936 frinti d0, d1
2937 frinti h0, h1
2938
2939 frint32z s0, s1
2940 frint32z d0, d1
2941
2942 frint32x s0, s1
2943 frint32x d0, d1
2944
2945 frint64z s0, s1
2946 frint64z d0, d1
2947
2948 frint64x s0, s1
2949 frint64x d0, d1
2950
2951 sshr d0, d1, #1
2952 sshr d0, d1, #64
2953
2954 ssra d0, d1, #1
2955 ssra d0, d1, #64
2956
2957 srshr d0, d1, #1
2958 srshr d0, d1, #64
2959
2960 srsra d0, d1, #1
2961 srsra d0, d1, #64
2962
2963 ; @todo
2964 ;shl d0, d1, #0
2965 ;shl d0, d1, #63
2966
2967 ;sqshl d0, d1, #0
2968 ;sqshl d0, d1, #63
2969
2970 ;sqshrn q0, q1, #1
2971 ;sqshrn q0, q1, #64
2972
2973 ;sqrshrn q0, dq, #1
2974 ;sqrshrn q0, q1, #64
2975
2976 dsb #0
2977 dsb #1
2978 dsb #2
2979 dsb #3
2980 dsb #4
2981 dsb #5
2982 dsb #6
2983 dsb #7
2984 dsb #8
2985 dsb #9
2986 dsb #0xa
2987 dsb #0xb
2988 dsb #0xc
2989 dsb #0xd
2990 dsb #0xe
2991 dsb #0xf
2992
2993 ;subps x0, x1, x3 - Requires FEAT_MTE
2994 ;subps x0, sp, sp - Requires FEAT_MTE
2995
2996 ;subp x0, x1, x3 - Requires FEAT_MTE
2997 ;subp x0, sp, sp - Requires FEAT_MTE
2998
2999 ;gmi x0, x1, x3 - Requires FEAT_MTE
3000 ;gmi x0, sp, x3 - Requires FEAT_MTE
3001
3002 ;irg x0, x1, x3 - Requires FEAT_MTE
3003 ;irg x0, x1, xzr - Requires FEAT_MTE
3004 ;irg sp, sp, x3 - Requires FEAT_MTE
3005 ;irg sp, sp, xzr - Requires FEAT_MTE
3006
3007 pacga xzr, x0, x1
3008 pacga x28, x0, sp
3009
3010
3011 udiv w0, w1, wzr
3012 udiv x0, x1, xzr
3013
3014 sdiv w0, w1, wzr
3015 sdiv x0, x1, xzr
3016
3017 lslv w0, w1, wzr
3018 lslv x0, x1, xzr
3019
3020 lsrv w0, w1, wzr
3021 lsrv x0, x1, xzr
3022
3023 asrv w0, w1, wzr
3024 asrv x0, x1, xzr
3025
3026 rorv w0, w1, wzr
3027 rorv x0, x1, xzr
3028
3029 crc32b w0, w1, wzr
3030 crc32w w0, w1, wzr
3031 crc32h w0, w1, wzr
3032
3033 crc32cb w0, w1, wzr
3034 crc32cw w0, w1, wzr
3035 crc32ch w0, w1, wzr
3036
3037 crc32x w0, w1, x3
3038 crc32x w0, w1, xzr
3039
3040 crc32cx w0, w1, x3
3041 crc32cx w0, w1, xzr
3042
3043 ;umax w0, w1, wzr - Requires FEAT_CSSC
3044 ;umax x0, x1, xzr - Requires FEAT_CSSC
3045
3046 ;smax w0, w1, wzr - Requires FEAT_CSSC
3047 ;smax x0, x1, xzr - Requires FEAT_CSSC
3048
3049 ;umin w0, w1, wzr - Requires FEAT_CSSC
3050 ;umin x0, x1, xzr - Requires FEAT_CSSC
3051
3052 ;smin w0, w1, wzr - Requires FEAT_CSSC
3053 ;smin x0, x1, xzr - Requires FEAT_CSSC
3054
3055 rbit w0, wzr
3056 rbit w0, w1
3057 rbit x0, xzr
3058 rbit x0, x1
3059
3060 rev16 w0, wzr
3061 rev16 w0, w1
3062 rev16 x0, xzr
3063 rev16 x0, x1
3064
3065 rev w0, wzr
3066 rev w0, w1
3067 rev x0, xzr
3068 rev x0, x1
3069
3070 ; @todo rev32
3071
3072 clz w0, wzr
3073 clz w0, w1
3074 clz x0, xzr
3075 clz x0, x1
3076
3077 cls w0, wzr
3078 cls w0, w1
3079 cls x0, xzr
3080 cls x0, x1
3081
3082 ;ctz w0, wzr - Requires FEAT_CSSC
3083 ;ctz w0, w1 - Requires FEAT_CSSC
3084 ;ctz x0, xzr - Requires FEAT_CSSC
3085 ;ctz x0, x1 - Requires FEAT_CSSC
3086
3087 ;cnt w0, wzr - Requires FEAT_CSSC
3088 ;cnt w0, w1 - Requires FEAT_CSSC
3089 ;cnt x0, xzr - Requires FEAT_CSSC
3090 ;cnt x0, x1 - Requires FEAT_CSSC
3091
3092
3093 ; Atomic memory operations
3094
3095 ldaddb w1, w2, [x0]
3096 ldaddb wzr, wzr, [sp]
3097
3098 ldclrb w1, w2, [x0]
3099 ldclrb wzr, wzr, [sp]
3100
3101 ldeorb w1, w2, [x0]
3102 ldeorb wzr, wzr, [sp]
3103
3104 ldsetb w1, w2, [x0]
3105 ldsetb wzr, wzr, [sp]
3106
3107 ldsmaxb w1, w2, [x0]
3108 ldsmaxb wzr, wzr, [sp]
3109
3110 ldsminb w1, w2, [x0]
3111 ldsminb wzr, wzr, [sp]
3112
3113 ldumaxb w1, w2, [x0]
3114 ldumaxb wzr, wzr, [sp]
3115
3116 lduminb w1, w2, [x0]
3117 lduminb wzr, wzr, [sp]
3118
3119 swpb w1, w2, [x0]
3120 swpb wzr, wzr, [sp]
3121
3122 ;rcwclr x1, x2, [x0] - Requires FEAT_THE
3123 ;rcwclr xzr, xzr, [sp] - Requires FEAT_THE
3124
3125 ;rcwswp x1, x2, [x0] - Requires FEAT_THE
3126 ;rcwswp xzr, xzr, [sp] - Requires FEAT_THE
3127
3128 ;rcwset x1, x2, [x0] - Requires FEAT_THE
3129 ;rcwset xzr, xzr, [sp] - Requires FEAT_THE
3130
3131 ldaddlb w1, w2, [x0]
3132 ldaddlb wzr, wzr, [sp]
3133
3134 ldclrlb w1, w2, [x0]
3135 ldclrlb wzr, wzr, [sp]
3136
3137 ldeorlb w1, w2, [x0]
3138 ldeorlb wzr, wzr, [sp]
3139
3140 ldsetlb w1, w2, [x0]
3141 ldsetlb wzr, wzr, [sp]
3142
3143 ldsmaxlb w1, w2, [x0]
3144 ldsmaxlb wzr, wzr, [sp]
3145
3146 ldsminlb w1, w2, [x0]
3147 ldsminlb wzr, wzr, [sp]
3148
3149 ldumaxlb w1, w2, [x0]
3150 ldumaxlb wzr, wzr, [sp]
3151
3152 lduminlb w1, w2, [x0]
3153 lduminlb wzr, wzr, [sp]
3154
3155 swplb w1, w2, [x0]
3156 swplb wzr, wzr, [sp]
3157
3158 ;rcwclrl x1, x2, [x0] - Requires FEAT_THE
3159 ;rcwclrl xzr, xzr, [sp] - Requires FEAT_THE
3160
3161 ;rcwswpl x1, x2, [x0] - Requires FEAT_THE
3162 ;rcwswpl xzr, xzr, [sp] - Requires FEAT_THE
3163
3164 ;rcwsetl x1, x2, [x0] - Requires FEAT_THE
3165 ;rcwsetl xzr, xzr, [sp] - Requires FEAT_THE
3166
3167 ldaddab w1, w2, [x0]
3168 ldaddab wzr, wzr, [sp]
3169
3170 ldclrab w1, w2, [x0]
3171 ldclrab wzr, wzr, [sp]
3172
3173 ldeorab w1, w2, [x0]
3174 ldeorab wzr, wzr, [sp]
3175
3176 ldsetab w1, w2, [x0]
3177 ldsetab wzr, wzr, [sp]
3178
3179 ldsmaxab w1, w2, [x0]
3180 ldsmaxab wzr, wzr, [sp]
3181
3182 ldsminab w1, w2, [x0]
3183 ldsminab wzr, wzr, [sp]
3184
3185 ldumaxab w1, w2, [x0]
3186 ldumaxab wzr, wzr, [sp]
3187
3188 lduminab w1, w2, [x0]
3189 lduminab wzr, wzr, [sp]
3190
3191 swpab w1, w2, [x0]
3192 swpab wzr, wzr, [sp]
3193
3194 ;rcwclra x1, x2, [x0] - Requires FEAT_THE
3195 ;rcwclra xzr, xzr, [sp] - Requires FEAT_THE
3196
3197 ;rcwswpa x1, x2, [x0] - Requires FEAT_THE
3198 ;rcwswpa xzr, xzr, [sp] - Requires FEAT_THE
3199
3200 ;rcwseta x1, x2, [x0] - Requires FEAT_THE
3201 ;rcwseta xzr, xzr, [sp] - Requires FEAT_THE
3202
3203 ldaprb w0, [x1]
3204 ldaprb wzr, [sp]
3205
3206 ldaddalb w1, w2, [x0]
3207 ldaddalb wzr, wzr, [sp]
3208
3209 ldclralb w1, w2, [x0]
3210 ldclralb wzr, wzr, [sp]
3211
3212 ldeoralb w1, w2, [x0]
3213 ldeoralb wzr, wzr, [sp]
3214
3215 ldsetalb w1, w2, [x0]
3216 ldsetalb wzr, wzr, [sp]
3217
3218 ldsmaxalb w1, w2, [x0]
3219 ldsmaxalb wzr, wzr, [sp]
3220
3221 ldsminalb w1, w2, [x0]
3222 ldsminalb wzr, wzr, [sp]
3223
3224 ldumaxalb w1, w2, [x0]
3225 ldumaxalb wzr, wzr, [sp]
3226
3227 lduminalb w1, w2, [x0]
3228 lduminalb wzr, wzr, [sp]
3229
3230 swpalb w1, w2, [x0]
3231 swpalb wzr, wzr, [sp]
3232
3233 ;rcwclral x1, x2, [x0] - Requires FEAT_THE
3234 ;rcwclral xzr, xzr, [sp] - Requires FEAT_THE
3235
3236 ;rcwswpal x1, x2, [x0] - Requires FEAT_THE
3237 ;rcwswpal xzr, xzr, [sp] - Requires FEAT_THE
3238
3239 ;rcwsetal x1, x2, [x0] - Requires FEAT_THE
3240 ;rcwsetal xzr, xzr, [sp] - Requires FEAT_THE
3241
3242 ldaddh w1, w2, [x0]
3243 ldaddh wzr, wzr, [sp]
3244
3245 ldclrh w1, w2, [x0]
3246 ldclrh wzr, wzr, [sp]
3247
3248 ldeorh w1, w2, [x0]
3249 ldeorh wzr, wzr, [sp]
3250
3251 ldseth w1, w2, [x0]
3252 ldseth wzr, wzr, [sp]
3253
3254 ldsmaxh w1, w2, [x0]
3255 ldsmaxh wzr, wzr, [sp]
3256
3257 ldsminh w1, w2, [x0]
3258 ldsminh wzr, wzr, [sp]
3259
3260 ldumaxh w1, w2, [x0]
3261 ldumaxh wzr, wzr, [sp]
3262
3263 lduminh w1, w2, [x0]
3264 lduminh wzr, wzr, [sp]
3265
3266 swph w1, w2, [x0]
3267 swph wzr, wzr, [sp]
3268
3269 ;rcwsclr x1, x2, [x0] - Requires FEAT_THE
3270 ;rcwsclr xzr, xzr, [sp] - Requires FEAT_THE
3271
3272 ;rcwsswp x1, x2, [x0] - Requires FEAT_THE
3273 ;rcwsswp xzr, xzr, [sp] - Requires FEAT_THE
3274
3275 ;rcwsset x1, x2, [x0] - Requires FEAT_THE
3276 ;rcwsset xzr, xzr, [sp] - Requires FEAT_THE
3277
3278 ldaddlh w1, w2, [x0]
3279 ldaddlh wzr, wzr, [sp]
3280
3281 ldclrlh w1, w2, [x0]
3282 ldclrlh wzr, wzr, [sp]
3283
3284 ldeorlh w1, w2, [x0]
3285 ldeorlh wzr, wzr, [sp]
3286
3287 ldsetlh w1, w2, [x0]
3288 ldsetlh wzr, wzr, [sp]
3289
3290 ldsmaxlh w1, w2, [x0]
3291 ldsmaxlh wzr, wzr, [sp]
3292
3293 ldsminlh w1, w2, [x0]
3294 ldsminlh wzr, wzr, [sp]
3295
3296 ldumaxlh w1, w2, [x0]
3297 ldumaxlh wzr, wzr, [sp]
3298
3299 lduminlh w1, w2, [x0]
3300 lduminlh wzr, wzr, [sp]
3301
3302 swplh w1, w2, [x0]
3303 swplh wzr, wzr, [sp]
3304
3305 ;rcwsclrl x1, x2, [x0] - Requires FEAT_THE
3306 ;rcwsclrl xzr, xzr, [sp] - Requires FEAT_THE
3307
3308 ;rcwsswpl x1, x2, [x0] - Requires FEAT_THE
3309 ;rcwsswpl xzr, xzr, [sp] - Requires FEAT_THE
3310
3311 ;rcwssetl x1, x2, [x0] - Requires FEAT_THE
3312 ;rcwssetl xzr, xzr, [sp] - Requires FEAT_THE
3313
3314 ldaddah w1, w2, [x0]
3315 ldaddah wzr, wzr, [sp]
3316
3317 ldclrah w1, w2, [x0]
3318 ldclrah wzr, wzr, [sp]
3319
3320 ldeorah w1, w2, [x0]
3321 ldeorah wzr, wzr, [sp]
3322
3323 ldsetah w1, w2, [x0]
3324 ldsetah wzr, wzr, [sp]
3325
3326 ldsmaxah w1, w2, [x0]
3327 ldsmaxah wzr, wzr, [sp]
3328
3329 ldsminah w1, w2, [x0]
3330 ldsminah wzr, wzr, [sp]
3331
3332 ldumaxah w1, w2, [x0]
3333 ldumaxah wzr, wzr, [sp]
3334
3335 lduminah w1, w2, [x0]
3336 lduminah wzr, wzr, [sp]
3337
3338 swpah w1, w2, [x0]
3339 swpah wzr, wzr, [sp]
3340
3341 ;rcwsclra x1, x2, [x0] - Requires FEAT_THE
3342 ;rcwsclra xzr, xzr, [sp] - Requires FEAT_THE
3343
3344 ;rcwsswpa x1, x2, [x0] - Requires FEAT_THE
3345 ;rcwsswpa xzr, xzr, [sp] - Requires FEAT_THE
3346
3347 ;rcwsseta x1, x2, [x0] - Requires FEAT_THE
3348 ;rcwsseta xzr, xzr, [sp] - Requires FEAT_THE
3349
3350 ldaprh w0, [x1]
3351 ldaprh wzr, [sp]
3352
3353 ldaddalh w1, w2, [x0]
3354 ldaddalh wzr, wzr, [sp]
3355
3356 ldclralh w1, w2, [x0]
3357 ldclralh wzr, wzr, [sp]
3358
3359 ldeoralh w1, w2, [x0]
3360 ldeoralh wzr, wzr, [sp]
3361
3362 ldsetalh w1, w2, [x0]
3363 ldsetalh wzr, wzr, [sp]
3364
3365 ldsmaxalh w1, w2, [x0]
3366 ldsmaxalh wzr, wzr, [sp]
3367
3368 ldsminalh w1, w2, [x0]
3369 ldsminalh wzr, wzr, [sp]
3370
3371 ldumaxalh w1, w2, [x0]
3372 ldumaxalh wzr, wzr, [sp]
3373
3374 lduminalh w1, w2, [x0]
3375 lduminalh wzr, wzr, [sp]
3376
3377 swpalh w1, w2, [x0]
3378 swpalh wzr, wzr, [sp]
3379
3380 ;rcwsclral x1, x2, [x0] - Requires FEAT_THE
3381 ;rcwsclral xzr, xzr, [sp] - Requires FEAT_THE
3382
3383 ;rcwsswpal x1, x2, [x0] - Requires FEAT_THE
3384 ;rcwsswpal xzr, xzr, [sp] - Requires FEAT_THE
3385
3386 ;rcwssetal x1, x2, [x0] - Requires FEAT_THE
3387 ;rcwssetal xzr, xzr, [sp] - Requires FEAT_THE
3388
3389 ldadd w1, w2, [x0]
3390 ldadd wzr, wzr, [sp]
3391 ldadd x1, x2, [x0]
3392 ldadd xzr, xzr, [sp]
3393
3394 ldclr w1, w2, [x0]
3395 ldclr wzr, wzr, [sp]
3396 ldclr x1, x2, [x0]
3397 ldclr xzr, xzr, [sp]
3398
3399 ldeor w1, w2, [x0]
3400 ldeor wzr, wzr, [sp]
3401 ldeor x1, x2, [x0]
3402 ldeor xzr, xzr, [sp]
3403
3404 ldset w1, w2, [x0]
3405 ldset wzr, wzr, [sp]
3406 ldset x1, x2, [x0]
3407 ldset xzr, xzr, [sp]
3408
3409 ldsmax w1, w2, [x0]
3410 ldsmax wzr, wzr, [sp]
3411 ldsmax x1, x2, [x0]
3412 ldsmax xzr, xzr, [sp]
3413
3414 ldsmin w1, w2, [x0]
3415 ldsmin wzr, wzr, [sp]
3416 ldsmin x1, x2, [x0]
3417 ldsmin xzr, xzr, [sp]
3418
3419 ldumax w1, w2, [x0]
3420 ldumax wzr, wzr, [sp]
3421 ldumax x1, x2, [x0]
3422 ldumax xzr, xzr, [sp]
3423
3424 ldumin w1, w2, [x0]
3425 ldumin wzr, wzr, [sp]
3426 ldumin x1, x2, [x0]
3427 ldumin xzr, xzr, [sp]
3428
3429 swp w1, w2, [x0]
3430 swp wzr, wzr, [sp]
3431 swp x1, x2, [x0]
3432 swp xzr, xzr, [sp]
3433
3434 ldaddl w1, w2, [x0]
3435 ldaddl wzr, wzr, [sp]
3436 ldaddl x1, x2, [x0]
3437 ldaddl xzr, xzr, [sp]
3438
3439 ldclrl w1, w2, [x0]
3440 ldclrl wzr, wzr, [sp]
3441 ldclrl x1, x2, [x0]
3442 ldclrl xzr, xzr, [sp]
3443
3444 ldeorl w1, w2, [x0]
3445 ldeorl wzr, wzr, [sp]
3446 ldeorl x1, x2, [x0]
3447 ldeorl xzr, xzr, [sp]
3448
3449 ldsetl w1, w2, [x0]
3450 ldsetl wzr, wzr, [sp]
3451 ldsetl x1, x2, [x0]
3452 ldsetl xzr, xzr, [sp]
3453
3454 ldsmaxl w1, w2, [x0]
3455 ldsmaxl wzr, wzr, [sp]
3456 ldsmaxl x1, x2, [x0]
3457 ldsmaxl xzr, xzr, [sp]
3458
3459 ldsminl w1, w2, [x0]
3460 ldsminl wzr, wzr, [sp]
3461 ldsminl x1, x2, [x0]
3462 ldsminl xzr, xzr, [sp]
3463
3464 ldumaxl w1, w2, [x0]
3465 ldumaxl wzr, wzr, [sp]
3466 ldumaxl x1, x2, [x0]
3467 ldumaxl xzr, xzr, [sp]
3468
3469 lduminl w1, w2, [x0]
3470 lduminl wzr, wzr, [sp]
3471 lduminl x1, x2, [x0]
3472 lduminl xzr, xzr, [sp]
3473
3474 swpl w1, w2, [x0]
3475 swpl wzr, wzr, [sp]
3476 swpl x1, x2, [x0]
3477 swpl xzr, xzr, [sp]
3478
3479 ldadda w1, w2, [x0]
3480 ldadda wzr, wzr, [sp]
3481 ldadda x1, x2, [x0]
3482 ldadda xzr, xzr, [sp]
3483
3484 ldclra w1, w2, [x0]
3485 ldclra wzr, wzr, [sp]
3486 ldclra x1, x2, [x0]
3487 ldclra xzr, xzr, [sp]
3488
3489 ldeora w1, w2, [x0]
3490 ldeora wzr, wzr, [sp]
3491 ldeora x1, x2, [x0]
3492 ldeora xzr, xzr, [sp]
3493
3494 ldseta w1, w2, [x0]
3495 ldseta wzr, wzr, [sp]
3496 ldseta x1, x2, [x0]
3497 ldseta xzr, xzr, [sp]
3498
3499 ldsmaxa w1, w2, [x0]
3500 ldsmaxa wzr, wzr, [sp]
3501 ldsmaxa x1, x2, [x0]
3502 ldsmaxa xzr, xzr, [sp]
3503
3504 ldsmina w1, w2, [x0]
3505 ldsmina wzr, wzr, [sp]
3506 ldsmina x1, x2, [x0]
3507 ldsmina xzr, xzr, [sp]
3508
3509 ldumaxa w1, w2, [x0]
3510 ldumaxa wzr, wzr, [sp]
3511 ldumaxa x1, x2, [x0]
3512 ldumaxa xzr, xzr, [sp]
3513
3514 ldumina w1, w2, [x0]
3515 ldumina wzr, wzr, [sp]
3516 ldumina x1, x2, [x0]
3517 ldumina xzr, xzr, [sp]
3518
3519 swpa w1, w2, [x0]
3520 swpa wzr, wzr, [sp]
3521 swpa x1, x2, [x0]
3522 swpa xzr, xzr, [sp]
3523
3524 ldapr w0, [x1]
3525 ldapr wzr, [sp]
3526 ldapr x0, [x1]
3527 ldapr xzr, [sp]
3528
3529 ldaddal w1, w2, [x0]
3530 ldaddal wzr, wzr, [sp]
3531 ldaddal x1, x2, [x0]
3532 ldaddal xzr, xzr, [sp]
3533
3534 ldclral w1, w2, [x0]
3535 ldclral wzr, wzr, [sp]
3536 ldclral x1, x2, [x0]
3537 ldclral xzr, xzr, [sp]
3538
3539 ldeoral w1, w2, [x0]
3540 ldeoral wzr, wzr, [sp]
3541 ldeoral x1, x2, [x0]
3542 ldeoral xzr, xzr, [sp]
3543
3544 ldsetal w1, w2, [x0]
3545 ldsetal wzr, wzr, [sp]
3546 ldsetal x1, x2, [x0]
3547 ldsetal xzr, xzr, [sp]
3548
3549 ldsmaxal w1, w2, [x0]
3550 ldsmaxal wzr, wzr, [sp]
3551 ldsmaxal x1, x2, [x0]
3552 ldsmaxal xzr, xzr, [sp]
3553
3554 ldsminal w1, w2, [x0]
3555 ldsminal wzr, wzr, [sp]
3556 ldsminal x1, x2, [x0]
3557 ldsminal xzr, xzr, [sp]
3558
3559 ldumaxal w1, w2, [x0]
3560 ldumaxal wzr, wzr, [sp]
3561 ldumaxal x1, x2, [x0]
3562 ldumaxal xzr, xzr, [sp]
3563
3564 lduminal w1, w2, [x0]
3565 lduminal wzr, wzr, [sp]
3566 lduminal x1, x2, [x0]
3567 lduminal xzr, xzr, [sp]
3568
3569 swpal w1, w2, [x0]
3570 swpal wzr, wzr, [sp]
3571 swpal x1, x2, [x0]
3572 swpal xzr, xzr, [sp]
3573
3574 ;
3575 ; LDR literal variants
3576 ;
3577
3578 ldr w0, #0
3579 ldr wzr, #0xffffc
3580 ldr wzr, #-0xffffc
3581
3582 ldr x0, #0
3583 ldr xzr, #0xffffc
3584 ldr xzr, #-0xffffc
3585
3586 ldrsw x0, #0
3587 ldrsw xzr, #0xffffc
3588 ldrsw xzr, #-0xffffc
3589
3590 ldr s0, #0
3591 ldr s31, #0xffffc
3592 ldr s31, #-0xffffc
3593
3594 ldr d0, #0
3595 ldr d31, #0xffffc
3596 ldr d31, #-0xffffc
3597
3598 ldr q0, #0
3599 ldr q31, #0xffffc
3600 ldr q31, #-0xffffc
3601
3602 ;
3603 ; Load/Store memory tags
3604 ;
3605
3606 ;.cpu generic+mte
3607
3608 ;stg x0, [x0]
3609 ;stg x0, [x0, #-4096]
3610 ;stg x0, [x0, #4080]
3611 ;stg sp, [sp]
3612 ;stg sp, [sp, #-4096]
3613 ;stg sp, [sp, #4080]
3614
3615 ;stg x0, [x0], #0
3616 ;stg x0, [x0], #-4096
3617 ;stg x0, [x0], #4080
3618 ;stg sp, [sp], #0
3619 ;stg sp, [sp], #-4096
3620 ;stg sp, [sp], #4080
3621
3622 ;stg x0, [x0, #0]!
3623 ;stg x0, [x0, #-4096]!
3624 ;stg x0, [x0, #4080]!
3625 ;stg sp, [sp, #0]!
3626 ;stg sp, [sp, #-4096]!
3627 ;stg sp, [sp, #4080]!
3628
3629 ;stzgm x1, [x0]
3630 ;stzgm xzr, [sp]
3631
3632 ;ldg x0, [x0]
3633 ;ldg x0, [x0, #-4096]
3634 ;ldg x0, [x0, #4080]
3635 ;ldg xzr, [sp]
3636 ;ldg xzr, [sp, #-4096]
3637 ;ldg xzr, [sp, #4080]
3638
3639 ;stzg x0, [x0]
3640 ;stzg x0, [x0, #-4096]
3641 ;stzg x0, [x0, #4080]
3642 ;stzg sp, [sp]
3643 ;stzg sp, [sp, #-4096]
3644 ;stzg sp, [sp, #4080]
3645
3646 ;stzg x0, [x0], #0
3647 ;stzg x0, [x0], #-4096
3648 ;stzg x0, [x0], #4080
3649 ;stzg sp, [sp], #0
3650 ;stzg sp, [sp], #-4096
3651 ;stzg sp, [sp], #4080
3652
3653 ;stzg x0, [x0, #0]!
3654 ;stzg x0, [x0, #-4096]!
3655 ;stzg x0, [x0, #4080]!
3656 ;stzg sp, [sp, #0]!
3657 ;stzg sp, [sp, #-4096]!
3658 ;stzg sp, [sp, #4080]!
3659
3660 ;stgm x1, [x0]
3661 ;stgm xzr, [sp]
3662
3663 ;st2g x0, [x0]
3664 ;st2g x0, [x0, #-4096]
3665 ;st2g x0, [x0, #4080]
3666 ;st2g sp, [sp]
3667 ;st2g sp, [sp, #-4096]
3668 ;st2g sp, [sp, #4080]
3669
3670 ;st2g x0, [x0], #0
3671 ;st2g x0, [x0], #-4096
3672 ;st2g x0, [x0], #4080
3673 ;st2g sp, [sp], #0
3674 ;st2g sp, [sp], #-4096
3675 ;st2g sp, [sp], #4080
3676
3677 ;st2g x0, [x0, #0]!
3678 ;st2g x0, [x0, #-4096]!
3679 ;st2g x0, [x0, #4080]!
3680 ;st2g sp, [sp, #0]!
3681 ;st2g sp, [sp, #-4096]!
3682 ;st2g sp, [sp, #4080]!
3683
3684 ;ldgm x1, [x0]
3685 ;ldgm xzr, [sp]
3686
3687 ;stz2g x0, [x0]
3688 ;stz2g x0, [x0, #-4096]
3689 ;stz2g x0, [x0, #4080]
3690 ;stz2g sp, [sp]
3691 ;stz2g sp, [sp, #-4096]
3692 ;stz2g sp, [sp, #4080]
3693
3694 ;stz2g x0, [x0], #0
3695 ;stz2g x0, [x0], #-4096
3696 ;stz2g x0, [x0], #4080
3697 ;stz2g sp, [sp], #0
3698 ;stz2g sp, [sp], #-4096
3699 ;stz2g sp, [sp], #4080
3700
3701 ;stz2g x0, [x0, #0]!
3702 ;stz2g x0, [x0, #-4096]!
3703 ;stz2g x0, [x0, #4080]!
3704 ;stz2g sp, [sp, #0]!
3705 ;stz2g sp, [sp, #-4096]!
3706 ;stz2g sp, [sp, #4080]!
3707
3708 ;
3709 ; Compare and swap
3710 ;
3711
3712 casb w0, w1, [x0]
3713 casb wzr, wzr, [sp]
3714
3715 caslb w0, w1, [x0]
3716 caslb wzr, wzr, [sp]
3717
3718 casab w0, w1, [x0]
3719 casab wzr, wzr, [sp]
3720
3721 casalb w0, w1, [x0]
3722 casalb wzr, wzr, [sp]
3723
3724 cash w0, w1, [x0]
3725 cash wzr, wzr, [sp]
3726
3727 caslh w0, w1, [x0]
3728 caslh wzr, wzr, [sp]
3729
3730 casah w0, w1, [x0]
3731 casah wzr, wzr, [sp]
3732
3733 casalh w0, w1, [x0]
3734 casalh wzr, wzr, [sp]
3735
3736 cas w0, w1, [x0]
3737 cas wzr, wzr, [sp]
3738
3739 casl w0, w1, [x0]
3740 casl wzr, wzr, [sp]
3741
3742 casa w0, w1, [x0]
3743 casa wzr, wzr, [sp]
3744
3745 casal w0, w1, [x0]
3746 casal wzr, wzr, [sp]
3747
3748 cas x0, x1, [x0]
3749 cas xzr, xzr, [sp]
3750
3751 casl x0, x1, [x0]
3752 casl xzr, xzr, [sp]
3753
3754 casa x0, x1, [x0]
3755 casa xzr, xzr, [sp]
3756
3757 casal x0, x1, [x0]
3758 casal xzr, xzr, [sp]
3759
3760 ;
3761 ; Load/store exclusive register
3762 ;
3763
3764 stxrb w0, w1, [x2]
3765 stxrb w0, wzr, [sp]
3766 stxrb wzr, w0, [sp]
3767
3768 stlxrb w0, w1, [x2]
3769 stlxrb w0, wzr, [sp]
3770 stlxrb wzr, w0, [sp]
3771
3772 ldxrb w0, [x2]
3773 ldxrb wzr, [sp]
3774
3775 ldaxrb w0, [x2]
3776 ldaxrb wzr, [sp]
3777
3778 stxrh w0, w1, [x2]
3779 stxrh w0, wzr, [sp]
3780 stxrh wzr, w0, [sp]
3781
3782 stlxrh w0, w1, [x2]
3783 stlxrh w0, wzr, [sp]
3784 stlxrh wzr, w0, [sp]
3785
3786 ldxrh w0, [x2]
3787 ldxrh wzr, [sp]
3788
3789 ldaxrh w0, [x2]
3790 ldaxrh wzr, [sp]
3791
3792 stxr w0, w1, [x2]
3793 stxr w0, wzr, [sp]
3794 stxr wzr, w0, [sp]
3795
3796 stlxr w0, w1, [x2]
3797 stlxr w0, wzr, [sp]
3798 stlxr wzr, w0, [sp]
3799
3800 ldxr w0, [x2]
3801 ldxr wzr, [sp]
3802
3803 ldaxr w0, [x2]
3804 ldaxr wzr, [sp]
3805
3806 stxr w0, x1, [x2]
3807 stxr w0, xzr, [sp]
3808 stxr wzr, x0, [sp]
3809
3810 stlxr w0, x1, [x2]
3811 stlxr w0, xzr, [sp]
3812 stlxr wzr, x0, [sp]
3813
3814 ldxr x0, [x2]
3815 ldxr xzr, [sp]
3816
3817 ldaxr x0, [x2]
3818 ldaxr xzr, [sp]
3819
3820 ;
3821 ; Load/store exclusive pair
3822 ;
3823
3824 stxp w0, w1, w2, [x3]
3825 stxp w0, wzr, wzr, [sp]
3826 stxp w0, x1, x2, [x3]
3827 stxp w0, xzr, xzr, [sp]
3828
3829 stlxp w0, w1, w2, [x3]
3830 stlxp w0, wzr, wzr, [sp]
3831 stlxp w0, x1, x2, [x3]
3832 stlxp w0, xzr, xzr, [sp]
3833
3834 ldxp w1, w2, [x0]
3835 ldxp wzr, wzr, [sp]
3836 ldxp x1, x2, [x0]
3837 ldxp xzr, xzr, [sp]
3838
3839 ldaxp w1, w2, [x0]
3840 ldaxp wzr, wzr, [sp]
3841 ldaxp x1, x2, [x0]
3842 ldaxp xzr, xzr, [sp]
3843
3844 ;
3845 ; Load/store ordered
3846 ;
3847
3848 stllrb w0, [x1]
3849 stllrb wzr, [sp]
3850
3851 stlrb w0, [x1]
3852 stlrb wzr, [sp]
3853
3854 ldlarb w0, [x1]
3855 ldlarb wzr, [sp]
3856
3857 ldarb w0, [x1]
3858 ldarb wzr, [sp]
3859
3860 stllrh w0, [x1]
3861 stllrh wzr, [sp]
3862
3863 stlrh w0, [x1]
3864 stlrh wzr, [sp]
3865
3866 ldlarh w0, [x1]
3867 ldlarh wzr, [sp]
3868
3869 ldarh w0, [x1]
3870 ldarh wzr, [sp]
3871
3872 stllr w0, [x1]
3873 stllr wzr, [sp]
3874
3875 stlr w0, [x1]
3876 stlr wzr, [sp]
3877
3878 ldlar w0, [x1]
3879 ldlar wzr, [sp]
3880
3881 ldar w0, [x1]
3882 ldar wzr, [sp]
3883
3884 stllr x0, [x1]
3885 stllr xzr, [sp]
3886
3887 stlr x0, [x1]
3888 stlr xzr, [sp]
3889
3890 ldlar x0, [x1]
3891 ldlar xzr, [sp]
3892
3893 ldar x0, [x1]
3894 ldar xzr, [sp]
3895
3896 ;
3897 ; Advanced SIMD load/store multiple structures
3898 ;
3899 st4 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0]
3900 st4 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp]
3901 st4 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0]
3902 st4 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp]
3903
3904 st4 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0]
3905 st4 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp]
3906 st4 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0]
3907 st4 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp]
3908
3909 st4 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0]
3910 st4 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp]
3911 st4 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0]
3912 st4 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp]
3913
3914 st4 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0]
3915 st4 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp]
3916
3917 st1 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0]
3918 st1 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp]
3919 st1 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0]
3920 st1 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp]
3921
3922 st1 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0]
3923 st1 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp]
3924 st1 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0]
3925 st1 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp]
3926
3927 st1 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0]
3928 st1 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp]
3929 st1 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0]
3930 st1 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp]
3931
3932 st1 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0]
3933 st1 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp]
3934
3935 st3 { v0.8B, v1.8B, v2.8B }, [x0]
3936 st3 { v31.8B, v0.8B, v1.8B }, [sp]
3937 st3 { v0.16B, v1.16B, v2.16B }, [x0]
3938 st3 { v31.16B, v0.16B, v1.16B }, [sp]
3939
3940 st3 { v0.4H, v1.4H, v2.4H }, [x0]
3941 st3 { v31.4H, v0.4H, v1.4H }, [sp]
3942 st3 { v0.8H, v1.8H, v2.8H }, [x0]
3943 st3 { v31.8H, v0.8H, v1.8H }, [sp]
3944
3945 st3 { v0.2S, v1.2S, v2.2S }, [x0]
3946 st3 { v31.2S, v0.2S, v1.2S }, [sp]
3947 st3 { v0.4S, v1.4S, v2.4S }, [x0]
3948 st3 { v31.4S, v0.4S, v1.4S }, [sp]
3949
3950 st3 { v0.2D, v1.2D, v2.2D }, [x0]
3951 st3 { v31.2D, v0.2D, v1.2D }, [sp]
3952
3953 st1 { v0.8B, v1.8B, v2.8B }, [x0]
3954 st1 { v31.8B, v0.8B, v1.8B }, [sp]
3955 st1 { v0.16B, v1.16B, v2.16B }, [x0]
3956 st1 { v31.16B, v0.16B, v1.16B }, [sp]
3957
3958 st1 { v0.4H, v1.4H, v2.4H }, [x0]
3959 st1 { v31.4H, v0.4H, v1.4H }, [sp]
3960 st1 { v0.8H, v1.8H, v2.8H }, [x0]
3961 st1 { v31.8H, v0.8H, v1.8H }, [sp]
3962
3963 st1 { v0.2S, v1.2S, v2.2S }, [x0]
3964 st1 { v31.2S, v0.2S, v1.2S }, [sp]
3965 st1 { v0.4S, v1.4S, v2.4S }, [x0]
3966 st1 { v31.4S, v0.4S, v1.4S }, [sp]
3967
3968 st1 { v0.2D, v1.2D, v2.2D }, [x0]
3969 st1 { v31.2D, v0.2D, v1.2D }, [sp]
3970
3971 st1 { v0.8B }, [x0]
3972 st1 { v31.8B }, [sp]
3973 st1 { v0.16B }, [x0]
3974 st1 { v31.16B }, [sp]
3975
3976 st1 { v0.4H }, [x0]
3977 st1 { v31.4H }, [sp]
3978 st1 { v0.8H }, [x0]
3979 st1 { v31.8H }, [sp]
3980
3981 st1 { v0.2S }, [x0]
3982 st1 { v31.2S }, [sp]
3983 st1 { v0.4S }, [x0]
3984 st1 { v31.4S }, [sp]
3985
3986 st1 { v0.2D }, [x0]
3987 st1 { v31.2D }, [sp]
3988
3989 st2 { v0.8B, v1.8B }, [x0]
3990 st2 { v31.8B, v0.8B }, [sp]
3991 st2 { v0.16B, v1.16B }, [x0]
3992 st2 { v31.16B, v0.16B }, [sp]
3993
3994 st2 { v0.4H, v1.4H }, [x0]
3995 st2 { v31.4H, v0.4H }, [sp]
3996 st2 { v0.8H, v1.8H }, [x0]
3997 st2 { v31.8H, v0.8H }, [sp]
3998
3999 st2 { v0.2S, v1.2S }, [x0]
4000 st2 { v31.2S, v0.2S }, [sp]
4001 st2 { v0.4S, v1.4S }, [x0]
4002 st2 { v31.4S, v0.4S }, [sp]
4003
4004 st2 { v0.2D, v1.2D }, [x0]
4005 st2 { v31.2D, v0.2D }, [sp]
4006
4007 st1 { v0.8B, v1.8B }, [x0]
4008 st1 { v31.8B, v0.8B }, [sp]
4009 st1 { v0.16B, v1.16B }, [x0]
4010 st1 { v31.16B, v0.16B }, [sp]
4011
4012 st1 { v0.4H, v1.4H }, [x0]
4013 st1 { v31.4H, v0.4H }, [sp]
4014 st1 { v0.8H, v1.8H }, [x0]
4015 st1 { v31.8H, v0.8H }, [sp]
4016
4017 st1 { v0.2S, v1.2S }, [x0]
4018 st1 { v31.2S, v0.2S }, [sp]
4019 st1 { v0.4S, v1.4S }, [x0]
4020 st1 { v31.4S, v0.4S }, [sp]
4021
4022 st1 { v0.2D, v1.2D }, [x0]
4023 st1 { v31.2D, v0.2D }, [sp]
4024
4025
4026 ld4 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0]
4027 ld4 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp]
4028 ld4 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0]
4029 ld4 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp]
4030
4031 ld4 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0]
4032 ld4 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp]
4033 ld4 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0]
4034 ld4 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp]
4035
4036 ld4 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0]
4037 ld4 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp]
4038 ld4 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0]
4039 ld4 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp]
4040
4041 ld4 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0]
4042 ld4 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp]
4043
4044 ld1 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0]
4045 ld1 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp]
4046 ld1 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0]
4047 ld1 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp]
4048
4049 ld1 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0]
4050 ld1 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp]
4051 ld1 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0]
4052 ld1 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp]
4053
4054 ld1 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0]
4055 ld1 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp]
4056 ld1 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0]
4057 ld1 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp]
4058
4059 ld1 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0]
4060 ld1 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp]
4061
4062 ld3 { v0.8B, v1.8B, v2.8B }, [x0]
4063 ld3 { v31.8B, v0.8B, v1.8B }, [sp]
4064 ld3 { v0.16B, v1.16B, v2.16B }, [x0]
4065 ld3 { v31.16B, v0.16B, v1.16B }, [sp]
4066
4067 ld3 { v0.4H, v1.4H, v2.4H }, [x0]
4068 ld3 { v31.4H, v0.4H, v1.4H }, [sp]
4069 ld3 { v0.8H, v1.8H, v2.8H }, [x0]
4070 ld3 { v31.8H, v0.8H, v1.8H }, [sp]
4071
4072 ld3 { v0.2S, v1.2S, v2.2S }, [x0]
4073 ld3 { v31.2S, v0.2S, v1.2S }, [sp]
4074 ld3 { v0.4S, v1.4S, v2.4S }, [x0]
4075 ld3 { v31.4S, v0.4S, v1.4S }, [sp]
4076
4077 ld3 { v0.2D, v1.2D, v2.2D }, [x0]
4078 ld3 { v31.2D, v0.2D, v1.2D }, [sp]
4079
4080 ld1 { v0.8B, v1.8B, v2.8B }, [x0]
4081 ld1 { v31.8B, v0.8B, v1.8B }, [sp]
4082 ld1 { v0.16B, v1.16B, v2.16B }, [x0]
4083 ld1 { v31.16B, v0.16B, v1.16B }, [sp]
4084
4085 ld1 { v0.4H, v1.4H, v2.4H }, [x0]
4086 ld1 { v31.4H, v0.4H, v1.4H }, [sp]
4087 ld1 { v0.8H, v1.8H, v2.8H }, [x0]
4088 ld1 { v31.8H, v0.8H, v1.8H }, [sp]
4089
4090 ld1 { v0.2S, v1.2S, v2.2S }, [x0]
4091 ld1 { v31.2S, v0.2S, v1.2S }, [sp]
4092 ld1 { v0.4S, v1.4S, v2.4S }, [x0]
4093 ld1 { v31.4S, v0.4S, v1.4S }, [sp]
4094
4095 ld1 { v0.2D, v1.2D, v2.2D }, [x0]
4096 ld1 { v31.2D, v0.2D, v1.2D }, [sp]
4097
4098 ld1 { v0.8B }, [x0]
4099 ld1 { v31.8B }, [sp]
4100 ld1 { v0.16B }, [x0]
4101 ld1 { v31.16B }, [sp]
4102
4103 ld1 { v0.4H }, [x0]
4104 ld1 { v31.4H }, [sp]
4105 ld1 { v0.8H }, [x0]
4106 ld1 { v31.8H }, [sp]
4107
4108 ld1 { v0.2S }, [x0]
4109 ld1 { v31.2S }, [sp]
4110 ld1 { v0.4S }, [x0]
4111 ld1 { v31.4S }, [sp]
4112
4113 ld1 { v0.2D }, [x0]
4114 ld1 { v31.2D }, [sp]
4115
4116 ld2 { v0.8B, v1.8B }, [x0]
4117 ld2 { v31.8B, v0.8B }, [sp]
4118 ld2 { v0.16B, v1.16B }, [x0]
4119 ld2 { v31.16B, v0.16B }, [sp]
4120
4121 ld2 { v0.4H, v1.4H }, [x0]
4122 ld2 { v31.4H, v0.4H }, [sp]
4123 ld2 { v0.8H, v1.8H }, [x0]
4124 ld2 { v31.8H, v0.8H }, [sp]
4125
4126 ld2 { v0.2S, v1.2S }, [x0]
4127 ld2 { v31.2S, v0.2S }, [sp]
4128 ld2 { v0.4S, v1.4S }, [x0]
4129 ld2 { v31.4S, v0.4S }, [sp]
4130
4131 ld2 { v0.2D, v1.2D }, [x0]
4132 ld2 { v31.2D, v0.2D }, [sp]
4133
4134 ld1 { v0.8B, v1.8B }, [x0]
4135 ld1 { v31.8B, v0.8B }, [sp]
4136 ld1 { v0.16B, v1.16B }, [x0]
4137 ld1 { v31.16B, v0.16B }, [sp]
4138
4139 ld1 { v0.4H, v1.4H }, [x0]
4140 ld1 { v31.4H, v0.4H }, [sp]
4141 ld1 { v0.8H, v1.8H }, [x0]
4142 ld1 { v31.8H, v0.8H }, [sp]
4143
4144 ld1 { v0.2S, v1.2S }, [x0]
4145 ld1 { v31.2S, v0.2S }, [sp]
4146 ld1 { v0.4S, v1.4S }, [x0]
4147 ld1 { v31.4S, v0.4S }, [sp]
4148
4149 ld1 { v0.2D, v1.2D }, [x0]
4150 ld1 { v31.2D, v0.2D }, [sp]
4151
4152
4153 ;
4154 ; Advanced SIMD load/store multiple structures, post-indexed register
4155 ;
4156
4157 st4 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0], x1
4158 st4 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp], x30
4159 st4 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0], x1
4160 st4 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp], x30
4161
4162 st4 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0], x1
4163 st4 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp], x30
4164 st4 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0], x1
4165 st4 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp], x30
4166
4167 st4 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0], x1
4168 st4 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp], x30
4169 st4 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0], x1
4170 st4 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp], x30
4171
4172 st4 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0], x1
4173 st4 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp], x30
4174
4175 st1 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0], x1
4176 st1 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp], x30
4177 st1 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0], x1
4178 st1 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp], x30
4179
4180 st1 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0], x1
4181 st1 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp], x30
4182 st1 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0], x1
4183 st1 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp], x30
4184
4185 st1 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0], x1
4186 st1 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp], x30
4187 st1 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0], x1
4188 st1 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp], x30
4189
4190 st1 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0], x1
4191 st1 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp], x30
4192
4193 st3 { v0.8B, v1.8B, v2.8B }, [x0], x1
4194 st3 { v31.8B, v0.8B, v1.8B }, [sp], x30
4195 st3 { v0.16B, v1.16B, v2.16B }, [x0], x1
4196 st3 { v31.16B, v0.16B, v1.16B }, [sp], x30
4197
4198 st3 { v0.4H, v1.4H, v2.4H }, [x0], x1
4199 st3 { v31.4H, v0.4H, v1.4H }, [sp], x30
4200 st3 { v0.8H, v1.8H, v2.8H }, [x0], x1
4201 st3 { v31.8H, v0.8H, v1.8H }, [sp], x30
4202
4203 st3 { v0.2S, v1.2S, v2.2S }, [x0], x1
4204 st3 { v31.2S, v0.2S, v1.2S }, [sp], x30
4205 st3 { v0.4S, v1.4S, v2.4S }, [x0], x1
4206 st3 { v31.4S, v0.4S, v1.4S }, [sp], x30
4207
4208 st3 { v0.2D, v1.2D, v2.2D }, [x0], x1
4209 st3 { v31.2D, v0.2D, v1.2D }, [sp], x30
4210
4211 st1 { v0.8B, v1.8B, v2.8B }, [x0], x1
4212 st1 { v31.8B, v0.8B, v1.8B }, [sp], x30
4213 st1 { v0.16B, v1.16B, v2.16B }, [x0], x1
4214 st1 { v31.16B, v0.16B, v1.16B }, [sp], x30
4215
4216 st1 { v0.4H, v1.4H, v2.4H }, [x0], x1
4217 st1 { v31.4H, v0.4H, v1.4H }, [sp], x30
4218 st1 { v0.8H, v1.8H, v2.8H }, [x0], x1
4219 st1 { v31.8H, v0.8H, v1.8H }, [sp], x30
4220
4221 st1 { v0.2S, v1.2S, v2.2S }, [x0], x1
4222 st1 { v31.2S, v0.2S, v1.2S }, [sp], x30
4223 st1 { v0.4S, v1.4S, v2.4S }, [x0], x1
4224 st1 { v31.4S, v0.4S, v1.4S }, [sp], x30
4225
4226 st1 { v0.2D, v1.2D, v2.2D }, [x0], x1
4227 st1 { v31.2D, v0.2D, v1.2D }, [sp], x30
4228
4229 st1 { v0.8B }, [x0], x1
4230 st1 { v31.8B }, [sp], x30
4231 st1 { v0.16B }, [x0], x1
4232 st1 { v31.16B }, [sp], x30
4233
4234 st1 { v0.4H }, [x0], x1
4235 st1 { v31.4H }, [sp], x30
4236 st1 { v0.8H }, [x0], x1
4237 st1 { v31.8H }, [sp], x30
4238
4239 st1 { v0.2S }, [x0], x1
4240 st1 { v31.2S }, [sp], x30
4241 st1 { v0.4S }, [x0], x1
4242 st1 { v31.4S }, [sp], x30
4243
4244 st1 { v0.2D }, [x0], x1
4245 st1 { v31.2D }, [sp], x30
4246
4247 st2 { v0.8B, v1.8B }, [x0], x1
4248 st2 { v31.8B, v0.8B }, [sp], x30
4249 st2 { v0.16B, v1.16B }, [x0], x1
4250 st2 { v31.16B, v0.16B }, [sp], x30
4251
4252 st2 { v0.4H, v1.4H }, [x0], x1
4253 st2 { v31.4H, v0.4H }, [sp], x30
4254 st2 { v0.8H, v1.8H }, [x0], x1
4255 st2 { v31.8H, v0.8H }, [sp], x30
4256
4257 st2 { v0.2S, v1.2S }, [x0], x1
4258 st2 { v31.2S, v0.2S }, [sp], x30
4259 st2 { v0.4S, v1.4S }, [x0], x1
4260 st2 { v31.4S, v0.4S }, [sp], x30
4261
4262 st2 { v0.2D, v1.2D }, [x0], x1
4263 st2 { v31.2D, v0.2D }, [sp], x30
4264
4265 st1 { v0.8B, v1.8B }, [x0], x1
4266 st1 { v31.8B, v0.8B }, [sp], x30
4267 st1 { v0.16B, v1.16B }, [x0], x1
4268 st1 { v31.16B, v0.16B }, [sp], x30
4269
4270 st1 { v0.4H, v1.4H }, [x0], x1
4271 st1 { v31.4H, v0.4H }, [sp], x30
4272 st1 { v0.8H, v1.8H }, [x0], x1
4273 st1 { v31.8H, v0.8H }, [sp], x30
4274
4275 st1 { v0.2S, v1.2S }, [x0], x1
4276 st1 { v31.2S, v0.2S }, [sp], x30
4277 st1 { v0.4S, v1.4S }, [x0], x1
4278 st1 { v31.4S, v0.4S }, [sp], x30
4279
4280 st1 { v0.2D, v1.2D }, [x0], x1
4281 st1 { v31.2D, v0.2D }, [sp], x30
4282
4283
4284 ld4 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0], x1
4285 ld4 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp], x30
4286 ld4 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0], x1
4287 ld4 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp], x30
4288
4289 ld4 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0], x1
4290 ld4 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp], x30
4291 ld4 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0], x1
4292 ld4 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp], x30
4293
4294 ld4 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0], x1
4295 ld4 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp], x30
4296 ld4 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0], x1
4297 ld4 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp], x30
4298
4299 ld4 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0], x1
4300 ld4 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp], x30
4301
4302 ld1 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0], x1
4303 ld1 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp], x30
4304 ld1 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0], x1
4305 ld1 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp], x30
4306
4307 ld1 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0], x1
4308 ld1 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp], x30
4309 ld1 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0], x1
4310 ld1 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp], x30
4311
4312 ld1 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0], x1
4313 ld1 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp], x30
4314 ld1 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0], x1
4315 ld1 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp], x30
4316
4317 ld1 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0], x1
4318 ld1 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp], x30
4319
4320 ld3 { v0.8B, v1.8B, v2.8B }, [x0], x1
4321 ld3 { v31.8B, v0.8B, v1.8B }, [sp], x30
4322 ld3 { v0.16B, v1.16B, v2.16B }, [x0], x1
4323 ld3 { v31.16B, v0.16B, v1.16B }, [sp], x30
4324
4325 ld3 { v0.4H, v1.4H, v2.4H }, [x0], x1
4326 ld3 { v31.4H, v0.4H, v1.4H }, [sp], x30
4327 ld3 { v0.8H, v1.8H, v2.8H }, [x0], x1
4328 ld3 { v31.8H, v0.8H, v1.8H }, [sp], x30
4329
4330 ld3 { v0.2S, v1.2S, v2.2S }, [x0], x1
4331 ld3 { v31.2S, v0.2S, v1.2S }, [sp], x30
4332 ld3 { v0.4S, v1.4S, v2.4S }, [x0], x1
4333 ld3 { v31.4S, v0.4S, v1.4S }, [sp], x30
4334
4335 ld3 { v0.2D, v1.2D, v2.2D }, [x0], x1
4336 ld3 { v31.2D, v0.2D, v1.2D }, [sp], x30
4337
4338 ld1 { v0.8B, v1.8B, v2.8B }, [x0], x1
4339 ld1 { v31.8B, v0.8B, v1.8B }, [sp], x30
4340 ld1 { v0.16B, v1.16B, v2.16B }, [x0], x1
4341 ld1 { v31.16B, v0.16B, v1.16B }, [sp], x30
4342
4343 ld1 { v0.4H, v1.4H, v2.4H }, [x0], x1
4344 ld1 { v31.4H, v0.4H, v1.4H }, [sp], x30
4345 ld1 { v0.8H, v1.8H, v2.8H }, [x0], x1
4346 ld1 { v31.8H, v0.8H, v1.8H }, [sp], x30
4347
4348 ld1 { v0.2S, v1.2S, v2.2S }, [x0], x1
4349 ld1 { v31.2S, v0.2S, v1.2S }, [sp], x30
4350 ld1 { v0.4S, v1.4S, v2.4S }, [x0], x1
4351 ld1 { v31.4S, v0.4S, v1.4S }, [sp], x30
4352
4353 ld1 { v0.2D, v1.2D, v2.2D }, [x0], x1
4354 ld1 { v31.2D, v0.2D, v1.2D }, [sp], x30
4355
4356 ld1 { v0.8B }, [x0], x1
4357 ld1 { v31.8B }, [sp], x30
4358 ld1 { v0.16B }, [x0], x1
4359 ld1 { v31.16B }, [sp], x30
4360
4361 ld1 { v0.4H }, [x0], x1
4362 ld1 { v31.4H }, [sp], x30
4363 ld1 { v0.8H }, [x0], x1
4364 ld1 { v31.8H }, [sp], x30
4365
4366 ld1 { v0.2S }, [x0], x1
4367 ld1 { v31.2S }, [sp], x30
4368 ld1 { v0.4S }, [x0], x1
4369 ld1 { v31.4S }, [sp], x30
4370
4371 ld1 { v0.2D }, [x0], x1
4372 ld1 { v31.2D }, [sp], x30
4373
4374 ld2 { v0.8B, v1.8B }, [x0], x1
4375 ld2 { v31.8B, v0.8B }, [sp], x30
4376 ld2 { v0.16B, v1.16B }, [x0], x1
4377 ld2 { v31.16B, v0.16B }, [sp], x30
4378
4379 ld2 { v0.4H, v1.4H }, [x0], x1
4380 ld2 { v31.4H, v0.4H }, [sp], x30
4381 ld2 { v0.8H, v1.8H }, [x0], x1
4382 ld2 { v31.8H, v0.8H }, [sp], x30
4383
4384 ld2 { v0.2S, v1.2S }, [x0], x1
4385 ld2 { v31.2S, v0.2S }, [sp], x30
4386 ld2 { v0.4S, v1.4S }, [x0], x1
4387 ld2 { v31.4S, v0.4S }, [sp], x30
4388
4389 ld2 { v0.2D, v1.2D }, [x0], x1
4390 ld2 { v31.2D, v0.2D }, [sp], x30
4391
4392 ld1 { v0.8B, v1.8B }, [x0], x1
4393 ld1 { v31.8B, v0.8B }, [sp], x30
4394 ld1 { v0.16B, v1.16B }, [x0], x1
4395 ld1 { v31.16B, v0.16B }, [sp], x30
4396
4397 ld1 { v0.4H, v1.4H }, [x0], x1
4398 ld1 { v31.4H, v0.4H }, [sp], x30
4399 ld1 { v0.8H, v1.8H }, [x0], x1
4400 ld1 { v31.8H, v0.8H }, [sp], x30
4401
4402 ld1 { v0.2S, v1.2S }, [x0], x1
4403 ld1 { v31.2S, v0.2S }, [sp], x30
4404 ld1 { v0.4S, v1.4S }, [x0], x1
4405 ld1 { v31.4S, v0.4S }, [sp], x30
4406
4407 ld1 { v0.2D, v1.2D }, [x0], x1
4408 ld1 { v31.2D, v0.2D }, [sp], x30
4409
4410
4411 ;
4412 ; Advanced SIMD load/store multiple structures, post-indexed immediate
4413 ;
4414
4415 st4 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0], #32
4416 st4 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp], #32
4417 st4 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0], #64
4418 st4 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp], #64
4419
4420 st4 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0], #32
4421 st4 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp], #32
4422 st4 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0], #64
4423 st4 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp], #64
4424
4425 st4 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0], #32
4426 st4 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp], #32
4427 st4 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0], #64
4428 st4 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp], #64
4429
4430 st4 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0], #64
4431 st4 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp], #64
4432
4433 st1 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0], #32
4434 st1 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp], #32
4435 st1 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0], #64
4436 st1 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp], #64
4437
4438 st1 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0], #32
4439 st1 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp], #32
4440 st1 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0], #64
4441 st1 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp], #64
4442
4443 st1 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0], #32
4444 st1 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp], #32
4445 st1 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0], #64
4446 st1 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp], #64
4447
4448 st1 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0], #64
4449 st1 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp], #64
4450
4451 st3 { v0.8B, v1.8B, v2.8B }, [x0], #24
4452 st3 { v31.8B, v0.8B, v1.8B }, [sp], #24
4453 st3 { v0.16B, v1.16B, v2.16B }, [x0], #48
4454 st3 { v31.16B, v0.16B, v1.16B }, [sp], #48
4455
4456 st3 { v0.4H, v1.4H, v2.4H }, [x0], #24
4457 st3 { v31.4H, v0.4H, v1.4H }, [sp], #24
4458 st3 { v0.8H, v1.8H, v2.8H }, [x0], #48
4459 st3 { v31.8H, v0.8H, v1.8H }, [sp], #48
4460
4461 st3 { v0.2S, v1.2S, v2.2S }, [x0], #24
4462 st3 { v31.2S, v0.2S, v1.2S }, [sp], #24
4463 st3 { v0.4S, v1.4S, v2.4S }, [x0], #48
4464 st3 { v31.4S, v0.4S, v1.4S }, [sp], #48
4465
4466 st3 { v0.2D, v1.2D, v2.2D }, [x0], #48
4467 st3 { v31.2D, v0.2D, v1.2D }, [sp], #48
4468
4469 st1 { v0.8B, v1.8B, v2.8B }, [x0], #24
4470 st1 { v31.8B, v0.8B, v1.8B }, [sp], #24
4471 st1 { v0.16B, v1.16B, v2.16B }, [x0], #48
4472 st1 { v31.16B, v0.16B, v1.16B }, [sp], #48
4473
4474 st1 { v0.4H, v1.4H, v2.4H }, [x0], #24
4475 st1 { v31.4H, v0.4H, v1.4H }, [sp], #24
4476 st1 { v0.8H, v1.8H, v2.8H }, [x0], #48
4477 st1 { v31.8H, v0.8H, v1.8H }, [sp], #48
4478
4479 st1 { v0.2S, v1.2S, v2.2S }, [x0], #24
4480 st1 { v31.2S, v0.2S, v1.2S }, [sp], #24
4481 st1 { v0.4S, v1.4S, v2.4S }, [x0], #48
4482 st1 { v31.4S, v0.4S, v1.4S }, [sp], #48
4483
4484 st1 { v0.2D, v1.2D, v2.2D }, [x0], #48
4485 st1 { v31.2D, v0.2D, v1.2D }, [sp], #48
4486
4487 st1 { v0.8B }, [x0], #8
4488 st1 { v31.8B }, [sp], #8
4489 st1 { v0.16B }, [x0], #16
4490 st1 { v31.16B }, [sp], #16
4491
4492 st1 { v0.4H }, [x0], #8
4493 st1 { v31.4H }, [sp], #8
4494 st1 { v0.8H }, [x0], #16
4495 st1 { v31.8H }, [sp], #16
4496
4497 st1 { v0.2S }, [x0], #8
4498 st1 { v31.2S }, [sp], #8
4499 st1 { v0.4S }, [x0], #16
4500 st1 { v31.4S }, [sp], #16
4501
4502 st1 { v0.2D }, [x0], #16
4503 st1 { v31.2D }, [sp], #16
4504
4505 st2 { v0.8B, v1.8B }, [x0], #16
4506 st2 { v31.8B, v0.8B }, [sp], #16
4507 st2 { v0.16B, v1.16B }, [x0], #32
4508 st2 { v31.16B, v0.16B }, [sp], #32
4509
4510 st2 { v0.4H, v1.4H }, [x0], #16
4511 st2 { v31.4H, v0.4H }, [sp], #16
4512 st2 { v0.8H, v1.8H }, [x0], #32
4513 st2 { v31.8H, v0.8H }, [sp], #32
4514
4515 st2 { v0.2S, v1.2S }, [x0], #16
4516 st2 { v31.2S, v0.2S }, [sp], #16
4517 st2 { v0.4S, v1.4S }, [x0], #32
4518 st2 { v31.4S, v0.4S }, [sp], #32
4519
4520 st2 { v0.2D, v1.2D }, [x0], #32
4521 st2 { v31.2D, v0.2D }, [sp], #32
4522
4523 st1 { v0.8B, v1.8B }, [x0], #16
4524 st1 { v31.8B, v0.8B }, [sp], #16
4525 st1 { v0.16B, v1.16B }, [x0], #32
4526 st1 { v31.16B, v0.16B }, [sp], #32
4527
4528 st1 { v0.4H, v1.4H }, [x0], #16
4529 st1 { v31.4H, v0.4H }, [sp], #16
4530 st1 { v0.8H, v1.8H }, [x0], #32
4531 st1 { v31.8H, v0.8H }, [sp], #32
4532
4533 st1 { v0.2S, v1.2S }, [x0], #16
4534 st1 { v31.2S, v0.2S }, [sp], #16
4535 st1 { v0.4S, v1.4S }, [x0], #32
4536 st1 { v31.4S, v0.4S }, [sp], #32
4537
4538 st1 { v0.2D, v1.2D }, [x0], #32
4539 st1 { v31.2D, v0.2D }, [sp], #32
4540
4541
4542 ld4 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0], #32
4543 ld4 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp], #32
4544 ld4 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0], #64
4545 ld4 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp], #64
4546
4547 ld4 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0], #32
4548 ld4 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp], #32
4549 ld4 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0], #64
4550 ld4 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp], #64
4551
4552 ld4 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0], #32
4553 ld4 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp], #32
4554 ld4 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0], #64
4555 ld4 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp], #64
4556
4557 ld4 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0], #64
4558 ld4 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp], #64
4559
4560 ld1 { v0.8B, v1.8B, v2.8B, v3.8B }, [x0], #32
4561 ld1 { v31.8B, v0.8B, v1.8B, v2.8B }, [sp], #32
4562 ld1 { v0.16B, v1.16B, v2.16B, v3.16B }, [x0], #64
4563 ld1 { v31.16B, v0.16B, v1.16B, v2.16B }, [sp], #64
4564
4565 ld1 { v0.4H, v1.4H, v2.4H, v3.4H }, [x0], #32
4566 ld1 { v31.4H, v0.4H, v1.4H, v2.4H }, [sp], #32
4567 ld1 { v0.8H, v1.8H, v2.8H, v3.8H }, [x0], #64
4568 ld1 { v31.8H, v0.8H, v1.8H, v2.8H }, [sp], #64
4569
4570 ld1 { v0.2S, v1.2S, v2.2S, v3.2S }, [x0], #32
4571 ld1 { v31.2S, v0.2S, v1.2S, v2.2S }, [sp], #32
4572 ld1 { v0.4S, v1.4S, v2.4S, v3.4S }, [x0], #64
4573 ld1 { v31.4S, v0.4S, v1.4S, v2.4S }, [sp], #64
4574
4575 ld1 { v0.2D, v1.2D, v2.2D, v3.2D }, [x0], #64
4576 ld1 { v31.2D, v0.2D, v1.2D, v2.2D }, [sp], #64
4577
4578 ld3 { v0.8B, v1.8B, v2.8B }, [x0], #24
4579 ld3 { v31.8B, v0.8B, v1.8B }, [sp], #24
4580 ld3 { v0.16B, v1.16B, v2.16B }, [x0], #48
4581 ld3 { v31.16B, v0.16B, v1.16B }, [sp], #48
4582
4583 ld3 { v0.4H, v1.4H, v2.4H }, [x0], #24
4584 ld3 { v31.4H, v0.4H, v1.4H }, [sp], #24
4585 ld3 { v0.8H, v1.8H, v2.8H }, [x0], #48
4586 ld3 { v31.8H, v0.8H, v1.8H }, [sp], #48
4587
4588 ld3 { v0.2S, v1.2S, v2.2S }, [x0], #24
4589 ld3 { v31.2S, v0.2S, v1.2S }, [sp], #24
4590 ld3 { v0.4S, v1.4S, v2.4S }, [x0], #48
4591 ld3 { v31.4S, v0.4S, v1.4S }, [sp], #48
4592
4593 ld3 { v0.2D, v1.2D, v2.2D }, [x0], #48
4594 ld3 { v31.2D, v0.2D, v1.2D }, [sp], #48
4595
4596 ld1 { v0.8B, v1.8B, v2.8B }, [x0], #24
4597 ld1 { v31.8B, v0.8B, v1.8B }, [sp], #24
4598 ld1 { v0.16B, v1.16B, v2.16B }, [x0], #48
4599 ld1 { v31.16B, v0.16B, v1.16B }, [sp], #48
4600
4601 ld1 { v0.4H, v1.4H, v2.4H }, [x0], #24
4602 ld1 { v31.4H, v0.4H, v1.4H }, [sp], #24
4603 ld1 { v0.8H, v1.8H, v2.8H }, [x0], #48
4604 ld1 { v31.8H, v0.8H, v1.8H }, [sp], #48
4605
4606 ld1 { v0.2S, v1.2S, v2.2S }, [x0], #24
4607 ld1 { v31.2S, v0.2S, v1.2S }, [sp], #24
4608 ld1 { v0.4S, v1.4S, v2.4S }, [x0], #48
4609 ld1 { v31.4S, v0.4S, v1.4S }, [sp], #48
4610
4611 ld1 { v0.2D, v1.2D, v2.2D }, [x0], #48
4612 ld1 { v31.2D, v0.2D, v1.2D }, [sp], #48
4613
4614 ld1 { v0.8B }, [x0], #8
4615 ld1 { v31.8B }, [sp], #8
4616 ld1 { v0.16B }, [x0], #16
4617 ld1 { v31.16B }, [sp], #16
4618
4619 ld1 { v0.4H }, [x0], #8
4620 ld1 { v31.4H }, [sp], #8
4621 ld1 { v0.8H }, [x0], #16
4622 ld1 { v31.8H }, [sp], #16
4623
4624 ld1 { v0.2S }, [x0], #8
4625 ld1 { v31.2S }, [sp], #8
4626 ld1 { v0.4S }, [x0], #16
4627 ld1 { v31.4S }, [sp], #16
4628
4629 ld1 { v0.2D }, [x0], #16
4630 ld1 { v31.2D }, [sp], #16
4631
4632 ld2 { v0.8B, v1.8B }, [x0], #16
4633 ld2 { v31.8B, v0.8B }, [sp], #16
4634 ld2 { v0.16B, v1.16B }, [x0], #32
4635 ld2 { v31.16B, v0.16B }, [sp], #32
4636
4637 ld2 { v0.4H, v1.4H }, [x0], #16
4638 ld2 { v31.4H, v0.4H }, [sp], #16
4639 ld2 { v0.8H, v1.8H }, [x0], #32
4640 ld2 { v31.8H, v0.8H }, [sp], #32
4641
4642 ld2 { v0.2S, v1.2S }, [x0], #16
4643 ld2 { v31.2S, v0.2S }, [sp], #16
4644 ld2 { v0.4S, v1.4S }, [x0], #32
4645 ld2 { v31.4S, v0.4S }, [sp], #32
4646
4647 ld2 { v0.2D, v1.2D }, [x0], #32
4648 ld2 { v31.2D, v0.2D }, [sp], #32
4649
4650 ld1 { v0.8B, v1.8B }, [x0], #16
4651 ld1 { v31.8B, v0.8B }, [sp], #16
4652 ld1 { v0.16B, v1.16B }, [x0], #32
4653 ld1 { v31.16B, v0.16B }, [sp], #32
4654
4655 ld1 { v0.4H, v1.4H }, [x0], #16
4656 ld1 { v31.4H, v0.4H }, [sp], #16
4657 ld1 { v0.8H, v1.8H }, [x0], #32
4658 ld1 { v31.8H, v0.8H }, [sp], #32
4659
4660 ld1 { v0.2S, v1.2S }, [x0], #16
4661 ld1 { v31.2S, v0.2S }, [sp], #16
4662 ld1 { v0.4S, v1.4S }, [x0], #32
4663 ld1 { v31.4S, v0.4S }, [sp], #32
4664
4665 ld1 { v0.2D, v1.2D }, [x0], #32
4666 ld1 { v31.2D, v0.2D }, [sp], #32
4667
4668
4669 ;
4670 ; RCW compare and swap
4671 ;
4672 ;.cpu generic+the+d128
4673
4674 ;rcwcas x0, x1, [x3] - Requires FEAT_THE
4675 ;rcwcas xzr, xzr, [sp] - Requires FEAT_THE
4676
4677 ;rcwcasl x0, x1, [x3] - Requires FEAT_THE
4678 ;rcwcasl xzr, xzr, [sp] - Requires FEAT_THE
4679
4680 ;rcwcasa x0, x1, [x3] - Requires FEAT_THE
4681 ;rcwcasa xzr, xzr, [sp] - Requires FEAT_THE
4682
4683 ;rcwcasal x0, x1, [x3] - Requires FEAT_THE
4684 ;rcwcasal xzr, xzr, [sp] - Requires FEAT_THE
4685
4686 ;rcwscas x0, x1, [x3] - Requires FEAT_THE
4687 ;rcwscas xzr, xzr, [sp] - Requires FEAT_THE
4688
4689 ;rcwscasl x0, x1, [x3] - Requires FEAT_THE
4690 ;rcwscasl xzr, xzr, [sp] - Requires FEAT_THE
4691
4692 ;rcwscasa x0, x1, [x3] - Requires FEAT_THE
4693 ;rcwscasa xzr, xzr, [sp] - Requires FEAT_THE
4694
4695 ;rcwscasal x0, x1, [x3] - Requires FEAT_THE
4696 ;rcwscasal xzr, xzr, [sp] - Requires FEAT_THE
4697
4698 ;
4699 ; RCW compare and swap pair
4700 ;
4701
4702 ;rcwcasp x0, x1, x2, x3, [x4] - Requires FEAT_THE && FEAT_D128
4703 ;rcwcasp x0, x1, x2, x3, [sp] - Requires FEAT_THE && FEAT_D128
4704
4705 ;rcwcaspl x0, x1, x2, x3, [x4] - Requires FEAT_THE && FEAT_D128
4706 ;rcwcaspl x0, x1, x2, x3, [sp] - Requires FEAT_THE && FEAT_D128
4707
4708 ;rcwcaspa x0, x1, x2, x3, [x3] - Requires FEAT_THE && FEAT_D128
4709 ;rcwcaspa x0, x1, x2, x3, [sp] - Requires FEAT_THE && FEAT_D128
4710
4711 ;rcwcaspal x0, x1, x2, x3, [x3] - Requires FEAT_THE && FEAT_D128
4712 ;rcwcaspal x0, x1, x2, x3, [sp] - Requires FEAT_THE && FEAT_D128
4713
4714 ;rcwscasp x0, x1, x2, x3, [x3] - Requires FEAT_THE && FEAT_D128
4715 ;rcwscasp x0, x1, x2, x3, [sp] - Requires FEAT_THE && FEAT_D128
4716
4717 ;rcwscaspl x0, x1, x2, x3, [x3] - Requires FEAT_THE && FEAT_D128
4718 ;rcwscaspl x0, x1, x2, x3, [sp] - Requires FEAT_THE && FEAT_D128
4719
4720 ;rcwscaspa x0, x1, x2, x3, [x3] - Requires FEAT_THE && FEAT_D128
4721 ;rcwscaspa x0, x1, x2, x3, [sp] - Requires FEAT_THE && FEAT_D128
4722
4723 ;rcwscaspal x0, x1, x2, x3, [x3] - Requires FEAT_THE && FEAT_D128
4724 ;rcwscaspal x0, x1, x2, x3, [sp] - Requires FEAT_THE && FEAT_D128
4725
4726 ;
4727 ; Keep last so the testcase can catch errors in
4728 ; the disassembly of the last instruction.
4729 ;
4730 nop
4731
4732.private_extern _TestProcA64_EndProc
4733_TestProcA64_EndProc:
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