1 | /* $Id: pipe-posix.cpp 29559 2010-05-17 15:07:02Z vboxsync $ */
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2 | /** @file
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3 | * IPRT - Anonymous Pipes, POSIX Implementation.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2010 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * The contents of this file may alternatively be used under the terms
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18 | * of the Common Development and Distribution License Version 1.0
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19 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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20 | * VirtualBox OSE distribution, in which case the provisions of the
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21 | * CDDL are applicable instead of those of the GPL.
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22 | *
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23 | * You may elect to license modified versions of this file under the
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24 | * terms and conditions of either the GPL or the CDDL or both.
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25 | */
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26 |
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27 |
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28 | /*******************************************************************************
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29 | * Header Files *
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30 | *******************************************************************************/
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31 | #include <iprt/pipe.h>
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32 | #include "internal/iprt.h"
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33 |
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34 | #include <iprt/asm.h>
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35 | #include <iprt/assert.h>
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36 | #include <iprt/err.h>
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37 | #include <iprt/mem.h>
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38 | #include <iprt/string.h>
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39 | #include <iprt/thread.h>
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40 | #include "internal/magics.h"
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41 |
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42 | #include <errno.h>
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43 | #include <fcntl.h>
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44 | #include <limits.h>
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45 | #include <unistd.h>
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46 | #include <sys/poll.h>
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47 | #include <sys/stat.h>
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48 | #include <signal.h>
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49 |
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50 |
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51 | /*******************************************************************************
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52 | * Structures and Typedefs *
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53 | *******************************************************************************/
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54 | typedef struct RTPIPEINTERNAL
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55 | {
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56 | /** Magic value (RTPIPE_MAGIC). */
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57 | uint32_t u32Magic;
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58 | /** The file descriptor. */
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59 | int fd;
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60 | /** Set if this is the read end, clear if it's the write end. */
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61 | bool fRead;
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62 | /** Atomically operated state variable.
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63 | *
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64 | * - Bits 0 thru 29 - Users of the new mode.
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65 | * - Bit 30 - The pipe mode, set indicates blocking.
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66 | * - Bit 31 - Set when we're switching the mode.
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67 | */
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68 | uint32_t volatile u32State;
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69 | } RTPIPEINTERNAL;
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70 |
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71 |
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72 | /*******************************************************************************
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73 | * Defined Constants And Macros *
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74 | *******************************************************************************/
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75 | /** @name RTPIPEINTERNAL::u32State defines
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76 | * @{ */
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77 | #define RTPIPE_POSIX_BLOCKING UINT32_C(0x40000000)
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78 | #define RTPIPE_POSIX_SWITCHING UINT32_C(0x80000000)
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79 | #define RTPIPE_POSIX_SWITCHING_BIT 31
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80 | #define RTPIPE_POSIX_USERS_MASK UINT32_C(0x3fffffff)
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81 | /** @} */
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82 |
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83 |
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84 | RTDECL(int) RTPipeCreate(PRTPIPE phPipeRead, PRTPIPE phPipeWrite, uint32_t fFlags)
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85 | {
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86 | AssertPtrReturn(phPipeRead, VERR_INVALID_POINTER);
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87 | AssertPtrReturn(phPipeWrite, VERR_INVALID_POINTER);
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88 | AssertReturn(!(fFlags & ~RTPIPE_C_VALID_MASK), VERR_INVALID_PARAMETER);
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89 |
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90 | /*
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91 | * Create the pipe and set the close-on-exec flag if requested.
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92 | */
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93 | int aFds[2] = {-1, -1};
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94 | if (pipe(aFds))
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95 | return RTErrConvertFromErrno(errno);
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96 |
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97 | int rc = VINF_SUCCESS;
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98 | if (!(fFlags & RTPIPE_C_INHERIT_READ))
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99 | {
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100 | if (fcntl(aFds[0], F_SETFD, FD_CLOEXEC))
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101 | rc = RTErrConvertFromErrno(errno);
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102 | }
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103 |
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104 | if (!(fFlags & RTPIPE_C_INHERIT_WRITE))
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105 | {
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106 | if (fcntl(aFds[1], F_SETFD, FD_CLOEXEC))
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107 | rc = RTErrConvertFromErrno(errno);
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108 | }
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109 |
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110 | if (RT_SUCCESS(rc))
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111 | {
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112 | /*
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113 | * Create the two handles.
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114 | */
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115 | RTPIPEINTERNAL *pThisR = (RTPIPEINTERNAL *)RTMemAlloc(sizeof(RTPIPEINTERNAL));
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116 | if (pThisR)
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117 | {
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118 | RTPIPEINTERNAL *pThisW = (RTPIPEINTERNAL *)RTMemAlloc(sizeof(RTPIPEINTERNAL));
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119 | if (pThisW)
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120 | {
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121 | pThisR->u32Magic = RTPIPE_MAGIC;
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122 | pThisW->u32Magic = RTPIPE_MAGIC;
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123 | pThisR->fd = aFds[0];
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124 | pThisW->fd = aFds[1];
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125 | pThisR->fRead = true;
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126 | pThisW->fRead = false;
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127 | pThisR->u32State = RTPIPE_POSIX_BLOCKING;
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128 | pThisW->u32State = RTPIPE_POSIX_BLOCKING;
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129 |
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130 | *phPipeRead = pThisR;
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131 | *phPipeWrite = pThisW;
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132 |
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133 | /*
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134 | * Before we leave, make sure to shut up SIGPIPE.
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135 | */
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136 | signal(SIGPIPE, SIG_IGN);
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137 | return VINF_SUCCESS;
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138 | }
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139 |
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140 | RTMemFree(pThisR);
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141 | rc = VERR_NO_MEMORY;
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142 | }
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143 | else
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144 | rc = VERR_NO_MEMORY;
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145 | }
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146 |
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147 | close(aFds[0]);
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148 | close(aFds[1]);
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149 | return rc;
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150 | }
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151 |
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152 |
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153 | RTDECL(int) RTPipeClose(RTPIPE hPipe)
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154 | {
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155 | RTPIPEINTERNAL *pThis = hPipe;
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156 | if (pThis == NIL_RTPIPE)
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157 | return VINF_SUCCESS;
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158 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
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159 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
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160 |
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161 | /*
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162 | * Do the cleanup.
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163 | */
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164 | AssertReturn(ASMAtomicCmpXchgU32(&pThis->u32Magic, ~RTPIPE_MAGIC, RTPIPE_MAGIC), VERR_INVALID_HANDLE);
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165 |
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166 | int fd = pThis->fd;
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167 | pThis->fd = -1;
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168 | close(fd);
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169 |
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170 | if (ASMAtomicReadU32(&pThis->u32State) & RTPIPE_POSIX_USERS_MASK)
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171 | {
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172 | AssertFailed();
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173 | RTThreadSleep(1);
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174 | }
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175 |
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176 | RTMemFree(pThis);
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177 |
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178 | return VINF_SUCCESS;
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179 | }
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180 |
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181 | RTDECL(int) RTPipeFromNative(PRTPIPE phPipe, RTHCINTPTR hNativePipe, uint32_t fFlags)
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182 | {
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183 | AssertPtrReturn(phPipe, VERR_INVALID_POINTER);
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184 | AssertReturn(!(fFlags & ~RTPIPE_N_VALID_MASK), VERR_INVALID_PARAMETER);
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185 | AssertReturn(!!(fFlags & RTPIPE_N_READ) != !!(fFlags & RTPIPE_N_WRITE), VERR_INVALID_PARAMETER);
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186 |
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187 | /*
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188 | * Get and validate the pipe handle info.
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189 | */
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190 | int hNative = (int)hNativePipe;
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191 | struct stat st;
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192 | AssertReturn(fstat(hNative, &st) == 0, RTErrConvertFromErrno(errno));
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193 | AssertMsgReturn(S_ISFIFO(st.st_mode) || S_ISSOCK(st.st_mode), ("%#x (%o)\n", st.st_mode, st.st_mode), VERR_INVALID_HANDLE);
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194 |
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195 | int fFd = fcntl(hNative, F_GETFL, 0);
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196 | AssertReturn(fFd != -1, VERR_INVALID_HANDLE);
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197 | AssertMsgReturn( (fFd & O_ACCMODE) == (fFlags & RTPIPE_N_READ ? O_RDONLY : O_WRONLY)
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198 | || (fFd & O_ACCMODE) == O_RDWR /* Solaris creates bi-directional pipes. */
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199 | , ("%#x\n", fFd), VERR_INVALID_HANDLE);
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200 |
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201 | /*
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202 | * Create the handle.
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203 | */
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204 | RTPIPEINTERNAL *pThis = (RTPIPEINTERNAL *)RTMemAlloc(sizeof(RTPIPEINTERNAL));
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205 | if (!pThis)
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206 | return VERR_NO_MEMORY;
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207 |
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208 | pThis->u32Magic = RTPIPE_MAGIC;
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209 | pThis->fd = hNative;
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210 | pThis->fRead = !!(fFlags & RTPIPE_N_READ);
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211 | pThis->u32State = fFd & O_NONBLOCK ? 0 : RTPIPE_POSIX_BLOCKING;
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212 |
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213 | /*
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214 | * Fix up inheritability and shut up SIGPIPE and we're done.
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215 | */
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216 | if (fcntl(hNative, F_SETFD, fFlags & RTPIPE_N_INHERIT ? 0 : FD_CLOEXEC) == 0)
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217 | {
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218 | signal(SIGPIPE, SIG_IGN);
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219 | *phPipe = pThis;
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220 | return VINF_SUCCESS;
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221 | }
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222 |
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223 | int rc = RTErrConvertFromErrno(errno);
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224 | RTMemFree(pThis);
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225 | return rc;
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226 | }
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227 |
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228 |
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229 | RTDECL(RTHCINTPTR) RTPipeToNative(RTPIPE hPipe)
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230 | {
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231 | RTPIPEINTERNAL *pThis = hPipe;
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232 | AssertPtrReturn(pThis, -1);
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233 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, -1);
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234 |
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235 | return pThis->fd;
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236 | }
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237 |
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238 |
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239 | /**
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240 | * Prepare blocking mode.
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241 | *
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242 | * @returns VINF_SUCCESS
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243 | * @retval VERR_WRONG_ORDER
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244 | * @retval VERR_INTERNAL_ERROR_4
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245 | *
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246 | * @param pThis The pipe handle.
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247 | */
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248 | static int rtPipeTryBlocking(RTPIPEINTERNAL *pThis)
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249 | {
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250 | /*
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251 | * Update the state.
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252 | */
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253 | for (;;)
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254 | {
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255 | uint32_t u32State = ASMAtomicReadU32(&pThis->u32State);
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256 | uint32_t const u32StateOld = u32State;
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257 | uint32_t const cUsers = (u32State & RTPIPE_POSIX_USERS_MASK);
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258 |
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259 | if (u32State & RTPIPE_POSIX_BLOCKING)
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260 | {
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261 | AssertReturn(cUsers < RTPIPE_POSIX_USERS_MASK / 2, VERR_INTERNAL_ERROR_4);
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262 | u32State &= ~RTPIPE_POSIX_USERS_MASK;
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263 | u32State |= cUsers + 1;
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264 | if (ASMAtomicCmpXchgU32(&pThis->u32State, u32State, u32StateOld))
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265 | {
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266 | if (u32State & RTPIPE_POSIX_SWITCHING)
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267 | break;
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268 | return VINF_SUCCESS;
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269 | }
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270 | }
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271 | else if (cUsers == 0)
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272 | {
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273 | u32State = 1 | RTPIPE_POSIX_SWITCHING | RTPIPE_POSIX_BLOCKING;
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274 | if (ASMAtomicCmpXchgU32(&pThis->u32State, u32State, u32StateOld))
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275 | break;
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276 | }
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277 | else
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278 | return VERR_WRONG_ORDER;
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279 | ASMNopPause();
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280 | }
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281 |
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282 | /*
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283 | * Do the switching.
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284 | */
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285 | int fFlags = fcntl(pThis->fd, F_GETFL, 0);
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286 | if (fFlags != -1)
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287 | {
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288 | if ( !(fFlags & O_NONBLOCK)
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289 | || fcntl(pThis->fd, F_SETFL, fFlags & ~O_NONBLOCK) != -1)
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290 | {
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291 | ASMAtomicBitClear(&pThis->u32State, RTPIPE_POSIX_SWITCHING_BIT);
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292 | return VINF_SUCCESS;
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293 | }
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294 | }
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295 |
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296 | ASMAtomicDecU32(&pThis->u32State);
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297 | return RTErrConvertFromErrno(errno);
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298 | }
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299 |
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300 |
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301 | /**
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302 | * Prepare non-blocking mode.
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303 | *
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304 | * @returns VINF_SUCCESS
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305 | * @retval VERR_WRONG_ORDER
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306 | * @retval VERR_INTERNAL_ERROR_4
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307 | *
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308 | * @param pThis The pipe handle.
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309 | */
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310 | static int rtPipeTryNonBlocking(RTPIPEINTERNAL *pThis)
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311 | {
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312 | /*
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313 | * Update the state.
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314 | */
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315 | for (;;)
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316 | {
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317 | uint32_t u32State = ASMAtomicReadU32(&pThis->u32State);
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318 | uint32_t const u32StateOld = u32State;
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319 | uint32_t const cUsers = (u32State & RTPIPE_POSIX_USERS_MASK);
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320 |
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321 | if (!(u32State & RTPIPE_POSIX_BLOCKING))
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322 | {
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323 | AssertReturn(cUsers < RTPIPE_POSIX_USERS_MASK / 2, VERR_INTERNAL_ERROR_4);
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324 | u32State &= ~RTPIPE_POSIX_USERS_MASK;
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325 | u32State |= cUsers + 1;
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326 | if (ASMAtomicCmpXchgU32(&pThis->u32State, u32State, u32StateOld))
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327 | {
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328 | if (u32State & RTPIPE_POSIX_SWITCHING)
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329 | break;
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330 | return VINF_SUCCESS;
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331 | }
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332 | }
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333 | else if (cUsers == 0)
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334 | {
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335 | u32State = 1 | RTPIPE_POSIX_SWITCHING;
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336 | if (ASMAtomicCmpXchgU32(&pThis->u32State, u32State, u32StateOld))
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337 | break;
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338 | }
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339 | else
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340 | return VERR_WRONG_ORDER;
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341 | ASMNopPause();
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342 | }
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343 |
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344 | /*
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345 | * Do the switching.
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346 | */
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347 | int fFlags = fcntl(pThis->fd, F_GETFL, 0);
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348 | if (fFlags != -1)
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349 | {
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350 | if ( (fFlags & O_NONBLOCK)
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351 | || fcntl(pThis->fd, F_SETFL, fFlags | O_NONBLOCK) != -1)
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352 | {
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353 | ASMAtomicBitClear(&pThis->u32State, RTPIPE_POSIX_SWITCHING_BIT);
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354 | return VINF_SUCCESS;
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355 | }
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356 | }
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357 |
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358 | ASMAtomicDecU32(&pThis->u32State);
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359 | return RTErrConvertFromErrno(errno);
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360 | }
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361 |
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362 |
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363 | /**
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364 | * Checks if the read pipe has a HUP condition.
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365 | *
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366 | * @returns true if HUP, false if no.
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367 | * @param pThis The pipe handle (read).
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368 | */
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369 | static bool rtPipePosixHasHup(RTPIPEINTERNAL *pThis)
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370 | {
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371 | Assert(pThis->fRead);
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372 |
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373 | struct pollfd PollFd;
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374 | RT_ZERO(PollFd);
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375 | PollFd.fd = pThis->fd;
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376 | PollFd.events = POLLHUP;
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377 | return poll(&PollFd, 1, 0) >= 1
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378 | && (PollFd.revents & POLLHUP);
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379 | }
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380 |
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381 |
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382 | RTDECL(int) RTPipeRead(RTPIPE hPipe, void *pvBuf, size_t cbToRead, size_t *pcbRead)
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383 | {
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384 | RTPIPEINTERNAL *pThis = hPipe;
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385 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
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386 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
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387 | AssertReturn(pThis->fRead, VERR_ACCESS_DENIED);
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388 | AssertPtr(pcbRead);
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389 | AssertPtr(pvBuf);
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390 |
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391 | int rc = rtPipeTryNonBlocking(pThis);
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392 | if (RT_SUCCESS(rc))
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393 | {
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394 | ssize_t cbRead = read(pThis->fd, pvBuf, RT_MIN(cbToRead, SSIZE_MAX));
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395 | if (cbRead >= 0)
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396 | {
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397 | if (cbRead || !cbToRead || !rtPipePosixHasHup(pThis))
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398 | *pcbRead = cbRead;
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399 | else
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400 | rc = VERR_BROKEN_PIPE;
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401 | }
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402 | else if (errno == EAGAIN)
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403 | {
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404 | *pcbRead = 0;
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405 | rc = VINF_TRY_AGAIN;
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406 | }
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407 | else
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408 | rc = RTErrConvertFromErrno(errno);
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409 |
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410 | ASMAtomicDecU32(&pThis->u32State);
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411 | }
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412 | return rc;
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413 | }
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414 |
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415 |
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416 | RTDECL(int) RTPipeReadBlocking(RTPIPE hPipe, void *pvBuf, size_t cbToRead, size_t *pcbRead)
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417 | {
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418 | RTPIPEINTERNAL *pThis = hPipe;
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419 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
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420 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
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421 | AssertReturn(pThis->fRead, VERR_ACCESS_DENIED);
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422 | AssertPtr(pvBuf);
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423 |
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424 | int rc = rtPipeTryBlocking(pThis);
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425 | if (RT_SUCCESS(rc))
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426 | {
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427 | size_t cbTotalRead = 0;
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428 | while (cbToRead > 0)
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429 | {
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430 | ssize_t cbRead = read(pThis->fd, pvBuf, RT_MIN(cbToRead, SSIZE_MAX));
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431 | if (cbRead < 0)
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432 | {
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433 | rc = RTErrConvertFromErrno(errno);
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434 | break;
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435 | }
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436 | if (!cbRead && rtPipePosixHasHup(pThis))
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437 | {
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438 | rc = VERR_BROKEN_PIPE;
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439 | break;
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440 | }
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441 |
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442 | /* advance */
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443 | pvBuf = (char *)pvBuf + cbRead;
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444 | cbTotalRead += cbRead;
|
---|
445 | cbToRead -= cbRead;
|
---|
446 | }
|
---|
447 |
|
---|
448 | if (pcbRead)
|
---|
449 | {
|
---|
450 | *pcbRead = cbTotalRead;
|
---|
451 | if ( RT_FAILURE(rc)
|
---|
452 | && cbTotalRead
|
---|
453 | && rc != VERR_INVALID_POINTER)
|
---|
454 | rc = VINF_SUCCESS;
|
---|
455 | }
|
---|
456 |
|
---|
457 | ASMAtomicDecU32(&pThis->u32State);
|
---|
458 | }
|
---|
459 | return rc;
|
---|
460 | }
|
---|
461 |
|
---|
462 |
|
---|
463 | RTDECL(int) RTPipeWrite(RTPIPE hPipe, const void *pvBuf, size_t cbToWrite, size_t *pcbWritten)
|
---|
464 | {
|
---|
465 | RTPIPEINTERNAL *pThis = hPipe;
|
---|
466 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
|
---|
467 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
|
---|
468 | AssertReturn(!pThis->fRead, VERR_ACCESS_DENIED);
|
---|
469 | AssertPtr(pcbWritten);
|
---|
470 | AssertPtr(pvBuf);
|
---|
471 |
|
---|
472 | int rc = rtPipeTryNonBlocking(pThis);
|
---|
473 | if (RT_SUCCESS(rc))
|
---|
474 | {
|
---|
475 | if (cbToWrite)
|
---|
476 | {
|
---|
477 | ssize_t cbWritten = write(pThis->fd, pvBuf, RT_MIN(cbToWrite, SSIZE_MAX));
|
---|
478 | if (cbWritten >= 0)
|
---|
479 | *pcbWritten = cbWritten;
|
---|
480 | else if (errno == EAGAIN)
|
---|
481 | {
|
---|
482 | *pcbWritten = 0;
|
---|
483 | rc = VINF_TRY_AGAIN;
|
---|
484 | }
|
---|
485 | else
|
---|
486 | rc = RTErrConvertFromErrno(errno);
|
---|
487 | }
|
---|
488 | else
|
---|
489 | *pcbWritten = 0;
|
---|
490 |
|
---|
491 | ASMAtomicDecU32(&pThis->u32State);
|
---|
492 | }
|
---|
493 | return rc;
|
---|
494 | }
|
---|
495 |
|
---|
496 |
|
---|
497 | RTDECL(int) RTPipeWriteBlocking(RTPIPE hPipe, const void *pvBuf, size_t cbToWrite, size_t *pcbWritten)
|
---|
498 | {
|
---|
499 | RTPIPEINTERNAL *pThis = hPipe;
|
---|
500 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
|
---|
501 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
|
---|
502 | AssertReturn(!pThis->fRead, VERR_ACCESS_DENIED);
|
---|
503 | AssertPtr(pvBuf);
|
---|
504 | AssertPtrNull(pcbWritten);
|
---|
505 |
|
---|
506 | int rc = rtPipeTryBlocking(pThis);
|
---|
507 | if (RT_SUCCESS(rc))
|
---|
508 | {
|
---|
509 | size_t cbTotalWritten = 0;
|
---|
510 | while (cbToWrite > 0)
|
---|
511 | {
|
---|
512 | ssize_t cbWritten = write(pThis->fd, pvBuf, RT_MIN(cbToWrite, SSIZE_MAX));
|
---|
513 | if (cbWritten < 0)
|
---|
514 | {
|
---|
515 | rc = RTErrConvertFromErrno(errno);
|
---|
516 | break;
|
---|
517 | }
|
---|
518 |
|
---|
519 | /* advance */
|
---|
520 | pvBuf = (char const *)pvBuf + cbWritten;
|
---|
521 | cbTotalWritten += cbWritten;
|
---|
522 | cbToWrite -= cbWritten;
|
---|
523 | }
|
---|
524 |
|
---|
525 | if (pcbWritten)
|
---|
526 | {
|
---|
527 | *pcbWritten = cbTotalWritten;
|
---|
528 | if ( RT_FAILURE(rc)
|
---|
529 | && cbTotalWritten
|
---|
530 | && rc != VERR_INVALID_POINTER)
|
---|
531 | rc = VINF_SUCCESS;
|
---|
532 | }
|
---|
533 |
|
---|
534 | ASMAtomicDecU32(&pThis->u32State);
|
---|
535 | }
|
---|
536 | return rc;
|
---|
537 | }
|
---|
538 |
|
---|
539 |
|
---|
540 | RTDECL(int) RTPipeFlush(RTPIPE hPipe)
|
---|
541 | {
|
---|
542 | RTPIPEINTERNAL *pThis = hPipe;
|
---|
543 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
|
---|
544 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
|
---|
545 | AssertReturn(!pThis->fRead, VERR_ACCESS_DENIED);
|
---|
546 |
|
---|
547 | if (fsync(pThis->fd))
|
---|
548 | {
|
---|
549 | if (errno == EINVAL || errno == ENOTSUP)
|
---|
550 | return VERR_NOT_SUPPORTED;
|
---|
551 | return RTErrConvertFromErrno(errno);
|
---|
552 | }
|
---|
553 | return VINF_SUCCESS;
|
---|
554 | }
|
---|
555 |
|
---|
556 |
|
---|
557 | RTDECL(int) RTPipeSelectOne(RTPIPE hPipe, RTMSINTERVAL cMillies)
|
---|
558 | {
|
---|
559 | RTPIPEINTERNAL *pThis = hPipe;
|
---|
560 | AssertPtrReturn(pThis, VERR_INVALID_HANDLE);
|
---|
561 | AssertReturn(pThis->u32Magic == RTPIPE_MAGIC, VERR_INVALID_HANDLE);
|
---|
562 |
|
---|
563 | struct pollfd PollFd;
|
---|
564 | RT_ZERO(PollFd);
|
---|
565 | PollFd.fd = pThis->fd;
|
---|
566 | PollFd.events = POLLHUP | POLLERR;
|
---|
567 | if (pThis->fRead)
|
---|
568 | PollFd.events |= POLLIN | POLLPRI;
|
---|
569 | else
|
---|
570 | PollFd.events |= POLLOUT;
|
---|
571 |
|
---|
572 | int timeout;
|
---|
573 | if ( cMillies == RT_INDEFINITE_WAIT
|
---|
574 | || cMillies >= INT_MAX /* lazy bird */)
|
---|
575 | timeout = -1;
|
---|
576 | else
|
---|
577 | timeout = cMillies;
|
---|
578 |
|
---|
579 | int rc = poll(&PollFd, 1, 0);
|
---|
580 | if (rc == -1)
|
---|
581 | return RTErrConvertFromErrno(errno);
|
---|
582 | return rc > 0 ? VINF_SUCCESS : VERR_TIMEOUT;
|
---|
583 | }
|
---|
584 |
|
---|