VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 18761

Last change on this file since 18761 was 18665, checked in by vboxsync, 16 years ago

VMM: Clean out the VBOX_WITH_NEW_PHYS_CODE #ifdefs. (part 1)

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File size: 134.9 KB
Line 
1/* $Id: PDMDevHlp.cpp 18665 2009-04-02 19:44:18Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/rem.h>
33#include <VBox/dbgf.h>
34#include <VBox/vm.h>
35#include <VBox/vmm.h>
36
37#include <VBox/version.h>
38#include <VBox/log.h>
39#include <VBox/err.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/string.h>
43#include <iprt/thread.h>
44
45
46/*******************************************************************************
47* Defined Constants And Macros *
48*******************************************************************************/
49/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50 * Define this to enable the deadlock detection when accessing physical memory.
51 */
52#if defined(DEBUG_bird) || defined(DOXYGEN_RUNNING)
53# define PDM_DEVHLP_DEADLOCK_DETECTION
54#endif
55
56
57/*******************************************************************************
58* Defined Constants And Macros *
59*******************************************************************************/
60/** @name R3 DevHlp
61 * @{
62 */
63
64
65/** @copydoc PDMDEVHLPR3::pfnIOPortRegister */
66static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68{
69 PDMDEV_ASSERT_DEVINS(pDevIns);
70 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
71 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
75
76 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
77 return rc;
78}
79
80
81/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterGC */
82static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
83 const char *pszOut, const char *pszIn,
84 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
85{
86 PDMDEV_ASSERT_DEVINS(pDevIns);
87 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
88 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
89 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
90
91 /*
92 * Resolve the functions (one of the can be NULL).
93 */
94 int rc = VINF_SUCCESS;
95 if ( pDevIns->pDevReg->szRCMod[0]
96 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
97 {
98 RTRCPTR RCPtrIn = NIL_RTRCPTR;
99 if (pszIn)
100 {
101 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszIn, &RCPtrIn);
102 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szRCMod, pszIn));
103 }
104 RTRCPTR RCPtrOut = NIL_RTRCPTR;
105 if (pszOut && RT_SUCCESS(rc))
106 {
107 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOut, &RCPtrOut);
108 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szRCMod, pszOut));
109 }
110 RTRCPTR RCPtrInStr = NIL_RTRCPTR;
111 if (pszInStr && RT_SUCCESS(rc))
112 {
113 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszInStr, &RCPtrInStr);
114 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szRCMod, pszInStr));
115 }
116 RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
117 if (pszOutStr && RT_SUCCESS(rc))
118 {
119 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszOutStr, &RCPtrOutStr);
120 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szRCMod, pszOutStr));
121 }
122
123 if (RT_SUCCESS(rc))
124 rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
125 }
126 else
127 {
128 AssertMsgFailed(("No GC module for this driver!\n"));
129 rc = VERR_INVALID_PARAMETER;
130 }
131
132 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
133 return rc;
134}
135
136
137/** @copydoc PDMDEVHLPR3::pfnIOPortRegisterR0 */
138static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
139 const char *pszOut, const char *pszIn,
140 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
141{
142 PDMDEV_ASSERT_DEVINS(pDevIns);
143 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
144 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
145 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
146
147 /*
148 * Resolve the functions (one of the can be NULL).
149 */
150 int rc = VINF_SUCCESS;
151 if ( pDevIns->pDevReg->szR0Mod[0]
152 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
153 {
154 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
155 if (pszIn)
156 {
157 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
158 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
159 }
160 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
161 if (pszOut && RT_SUCCESS(rc))
162 {
163 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
164 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
165 }
166 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
167 if (pszInStr && RT_SUCCESS(rc))
168 {
169 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
170 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
171 }
172 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
173 if (pszOutStr && RT_SUCCESS(rc))
174 {
175 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
176 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
177 }
178
179 if (RT_SUCCESS(rc))
180 rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
181 }
182 else
183 {
184 AssertMsgFailed(("No R0 module for this driver!\n"));
185 rc = VERR_INVALID_PARAMETER;
186 }
187
188 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
189 return rc;
190}
191
192
193/** @copydoc PDMDEVHLPR3::pfnIOPortDeregister */
194static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
195{
196 PDMDEV_ASSERT_DEVINS(pDevIns);
197 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
198 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
199 Port, cPorts));
200
201 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
202
203 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
204 return rc;
205}
206
207
208/** @copydoc PDMDEVHLPR3::pfnMMIORegister */
209static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
210 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
211 const char *pszDesc)
212{
213 PDMDEV_ASSERT_DEVINS(pDevIns);
214 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
215 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
216 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
217
218 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
219
220 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
221 return rc;
222}
223
224
225/** @copydoc PDMDEVHLPR3::pfnMMIORegisterGC */
226static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
227 const char *pszWrite, const char *pszRead, const char *pszFill,
228 const char *pszDesc)
229{
230 PDMDEV_ASSERT_DEVINS(pDevIns);
231 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
232 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
233 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
234
235 /*
236 * Resolve the functions.
237 * Not all function have to present, leave it to IOM to enforce this.
238 */
239 int rc = VINF_SUCCESS;
240 if ( pDevIns->pDevReg->szRCMod[0]
241 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
242 {
243 RTRCPTR RCPtrWrite = NIL_RTRCPTR;
244 if (pszWrite)
245 rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszWrite, &RCPtrWrite);
246
247 RTRCPTR RCPtrRead = NIL_RTRCPTR;
248 int rc2 = VINF_SUCCESS;
249 if (pszRead)
250 rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszRead, &RCPtrRead);
251
252 RTRCPTR RCPtrFill = NIL_RTRCPTR;
253 int rc3 = VINF_SUCCESS;
254 if (pszFill)
255 rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szRCMod, pszFill, &RCPtrFill);
256
257 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
258 rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
259 else
260 {
261 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szRCMod, pszWrite));
262 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szRCMod, pszRead));
263 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szRCMod, pszFill));
264 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
265 rc = rc2;
266 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
267 rc = rc3;
268 }
269 }
270 else
271 {
272 AssertMsgFailed(("No GC module for this driver!\n"));
273 rc = VERR_INVALID_PARAMETER;
274 }
275
276 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
277 return rc;
278}
279
280/** @copydoc PDMDEVHLPR3::pfnMMIORegisterR0 */
281static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
282 const char *pszWrite, const char *pszRead, const char *pszFill,
283 const char *pszDesc)
284{
285 PDMDEV_ASSERT_DEVINS(pDevIns);
286 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
287 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
288 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
289
290 /*
291 * Resolve the functions.
292 * Not all function have to present, leave it to IOM to enforce this.
293 */
294 int rc = VINF_SUCCESS;
295 if ( pDevIns->pDevReg->szR0Mod[0]
296 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
297 {
298 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
299 if (pszWrite)
300 rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
301 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
302 int rc2 = VINF_SUCCESS;
303 if (pszRead)
304 rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
305 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
306 int rc3 = VINF_SUCCESS;
307 if (pszFill)
308 rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
309 if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
310 rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
311 else
312 {
313 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
314 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
315 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
316 if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
317 rc = rc2;
318 if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
319 rc = rc3;
320 }
321 }
322 else
323 {
324 AssertMsgFailed(("No R0 module for this driver!\n"));
325 rc = VERR_INVALID_PARAMETER;
326 }
327
328 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
329 return rc;
330}
331
332
333/** @copydoc PDMDEVHLPR3::pfnMMIODeregister */
334static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
335{
336 PDMDEV_ASSERT_DEVINS(pDevIns);
337 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
338 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
339 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
340
341 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
342
343 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
344 return rc;
345}
346
347
348/** @copydoc PDMDEVHLPR3::pfnROMRegister */
349static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, uint32_t fFlags, const char *pszDesc)
350{
351 PDMDEV_ASSERT_DEVINS(pDevIns);
352 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
353 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
354 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
355
356 int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
357
358 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
359 return rc;
360}
361
362
363/** @copydoc PDMDEVHLPR3::pfnSSMRegister */
364static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
365 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
366 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
367{
368 PDMDEV_ASSERT_DEVINS(pDevIns);
369 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
370 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
371 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
372
373 int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pszName, u32Instance, u32Version, cbGuess,
374 pfnSavePrep, pfnSaveExec, pfnSaveDone,
375 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
376
377 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
378 return rc;
379}
380
381
382/** @copydoc PDMDEVHLPR3::pfnTMTimerCreate */
383static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
384{
385 PDMDEV_ASSERT_DEVINS(pDevIns);
386 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
387 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
388 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
389
390 int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
391
392 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
393 return rc;
394}
395
396
397/** @copydoc PDMDEVHLPR3::pfnTMTimerCreateExternal */
398static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)
399{
400 PDMDEV_ASSERT_DEVINS(pDevIns);
401 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
402
403 return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMR3, enmClock, pfnCallback, pvUser, pszDesc);
404}
405
406
407/** @copydoc PDMDEVHLPR3::pfnPCIRegister */
408static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
409{
410 PDMDEV_ASSERT_DEVINS(pDevIns);
411 PVM pVM = pDevIns->Internal.s.pVMR3;
412 VM_ASSERT_EMT(pVM);
413 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
414 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
415
416 /*
417 * Validate input.
418 */
419 if (!pPciDev)
420 {
421 Assert(pPciDev);
422 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
423 return VERR_INVALID_PARAMETER;
424 }
425 if (!pPciDev->config[0] && !pPciDev->config[1])
426 {
427 Assert(pPciDev->config[0] || pPciDev->config[1]);
428 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
429 return VERR_INVALID_PARAMETER;
430 }
431 if (pDevIns->Internal.s.pPciDeviceR3)
432 {
433 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
434 * support a PDM device with multiple PCI devices. This might become a problem
435 * when upgrading the chipset for instance because of multiple functions in some
436 * devices...
437 */
438 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
439 return VERR_INTERNAL_ERROR;
440 }
441
442 /*
443 * Choose the PCI bus for the device.
444 *
445 * This is simple. If the device was configured for a particular bus, the PCIBusNo
446 * configuration value will be set. If not the default bus is 0.
447 */
448 int rc;
449 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
450 if (!pBus)
451 {
452 uint8_t u8Bus;
453 rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
454 AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
455 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance), rc);
456 AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
457 ("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
458 RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pDevReg->szDeviceName, pDevIns->iInstance),
459 VERR_PDM_NO_PCI_BUS);
460 pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
461 }
462 if (pBus->pDevInsR3)
463 {
464 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
465 pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
466 else
467 pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
468
469 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
470 pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
471 else
472 pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
473
474 /*
475 * Check the configuration for PCI device and function assignment.
476 */
477 int iDev = -1;
478 uint8_t u8Device;
479 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
480 if (RT_SUCCESS(rc))
481 {
482 if (u8Device > 31)
483 {
484 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
485 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
486 return VERR_INTERNAL_ERROR;
487 }
488
489 uint8_t u8Function;
490 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
491 if (RT_FAILURE(rc))
492 {
493 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
494 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
495 return rc;
496 }
497 if (u8Function > 7)
498 {
499 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
500 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
501 return VERR_INTERNAL_ERROR;
502 }
503 iDev = (u8Device << 3) | u8Function;
504 }
505 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
506 {
507 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
508 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
509 return rc;
510 }
511
512 /*
513 * Call the pci bus device to do the actual registration.
514 */
515 pdmLock(pVM);
516 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
517 pdmUnlock(pVM);
518 if (RT_SUCCESS(rc))
519 {
520 pPciDev->pDevIns = pDevIns;
521
522 pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
523 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
524 pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
525 else
526 pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
527
528 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC)
529 pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
530 else
531 pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
532
533 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
534 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
535 }
536 }
537 else
538 {
539 AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
540 rc = VERR_PDM_NO_PCI_BUS;
541 }
542
543 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
544 return rc;
545}
546
547
548/** @copydoc PDMDEVHLPR3::pfnPCIIORegionRegister */
549static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
550{
551 PDMDEV_ASSERT_DEVINS(pDevIns);
552 PVM pVM = pDevIns->Internal.s.pVMR3;
553 VM_ASSERT_EMT(pVM);
554 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
555 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
556
557 /*
558 * Validate input.
559 */
560 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
561 {
562 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
563 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
564 return VERR_INVALID_PARAMETER;
565 }
566 switch (enmType)
567 {
568 case PCI_ADDRESS_SPACE_IO:
569 /*
570 * Sanity check: don't allow to register more than 32K of the PCI I/O space.
571 */
572 AssertMsgReturn(cbRegion <= _32K,
573 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
574 VERR_INVALID_PARAMETER);
575 break;
576
577 case PCI_ADDRESS_SPACE_MEM:
578 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
579 /*
580 * Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
581 * now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
582 */
583 AssertMsgReturn(cbRegion <= 512 * _1M,
584 ("caller='%s'/%d: %#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion),
585 VERR_INVALID_PARAMETER);
586 break;
587 default:
588 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
589 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
590 return VERR_INVALID_PARAMETER;
591 }
592 if (!pfnCallback)
593 {
594 Assert(pfnCallback);
595 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
596 return VERR_INVALID_PARAMETER;
597 }
598 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
599
600 /*
601 * Must have a PCI device registered!
602 */
603 int rc;
604 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
605 if (pPciDev)
606 {
607 /*
608 * We're currently restricted to page aligned MMIO regions.
609 */
610 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
611 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
612 {
613 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
614 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
615 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
616 }
617
618 /*
619 * For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
620 */
621 int iLastSet = ASMBitLastSetU32(cbRegion);
622 Assert(iLastSet > 0);
623 uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
624 if (cbRegion > cbRegionAligned)
625 cbRegion = cbRegionAligned * 2; /* round up */
626
627 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
628 Assert(pBus);
629 pdmLock(pVM);
630 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
631 pdmUnlock(pVM);
632 }
633 else
634 {
635 AssertMsgFailed(("No PCI device registered!\n"));
636 rc = VERR_PDM_NOT_PCI_DEVICE;
637 }
638
639 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
640 return rc;
641}
642
643
644/** @copydoc PDMDEVHLPR3::pfnPCISetConfigCallbacks */
645static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
646 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
647{
648 PDMDEV_ASSERT_DEVINS(pDevIns);
649 PVM pVM = pDevIns->Internal.s.pVMR3;
650 VM_ASSERT_EMT(pVM);
651 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
652 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
653
654 /*
655 * Validate input and resolve defaults.
656 */
657 AssertPtr(pfnRead);
658 AssertPtr(pfnWrite);
659 AssertPtrNull(ppfnReadOld);
660 AssertPtrNull(ppfnWriteOld);
661 AssertPtrNull(pPciDev);
662
663 if (!pPciDev)
664 pPciDev = pDevIns->Internal.s.pPciDeviceR3;
665 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
666 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
667 AssertRelease(pBus);
668 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
669
670 /*
671 * Do the job.
672 */
673 pdmLock(pVM);
674 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
675 pdmUnlock(pVM);
676
677 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
678}
679
680
681/** @copydoc PDMDEVHLPR3::pfnPCISetIrq */
682static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
683{
684 PDMDEV_ASSERT_DEVINS(pDevIns);
685 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
686
687 /*
688 * Validate input.
689 */
690 /** @todo iIrq and iLevel checks. */
691
692 /*
693 * Must have a PCI device registered!
694 */
695 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
696 if (pPciDev)
697 {
698 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
699 Assert(pBus);
700 PVM pVM = pDevIns->Internal.s.pVMR3;
701 pdmLock(pVM);
702 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
703 pdmUnlock(pVM);
704 }
705 else
706 AssertReleaseMsgFailed(("No PCI device registered!\n"));
707
708 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
709}
710
711
712/** @copydoc PDMDEVHLPR3::pfnPCISetIrqNoWait */
713static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
714{
715 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
716}
717
718
719/** @copydoc PDMDEVHLPR3::pfnISASetIrq */
720static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
721{
722 PDMDEV_ASSERT_DEVINS(pDevIns);
723 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
724
725 /*
726 * Validate input.
727 */
728 /** @todo iIrq and iLevel checks. */
729
730 PVM pVM = pDevIns->Internal.s.pVMR3;
731 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
732
733 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
734}
735
736
737/** @copydoc PDMDEVHLPR3::pfnISASetIrqNoWait */
738static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
739{
740 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
741}
742
743
744/** @copydoc PDMDEVHLPR3::pfnDriverAttach */
745static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
746{
747 PDMDEV_ASSERT_DEVINS(pDevIns);
748 PVM pVM = pDevIns->Internal.s.pVMR3;
749 VM_ASSERT_EMT(pVM);
750 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
751 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
752
753 /*
754 * Lookup the LUN, it might already be registered.
755 */
756 PPDMLUN pLunPrev = NULL;
757 PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
758 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
759 if (pLun->iLun == iLun)
760 break;
761
762 /*
763 * Create the LUN if if wasn't found, else check if driver is already attached to it.
764 */
765 if (!pLun)
766 {
767 if ( !pBaseInterface
768 || !pszDesc
769 || !*pszDesc)
770 {
771 Assert(pBaseInterface);
772 Assert(pszDesc || *pszDesc);
773 return VERR_INVALID_PARAMETER;
774 }
775
776 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
777 if (!pLun)
778 return VERR_NO_MEMORY;
779
780 pLun->iLun = iLun;
781 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
782 pLun->pTop = NULL;
783 pLun->pBottom = NULL;
784 pLun->pDevIns = pDevIns;
785 pLun->pszDesc = pszDesc;
786 pLun->pBase = pBaseInterface;
787 if (!pLunPrev)
788 pDevIns->Internal.s.pLunsR3 = pLun;
789 else
790 pLunPrev->pNext = pLun;
791 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
792 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
793 }
794 else if (pLun->pTop)
795 {
796 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
797 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
798 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
799 }
800 Assert(pLun->pBase == pBaseInterface);
801
802
803 /*
804 * Get the attached driver configuration.
805 */
806 int rc;
807 char szNode[48];
808 RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
809 PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
810 if (pNode)
811 {
812 char *pszName;
813 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
814 if (RT_SUCCESS(rc))
815 {
816 /*
817 * Find the driver.
818 */
819 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
820 if (pDrv)
821 {
822 /* config node */
823 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
824 if (!pConfigNode)
825 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
826 if (RT_SUCCESS(rc))
827 {
828 CFGMR3SetRestrictedRoot(pConfigNode);
829
830 /*
831 * Allocate the driver instance.
832 */
833 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
834 cb = RT_ALIGN_Z(cb, 16);
835 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
836 if (pNew)
837 {
838 /*
839 * Initialize the instance structure (declaration order).
840 */
841 pNew->u32Version = PDM_DRVINS_VERSION;
842 //pNew->Internal.s.pUp = NULL;
843 //pNew->Internal.s.pDown = NULL;
844 pNew->Internal.s.pLun = pLun;
845 pNew->Internal.s.pDrv = pDrv;
846 pNew->Internal.s.pVM = pVM;
847 //pNew->Internal.s.fDetaching = false;
848 pNew->Internal.s.pCfgHandle = pNode;
849 pNew->pDrvHlp = &g_pdmR3DrvHlp;
850 pNew->pDrvReg = pDrv->pDrvReg;
851 pNew->pCfgHandle = pConfigNode;
852 pNew->iInstance = pDrv->cInstances++;
853 pNew->pUpBase = pBaseInterface;
854 //pNew->pDownBase = NULL;
855 //pNew->IBase.pfnQueryInterface = NULL;
856 pNew->pvInstanceData = &pNew->achInstanceData[0];
857
858 /*
859 * Link with LUN and call the constructor.
860 */
861 pLun->pTop = pLun->pBottom = pNew;
862 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
863 if (RT_SUCCESS(rc))
864 {
865 MMR3HeapFree(pszName);
866 *ppBaseInterface = &pNew->IBase;
867 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
868 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
869 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
870
871 return rc; /* Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS). */
872 }
873
874 /*
875 * Free the driver.
876 */
877 pLun->pTop = pLun->pBottom = NULL;
878 ASMMemFill32(pNew, cb, 0xdeadd0d0);
879 MMR3HeapFree(pNew);
880 pDrv->cInstances--;
881 }
882 else
883 {
884 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
885 rc = VERR_NO_MEMORY;
886 }
887 }
888 else
889 AssertMsgFailed(("Failed to create Config node! rc=%Rrc\n", rc));
890 }
891 else
892 {
893 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
894 rc = VERR_PDM_DRIVER_NOT_FOUND;
895 }
896 MMR3HeapFree(pszName);
897 }
898 else
899 {
900 AssertMsgFailed(("Query for string value of \"Driver\" -> %Rrc\n", rc));
901 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
902 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
903 }
904 }
905 else
906 rc = VERR_PDM_NO_ATTACHED_DRIVER;
907
908
909 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
910 return rc;
911}
912
913
914/** @copydoc PDMDEVHLPR3::pfnMMHeapAlloc */
915static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
916{
917 PDMDEV_ASSERT_DEVINS(pDevIns);
918 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
919
920 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
921
922 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
923 return pv;
924}
925
926
927/** @copydoc PDMDEVHLPR3::pfnMMHeapAllocZ */
928static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
929{
930 PDMDEV_ASSERT_DEVINS(pDevIns);
931 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
932
933 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
934
935 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
936 return pv;
937}
938
939
940/** @copydoc PDMDEVHLPR3::pfnMMHeapFree */
941static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
942{
943 PDMDEV_ASSERT_DEVINS(pDevIns);
944 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
945
946 MMR3HeapFree(pv);
947
948 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
949}
950
951
952/** @copydoc PDMDEVHLPR3::pfnVMSetError */
953static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
954{
955 PDMDEV_ASSERT_DEVINS(pDevIns);
956 va_list args;
957 va_start(args, pszFormat);
958 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
959 va_end(args);
960 return rc;
961}
962
963
964/** @copydoc PDMDEVHLPR3::pfnVMSetErrorV */
965static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
966{
967 PDMDEV_ASSERT_DEVINS(pDevIns);
968 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
969 return rc;
970}
971
972
973/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeError */
974static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, ...)
975{
976 PDMDEV_ASSERT_DEVINS(pDevIns);
977 va_list args;
978 va_start(args, pszFormat);
979 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
980 va_end(args);
981 return rc;
982}
983
984
985/** @copydoc PDMDEVHLPR3::pfnVMSetRuntimeErrorV */
986static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char *pszErrorId, const char *pszFormat, va_list va)
987{
988 PDMDEV_ASSERT_DEVINS(pDevIns);
989 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
990 return rc;
991}
992
993
994/** @copydoc PDMDEVHLPR3::pfnAssertEMT */
995static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
996{
997 PDMDEV_ASSERT_DEVINS(pDevIns);
998 if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
999 return true;
1000
1001 char szMsg[100];
1002 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1003 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1004 AssertBreakpoint();
1005 return false;
1006}
1007
1008
1009/** @copydoc PDMDEVHLPR3::pfnAssertOther */
1010static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
1011{
1012 PDMDEV_ASSERT_DEVINS(pDevIns);
1013 if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1014 return true;
1015
1016 char szMsg[100];
1017 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
1018 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
1019 AssertBreakpoint();
1020 return false;
1021}
1022
1023
1024/** @copydoc PDMDEVHLPR3::pfnDBGFStopV */
1025static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
1026{
1027 PDMDEV_ASSERT_DEVINS(pDevIns);
1028#ifdef LOG_ENABLED
1029 va_list va2;
1030 va_copy(va2, args);
1031 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
1032 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
1033 va_end(va2);
1034#endif
1035
1036 PVM pVM = pDevIns->Internal.s.pVMR3;
1037 VM_ASSERT_EMT(pVM);
1038 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
1039
1040 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1041 return rc;
1042}
1043
1044
1045/** @copydoc PDMDEVHLPR3::pfnDBGFInfoRegister */
1046static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
1047{
1048 PDMDEV_ASSERT_DEVINS(pDevIns);
1049 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
1050 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
1051
1052 PVM pVM = pDevIns->Internal.s.pVMR3;
1053 VM_ASSERT_EMT(pVM);
1054 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
1055
1056 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1057 return rc;
1058}
1059
1060
1061/** @copydoc PDMDEVHLPR3::pfnSTAMRegister */
1062static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
1063{
1064 PDMDEV_ASSERT_DEVINS(pDevIns);
1065 PVM pVM = pDevIns->Internal.s.pVMR3;
1066 VM_ASSERT_EMT(pVM);
1067
1068 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
1069 NOREF(pVM);
1070}
1071
1072
1073
1074/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterF */
1075static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1076 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
1077{
1078 PDMDEV_ASSERT_DEVINS(pDevIns);
1079 PVM pVM = pDevIns->Internal.s.pVMR3;
1080 VM_ASSERT_EMT(pVM);
1081
1082 va_list args;
1083 va_start(args, pszName);
1084 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1085 va_end(args);
1086 AssertRC(rc);
1087
1088 NOREF(pVM);
1089}
1090
1091
1092/** @copydoc PDMDEVHLPR3::pfnSTAMRegisterV */
1093static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
1094 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
1095{
1096 PDMDEV_ASSERT_DEVINS(pDevIns);
1097 PVM pVM = pDevIns->Internal.s.pVMR3;
1098 VM_ASSERT_EMT(pVM);
1099
1100 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
1101 AssertRC(rc);
1102
1103 NOREF(pVM);
1104}
1105
1106
1107/** @copydoc PDMDEVHLPR3::pfnRTCRegister */
1108static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1109{
1110 PDMDEV_ASSERT_DEVINS(pDevIns);
1111 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1112 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1113 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1114 pRtcReg->pfnWrite, ppRtcHlp));
1115
1116 /*
1117 * Validate input.
1118 */
1119 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1120 {
1121 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1122 PDM_RTCREG_VERSION));
1123 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1124 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1125 return VERR_INVALID_PARAMETER;
1126 }
1127 if ( !pRtcReg->pfnWrite
1128 || !pRtcReg->pfnRead)
1129 {
1130 Assert(pRtcReg->pfnWrite);
1131 Assert(pRtcReg->pfnRead);
1132 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1133 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1134 return VERR_INVALID_PARAMETER;
1135 }
1136
1137 if (!ppRtcHlp)
1138 {
1139 Assert(ppRtcHlp);
1140 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1141 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1142 return VERR_INVALID_PARAMETER;
1143 }
1144
1145 /*
1146 * Only one DMA device.
1147 */
1148 PVM pVM = pDevIns->Internal.s.pVMR3;
1149 if (pVM->pdm.s.pRtc)
1150 {
1151 AssertMsgFailed(("Only one RTC device is supported!\n"));
1152 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1153 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1154 return VERR_INVALID_PARAMETER;
1155 }
1156
1157 /*
1158 * Allocate and initialize pci bus structure.
1159 */
1160 int rc = VINF_SUCCESS;
1161 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1162 if (pRtc)
1163 {
1164 pRtc->pDevIns = pDevIns;
1165 pRtc->Reg = *pRtcReg;
1166 pVM->pdm.s.pRtc = pRtc;
1167
1168 /* set the helper pointer. */
1169 *ppRtcHlp = &g_pdmR3DevRtcHlp;
1170 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1171 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1172 }
1173 else
1174 rc = VERR_NO_MEMORY;
1175
1176 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1177 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1178 return rc;
1179}
1180
1181
1182/** @copydoc PDMDEVHLPR3::pfnPDMQueueCreate */
1183static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1184 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
1185{
1186 PDMDEV_ASSERT_DEVINS(pDevIns);
1187 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
1188 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
1189
1190 PVM pVM = pDevIns->Internal.s.pVMR3;
1191 VM_ASSERT_EMT(pVM);
1192 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
1193
1194 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Rrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
1195 return rc;
1196}
1197
1198
1199/** @copydoc PDMDEVHLPR3::pfnCritSectInit */
1200static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
1201{
1202 PDMDEV_ASSERT_DEVINS(pDevIns);
1203 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
1204 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
1205
1206 PVM pVM = pDevIns->Internal.s.pVMR3;
1207 VM_ASSERT_EMT(pVM);
1208 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
1209
1210 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1211 return rc;
1212}
1213
1214
1215/** @copydoc PDMDEVHLPR3::pfnUTCNow */
1216static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
1217{
1218 PDMDEV_ASSERT_DEVINS(pDevIns);
1219 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
1220 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
1221
1222 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMR3, pTime);
1223
1224 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
1225 return pTime;
1226}
1227
1228
1229/** @copydoc PDMDEVHLPR3::pfnPDMThreadCreate */
1230static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1231 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1232{
1233 PDMDEV_ASSERT_DEVINS(pDevIns);
1234 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1235 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1236 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1237
1238 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1239
1240 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1241 rc, *ppThread));
1242 return rc;
1243}
1244
1245
1246/** @copydoc PDMDEVHLPR3::pfnGetVM */
1247static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1248{
1249 PDMDEV_ASSERT_DEVINS(pDevIns);
1250 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1251 return pDevIns->Internal.s.pVMR3;
1252}
1253
1254
1255/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
1256static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1257{
1258 PDMDEV_ASSERT_DEVINS(pDevIns);
1259 PVM pVM = pDevIns->Internal.s.pVMR3;
1260 VM_ASSERT_EMT(pVM);
1261 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1262 ".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1263 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1264 pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1265 pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1266
1267 /*
1268 * Validate the structure.
1269 */
1270 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1271 {
1272 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1273 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1274 return VERR_INVALID_PARAMETER;
1275 }
1276 if ( !pPciBusReg->pfnRegisterR3
1277 || !pPciBusReg->pfnIORegionRegisterR3
1278 || !pPciBusReg->pfnSetIrqR3
1279 || !pPciBusReg->pfnSaveExecR3
1280 || !pPciBusReg->pfnLoadExecR3
1281 || (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1282 {
1283 Assert(pPciBusReg->pfnRegisterR3);
1284 Assert(pPciBusReg->pfnIORegionRegisterR3);
1285 Assert(pPciBusReg->pfnSetIrqR3);
1286 Assert(pPciBusReg->pfnSaveExecR3);
1287 Assert(pPciBusReg->pfnLoadExecR3);
1288 Assert(pPciBusReg->pfnFakePCIBIOSR3);
1289 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1290 return VERR_INVALID_PARAMETER;
1291 }
1292 if ( pPciBusReg->pszSetIrqRC
1293 && !VALID_PTR(pPciBusReg->pszSetIrqRC))
1294 {
1295 Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1296 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1297 return VERR_INVALID_PARAMETER;
1298 }
1299 if ( pPciBusReg->pszSetIrqR0
1300 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
1301 {
1302 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1303 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1304 return VERR_INVALID_PARAMETER;
1305 }
1306 if (!ppPciHlpR3)
1307 {
1308 Assert(ppPciHlpR3);
1309 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1310 return VERR_INVALID_PARAMETER;
1311 }
1312
1313 /*
1314 * Find free PCI bus entry.
1315 */
1316 unsigned iBus = 0;
1317 for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1318 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1319 break;
1320 if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1321 {
1322 AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1323 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1324 return VERR_INVALID_PARAMETER;
1325 }
1326 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1327
1328 /*
1329 * Resolve and init the RC bits.
1330 */
1331 if (pPciBusReg->pszSetIrqRC)
1332 {
1333 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1334 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1335 if (RT_FAILURE(rc))
1336 {
1337 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1338 return rc;
1339 }
1340 pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1341 }
1342 else
1343 {
1344 pPciBus->pfnSetIrqRC = 0;
1345 pPciBus->pDevInsRC = 0;
1346 }
1347
1348 /*
1349 * Resolve and init the R0 bits.
1350 */
1351 if (pPciBusReg->pszSetIrqR0)
1352 {
1353 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1354 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1355 if (RT_FAILURE(rc))
1356 {
1357 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1358 return rc;
1359 }
1360 pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1361 }
1362 else
1363 {
1364 pPciBus->pfnSetIrqR0 = 0;
1365 pPciBus->pDevInsR0 = 0;
1366 }
1367
1368 /*
1369 * Init the R3 bits.
1370 */
1371 pPciBus->iBus = iBus;
1372 pPciBus->pDevInsR3 = pDevIns;
1373 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1374 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1375 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1376 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1377 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
1378 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
1379 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
1380
1381 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1382
1383 /* set the helper pointer and return. */
1384 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
1385 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1386 return VINF_SUCCESS;
1387}
1388
1389
1390/** @copydoc PDMDEVHLPR3::pfnPICRegister */
1391static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
1392{
1393 PDMDEV_ASSERT_DEVINS(pDevIns);
1394 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1395 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
1396 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
1397 pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
1398 pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
1399 ppPicHlpR3));
1400
1401 /*
1402 * Validate input.
1403 */
1404 if (pPicReg->u32Version != PDM_PICREG_VERSION)
1405 {
1406 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
1407 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1408 return VERR_INVALID_PARAMETER;
1409 }
1410 if ( !pPicReg->pfnSetIrqR3
1411 || !pPicReg->pfnGetInterruptR3)
1412 {
1413 Assert(pPicReg->pfnSetIrqR3);
1414 Assert(pPicReg->pfnGetInterruptR3);
1415 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1416 return VERR_INVALID_PARAMETER;
1417 }
1418 if ( ( pPicReg->pszSetIrqRC
1419 || pPicReg->pszGetInterruptRC)
1420 && ( !VALID_PTR(pPicReg->pszSetIrqRC)
1421 || !VALID_PTR(pPicReg->pszGetInterruptRC))
1422 )
1423 {
1424 Assert(VALID_PTR(pPicReg->pszSetIrqRC));
1425 Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
1426 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1427 return VERR_INVALID_PARAMETER;
1428 }
1429 if ( pPicReg->pszSetIrqRC
1430 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC))
1431 {
1432 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_RC);
1433 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1434 return VERR_INVALID_PARAMETER;
1435 }
1436 if ( pPicReg->pszSetIrqR0
1437 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1438 {
1439 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
1440 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1441 return VERR_INVALID_PARAMETER;
1442 }
1443 if (!ppPicHlpR3)
1444 {
1445 Assert(ppPicHlpR3);
1446 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1447 return VERR_INVALID_PARAMETER;
1448 }
1449
1450 /*
1451 * Only one PIC device.
1452 */
1453 PVM pVM = pDevIns->Internal.s.pVMR3;
1454 if (pVM->pdm.s.Pic.pDevInsR3)
1455 {
1456 AssertMsgFailed(("Only one pic device is supported!\n"));
1457 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1458 return VERR_INVALID_PARAMETER;
1459 }
1460
1461 /*
1462 * RC stuff.
1463 */
1464 if (pPicReg->pszSetIrqRC)
1465 {
1466 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
1467 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszSetIrqRC, rc));
1468 if (RT_SUCCESS(rc))
1469 {
1470 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
1471 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
1472 }
1473 if (RT_FAILURE(rc))
1474 {
1475 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1476 return rc;
1477 }
1478 pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1479 }
1480 else
1481 {
1482 pVM->pdm.s.Pic.pDevInsRC = 0;
1483 pVM->pdm.s.Pic.pfnSetIrqRC = 0;
1484 pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
1485 }
1486
1487 /*
1488 * R0 stuff.
1489 */
1490 if (pPicReg->pszSetIrqR0)
1491 {
1492 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
1493 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
1494 if (RT_SUCCESS(rc))
1495 {
1496 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
1497 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
1498 }
1499 if (RT_FAILURE(rc))
1500 {
1501 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1502 return rc;
1503 }
1504 pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1505 Assert(pVM->pdm.s.Pic.pDevInsR0);
1506 }
1507 else
1508 {
1509 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
1510 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
1511 pVM->pdm.s.Pic.pDevInsR0 = 0;
1512 }
1513
1514 /*
1515 * R3 stuff.
1516 */
1517 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
1518 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
1519 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
1520 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1521
1522 /* set the helper pointer and return. */
1523 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
1524 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1525 return VINF_SUCCESS;
1526}
1527
1528
1529/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
1530static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
1531{
1532 PDMDEV_ASSERT_DEVINS(pDevIns);
1533 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1534 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
1535 ".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
1536 ".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}} ppApicHlpR3=%p\n",
1537 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
1538 pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pszGetInterruptRC,
1539 pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
1540 pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
1541 pApicReg->pszBusDeliverRC, ppApicHlpR3));
1542
1543 /*
1544 * Validate input.
1545 */
1546 if (pApicReg->u32Version != PDM_APICREG_VERSION)
1547 {
1548 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
1549 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1550 return VERR_INVALID_PARAMETER;
1551 }
1552 if ( !pApicReg->pfnGetInterruptR3
1553 || !pApicReg->pfnHasPendingIrqR3
1554 || !pApicReg->pfnSetBaseR3
1555 || !pApicReg->pfnGetBaseR3
1556 || !pApicReg->pfnSetTPRR3
1557 || !pApicReg->pfnGetTPRR3
1558 || !pApicReg->pfnWriteMSRR3
1559 || !pApicReg->pfnReadMSRR3
1560 || !pApicReg->pfnBusDeliverR3)
1561 {
1562 Assert(pApicReg->pfnGetInterruptR3);
1563 Assert(pApicReg->pfnHasPendingIrqR3);
1564 Assert(pApicReg->pfnSetBaseR3);
1565 Assert(pApicReg->pfnGetBaseR3);
1566 Assert(pApicReg->pfnSetTPRR3);
1567 Assert(pApicReg->pfnGetTPRR3);
1568 Assert(pApicReg->pfnWriteMSRR3);
1569 Assert(pApicReg->pfnReadMSRR3);
1570 Assert(pApicReg->pfnBusDeliverR3);
1571 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1572 return VERR_INVALID_PARAMETER;
1573 }
1574 if ( ( pApicReg->pszGetInterruptRC
1575 || pApicReg->pszHasPendingIrqRC
1576 || pApicReg->pszSetBaseRC
1577 || pApicReg->pszGetBaseRC
1578 || pApicReg->pszSetTPRRC
1579 || pApicReg->pszGetTPRRC
1580 || pApicReg->pszWriteMSRRC
1581 || pApicReg->pszReadMSRRC
1582 || pApicReg->pszBusDeliverRC)
1583 && ( !VALID_PTR(pApicReg->pszGetInterruptRC)
1584 || !VALID_PTR(pApicReg->pszHasPendingIrqRC)
1585 || !VALID_PTR(pApicReg->pszSetBaseRC)
1586 || !VALID_PTR(pApicReg->pszGetBaseRC)
1587 || !VALID_PTR(pApicReg->pszSetTPRRC)
1588 || !VALID_PTR(pApicReg->pszGetTPRRC)
1589 || !VALID_PTR(pApicReg->pszWriteMSRRC)
1590 || !VALID_PTR(pApicReg->pszReadMSRRC)
1591 || !VALID_PTR(pApicReg->pszBusDeliverRC))
1592 )
1593 {
1594 Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
1595 Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
1596 Assert(VALID_PTR(pApicReg->pszSetBaseRC));
1597 Assert(VALID_PTR(pApicReg->pszGetBaseRC));
1598 Assert(VALID_PTR(pApicReg->pszSetTPRRC));
1599 Assert(VALID_PTR(pApicReg->pszGetTPRRC));
1600 Assert(VALID_PTR(pApicReg->pszReadMSRRC));
1601 Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
1602 Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
1603 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1604 return VERR_INVALID_PARAMETER;
1605 }
1606 if ( ( pApicReg->pszGetInterruptR0
1607 || pApicReg->pszHasPendingIrqR0
1608 || pApicReg->pszSetBaseR0
1609 || pApicReg->pszGetBaseR0
1610 || pApicReg->pszSetTPRR0
1611 || pApicReg->pszGetTPRR0
1612 || pApicReg->pszWriteMSRR0
1613 || pApicReg->pszReadMSRR0
1614 || pApicReg->pszBusDeliverR0)
1615 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
1616 || !VALID_PTR(pApicReg->pszHasPendingIrqR0)
1617 || !VALID_PTR(pApicReg->pszSetBaseR0)
1618 || !VALID_PTR(pApicReg->pszGetBaseR0)
1619 || !VALID_PTR(pApicReg->pszSetTPRR0)
1620 || !VALID_PTR(pApicReg->pszGetTPRR0)
1621 || !VALID_PTR(pApicReg->pszReadMSRR0)
1622 || !VALID_PTR(pApicReg->pszWriteMSRR0)
1623 || !VALID_PTR(pApicReg->pszBusDeliverR0))
1624 )
1625 {
1626 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
1627 Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
1628 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
1629 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
1630 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
1631 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
1632 Assert(VALID_PTR(pApicReg->pszReadMSRR0));
1633 Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
1634 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
1635 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1636 return VERR_INVALID_PARAMETER;
1637 }
1638 if (!ppApicHlpR3)
1639 {
1640 Assert(ppApicHlpR3);
1641 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1642 return VERR_INVALID_PARAMETER;
1643 }
1644
1645 /*
1646 * Only one APIC device. On SMP we have single logical device covering all LAPICs,
1647 * as they need to communicate and share state easily.
1648 */
1649 PVM pVM = pDevIns->Internal.s.pVMR3;
1650 if (pVM->pdm.s.Apic.pDevInsR3)
1651 {
1652 AssertMsgFailed(("Only one apic device is supported!\n"));
1653 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1654 return VERR_INVALID_PARAMETER;
1655 }
1656
1657 /*
1658 * Resolve & initialize the RC bits.
1659 */
1660 if (pApicReg->pszGetInterruptRC)
1661 {
1662 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
1663 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
1664 if (RT_SUCCESS(rc))
1665 {
1666 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
1667 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
1668 }
1669 if (RT_SUCCESS(rc))
1670 {
1671 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
1672 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetBaseRC, rc));
1673 }
1674 if (RT_SUCCESS(rc))
1675 {
1676 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
1677 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetBaseRC, rc));
1678 }
1679 if (RT_SUCCESS(rc))
1680 {
1681 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
1682 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszSetTPRRC, rc));
1683 }
1684 if (RT_SUCCESS(rc))
1685 {
1686 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
1687 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszGetTPRRC, rc));
1688 }
1689 if (RT_SUCCESS(rc))
1690 {
1691 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
1692 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
1693 }
1694 if (RT_SUCCESS(rc))
1695 {
1696 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
1697 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszReadMSRRC, rc));
1698 }
1699 if (RT_SUCCESS(rc))
1700 {
1701 rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
1702 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
1703 }
1704 if (RT_FAILURE(rc))
1705 {
1706 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1707 return rc;
1708 }
1709 pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1710 }
1711 else
1712 {
1713 pVM->pdm.s.Apic.pDevInsRC = 0;
1714 pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
1715 pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
1716 pVM->pdm.s.Apic.pfnSetBaseRC = 0;
1717 pVM->pdm.s.Apic.pfnGetBaseRC = 0;
1718 pVM->pdm.s.Apic.pfnSetTPRRC = 0;
1719 pVM->pdm.s.Apic.pfnGetTPRRC = 0;
1720 pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
1721 pVM->pdm.s.Apic.pfnReadMSRRC = 0;
1722 pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
1723 }
1724
1725 /*
1726 * Resolve & initialize the R0 bits.
1727 */
1728 if (pApicReg->pszGetInterruptR0)
1729 {
1730 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
1731 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
1732 if (RT_SUCCESS(rc))
1733 {
1734 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
1735 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
1736 }
1737 if (RT_SUCCESS(rc))
1738 {
1739 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
1740 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
1741 }
1742 if (RT_SUCCESS(rc))
1743 {
1744 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
1745 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
1746 }
1747 if (RT_SUCCESS(rc))
1748 {
1749 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
1750 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
1751 }
1752 if (RT_SUCCESS(rc))
1753 {
1754 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
1755 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
1756 }
1757 if (RT_SUCCESS(rc))
1758 {
1759 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
1760 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
1761 }
1762 if (RT_SUCCESS(rc))
1763 {
1764 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
1765 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
1766 }
1767 if (RT_SUCCESS(rc))
1768 {
1769 rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
1770 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
1771 }
1772 if (RT_FAILURE(rc))
1773 {
1774 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1775 return rc;
1776 }
1777 pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1778 Assert(pVM->pdm.s.Apic.pDevInsR0);
1779 }
1780 else
1781 {
1782 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
1783 pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
1784 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
1785 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
1786 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
1787 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
1788 pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
1789 pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
1790 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
1791 pVM->pdm.s.Apic.pDevInsR0 = 0;
1792 }
1793
1794 /*
1795 * Initialize the HC bits.
1796 */
1797 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
1798 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
1799 pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
1800 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
1801 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
1802 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
1803 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
1804 pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
1805 pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
1806 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
1807 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1808
1809 /* set the helper pointer and return. */
1810 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
1811 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1812 return VINF_SUCCESS;
1813}
1814
1815
1816/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
1817static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
1818{
1819 PDMDEV_ASSERT_DEVINS(pDevIns);
1820 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1821 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
1822 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
1823 pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
1824
1825 /*
1826 * Validate input.
1827 */
1828 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
1829 {
1830 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
1831 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1832 return VERR_INVALID_PARAMETER;
1833 }
1834 if (!pIoApicReg->pfnSetIrqR3)
1835 {
1836 Assert(pIoApicReg->pfnSetIrqR3);
1837 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1838 return VERR_INVALID_PARAMETER;
1839 }
1840 if ( pIoApicReg->pszSetIrqRC
1841 && !VALID_PTR(pIoApicReg->pszSetIrqRC))
1842 {
1843 Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
1844 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1845 return VERR_INVALID_PARAMETER;
1846 }
1847 if ( pIoApicReg->pszSetIrqR0
1848 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
1849 {
1850 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
1851 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1852 return VERR_INVALID_PARAMETER;
1853 }
1854 if (!ppIoApicHlpR3)
1855 {
1856 Assert(ppIoApicHlpR3);
1857 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1858 return VERR_INVALID_PARAMETER;
1859 }
1860
1861 /*
1862 * The I/O APIC requires the APIC to be present (hacks++).
1863 * If the I/O APIC does GC stuff so must the APIC.
1864 */
1865 PVM pVM = pDevIns->Internal.s.pVMR3;
1866 if (!pVM->pdm.s.Apic.pDevInsR3)
1867 {
1868 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
1869 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1870 return VERR_INVALID_PARAMETER;
1871 }
1872 if ( pIoApicReg->pszSetIrqRC
1873 && !pVM->pdm.s.Apic.pDevInsRC)
1874 {
1875 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
1876 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1877 return VERR_INVALID_PARAMETER;
1878 }
1879
1880 /*
1881 * Only one I/O APIC device.
1882 */
1883 if (pVM->pdm.s.IoApic.pDevInsR3)
1884 {
1885 AssertMsgFailed(("Only one ioapic device is supported!\n"));
1886 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1887 return VERR_INVALID_PARAMETER;
1888 }
1889
1890 /*
1891 * Resolve & initialize the GC bits.
1892 */
1893 if (pIoApicReg->pszSetIrqRC)
1894 {
1895 int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
1896 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
1897 if (RT_FAILURE(rc))
1898 {
1899 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1900 return rc;
1901 }
1902 pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1903 }
1904 else
1905 {
1906 pVM->pdm.s.IoApic.pDevInsRC = 0;
1907 pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
1908 }
1909
1910 /*
1911 * Resolve & initialize the R0 bits.
1912 */
1913 if (pIoApicReg->pszSetIrqR0)
1914 {
1915 int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
1916 AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
1917 if (RT_FAILURE(rc))
1918 {
1919 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1920 return rc;
1921 }
1922 pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1923 Assert(pVM->pdm.s.IoApic.pDevInsR0);
1924 }
1925 else
1926 {
1927 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
1928 pVM->pdm.s.IoApic.pDevInsR0 = 0;
1929 }
1930
1931 /*
1932 * Initialize the R3 bits.
1933 */
1934 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
1935 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
1936 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
1937
1938 /* set the helper pointer and return. */
1939 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
1940 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
1941 return VINF_SUCCESS;
1942}
1943
1944
1945/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
1946static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
1947{
1948 PDMDEV_ASSERT_DEVINS(pDevIns);
1949 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1950 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
1951 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
1952 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
1953
1954 /*
1955 * Validate input.
1956 */
1957 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
1958 {
1959 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
1960 PDM_DMACREG_VERSION));
1961 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
1962 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1963 return VERR_INVALID_PARAMETER;
1964 }
1965 if ( !pDmacReg->pfnRun
1966 || !pDmacReg->pfnRegister
1967 || !pDmacReg->pfnReadMemory
1968 || !pDmacReg->pfnWriteMemory
1969 || !pDmacReg->pfnSetDREQ
1970 || !pDmacReg->pfnGetChannelMode)
1971 {
1972 Assert(pDmacReg->pfnRun);
1973 Assert(pDmacReg->pfnRegister);
1974 Assert(pDmacReg->pfnReadMemory);
1975 Assert(pDmacReg->pfnWriteMemory);
1976 Assert(pDmacReg->pfnSetDREQ);
1977 Assert(pDmacReg->pfnGetChannelMode);
1978 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1979 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1980 return VERR_INVALID_PARAMETER;
1981 }
1982
1983 if (!ppDmacHlp)
1984 {
1985 Assert(ppDmacHlp);
1986 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
1987 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1988 return VERR_INVALID_PARAMETER;
1989 }
1990
1991 /*
1992 * Only one DMA device.
1993 */
1994 PVM pVM = pDevIns->Internal.s.pVMR3;
1995 if (pVM->pdm.s.pDmac)
1996 {
1997 AssertMsgFailed(("Only one DMA device is supported!\n"));
1998 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
1999 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2000 return VERR_INVALID_PARAMETER;
2001 }
2002
2003 /*
2004 * Allocate and initialize pci bus structure.
2005 */
2006 int rc = VINF_SUCCESS;
2007 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2008 if (pDmac)
2009 {
2010 pDmac->pDevIns = pDevIns;
2011 pDmac->Reg = *pDmacReg;
2012 pVM->pdm.s.pDmac = pDmac;
2013
2014 /* set the helper pointer. */
2015 *ppDmacHlp = &g_pdmR3DevDmacHlp;
2016 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2017 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2018 }
2019 else
2020 rc = VERR_NO_MEMORY;
2021
2022 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2023 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2024 return rc;
2025}
2026
2027
2028/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2029static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2030{
2031 PDMDEV_ASSERT_DEVINS(pDevIns);
2032 PVM pVM = pDevIns->Internal.s.pVMR3;
2033 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
2034 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
2035
2036#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2037 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2038 {
2039 char szNames[128];
2040 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2041 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2042 }
2043#endif
2044
2045 int rc;
2046 if (VM_IS_EMT(pVM))
2047 rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
2048 else
2049 rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
2050
2051 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2052 return rc;
2053}
2054
2055
2056/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2057static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2058{
2059 PDMDEV_ASSERT_DEVINS(pDevIns);
2060 PVM pVM = pDevIns->Internal.s.pVMR3;
2061 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
2062 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
2063
2064#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2065 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2066 {
2067 char szNames[128];
2068 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2069 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2070 }
2071#endif
2072
2073 int rc;
2074 if (VM_IS_EMT(pVM))
2075 rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
2076 else
2077 rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite);
2078
2079 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2080 return rc;
2081}
2082
2083
2084/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2085static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2086{
2087 PDMDEV_ASSERT_DEVINS(pDevIns);
2088 PVM pVM = pDevIns->Internal.s.pVMR3;
2089 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2090 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2091 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2092
2093#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2094 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2095 {
2096 char szNames[128];
2097 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2098 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2099 }
2100#endif
2101
2102 int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
2103
2104 Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2105 return rc;
2106}
2107
2108
2109/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2110static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2111{
2112 PDMDEV_ASSERT_DEVINS(pDevIns);
2113 PVM pVM = pDevIns->Internal.s.pVMR3;
2114 LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
2115 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
2116 AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
2117
2118#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2119 if (!VM_IS_EMT(pVM)) /** @todo not true for SMP. oh joy! */
2120 {
2121 char szNames[128];
2122 uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
2123 AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
2124 }
2125#endif
2126
2127 int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
2128
2129 Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2130 return rc;
2131}
2132
2133
2134/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2135static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2136{
2137 PDMDEV_ASSERT_DEVINS(pDevIns);
2138 PVM pVM = pDevIns->Internal.s.pVMR3;
2139 LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
2140 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pLock));
2141
2142 PGMPhysReleasePageMappingLock(pVM, pLock);
2143
2144 Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2145}
2146
2147
2148/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2149static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2150{
2151 PDMDEV_ASSERT_DEVINS(pDevIns);
2152 PVM pVM = pDevIns->Internal.s.pVMR3;
2153 VM_ASSERT_EMT(pVM);
2154 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
2155 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
2156
2157 if (!VM_IS_EMT(pVM))
2158 return VERR_ACCESS_DENIED;
2159#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2160 /** @todo SMP. */
2161#endif
2162
2163 int rc = PGMPhysSimpleReadGCPtr(pVM, pvDst, GCVirtSrc, cb);
2164
2165 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2166
2167 return rc;
2168}
2169
2170
2171/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2172static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2173{
2174 PDMDEV_ASSERT_DEVINS(pDevIns);
2175 PVM pVM = pDevIns->Internal.s.pVMR3;
2176 VM_ASSERT_EMT(pVM);
2177 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
2178 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
2179
2180 if (!VM_IS_EMT(pVM))
2181 return VERR_ACCESS_DENIED;
2182#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2183 /** @todo SMP. */
2184#endif
2185
2186 int rc = PGMPhysSimpleWriteGCPtr(pVM, GCVirtDst, pvSrc, cb);
2187
2188 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2189
2190 return rc;
2191}
2192
2193
2194/** @copydoc PDMDEVHLPR3::pfnPhysGCPtr2GCPhys */
2195static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
2196{
2197 PDMDEV_ASSERT_DEVINS(pDevIns);
2198 PVM pVM = pDevIns->Internal.s.pVMR3;
2199 VM_ASSERT_EMT(pVM);
2200 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
2201 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
2202
2203 if (!VM_IS_EMT(pVM))
2204 return VERR_ACCESS_DENIED;
2205#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
2206 /** @todo SMP. */
2207#endif
2208
2209 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, pGCPhys);
2210
2211 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc *pGCPhys=%RGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys));
2212
2213 return rc;
2214}
2215
2216
2217/** @copydoc PDMDEVHLPR3::pfnVMState */
2218static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
2219{
2220 PDMDEV_ASSERT_DEVINS(pDevIns);
2221
2222 VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
2223
2224 LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2225 enmVMState, VMR3GetStateName(enmVMState)));
2226 return enmVMState;
2227}
2228
2229
2230/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2231static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2232{
2233 PDMDEV_ASSERT_DEVINS(pDevIns);
2234 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2235
2236 bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMR3);
2237
2238 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
2239 return fRc;
2240}
2241
2242
2243/** @copydoc PDMDEVHLPR3::pfnA20Set */
2244static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2245{
2246 PDMDEV_ASSERT_DEVINS(pDevIns);
2247 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2248 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
2249 //Assert(*(unsigned *)&fEnable <= 1);
2250 PGMR3PhysSetA20(pDevIns->Internal.s.pVMR3, fEnable);
2251}
2252
2253
2254/** @copydoc PDMDEVHLPR3::pfnVMReset */
2255static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2256{
2257 PDMDEV_ASSERT_DEVINS(pDevIns);
2258 PVM pVM = pDevIns->Internal.s.pVMR3;
2259 VM_ASSERT_EMT(pVM);
2260 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2261 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2262
2263 /*
2264 * We postpone this operation because we're likely to be inside a I/O instruction
2265 * and the EIP will be updated when we return.
2266 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2267 */
2268 bool fHaltOnReset;
2269 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2270 if (RT_SUCCESS(rc) && fHaltOnReset)
2271 {
2272 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2273 rc = VINF_EM_HALT;
2274 }
2275 else
2276 {
2277 VM_FF_SET(pVM, VM_FF_RESET);
2278 rc = VINF_EM_RESET;
2279 }
2280
2281 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2282 return rc;
2283}
2284
2285
2286/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2287static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2288{
2289 PDMDEV_ASSERT_DEVINS(pDevIns);
2290 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2291 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2292 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2293
2294 int rc = VMR3Suspend(pDevIns->Internal.s.pVMR3);
2295
2296 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2297 return rc;
2298}
2299
2300
2301/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2302static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2303{
2304 PDMDEV_ASSERT_DEVINS(pDevIns);
2305 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2306 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2307 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2308
2309 int rc = VMR3PowerOff(pDevIns->Internal.s.pVMR3);
2310
2311 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2312 return rc;
2313}
2314
2315
2316/** @copydoc PDMDEVHLPR3::pfnLockVM */
2317static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
2318{
2319 return VMMR3Lock(pDevIns->Internal.s.pVMR3);
2320}
2321
2322
2323/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2324static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
2325{
2326 return VMMR3Unlock(pDevIns->Internal.s.pVMR3);
2327}
2328
2329
2330/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2331static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2332{
2333 PVM pVM = pDevIns->Internal.s.pVMR3;
2334 if (VMMR3LockIsOwner(pVM))
2335 return true;
2336
2337 RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
2338 RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
2339 char szMsg[100];
2340 RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
2341 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2342 NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
2343 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2344 AssertBreakpoint();
2345 return false;
2346}
2347
2348/** @copydoc PDMDEVHLPR3::pfnDMARegister */
2349static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
2350{
2351 PDMDEV_ASSERT_DEVINS(pDevIns);
2352 PVM pVM = pDevIns->Internal.s.pVMR3;
2353 VM_ASSERT_EMT(pVM);
2354 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
2355 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
2356 int rc = VINF_SUCCESS;
2357 if (pVM->pdm.s.pDmac)
2358 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
2359 else
2360 {
2361 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2362 rc = VERR_PDM_NO_DMAC_INSTANCE;
2363 }
2364 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
2365 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2366 return rc;
2367}
2368
2369/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
2370static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
2371{
2372 PDMDEV_ASSERT_DEVINS(pDevIns);
2373 PVM pVM = pDevIns->Internal.s.pVMR3;
2374 VM_ASSERT_EMT(pVM);
2375 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
2376 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
2377 int rc = VINF_SUCCESS;
2378 if (pVM->pdm.s.pDmac)
2379 {
2380 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2381 if (pcbRead)
2382 *pcbRead = cb;
2383 }
2384 else
2385 {
2386 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2387 rc = VERR_PDM_NO_DMAC_INSTANCE;
2388 }
2389 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
2390 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2391 return rc;
2392}
2393
2394/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
2395static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
2396{
2397 PDMDEV_ASSERT_DEVINS(pDevIns);
2398 PVM pVM = pDevIns->Internal.s.pVMR3;
2399 VM_ASSERT_EMT(pVM);
2400 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
2401 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
2402 int rc = VINF_SUCCESS;
2403 if (pVM->pdm.s.pDmac)
2404 {
2405 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
2406 if (pcbWritten)
2407 *pcbWritten = cb;
2408 }
2409 else
2410 {
2411 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2412 rc = VERR_PDM_NO_DMAC_INSTANCE;
2413 }
2414 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
2415 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2416 return rc;
2417}
2418
2419/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
2420static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
2421{
2422 PDMDEV_ASSERT_DEVINS(pDevIns);
2423 PVM pVM = pDevIns->Internal.s.pVMR3;
2424 VM_ASSERT_EMT(pVM);
2425 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
2426 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
2427 int rc = VINF_SUCCESS;
2428 if (pVM->pdm.s.pDmac)
2429 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
2430 else
2431 {
2432 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2433 rc = VERR_PDM_NO_DMAC_INSTANCE;
2434 }
2435 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
2436 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2437 return rc;
2438}
2439
2440/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
2441static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
2442{
2443 PDMDEV_ASSERT_DEVINS(pDevIns);
2444 PVM pVM = pDevIns->Internal.s.pVMR3;
2445 VM_ASSERT_EMT(pVM);
2446 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
2447 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
2448 uint8_t u8Mode;
2449 if (pVM->pdm.s.pDmac)
2450 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
2451 else
2452 {
2453 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2454 u8Mode = 3 << 2 /* illegal mode type */;
2455 }
2456 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
2457 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
2458 return u8Mode;
2459}
2460
2461/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
2462static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
2463{
2464 PDMDEV_ASSERT_DEVINS(pDevIns);
2465 PVM pVM = pDevIns->Internal.s.pVMR3;
2466 VM_ASSERT_EMT(pVM);
2467 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
2468 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
2469
2470 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
2471 VM_FF_SET(pVM, VM_FF_PDM_DMA);
2472 REMR3NotifyDmaPending(pVM);
2473 VMR3NotifyFF(pVM, true);
2474}
2475
2476
2477/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
2478static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
2479{
2480 PDMDEV_ASSERT_DEVINS(pDevIns);
2481 PVM pVM = pDevIns->Internal.s.pVMR3;
2482 VM_ASSERT_EMT(pVM);
2483
2484 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
2485 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
2486 int rc;
2487 if (pVM->pdm.s.pRtc)
2488 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
2489 else
2490 rc = VERR_PDM_NO_RTC_INSTANCE;
2491
2492 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2493 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2494 return rc;
2495}
2496
2497
2498/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
2499static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
2500{
2501 PDMDEV_ASSERT_DEVINS(pDevIns);
2502 PVM pVM = pDevIns->Internal.s.pVMR3;
2503 VM_ASSERT_EMT(pVM);
2504
2505 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
2506 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
2507 int rc;
2508 if (pVM->pdm.s.pRtc)
2509 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
2510 else
2511 rc = VERR_PDM_NO_RTC_INSTANCE;
2512
2513 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
2514 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2515 return rc;
2516}
2517
2518
2519/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
2520static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2521 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
2522{
2523 PDMDEV_ASSERT_DEVINS(pDevIns);
2524 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2525 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2526 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2527
2528 CPUMGetGuestCpuId(pDevIns->Internal.s.pVMR3, iLeaf, pEax, pEbx, pEcx, pEdx);
2529
2530 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
2531 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
2532}
2533
2534
2535/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
2536static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
2537{
2538 PDMDEV_ASSERT_DEVINS(pDevIns);
2539 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
2540 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
2541
2542 int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
2543
2544 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2545 return rc;
2546}
2547
2548
2549/**
2550 * @copydoc PDMDEVHLPR3::pfnMMIO2Register
2551 */
2552static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
2553{
2554 PDMDEV_ASSERT_DEVINS(pDevIns);
2555 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2556 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
2557 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
2558
2559 int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
2560
2561 LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2562 return rc;
2563}
2564
2565
2566/**
2567 * @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
2568 */
2569static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
2570{
2571 PDMDEV_ASSERT_DEVINS(pDevIns);
2572 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2573 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=#x\n",
2574 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion));
2575
2576 AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
2577
2578 int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
2579
2580 LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2581 return rc;
2582}
2583
2584
2585/**
2586 * @copydoc PDMDEVHLPR3::pfnMMIO2Map
2587 */
2588static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2589{
2590 PDMDEV_ASSERT_DEVINS(pDevIns);
2591 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2592 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2593 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2594
2595 int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2596
2597 LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2598 return rc;
2599}
2600
2601
2602/**
2603 * @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
2604 */
2605static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
2606{
2607 PDMDEV_ASSERT_DEVINS(pDevIns);
2608 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2609 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=#x GCPhys=%#RGp\n",
2610 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, GCPhys));
2611
2612 int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
2613
2614 LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2615 return rc;
2616}
2617
2618
2619/**
2620 * @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
2621 */
2622static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2623 const char *pszDesc, PRTRCPTR pRCPtr)
2624{
2625 PDMDEV_ASSERT_DEVINS(pDevIns);
2626 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2627 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
2628 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
2629
2630 int rc = MMR3HyperMapMMIO2(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
2631
2632 LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc *pRCPtr=%RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pRCPtr));
2633 return rc;
2634}
2635
2636
2637/**
2638 * @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
2639 */
2640static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
2641 const char *pszDesc, PRTR0PTR pR0Ptr)
2642{
2643 PDMDEV_ASSERT_DEVINS(pDevIns);
2644 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2645 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
2646 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
2647
2648 int rc = PGMR3PhysMMIO2MapKernel(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
2649
2650 LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc *pR0Ptr=%RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pR0Ptr));
2651 return rc;
2652}
2653
2654
2655/**
2656 * @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2657 */
2658static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2659{
2660 PDMDEV_ASSERT_DEVINS(pDevIns);
2661 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2662
2663 int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2664 return rc;
2665}
2666
2667
2668/**
2669 * @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2670 */
2671static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2672{
2673 PDMDEV_ASSERT_DEVINS(pDevIns);
2674 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2675
2676 int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2677 return rc;
2678}
2679
2680
2681/**
2682 * The device helper structure for trusted devices.
2683 */
2684const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2685{
2686 PDM_DEVHLP_VERSION,
2687 pdmR3DevHlp_IOPortRegister,
2688 pdmR3DevHlp_IOPortRegisterGC,
2689 pdmR3DevHlp_IOPortRegisterR0,
2690 pdmR3DevHlp_IOPortDeregister,
2691 pdmR3DevHlp_MMIORegister,
2692 pdmR3DevHlp_MMIORegisterGC,
2693 pdmR3DevHlp_MMIORegisterR0,
2694 pdmR3DevHlp_MMIODeregister,
2695 pdmR3DevHlp_ROMRegister,
2696 pdmR3DevHlp_SSMRegister,
2697 pdmR3DevHlp_TMTimerCreate,
2698 pdmR3DevHlp_TMTimerCreateExternal,
2699 pdmR3DevHlp_PCIRegister,
2700 pdmR3DevHlp_PCIIORegionRegister,
2701 pdmR3DevHlp_PCISetConfigCallbacks,
2702 pdmR3DevHlp_PCISetIrq,
2703 pdmR3DevHlp_PCISetIrqNoWait,
2704 pdmR3DevHlp_ISASetIrq,
2705 pdmR3DevHlp_ISASetIrqNoWait,
2706 pdmR3DevHlp_DriverAttach,
2707 pdmR3DevHlp_MMHeapAlloc,
2708 pdmR3DevHlp_MMHeapAllocZ,
2709 pdmR3DevHlp_MMHeapFree,
2710 pdmR3DevHlp_VMSetError,
2711 pdmR3DevHlp_VMSetErrorV,
2712 pdmR3DevHlp_VMSetRuntimeError,
2713 pdmR3DevHlp_VMSetRuntimeErrorV,
2714 pdmR3DevHlp_AssertEMT,
2715 pdmR3DevHlp_AssertOther,
2716 pdmR3DevHlp_DBGFStopV,
2717 pdmR3DevHlp_DBGFInfoRegister,
2718 pdmR3DevHlp_STAMRegister,
2719 pdmR3DevHlp_STAMRegisterF,
2720 pdmR3DevHlp_STAMRegisterV,
2721 pdmR3DevHlp_RTCRegister,
2722 pdmR3DevHlp_PDMQueueCreate,
2723 pdmR3DevHlp_CritSectInit,
2724 pdmR3DevHlp_UTCNow,
2725 pdmR3DevHlp_PDMThreadCreate,
2726 pdmR3DevHlp_PhysGCPtr2GCPhys,
2727 pdmR3DevHlp_VMState,
2728 0,
2729 0,
2730 0,
2731 0,
2732 0,
2733 0,
2734 0,
2735 pdmR3DevHlp_GetVM,
2736 pdmR3DevHlp_PCIBusRegister,
2737 pdmR3DevHlp_PICRegister,
2738 pdmR3DevHlp_APICRegister,
2739 pdmR3DevHlp_IOAPICRegister,
2740 pdmR3DevHlp_DMACRegister,
2741 pdmR3DevHlp_PhysRead,
2742 pdmR3DevHlp_PhysWrite,
2743 pdmR3DevHlp_PhysGCPhys2CCPtr,
2744 pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2745 pdmR3DevHlp_PhysReleasePageMappingLock,
2746 pdmR3DevHlp_PhysReadGCVirt,
2747 pdmR3DevHlp_PhysWriteGCVirt,
2748 pdmR3DevHlp_A20IsEnabled,
2749 pdmR3DevHlp_A20Set,
2750 pdmR3DevHlp_VMReset,
2751 pdmR3DevHlp_VMSuspend,
2752 pdmR3DevHlp_VMPowerOff,
2753 pdmR3DevHlp_LockVM,
2754 pdmR3DevHlp_UnlockVM,
2755 pdmR3DevHlp_AssertVMLock,
2756 pdmR3DevHlp_DMARegister,
2757 pdmR3DevHlp_DMAReadMemory,
2758 pdmR3DevHlp_DMAWriteMemory,
2759 pdmR3DevHlp_DMASetDREQ,
2760 pdmR3DevHlp_DMAGetChannelMode,
2761 pdmR3DevHlp_DMASchedule,
2762 pdmR3DevHlp_CMOSWrite,
2763 pdmR3DevHlp_CMOSRead,
2764 pdmR3DevHlp_GetCpuId,
2765 pdmR3DevHlp_ROMProtectShadow,
2766 pdmR3DevHlp_MMIO2Register,
2767 pdmR3DevHlp_MMIO2Deregister,
2768 pdmR3DevHlp_MMIO2Map,
2769 pdmR3DevHlp_MMIO2Unmap,
2770 pdmR3DevHlp_MMHyperMapMMIO2,
2771 pdmR3DevHlp_MMIO2MapKernel,
2772 pdmR3DevHlp_RegisterVMMDevHeap,
2773 pdmR3DevHlp_UnregisterVMMDevHeap,
2774 PDM_DEVHLP_VERSION /* the end */
2775};
2776
2777
2778
2779
2780/** @copydoc PDMDEVHLPR3::pfnGetVM */
2781static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2782{
2783 PDMDEV_ASSERT_DEVINS(pDevIns);
2784 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2785 return NULL;
2786}
2787
2788
2789/** @copydoc PDMDEVHLPR3::pfnPCIBusRegister */
2790static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2791{
2792 PDMDEV_ASSERT_DEVINS(pDevIns);
2793 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2794 NOREF(pPciBusReg);
2795 NOREF(ppPciHlpR3);
2796 return VERR_ACCESS_DENIED;
2797}
2798
2799
2800/** @copydoc PDMDEVHLPR3::pfnPICRegister */
2801static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2802{
2803 PDMDEV_ASSERT_DEVINS(pDevIns);
2804 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2805 NOREF(pPicReg);
2806 NOREF(ppPicHlpR3);
2807 return VERR_ACCESS_DENIED;
2808}
2809
2810
2811/** @copydoc PDMDEVHLPR3::pfnAPICRegister */
2812static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2813{
2814 PDMDEV_ASSERT_DEVINS(pDevIns);
2815 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2816 NOREF(pApicReg);
2817 NOREF(ppApicHlpR3);
2818 return VERR_ACCESS_DENIED;
2819}
2820
2821
2822/** @copydoc PDMDEVHLPR3::pfnIOAPICRegister */
2823static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2824{
2825 PDMDEV_ASSERT_DEVINS(pDevIns);
2826 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2827 NOREF(pIoApicReg);
2828 NOREF(ppIoApicHlpR3);
2829 return VERR_ACCESS_DENIED;
2830}
2831
2832
2833/** @copydoc PDMDEVHLPR3::pfnDMACRegister */
2834static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2835{
2836 PDMDEV_ASSERT_DEVINS(pDevIns);
2837 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2838 NOREF(pDmacReg);
2839 NOREF(ppDmacHlp);
2840 return VERR_ACCESS_DENIED;
2841}
2842
2843
2844/** @copydoc PDMDEVHLPR3::pfnPhysRead */
2845static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
2846{
2847 PDMDEV_ASSERT_DEVINS(pDevIns);
2848 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2849 NOREF(GCPhys);
2850 NOREF(pvBuf);
2851 NOREF(cbRead);
2852 return VERR_ACCESS_DENIED;
2853}
2854
2855
2856/** @copydoc PDMDEVHLPR3::pfnPhysWrite */
2857static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
2858{
2859 PDMDEV_ASSERT_DEVINS(pDevIns);
2860 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2861 NOREF(GCPhys);
2862 NOREF(pvBuf);
2863 NOREF(cbWrite);
2864 return VERR_ACCESS_DENIED;
2865}
2866
2867
2868/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtr */
2869static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
2870{
2871 PDMDEV_ASSERT_DEVINS(pDevIns);
2872 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2873 NOREF(GCPhys);
2874 NOREF(fFlags);
2875 NOREF(ppv);
2876 NOREF(pLock);
2877 return VERR_ACCESS_DENIED;
2878}
2879
2880
2881/** @copydoc PDMDEVHLPR3::pfnPhysGCPhys2CCPtrReadOnly */
2882static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
2883{
2884 PDMDEV_ASSERT_DEVINS(pDevIns);
2885 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2886 NOREF(GCPhys);
2887 NOREF(fFlags);
2888 NOREF(ppv);
2889 NOREF(pLock);
2890 return VERR_ACCESS_DENIED;
2891}
2892
2893
2894/** @copydoc PDMDEVHLPR3::pfnPhysReleasePageMappingLock */
2895static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
2896{
2897 PDMDEV_ASSERT_DEVINS(pDevIns);
2898 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2899 NOREF(pLock);
2900}
2901
2902
2903/** @copydoc PDMDEVHLPR3::pfnPhysReadGCVirt */
2904static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
2905{
2906 PDMDEV_ASSERT_DEVINS(pDevIns);
2907 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2908 NOREF(pvDst);
2909 NOREF(GCVirtSrc);
2910 NOREF(cb);
2911 return VERR_ACCESS_DENIED;
2912}
2913
2914
2915/** @copydoc PDMDEVHLPR3::pfnPhysWriteGCVirt */
2916static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
2917{
2918 PDMDEV_ASSERT_DEVINS(pDevIns);
2919 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2920 NOREF(GCVirtDst);
2921 NOREF(pvSrc);
2922 NOREF(cb);
2923 return VERR_ACCESS_DENIED;
2924}
2925
2926
2927/** @copydoc PDMDEVHLPR3::pfnA20IsEnabled */
2928static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
2929{
2930 PDMDEV_ASSERT_DEVINS(pDevIns);
2931 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2932 return false;
2933}
2934
2935
2936/** @copydoc PDMDEVHLPR3::pfnA20Set */
2937static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2938{
2939 PDMDEV_ASSERT_DEVINS(pDevIns);
2940 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2941 NOREF(fEnable);
2942}
2943
2944
2945/** @copydoc PDMDEVHLPR3::pfnVMReset */
2946static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2947{
2948 PDMDEV_ASSERT_DEVINS(pDevIns);
2949 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2950 return VERR_ACCESS_DENIED;
2951}
2952
2953
2954/** @copydoc PDMDEVHLPR3::pfnVMSuspend */
2955static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
2956{
2957 PDMDEV_ASSERT_DEVINS(pDevIns);
2958 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2959 return VERR_ACCESS_DENIED;
2960}
2961
2962
2963/** @copydoc PDMDEVHLPR3::pfnVMPowerOff */
2964static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
2965{
2966 PDMDEV_ASSERT_DEVINS(pDevIns);
2967 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2968 return VERR_ACCESS_DENIED;
2969}
2970
2971
2972/** @copydoc PDMDEVHLPR3::pfnLockVM */
2973static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
2974{
2975 PDMDEV_ASSERT_DEVINS(pDevIns);
2976 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2977 return VERR_ACCESS_DENIED;
2978}
2979
2980
2981/** @copydoc PDMDEVHLPR3::pfnUnlockVM */
2982static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
2983{
2984 PDMDEV_ASSERT_DEVINS(pDevIns);
2985 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2986 return VERR_ACCESS_DENIED;
2987}
2988
2989
2990/** @copydoc PDMDEVHLPR3::pfnAssertVMLock */
2991static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2992{
2993 PDMDEV_ASSERT_DEVINS(pDevIns);
2994 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2995 return false;
2996}
2997
2998
2999/** @copydoc PDMDEVHLPR3::pfnDMARegister */
3000static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3001{
3002 PDMDEV_ASSERT_DEVINS(pDevIns);
3003 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3004 return VERR_ACCESS_DENIED;
3005}
3006
3007
3008/** @copydoc PDMDEVHLPR3::pfnDMAReadMemory */
3009static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3010{
3011 PDMDEV_ASSERT_DEVINS(pDevIns);
3012 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3013 if (pcbRead)
3014 *pcbRead = 0;
3015 return VERR_ACCESS_DENIED;
3016}
3017
3018
3019/** @copydoc PDMDEVHLPR3::pfnDMAWriteMemory */
3020static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3021{
3022 PDMDEV_ASSERT_DEVINS(pDevIns);
3023 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3024 if (pcbWritten)
3025 *pcbWritten = 0;
3026 return VERR_ACCESS_DENIED;
3027}
3028
3029
3030/** @copydoc PDMDEVHLPR3::pfnDMASetDREQ */
3031static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3032{
3033 PDMDEV_ASSERT_DEVINS(pDevIns);
3034 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3035 return VERR_ACCESS_DENIED;
3036}
3037
3038
3039/** @copydoc PDMDEVHLPR3::pfnDMAGetChannelMode */
3040static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3041{
3042 PDMDEV_ASSERT_DEVINS(pDevIns);
3043 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3044 return 3 << 2 /* illegal mode type */;
3045}
3046
3047
3048/** @copydoc PDMDEVHLPR3::pfnDMASchedule */
3049static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3050{
3051 PDMDEV_ASSERT_DEVINS(pDevIns);
3052 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3053}
3054
3055
3056/** @copydoc PDMDEVHLPR3::pfnCMOSWrite */
3057static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3058{
3059 PDMDEV_ASSERT_DEVINS(pDevIns);
3060 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3061 return VERR_ACCESS_DENIED;
3062}
3063
3064
3065/** @copydoc PDMDEVHLPR3::pfnCMOSRead */
3066static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3067{
3068 PDMDEV_ASSERT_DEVINS(pDevIns);
3069 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3070 return VERR_ACCESS_DENIED;
3071}
3072
3073
3074/** @copydoc PDMDEVHLPR3::pfnGetCpuId */
3075static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3076 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3077{
3078 PDMDEV_ASSERT_DEVINS(pDevIns);
3079 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3080}
3081
3082
3083/** @copydoc PDMDEVHLPR3::pfnROMProtectShadow */
3084static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
3085{
3086 PDMDEV_ASSERT_DEVINS(pDevIns);
3087 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3088 return VERR_ACCESS_DENIED;
3089}
3090
3091
3092/** @copydoc PDMDEVHLPR3::pfnMMIO2Register */
3093static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc)
3094{
3095 PDMDEV_ASSERT_DEVINS(pDevIns);
3096 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3097 return VERR_ACCESS_DENIED;
3098}
3099
3100
3101/** @copydoc PDMDEVHLPR3::pfnMMIO2Deregister */
3102static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
3103{
3104 PDMDEV_ASSERT_DEVINS(pDevIns);
3105 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3106 return VERR_ACCESS_DENIED;
3107}
3108
3109
3110/** @copydoc PDMDEVHLPR3::pfnMMIO2Map */
3111static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3112{
3113 PDMDEV_ASSERT_DEVINS(pDevIns);
3114 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3115 return VERR_ACCESS_DENIED;
3116}
3117
3118
3119/** @copydoc PDMDEVHLPR3::pfnMMIO2Unmap */
3120static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
3121{
3122 PDMDEV_ASSERT_DEVINS(pDevIns);
3123 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3124 return VERR_ACCESS_DENIED;
3125}
3126
3127
3128/** @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2 */
3129static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr)
3130{
3131 PDMDEV_ASSERT_DEVINS(pDevIns);
3132 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3133 return VERR_ACCESS_DENIED;
3134}
3135
3136
3137/** @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel */
3138static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
3139{
3140 PDMDEV_ASSERT_DEVINS(pDevIns);
3141 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3142 return VERR_ACCESS_DENIED;
3143}
3144
3145
3146/** @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap */
3147static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
3148{
3149 PDMDEV_ASSERT_DEVINS(pDevIns);
3150 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3151 return VERR_ACCESS_DENIED;
3152}
3153
3154
3155/** @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap */
3156static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
3157{
3158 PDMDEV_ASSERT_DEVINS(pDevIns);
3159 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3160 return VERR_ACCESS_DENIED;
3161}
3162
3163
3164/**
3165 * The device helper structure for non-trusted devices.
3166 */
3167const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3168{
3169 PDM_DEVHLP_VERSION,
3170 pdmR3DevHlp_IOPortRegister,
3171 pdmR3DevHlp_IOPortRegisterGC,
3172 pdmR3DevHlp_IOPortRegisterR0,
3173 pdmR3DevHlp_IOPortDeregister,
3174 pdmR3DevHlp_MMIORegister,
3175 pdmR3DevHlp_MMIORegisterGC,
3176 pdmR3DevHlp_MMIORegisterR0,
3177 pdmR3DevHlp_MMIODeregister,
3178 pdmR3DevHlp_ROMRegister,
3179 pdmR3DevHlp_SSMRegister,
3180 pdmR3DevHlp_TMTimerCreate,
3181 pdmR3DevHlp_TMTimerCreateExternal,
3182 pdmR3DevHlp_PCIRegister,
3183 pdmR3DevHlp_PCIIORegionRegister,
3184 pdmR3DevHlp_PCISetConfigCallbacks,
3185 pdmR3DevHlp_PCISetIrq,
3186 pdmR3DevHlp_PCISetIrqNoWait,
3187 pdmR3DevHlp_ISASetIrq,
3188 pdmR3DevHlp_ISASetIrqNoWait,
3189 pdmR3DevHlp_DriverAttach,
3190 pdmR3DevHlp_MMHeapAlloc,
3191 pdmR3DevHlp_MMHeapAllocZ,
3192 pdmR3DevHlp_MMHeapFree,
3193 pdmR3DevHlp_VMSetError,
3194 pdmR3DevHlp_VMSetErrorV,
3195 pdmR3DevHlp_VMSetRuntimeError,
3196 pdmR3DevHlp_VMSetRuntimeErrorV,
3197 pdmR3DevHlp_AssertEMT,
3198 pdmR3DevHlp_AssertOther,
3199 pdmR3DevHlp_DBGFStopV,
3200 pdmR3DevHlp_DBGFInfoRegister,
3201 pdmR3DevHlp_STAMRegister,
3202 pdmR3DevHlp_STAMRegisterF,
3203 pdmR3DevHlp_STAMRegisterV,
3204 pdmR3DevHlp_RTCRegister,
3205 pdmR3DevHlp_PDMQueueCreate,
3206 pdmR3DevHlp_CritSectInit,
3207 pdmR3DevHlp_UTCNow,
3208 pdmR3DevHlp_PDMThreadCreate,
3209 pdmR3DevHlp_PhysGCPtr2GCPhys,
3210 pdmR3DevHlp_VMState,
3211 0,
3212 0,
3213 0,
3214 0,
3215 0,
3216 0,
3217 0,
3218 pdmR3DevHlp_Untrusted_GetVM,
3219 pdmR3DevHlp_Untrusted_PCIBusRegister,
3220 pdmR3DevHlp_Untrusted_PICRegister,
3221 pdmR3DevHlp_Untrusted_APICRegister,
3222 pdmR3DevHlp_Untrusted_IOAPICRegister,
3223 pdmR3DevHlp_Untrusted_DMACRegister,
3224 pdmR3DevHlp_Untrusted_PhysRead,
3225 pdmR3DevHlp_Untrusted_PhysWrite,
3226 pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtr,
3227 pdmR3DevHlp_Untrusted_PhysGCPhys2CCPtrReadOnly,
3228 pdmR3DevHlp_Untrusted_PhysReleasePageMappingLock,
3229 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
3230 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
3231 pdmR3DevHlp_Untrusted_A20IsEnabled,
3232 pdmR3DevHlp_Untrusted_A20Set,
3233 pdmR3DevHlp_Untrusted_VMReset,
3234 pdmR3DevHlp_Untrusted_VMSuspend,
3235 pdmR3DevHlp_Untrusted_VMPowerOff,
3236 pdmR3DevHlp_Untrusted_LockVM,
3237 pdmR3DevHlp_Untrusted_UnlockVM,
3238 pdmR3DevHlp_Untrusted_AssertVMLock,
3239 pdmR3DevHlp_Untrusted_DMARegister,
3240 pdmR3DevHlp_Untrusted_DMAReadMemory,
3241 pdmR3DevHlp_Untrusted_DMAWriteMemory,
3242 pdmR3DevHlp_Untrusted_DMASetDREQ,
3243 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
3244 pdmR3DevHlp_Untrusted_DMASchedule,
3245 pdmR3DevHlp_Untrusted_CMOSWrite,
3246 pdmR3DevHlp_Untrusted_CMOSRead,
3247 pdmR3DevHlp_Untrusted_GetCpuId,
3248 pdmR3DevHlp_Untrusted_ROMProtectShadow,
3249 pdmR3DevHlp_Untrusted_MMIO2Register,
3250 pdmR3DevHlp_Untrusted_MMIO2Deregister,
3251 pdmR3DevHlp_Untrusted_MMIO2Map,
3252 pdmR3DevHlp_Untrusted_MMIO2Unmap,
3253 pdmR3DevHlp_Untrusted_MMHyperMapMMIO2,
3254 pdmR3DevHlp_Untrusted_MMIO2MapKernel,
3255 pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3256 pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3257 PDM_DEVHLP_VERSION /* the end */
3258};
3259
3260
3261
3262/**
3263 * Queue consumer callback for internal component.
3264 *
3265 * @returns Success indicator.
3266 * If false the item will not be removed and the flushing will stop.
3267 * @param pVM The VM handle.
3268 * @param pItem The item to consume. Upon return this item will be freed.
3269 */
3270DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3271{
3272 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3273 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3274 switch (pTask->enmOp)
3275 {
3276 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3277 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3278 break;
3279
3280 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3281 pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3282 break;
3283
3284 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3285 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3286 break;
3287
3288 default:
3289 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3290 break;
3291 }
3292 return true;
3293}
3294
3295/** @} */
3296
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