PDMInternal.h@ 20065

Last change on this file since 20065 was 20056, checked in by vboxsync, 16 years ago
Backed out 47770 & 47771 (failed experiment)
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1	/* $Id: PDMInternal.h 20056 2009-05-27 07:33:15Z vboxsync $ */
2	/** @file
3	* PDM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	#ifndef ___PDMInternal_h
23	#define ___PDMInternal_h
24
25	#include <VBox/cdefs.h>
26	#include <VBox/types.h>
27	#include <VBox/param.h>
28	#include <VBox/cfgm.h>
29	#include <VBox/stam.h>
30	#include <VBox/vusb.h>
31	#include <VBox/pdmasynccompletion.h>
32	#include <iprt/critsect.h>
33	#ifdef IN_RING3
34	# include <iprt/thread.h>
35	#endif
36
37	__BEGIN_DECLS
38
39
40	/** @defgroup grp_pdm_int Internal
41	* @ingroup grp_pdm
42	* @internal
43	* @{
44	*/
45
46	/** @def PDM_WITH_R3R0_CRIT_SECT
47	* Enables or disabled ring-3/ring-0 critical sections. */
48	#if defined(DOXYGEN_RUNNING) \|\| 1
49	# define PDM_WITH_R3R0_CRIT_SECT
50	#endif
51
52
53	/*******************************************************************************
54	* Structures and Typedefs *
55	*******************************************************************************/
56
57	/** Pointer to a PDM Device. */
58	typedef struct PDMDEV *PPDMDEV;
59	/** Pointer to a pointer to a PDM Device. */
60	typedef PPDMDEV *PPPDMDEV;
61
62	/** Pointer to a PDM USB Device. */
63	typedef struct PDMUSB *PPDMUSB;
64	/** Pointer to a pointer to a PDM USB Device. */
65	typedef PPDMUSB *PPPDMUSB;
66
67	/** Pointer to a PDM Driver. */
68	typedef struct PDMDRV *PPDMDRV;
69	/** Pointer to a pointer to a PDM Driver. */
70	typedef PPDMDRV *PPPDMDRV;
71
72	/** Pointer to a PDM Logical Unit. */
73	typedef struct PDMLUN *PPDMLUN;
74	/** Pointer to a pointer to a PDM Logical Unit. */
75	typedef PPDMLUN *PPPDMLUN;
76
77	/** Pointer to a PDM PCI Bus instance. */
78	typedef struct PDMPCIBUS *PPDMPCIBUS;
79	/** Pointer to a DMAC instance. */
80	typedef struct PDMDMAC *PPDMDMAC;
81	/** Pointer to a RTC instance. */
82	typedef struct PDMRTC *PPDMRTC;
83
84	/** Pointer to an USB HUB registration record. */
85	typedef struct PDMUSBHUB *PPDMUSBHUB;
86
87	/**
88	* Private device instance data.
89	*/
90	typedef struct PDMDEVINSINT
91	{
92	/** Pointer to the next instance (HC Ptr).
93	* (Head is pointed to by PDM::pDevInstances.) */
94	R3PTRTYPE(PPDMDEVINS) pNextR3;
95	/** Pointer to the next per device instance (HC Ptr).
96	* (Head is pointed to by PDMDEV::pInstances.) */
97	R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
98	/** Pointer to device structure - HC Ptr. */
99	R3PTRTYPE(PPDMDEV) pDevR3;
100	/** Pointer to the list of logical units associated with the device. (FIFO) */
101	R3PTRTYPE(PPDMLUN) pLunsR3;
102	/** Configuration handle to the instance node. */
103	R3PTRTYPE(PCFGMNODE) pCfgHandle;
104
105	/** R3 pointer to the VM this instance was created for. */
106	PVMR3 pVMR3;
107	/** R3 pointer to associated PCI device structure. */
108	R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
109	/** R3 pointer to associated PCI bus structure. */
110	R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
111
112	/** R0 pointer to the VM this instance was created for. */
113	PVMR0 pVMR0;
114	/** R0 pointer to associated PCI device structure. */
115	R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
116	/** R0 pointer to associated PCI bus structure. */
117	R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
118	/** Alignment padding. */
119	RTR0PTR Alignment0;
120
121	/** RC pointer to the VM this instance was created for. */
122	PVMRC pVMRC;
123	/** RC pointer to associated PCI device structure. */
124	RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
125	/** RC pointer to associated PCI bus structure. */
126	RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
127	/** Alignment padding. */
128	RTRCPTR Alignment1;
129	} PDMDEVINSINT;
130
131
132	/**
133	* Private USB device instance data.
134	*/
135	typedef struct PDMUSBINSINT
136	{
137	/** The UUID of this instance. */
138	RTUUID Uuid;
139	/** Pointer to the next instance.
140	* (Head is pointed to by PDM::pUsbInstances.) */
141	R3PTRTYPE(PPDMUSBINS) pNext;
142	/** Pointer to the next per USB device instance.
143	* (Head is pointed to by PDMUSB::pInstances.) */
144	R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
145
146	/** Pointer to device structure. */
147	R3PTRTYPE(PPDMUSB) pUsbDev;
148
149	/** Pointer to the VM this instance was created for. */
150	PVMR3 pVM;
151	/** Pointer to the list of logical units associated with the device. (FIFO) */
152	R3PTRTYPE(PPDMLUN) pLuns;
153	/** The per instance device configuration. */
154	R3PTRTYPE(PCFGMNODE) pCfg;
155	/** Same as pCfg if the configuration should be deleted when detaching the device. */
156	R3PTRTYPE(PCFGMNODE) pCfgDelete;
157	/** The global device configuration. */
158	R3PTRTYPE(PCFGMNODE) pCfgGlobal;
159
160	/** Pointer to the USB hub this device is attached to.
161	* This is NULL if the device isn't connected to any HUB. */
162	R3PTRTYPE(PPDMUSBHUB) pHub;
163	/** The port number that we're connected to. */
164	uint32_t iPort;
165	#if HC_ARCH_BITS == 64
166	uint32_t Alignment0;
167	#endif
168	} PDMUSBINSINT;
169
170
171	/**
172	* Private driver instance data.
173	*/
174	typedef struct PDMDRVINSINT
175	{
176	/** Pointer to the driver instance above.
177	* This is NULL for the topmost drive. */
178	PPDMDRVINS pUp;
179	/** Pointer to the driver instance below.
180	* This is NULL for the bottommost driver. */
181	PPDMDRVINS pDown;
182	/** Pointer to the logical unit this driver chained on. */
183	PPDMLUN pLun;
184	/** Pointer to driver structure from which this was instantiated. */
185	PPDMDRV pDrv;
186	/** Pointer to the VM this instance was created for. */
187	PVM pVM;
188	/** Flag indicating that the driver is being detached and destroyed.
189	* (Helps detect potential recursive detaching.) */
190	bool fDetaching;
191	/** Configuration handle to the instance node. */
192	PCFGMNODE pCfgHandle;
193
194	} PDMDRVINSINT;
195
196
197	/**
198	* Private critical section data.
199	*/
200	typedef struct PDMCRITSECTINT
201	{
202	/** The critical section core which is shared with IPRT. */
203	RTCRITSECT Core;
204	/** Pointer to the next critical section.
205	* This chain is used for relocating pVMRC and device cleanup. */
206	R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
207	/** Owner identifier.
208	* This is pDevIns if the owner is a device. Similarily for a driver or service.
209	* PDMR3CritSectInit() sets this to point to the critsect itself. */
210	RTR3PTR pvKey;
211	/** Pointer to the VM - R3Ptr. */
212	PVMR3 pVMR3;
213	/** Pointer to the VM - R0Ptr. */
214	PVMR0 pVMR0;
215	/** Pointer to the VM - GCPtr. */
216	PVMRC pVMRC;
217	#if HC_ARCH_BITS == 64
218	/** Alignment padding. */
219	uint32_t padding;
220	#endif
221	/** Event semaphore that is scheduled to be signaled upon leaving the
222	* critical section. This is Ring-3 only of course. */
223	RTSEMEVENT EventToSignal;
224	/** The lock name. */
225	R3PTRTYPE(const char *) pszName;
226	/** R0/RC lock contention. */
227	STAMCOUNTER StatContentionRZLock;
228	/** R0/RC unlock contention. */
229	STAMCOUNTER StatContentionRZUnlock;
230	/** R3 lock contention. */
231	STAMCOUNTER StatContentionR3;
232	/** Profiling the time the section is locked. */
233	STAMPROFILEADV StatLocked;
234	} PDMCRITSECTINT;
235	typedef PDMCRITSECTINT *PPDMCRITSECTINT;
236
237	/** Indicates that the critical section is queued for unlock.
238	* PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
239	#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
240
241
242	/**
243	* The usual device/driver/internal/external stuff.
244	*/
245	typedef enum
246	{
247	/** The usual invalid entry. */
248	PDMTHREADTYPE_INVALID = 0,
249	/** Device type. */
250	PDMTHREADTYPE_DEVICE,
251	/** USB Device type. */
252	PDMTHREADTYPE_USB,
253	/** Driver type. */
254	PDMTHREADTYPE_DRIVER,
255	/** Internal type. */
256	PDMTHREADTYPE_INTERNAL,
257	/** External type. */
258	PDMTHREADTYPE_EXTERNAL,
259	/** The usual 32-bit hack. */
260	PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
261	} PDMTHREADTYPE;
262
263
264	/**
265	* The internal structure for the thread.
266	*/
267	typedef struct PDMTHREADINT
268	{
269	/** The VM pointer. */
270	PVMR3 pVM;
271	/** The event semaphore the thread blocks on when not running. */
272	RTSEMEVENTMULTI BlockEvent;
273	/** The event semaphore the thread sleeps on while running. */
274	RTSEMEVENTMULTI SleepEvent;
275	/** Pointer to the next thread. */
276	R3PTRTYPE(struct PDMTHREAD *) pNext;
277	/** The thread type. */
278	PDMTHREADTYPE enmType;
279	} PDMTHREADINT;
280
281
282
283	/* Must be included after PDMDEVINSINT is defined. */
284	#define PDMDEVINSINT_DECLARED
285	#define PDMUSBINSINT_DECLARED
286	#define PDMDRVINSINT_DECLARED
287	#define PDMCRITSECTINT_DECLARED
288	#define PDMTHREADINT_DECLARED
289	#ifdef ___VBox_pdm_h
290	# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
291	#endif
292	__END_DECLS
293	#include <VBox/pdm.h>
294	__BEGIN_DECLS
295
296	/**
297	* PDM Logical Unit.
298	*
299	* This typically the representation of a physical port on a
300	* device, like for instance the PS/2 keyboard port on the
301	* keyboard controller device. The LUNs are chained on the
302	* device the belong to (PDMDEVINSINT::pLunsR3).
303	*/
304	typedef struct PDMLUN
305	{
306	/** The LUN - The Logical Unit Number. */
307	RTUINT iLun;
308	/** Pointer to the next LUN. */
309	PPDMLUN pNext;
310	/** Pointer to the top driver in the driver chain. */
311	PPDMDRVINS pTop;
312	/** Pointer to the bottom driver in the driver chain. */
313	PPDMDRVINS pBottom;
314	/** Pointer to the device instance which the LUN belongs to.
315	* Either this is set or pUsbIns is set. Both is never set at the same time. */
316	PPDMDEVINS pDevIns;
317	/** Pointer to the USB device instance which the LUN belongs to. */
318	PPDMUSBINS pUsbIns;
319	/** Pointer to the device base interface. */
320	PPDMIBASE pBase;
321	/** Description of this LUN. */
322	const char *pszDesc;
323	} PDMLUN;
324
325
326	/**
327	* PDM Device.
328	*/
329	typedef struct PDMDEV
330	{
331	/** Pointer to the next device (R3 Ptr). */
332	R3PTRTYPE(PPDMDEV) pNext;
333	/** Device name length. (search optimization) */
334	RTUINT cchName;
335	/** Registration structure. */
336	R3PTRTYPE(const struct PDMDEVREG *) pDevReg;
337	/** Number of instances. */
338	RTUINT cInstances;
339	/** Pointer to chain of instances (R3 Ptr). */
340	PPDMDEVINSR3 pInstances;
341	} PDMDEV;
342
343
344	/**
345	* PDM USB Device.
346	*/
347	typedef struct PDMUSB
348	{
349	/** Pointer to the next device (R3 Ptr). */
350	R3PTRTYPE(PPDMUSB) pNext;
351	/** Device name length. (search optimization) */
352	RTUINT cchName;
353	/** Registration structure. */
354	R3PTRTYPE(const struct PDMUSBREG *) pUsbReg;
355	/** Next instance number. */
356	RTUINT iNextInstance;
357	/** Pointer to chain of instances (R3 Ptr). */
358	R3PTRTYPE(PPDMUSBINS) pInstances;
359	} PDMUSB;
360
361
362	/**
363	* PDM Driver.
364	*/
365	typedef struct PDMDRV
366	{
367	/** Pointer to the next device. */
368	PPDMDRV pNext;
369	/** Registration structure. */
370	const struct PDMDRVREG * pDrvReg;
371	/** Number of instances. */
372	RTUINT cInstances;
373	} PDMDRV;
374
375
376	/**
377	* PDM registered PIC device.
378	*/
379	typedef struct PDMPIC
380	{
381	/** Pointer to the PIC device instance - R3. */
382	PPDMDEVINSR3 pDevInsR3;
383	/** @copydoc PDMPICREG::pfnSetIrqR3 */
384	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
385	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
386	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
387
388	/** Pointer to the PIC device instance - R0. */
389	PPDMDEVINSR0 pDevInsR0;
390	/** @copydoc PDMPICREG::pfnSetIrqR3 */
391	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
392	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
393	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
394
395	/** Pointer to the PIC device instance - RC. */
396	PPDMDEVINSRC pDevInsRC;
397	/** @copydoc PDMPICREG::pfnSetIrqR3 */
398	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
399	/** @copydoc PDMPICREG::pfnGetInterruptR3 */
400	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
401	/** Alignment padding. */
402	RTRCPTR RCPtrPadding;
403	} PDMPIC;
404
405
406	/**
407	* PDM registered APIC device.
408	*/
409	typedef struct PDMAPIC
410	{
411	/** Pointer to the APIC device instance - R3 Ptr. */
412	PPDMDEVINSR3 pDevInsR3;
413	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
414	DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
415	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
416	DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
417	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
418	DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
419	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
420	DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
421	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
422	DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
423	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
424	DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
425	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
426	DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
427	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
428	DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
429	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
430	DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
431	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
432
433	/** Pointer to the APIC device instance - R0 Ptr. */
434	PPDMDEVINSR0 pDevInsR0;
435	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
436	DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
437	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
438	DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
439	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
440	DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
441	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
442	DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
443	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
444	DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
445	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
446	DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
447	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
448	DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
449	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
450	DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
451	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
452	DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
453	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
454
455	/** Pointer to the APIC device instance - RC Ptr. */
456	PPDMDEVINSRC pDevInsRC;
457	/** @copydoc PDMAPICREG::pfnGetInterruptR3 */
458	DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
459	/** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
460	DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
461	/** @copydoc PDMAPICREG::pfnSetBaseR3 */
462	DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
463	/** @copydoc PDMAPICREG::pfnGetBaseR3 */
464	DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
465	/** @copydoc PDMAPICREG::pfnSetTPRR3 */
466	DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
467	/** @copydoc PDMAPICREG::pfnGetTPRR3 */
468	DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
469	/** @copydoc PDMAPICREG::pfnWriteMSRR3 */
470	DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
471	/** @copydoc PDMAPICREG::pfnReadMSRR3 */
472	DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
473	/** @copydoc PDMAPICREG::pfnBusDeliverR3 */
474	DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
475	uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
476	} PDMAPIC;
477
478
479	/**
480	* PDM registered I/O APIC device.
481	*/
482	typedef struct PDMIOAPIC
483	{
484	/** Pointer to the APIC device instance - R3 Ptr. */
485	PPDMDEVINSR3 pDevInsR3;
486	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
487	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
488
489	/** Pointer to the PIC device instance - R0. */
490	PPDMDEVINSR0 pDevInsR0;
491	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
492	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
493
494	/** Pointer to the APIC device instance - RC Ptr. */
495	PPDMDEVINSRC pDevInsRC;
496	/** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
497	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
498	} PDMIOAPIC;
499
500	/** Maximum number of PCI busses for a VM. */
501	#define PDM_PCI_BUSSES_MAX 8
502
503	/**
504	* PDM PCI Bus instance.
505	*/
506	typedef struct PDMPCIBUS
507	{
508	/** PCI bus number. */
509	RTUINT iBus;
510	RTUINT uPadding0; /*< Alignment padding./
511
512	/** Pointer to PCI Bus device instance. */
513	PPDMDEVINSR3 pDevInsR3;
514	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
515	DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
516	/** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
517	DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
518	/** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
519	DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
520	PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
521	/** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
522	DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
523	PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
524	/** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
525	DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
526	/** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
527	DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
528	/** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
529	DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
530
531	/** Pointer to the PIC device instance - R0. */
532	R0PTRTYPE(PPDMDEVINS) pDevInsR0;
533	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
534	DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
535
536	/** Pointer to PCI Bus device instance. */
537	PPDMDEVINSRC pDevInsRC;
538	/** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
539	DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
540	} PDMPCIBUS;
541
542
543	#ifdef IN_RING3
544	/**
545	* PDM registered DMAC (DMA Controller) device.
546	*/
547	typedef struct PDMDMAC
548	{
549	/** Pointer to the DMAC device instance. */
550	PPDMDEVINSR3 pDevIns;
551	/** Copy of the registration structure. */
552	PDMDMACREG Reg;
553	} PDMDMAC;
554
555
556	/**
557	* PDM registered RTC (Real Time Clock) device.
558	*/
559	typedef struct PDMRTC
560	{
561	/** Pointer to the RTC device instance. */
562	PPDMDEVINSR3 pDevIns;
563	/** Copy of the registration structure. */
564	PDMRTCREG Reg;
565	} PDMRTC;
566
567	#endif /* IN_RING3 */
568
569	/**
570	* Module type.
571	*/
572	typedef enum PDMMODTYPE
573	{
574	/** Raw-mode (RC) context module. */
575	PDMMOD_TYPE_RC,
576	/** Ring-0 (host) context module. */
577	PDMMOD_TYPE_R0,
578	/** Ring-3 (host) context module. */
579	PDMMOD_TYPE_R3
580	} PDMMODTYPE;
581
582
583	/** The module name length including the terminator. */
584	#define PDMMOD_NAME_LEN 32
585
586	/**
587	* Loaded module instance.
588	*/
589	typedef struct PDMMOD
590	{
591	/** Module name. This is used for refering to
592	* the module internally, sort of like a handle. */
593	char szName[PDMMOD_NAME_LEN];
594	/** Module type. */
595	PDMMODTYPE eType;
596	/** Loader module handle. Not used for R0 modules. */
597	RTLDRMOD hLdrMod;
598	/** Loaded address.
599	* This is the 'handle' for R0 modules. */
600	RTUINTPTR ImageBase;
601	/** Old loaded address.
602	* This is used during relocation of GC modules. Not used for R0 modules. */
603	RTUINTPTR OldImageBase;
604	/** Where the R3 HC bits are stored.
605	* This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
606	void *pvBits;
607
608	/** Pointer to next module. */
609	struct PDMMOD *pNext;
610	/** Module filename. */
611	char szFilename[1];
612	} PDMMOD;
613	/** Pointer to loaded module instance. */
614	typedef PDMMOD *PPDMMOD;
615
616
617
618	/** Extra space in the free array. */
619	#define PDMQUEUE_FREE_SLACK 16
620
621	/**
622	* Queue type.
623	*/
624	typedef enum PDMQUEUETYPE
625	{
626	/** Device consumer. */
627	PDMQUEUETYPE_DEV = 1,
628	/** Driver consumer. */
629	PDMQUEUETYPE_DRV,
630	/** Internal consumer. */
631	PDMQUEUETYPE_INTERNAL,
632	/** External consumer. */
633	PDMQUEUETYPE_EXTERNAL
634	} PDMQUEUETYPE;
635
636	/** Pointer to a PDM Queue. */
637	typedef struct PDMQUEUE *PPDMQUEUE;
638
639	/**
640	* PDM Queue.
641	*/
642	typedef struct PDMQUEUE
643	{
644	/** Pointer to the next queue in the list. */
645	R3PTRTYPE(PPDMQUEUE) pNext;
646	/** Type specific data. */
647	union
648	{
649	/** PDMQUEUETYPE_DEV */
650	struct
651	{
652	/** Pointer to consumer function. */
653	R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
654	/** Pointer to the device instance owning the queue. */
655	R3PTRTYPE(PPDMDEVINS) pDevIns;
656	} Dev;
657	/** PDMQUEUETYPE_DRV */
658	struct
659	{
660	/** Pointer to consumer function. */
661	R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
662	/** Pointer to the driver instance owning the queue. */
663	R3PTRTYPE(PPDMDRVINS) pDrvIns;
664	} Drv;
665	/** PDMQUEUETYPE_INTERNAL */
666	struct
667	{
668	/** Pointer to consumer function. */
669	R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
670	} Int;
671	/** PDMQUEUETYPE_EXTERNAL */
672	struct
673	{
674	/** Pointer to consumer function. */
675	R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
676	/** Pointer to user argument. */
677	R3PTRTYPE(void *) pvUser;
678	} Ext;
679	} u;
680	/** Queue type. */
681	PDMQUEUETYPE enmType;
682	/** The interval between checking the queue for events.
683	* The realtime timer below is used to do the waiting.
684	* If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
685	uint32_t cMilliesInterval;
686	/** Interval timer. Only used if cMilliesInterval is non-zero. */
687	PTMTIMERR3 pTimer;
688	/** Pointer to the VM - R3. */
689	PVMR3 pVMR3;
690	/** LIFO of pending items - R3. */
691	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
692	/** Pointer to the VM - R0. */
693	PVMR0 pVMR0;
694	/** LIFO of pending items - R0. */
695	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
696	/** Pointer to the GC VM and indicator for GC enabled queue.
697	* If this is NULL, the queue cannot be used in GC.
698	*/
699	PVMRC pVMRC;
700	/** LIFO of pending items - GC. */
701	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
702	/** Item size (bytes). */
703	RTUINT cbItem;
704	/** Number of items in the queue. */
705	RTUINT cItems;
706	/** Index to the free head (where we insert). */
707	uint32_t volatile iFreeHead;
708	/** Index to the free tail (where we remove). */
709	uint32_t volatile iFreeTail;
710
711	/** Array of pointers to free items. Variable size. */
712	struct PDMQUEUEFREEITEM
713	{
714	/** Pointer to the free item - HC Ptr. */
715	R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
716	/** Pointer to the free item - HC Ptr. */
717	R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
718	/** Pointer to the free item - GC Ptr. */
719	RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
720	#if HC_ARCH_BITS == 64
721	RTRCPTR Alignment0;
722	#endif
723	} aFreeItems[1];
724	} PDMQUEUE;
725
726
727	/**
728	* Queue device helper task operation.
729	*/
730	typedef enum PDMDEVHLPTASKOP
731	{
732	/** The usual invalid 0 entry. */
733	PDMDEVHLPTASKOP_INVALID = 0,
734	/** ISASetIrq */
735	PDMDEVHLPTASKOP_ISA_SET_IRQ,
736	/** PCISetIrq */
737	PDMDEVHLPTASKOP_PCI_SET_IRQ,
738	/** PCISetIrq */
739	PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
740	/** The usual 32-bit hack. */
741	PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
742	} PDMDEVHLPTASKOP;
743
744	/**
745	* Queued Device Helper Task.
746	*/
747	typedef struct PDMDEVHLPTASK
748	{
749	/** The queue item core (don't touch). */
750	PDMQUEUEITEMCORE Core;
751	/** Pointer to the device instance (R3 Ptr). */
752	PPDMDEVINSR3 pDevInsR3;
753	/** This operation to perform. */
754	PDMDEVHLPTASKOP enmOp;
755	#if HC_ARCH_BITS == 64
756	uint32_t Alignment0;
757	#endif
758	/** Parameters to the operation. */
759	union PDMDEVHLPTASKPARAMS
760	{
761	/**
762	* PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
763	*/
764	struct PDMDEVHLPTASKSETIRQ
765	{
766	/** The IRQ */
767	int iIrq;
768	/** The new level. */
769	int iLevel;
770	} SetIRQ;
771	} u;
772	} PDMDEVHLPTASK;
773	/** Pointer to a queued Device Helper Task. */
774	typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
775	/** Pointer to a const queued Device Helper Task. */
776	typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
777
778
779
780	/**
781	* An USB hub registration record.
782	*/
783	typedef struct PDMUSBHUB
784	{
785	/** The USB versions this hub support.
786	* Note that 1.1 hubs can take on 2.0 devices. */
787	uint32_t fVersions;
788	/** The number of ports on the hub. */
789	uint32_t cPorts;
790	/** The number of available ports (0..cPorts). */
791	uint32_t cAvailablePorts;
792	/** The driver instance of the hub. */
793	PPDMDRVINS pDrvIns;
794	/** Copy of the to the registration structure. */
795	PDMUSBHUBREG Reg;
796
797	/** Pointer to the next hub in the list. */
798	struct PDMUSBHUB *pNext;
799	} PDMUSBHUB;
800
801	/** Pointer to a const USB HUB registration record. */
802	typedef const PDMUSBHUB *PCPDMUSBHUB;
803
804	/** Pointer to a PDM Async I/O template. */
805	typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
806
807	/** Pointer to the main PDM Async completion structure. */
808	typedef struct PDMASYNCCOMPLETIONMANAGER *PPDMASYNCCOMPLETIONMANAGER;
809
810
811	/**
812	* PDM VMCPU Instance data.
813	* Changes to this must checked against the padding of the cfgm union in VMCPU!
814	*/
815	typedef struct PDMCPU
816	{
817	/** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
818	uint32_t cQueuedCritSectLeaves;
819	uint32_t uPadding0; /*< Alignment padding./
820	/** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
821	* We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
822	R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
823	} PDMCPU;
824
825	/**
826	* Converts a PDM pointer into a VM pointer.
827	* @returns Pointer to the VM structure the PDM is part of.
828	* @param pPDM Pointer to PDM instance data.
829	*/
830	#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
831
832
833	/**
834	* PDM VM Instance data.
835	* Changes to this must checked against the padding of the cfgm union in VM!
836	*/
837	typedef struct PDM
838	{
839	/** Offset to the VM structure.
840	* See PDM2VM(). */
841	RTUINT offVM;
842	RTUINT uPadding0; /*< Alignment padding./
843
844	/** List of registered devices. (FIFO) */
845	R3PTRTYPE(PPDMDEV) pDevs;
846	/** List of devices instances. (FIFO) */
847	R3PTRTYPE(PPDMDEVINS) pDevInstances;
848	/** List of registered USB devices. (FIFO) */
849	R3PTRTYPE(PPDMUSB) pUsbDevs;
850	/** List of USB devices instances. (FIFO) */
851	R3PTRTYPE(PPDMUSBINS) pUsbInstances;
852	/** List of registered drivers. (FIFO) */
853	R3PTRTYPE(PPDMDRV) pDrvs;
854	/** List of initialized critical sections. (LIFO) */
855	R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
856	/** PCI Buses. */
857	PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
858	/** The register PIC device. */
859	PDMPIC Pic;
860	/** The registerd APIC device. */
861	PDMAPIC Apic;
862	/** The registerd I/O APIC device. */
863	PDMIOAPIC IoApic;
864	/** The registered DMAC device. */
865	R3PTRTYPE(PPDMDMAC) pDmac;
866	/** The registered RTC device. */
867	R3PTRTYPE(PPDMRTC) pRtc;
868	/** The registered USB HUBs. (FIFO) */
869	R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
870
871	/** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
872	R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
873	/** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
874	R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
875	/** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
876	RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
877
878	RTUINT uPadding1; /*< Alignment padding. /
879
880	/** Linked list of timer driven PDM queues. */
881	R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
882	/** Linked list of force action driven PDM queues. */
883	R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
884	/** Pointer to the queue which should be manually flushed - R0 Ptr.
885	* Only touched by EMT. */
886	R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
887	/** Pointer to the queue which should be manually flushed - RC Ptr.
888	* Only touched by EMT. */
889	RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
890	#if HC_ARCH_BITS == 64
891	RTRCPTR uPadding2;
892	#endif
893
894	/** Head of the PDM Thread list. (singly linked) */
895	R3PTRTYPE(PPDMTHREAD) pThreads;
896	/** Tail of the PDM Thread list. (singly linked) */
897	R3PTRTYPE(PPDMTHREAD) pThreadsTail;
898
899	/** Head of the asychronous tasks managers. (singly linked) */
900	R3PTRTYPE(PPDMASYNCCOMPLETIONMANAGER) pAsyncCompletionManagerHead;
901	/** Head of the templates. (singly linked) */
902	R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
903
904	/** @name VMM device heap
905	* @{ */
906	/** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
907	RTR3PTR pvVMMDevHeap;
908	/** The heap size. */
909	RTUINT cbVMMDevHeap;
910	/** Free space. */
911	RTUINT cbVMMDevHeapLeft;
912	/** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
913	RTGCPHYS GCPhysVMMDevHeap;
914	/** @} */
915
916	/** The PDM lock.
917	* This is used to protect everything that deals with interrupts, i.e.
918	* the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
919	PDMCRITSECT CritSect;
920	/** The PDM miscellancous lock.
921	* This is used to protect things like critsect init/delete that formerly was
922	* serialized by there only being one EMT.
923	*/
924	RTCRITSECT MiscCritSect;
925
926	/** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
927	STAMCOUNTER StatQueuedCritSectLeaves;
928	} PDM;
929	/** Pointer to PDM VM instance data. */
930	typedef PDM *PPDM;
931
932
933	/**
934	* PDM data kept in the UVM.
935	*/
936	typedef struct PDMUSERPERVM
937	{
938	/** Pointer to list of loaded modules. */
939	PPDMMOD pModules;
940	/** @todo move more stuff over here. */
941	} PDMUSERPERVM;
942	/** Pointer to the PDM data kept in the UVM. */
943	typedef PDMUSERPERVM *PPDMUSERPERVM;
944
945
946
947	/*******************************************************************************
948	* Global Variables *
949	*******************************************************************************/
950	#ifdef IN_RING3
951	extern const PDMDRVHLP g_pdmR3DrvHlp;
952	extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
953	extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
954	extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
955	extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
956	extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
957	extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
958	extern const PDMDMACHLP g_pdmR3DevDmacHlp;
959	extern const PDMRTCHLP g_pdmR3DevRtcHlp;
960	#endif
961
962
963	/*******************************************************************************
964	* Defined Constants And Macros *
965	*******************************************************************************/
966	/** @def PDMDEV_ASSERT_DEVINS
967	* Asserts the validity of the device instance.
968	*/
969	#ifdef VBOX_STRICT
970	# define PDMDEV_ASSERT_DEVINS(pDevIns) \
971	do { \
972	AssertPtr(pDevIns); \
973	Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
974	Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
975	} while (0)
976	#else
977	# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
978	#endif
979
980
981	/*******************************************************************************
982	* Internal Functions *
983	*******************************************************************************/
984	#ifdef IN_RING3
985	int pdmR3CritSectInit(PVM pVM);
986	int pdmR3CritSectTerm(PVM pVM);
987	void pdmR3CritSectRelocate(PVM pVM);
988	int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
989	int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
990
991	int pdmR3DevInit(PVM pVM);
992	PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
993	int pdmR3DevFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
994	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
995
996	int pdmR3UsbLoadModules(PVM pVM);
997	int pdmR3UsbInstantiateDevices(PVM pVM);
998	PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
999	int pdmR3UsbFindLun(PVM pVM, const char pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN ppLun);
1000	int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1001	int pdmR3UsbVMInitComplete(PVM pVM);
1002
1003	int pdmR3DrvInit(PVM pVM);
1004	int pdmR3DrvDetach(PPDMDRVINS pDrvIns);
1005	void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns);
1006	PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1007
1008	int pdmR3LdrInitU(PUVM pUVM);
1009	void pdmR3LdrTermU(PUVM pUVM);
1010	char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1011	int pdmR3LoadR3U(PUVM pUVM, const char pszFilename, const char pszName);
1012
1013	void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1014
1015	int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1016	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1017	int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1018	PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1019	int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1020	PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1021	int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1022	int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1023	int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1024	void pdmR3ThreadDestroyAll(PVM pVM);
1025	int pdmR3ThreadResumeAll(PVM pVM);
1026	int pdmR3ThreadSuspendAll(PVM pVM);
1027
1028	#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1029	int pdmR3AsyncCompletionInit(PVM pVM);
1030	int pdmR3AsyncCompletionTerm(PVM pVM);
1031	#endif
1032
1033	#endif /* IN_RING3 */
1034
1035	void pdmLock(PVM pVM);
1036	int pdmLockEx(PVM pVM, int rc);
1037	void pdmUnlock(PVM pVM);
1038
1039	/** @} */
1040
1041	__END_DECLS
1042
1043	#endif

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source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 20065

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