VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMShw.h@ 16691

Last change on this file since 16691 was 16376, checked in by vboxsync, 16 years ago

Paging updates. Deal with mode switches and cr3 updates.

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File size: 8.5 KB
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1/* $Id: PGMShw.h 16376 2009-01-29 16:46:31Z vboxsync $ */
2/** @file
3 * VBox - Page Manager / Monitor, Shadow Paging Template.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Defined Constants And Macros *
24*******************************************************************************/
25#undef SHWPT
26#undef PSHWPT
27#undef SHWPTE
28#undef PSHWPTE
29#undef SHWPD
30#undef PSHWPD
31#undef SHWPDE
32#undef PSHWPDE
33#undef SHW_PDE_PG_MASK
34#undef SHW_PD_SHIFT
35#undef SHW_PD_MASK
36#undef SHW_PTE_PG_MASK
37#undef SHW_PT_SHIFT
38#undef SHW_PT_MASK
39#undef SHW_TOTAL_PD_ENTRIES
40#undef SHW_PDPT_SHIFT
41#undef SHW_PDPT_MASK
42#undef SHW_PDPE_PG_MASK
43#undef SHW_POOL_ROOT_IDX
44
45#if PGM_SHW_TYPE == PGM_TYPE_32BIT
46# define SHWPT X86PT
47# define PSHWPT PX86PT
48# define SHWPTE X86PTE
49# define PSHWPTE PX86PTE
50# define SHWPD X86PD
51# define PSHWPD PX86PD
52# define SHWPDE X86PDE
53# define PSHWPDE PX86PDE
54# define SHW_PDE_PG_MASK X86_PDE_PG_MASK
55# define SHW_PD_SHIFT X86_PD_SHIFT
56# define SHW_PD_MASK X86_PD_MASK
57# define SHW_TOTAL_PD_ENTRIES X86_PG_ENTRIES
58# define SHW_PTE_PG_MASK X86_PTE_PG_MASK
59# define SHW_PT_SHIFT X86_PT_SHIFT
60# define SHW_PT_MASK X86_PT_MASK
61# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_PD
62
63#elif PGM_SHW_TYPE == PGM_TYPE_EPT
64# define SHWPT EPTPT
65# define PSHWPT PEPTPT
66# define SHWPTE EPTPTE
67# define PSHWPTE PEPTPTE
68# define SHWPD EPTPD
69# define PSHWPD PEPTPD
70# define SHWPDE EPTPDE
71# define PSHWPDE PEPTPDE
72# define SHW_PDE_PG_MASK EPT_PDE_PG_MASK
73# define SHW_PD_SHIFT EPT_PD_SHIFT
74# define SHW_PD_MASK EPT_PD_MASK
75# define SHW_PTE_PG_MASK EPT_PTE_PG_MASK
76# define SHW_PT_SHIFT EPT_PT_SHIFT
77# define SHW_PT_MASK EPT_PT_MASK
78# define SHW_PDPT_SHIFT EPT_PDPT_SHIFT
79# define SHW_PDPT_MASK EPT_PDPT_MASK
80# define SHW_PDPE_PG_MASK EPT_PDPE_PG_MASK
81# define SHW_TOTAL_PD_ENTRIES (EPT_PG_AMD64_ENTRIES*EPT_PG_AMD64_PDPE_ENTRIES)
82# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_NESTED_ROOT /* do not use! exception is real mode & protected mode without paging. */
83
84#else
85# define SHWPT X86PTPAE
86# define PSHWPT PX86PTPAE
87# define SHWPTE X86PTEPAE
88# define PSHWPTE PX86PTEPAE
89# define SHWPD X86PDPAE
90# define PSHWPD PX86PDPAE
91# define SHWPDE X86PDEPAE
92# define PSHWPDE PX86PDEPAE
93# define SHW_PDE_PG_MASK X86_PDE_PAE_PG_MASK
94# define SHW_PD_SHIFT X86_PD_PAE_SHIFT
95# define SHW_PD_MASK X86_PD_PAE_MASK
96# define SHW_PTE_PG_MASK X86_PTE_PAE_PG_MASK
97# define SHW_PT_SHIFT X86_PT_PAE_SHIFT
98# define SHW_PT_MASK X86_PT_PAE_MASK
99
100# if PGM_SHW_TYPE == PGM_TYPE_AMD64
101# define SHW_PDPT_SHIFT X86_PDPT_SHIFT
102# define SHW_PDPT_MASK X86_PDPT_MASK_AMD64
103# define SHW_PDPE_PG_MASK X86_PDPE_PG_MASK
104# define SHW_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES*X86_PG_AMD64_PDPE_ENTRIES)
105# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_AMD64_CR3
106
107# else /* 32 bits PAE mode */
108# define SHW_PDPT_SHIFT X86_PDPT_SHIFT
109# define SHW_PDPT_MASK X86_PDPT_MASK_PAE
110# define SHW_PDPE_PG_MASK X86_PDPE_PG_MASK
111# define SHW_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES*X86_PG_PAE_PDPE_ENTRIES)
112# ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
113# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_PDPT
114# else
115# define SHW_POOL_ROOT_IDX PGMPOOL_IDX_PAE_PD
116# endif
117
118# endif
119#endif
120
121
122/*******************************************************************************
123* Internal Functions *
124*******************************************************************************/
125__BEGIN_DECLS
126/* r3 */
127PGM_SHW_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
128PGM_SHW_DECL(int, Enter)(PVM pVM);
129PGM_SHW_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta);
130PGM_SHW_DECL(int, Exit)(PVM pVM);
131
132/* all */
133PGM_SHW_DECL(int, GetPage)(PVM pVM, RTGCPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys);
134PGM_SHW_DECL(int, ModifyPage)(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
135__END_DECLS
136
137
138/**
139 * Initializes the guest bit of the paging mode data.
140 *
141 * @returns VBox status code.
142 * @param pVM The VM handle.
143 * @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
144 * This is used early in the init process to avoid trouble with PDM
145 * not being initialized yet.
146 */
147PGM_SHW_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
148{
149 Assert(pModeData->uShwType == PGM_SHW_TYPE || pModeData->uShwType == PGM_TYPE_NESTED);
150
151 /* Ring-3 */
152 pModeData->pfnR3ShwRelocate = PGM_SHW_NAME(Relocate);
153 pModeData->pfnR3ShwExit = PGM_SHW_NAME(Exit);
154 pModeData->pfnR3ShwGetPage = PGM_SHW_NAME(GetPage);
155 pModeData->pfnR3ShwModifyPage = PGM_SHW_NAME(ModifyPage);
156
157 if (fResolveGCAndR0)
158 {
159 int rc;
160
161#if PGM_SHW_TYPE != PGM_TYPE_AMD64 && PGM_SHW_TYPE != PGM_TYPE_NESTED && PGM_SHW_TYPE != PGM_TYPE_EPT /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
162 /* GC */
163 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_SHW_NAME_RC_STR(GetPage), &pModeData->pfnRCShwGetPage);
164 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_RC_STR(GetPage), rc), rc);
165 rc = PDMR3LdrGetSymbolRC(pVM, NULL, PGM_SHW_NAME_RC_STR(ModifyPage), &pModeData->pfnRCShwModifyPage);
166 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_RC_STR(ModifyPage), rc), rc);
167#endif /* Not AMD64 shadow paging. */
168
169 /* Ring-0 */
170 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_SHW_NAME_R0_STR(GetPage), &pModeData->pfnR0ShwGetPage);
171 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_R0_STR(GetPage), rc), rc);
172 rc = PDMR3LdrGetSymbolR0(pVM, NULL, PGM_SHW_NAME_R0_STR(ModifyPage), &pModeData->pfnR0ShwModifyPage);
173 AssertMsgRCReturn(rc, ("%s -> rc=%Rrc\n", PGM_SHW_NAME_R0_STR(ModifyPage), rc), rc);
174 }
175 return VINF_SUCCESS;
176}
177
178/**
179 * Enters the shadow mode.
180 *
181 * @returns VBox status code.
182 * @param pVM VM handle.
183 */
184PGM_SHW_DECL(int, Enter)(PVM pVM)
185{
186#if PGM_SHW_TYPE == PGM_TYPE_NESTED
187 Assert(HWACCMIsNestedPagingActive(pVM));
188
189 Log(("Enter nested shadow paging mode: root %RHv phys %RHp\n", pVM->pgm.s.pShwNestedRootR3, pVM->pgm.s.HCPhysShwNestedRoot));
190 /* In non-nested mode we allocate the PML4 page on-demand; in nested mode we just use our fixed nested paging root. */
191 pVM->pgm.s.pShwRootR3 = (R3PTRTYPE(void *))pVM->pgm.s.pShwNestedRootR3;
192# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
193 pVM->pgm.s.pShwRootR0 = (R0PTRTYPE(void *))pVM->pgm.s.pShwNestedRootR0;
194# endif
195 pVM->pgm.s.HCPhysShwCR3 = pVM->pgm.s.HCPhysShwNestedRoot;
196#endif
197 return VINF_SUCCESS;
198}
199
200
201/**
202 * Relocate any GC pointers related to shadow mode paging.
203 *
204 * @returns VBox status code.
205 * @param pVM The VM handle.
206 * @param offDelta The reloation offset.
207 */
208PGM_SHW_DECL(int, Relocate)(PVM pVM, RTGCPTR offDelta)
209{
210 /* nothing special to do here - InitData does the job. */
211 return VINF_SUCCESS;
212}
213
214
215/**
216 * Exits the shadow mode.
217 *
218 * @returns VBox status code.
219 * @param pVM VM handle.
220 */
221PGM_SHW_DECL(int, Exit)(PVM pVM)
222{
223#if PGM_SHW_TYPE == PGM_TYPE_NESTED
224 Assert(HWACCMIsNestedPagingActive(pVM));
225 pVM->pgm.s.pShwRootR3 = 0;
226# ifndef VBOX_WITH_2X_4GB_ADDR_SPACE
227 pVM->pgm.s.pShwRootR0 = 0;
228# endif
229 pVM->pgm.s.HCPhysShwCR3 = 0;
230 Log(("Leave nested shadow paging mode\n"));
231#endif
232
233 return VINF_SUCCESS;
234}
235
236
237
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