| 1 | /* $Id: PGMAllMap.cpp 13232 2008-10-13 20:03:48Z vboxsync $ */
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| 2 | /** @file
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| 3 | * PGM - Page Manager and Monitor - All context code.
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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| 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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| 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | *
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| 17 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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| 18 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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| 19 | * additional information or have any questions.
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| 20 | */
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| 21 |
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| 22 | /*******************************************************************************
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| 23 | * Header Files *
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| 24 | *******************************************************************************/
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| 25 | #define LOG_GROUP LOG_GROUP_PGM
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| 26 | #include <VBox/pgm.h>
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| 27 | #include "PGMInternal.h"
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| 28 | #include <VBox/vm.h>
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| 29 | #include <iprt/assert.h>
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| 30 | #include <iprt/asm.h>
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| 31 | #include <VBox/err.h>
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| 32 |
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| 33 |
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| 34 | /**
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| 35 | * Maps a range of physical pages at a given virtual address
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| 36 | * in the guest context.
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| 37 | *
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| 38 | * The GC virtual address range must be within an existing mapping.
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| 39 | *
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| 40 | * @returns VBox status code.
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| 41 | * @param pVM The virtual machine.
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| 42 | * @param GCPtr Where to map the page(s). Must be page aligned.
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| 43 | * @param HCPhys Start of the range of physical pages. Must be page aligned.
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| 44 | * @param cbPages Number of bytes to map. Must be page aligned.
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| 45 | * @param fFlags Page flags (X86_PTE_*).
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| 46 | */
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| 47 | VMMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags)
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| 48 | {
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| 49 | AssertMsg(pVM->pgm.s.offVM, ("Bad init order\n"));
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| 50 |
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| 51 | /*
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| 52 | * Validate input.
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| 53 | */
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| 54 | AssertMsg(RT_ALIGN_T(GCPtr, PAGE_SIZE, RTGCUINTPTR) == GCPtr, ("Invalid alignment GCPtr=%#x\n", GCPtr));
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| 55 | AssertMsg(cbPages > 0 && RT_ALIGN_32(cbPages, PAGE_SIZE) == cbPages, ("Invalid cbPages=%#x\n", cbPages));
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| 56 | AssertMsg(!(fFlags & X86_PDE_PG_MASK), ("Invalid flags %#x\n", fFlags));
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| 57 |
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| 58 | /* hypervisor defaults */
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| 59 | if (!fFlags)
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| 60 | fFlags = X86_PTE_P | X86_PTE_A | X86_PTE_D;
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| 61 |
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| 62 | /*
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| 63 | * Find the mapping.
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| 64 | */
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| 65 | PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings);
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| 66 | while (pCur)
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| 67 | {
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| 68 | if (GCPtr - pCur->GCPtr < pCur->cb)
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| 69 | {
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| 70 | if (GCPtr + cbPages - 1 > pCur->GCPtrLast)
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| 71 | {
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| 72 | AssertMsgFailed(("Invalid range!!\n"));
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| 73 | return VERR_INVALID_PARAMETER;
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| 74 | }
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| 75 |
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| 76 | /*
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| 77 | * Setup PTE.
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| 78 | */
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| 79 | X86PTEPAE Pte;
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| 80 | Pte.u = fFlags | (HCPhys & X86_PTE_PAE_PG_MASK);
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| 81 |
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| 82 | /*
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| 83 | * Update the page tables.
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| 84 | */
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| 85 | for (;;)
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| 86 | {
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| 87 | RTGCUINTPTR off = GCPtr - pCur->GCPtr;
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| 88 | const unsigned iPT = off >> X86_PD_SHIFT;
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| 89 | const unsigned iPageNo = (off >> PAGE_SHIFT) & X86_PT_MASK;
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| 90 |
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| 91 | /* 32-bit */
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| 92 | pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPageNo].u = (uint32_t)Pte.u; /* ASSUMES HCPhys < 4GB and/or that we're never gonna do 32-bit on a PAE host! */
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| 93 |
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| 94 | /* pae */
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| 95 | pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPageNo / 512].a[iPageNo % 512].u = Pte.u;
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| 96 |
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| 97 | /* next */
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| 98 | cbPages -= PAGE_SIZE;
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| 99 | if (!cbPages)
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| 100 | break;
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| 101 | GCPtr += PAGE_SIZE;
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| 102 | Pte.u += PAGE_SIZE;
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| 103 | }
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| 104 |
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| 105 | return VINF_SUCCESS;
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| 106 | }
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| 107 |
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| 108 | /* next */
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| 109 | pCur = pCur->CTX_SUFF(pNext);
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| 110 | }
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| 111 |
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| 112 | AssertMsgFailed(("GCPtr=%#x was not found in any mapping ranges!\n", GCPtr));
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| 113 | return VERR_INVALID_PARAMETER;
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| 114 | }
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| 115 |
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| 116 |
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| 117 | /**
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| 118 | * Sets (replaces) the page flags for a range of pages in a mapping.
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| 119 | *
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| 120 | * @returns VBox status.
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| 121 | * @param pVM VM handle.
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| 122 | * @param GCPtr Virtual address of the first page in the range.
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| 123 | * @param cb Size (in bytes) of the range to apply the modification to.
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| 124 | * @param fFlags Page flags X86_PTE_*, excluding the page mask of course.
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| 125 | */
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| 126 | VMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags)
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| 127 | {
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| 128 | return PGMMapModifyPage(pVM, GCPtr, cb, fFlags, 0);
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| 129 | }
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| 130 |
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| 131 |
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| 132 | /**
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| 133 | * Modify page flags for a range of pages in a mapping.
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| 134 | *
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| 135 | * The existing flags are ANDed with the fMask and ORed with the fFlags.
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| 136 | *
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| 137 | * @returns VBox status code.
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| 138 | * @param pVM VM handle.
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| 139 | * @param GCPtr Virtual address of the first page in the range.
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| 140 | * @param cb Size (in bytes) of the range to apply the modification to.
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| 141 | * @param fFlags The OR mask - page flags X86_PTE_*, excluding the page mask of course.
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| 142 | * @param fMask The AND mask - page flags X86_PTE_*, excluding the page mask of course.
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| 143 | */
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| 144 | VMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
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| 145 | {
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| 146 | /*
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| 147 | * Validate input.
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| 148 | */
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| 149 | AssertMsg(!(fFlags & X86_PTE_PAE_PG_MASK), ("fFlags=%#x\n", fFlags));
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| 150 | Assert(cb);
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| 151 |
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| 152 | /*
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| 153 | * Align the input.
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| 154 | */
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| 155 | cb += (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
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| 156 | cb = RT_ALIGN_Z(cb, PAGE_SIZE);
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| 157 | GCPtr = (RTGCPTR)((RTGCUINTPTR)GCPtr & PAGE_BASE_GC_MASK);
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| 158 |
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| 159 | /*
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| 160 | * Find the mapping.
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| 161 | */
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| 162 | PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings);
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| 163 | while (pCur)
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| 164 | {
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| 165 | RTGCUINTPTR off = (RTGCUINTPTR)GCPtr - (RTGCUINTPTR)pCur->GCPtr;
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| 166 | if (off < pCur->cb)
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| 167 | {
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| 168 | AssertMsgReturn(off + cb <= pCur->cb,
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| 169 | ("Invalid page range %#x LB%#x. mapping '%s' %#x to %#x\n",
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| 170 | GCPtr, cb, pCur->pszDesc, pCur->GCPtr, pCur->GCPtrLast),
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| 171 | VERR_INVALID_PARAMETER);
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| 172 |
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| 173 | /*
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| 174 | * Perform the requested operation.
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| 175 | */
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| 176 | while (cb > 0)
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| 177 | {
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| 178 | unsigned iPT = off >> X86_PD_SHIFT;
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| 179 | unsigned iPTE = (off >> PAGE_SHIFT) & X86_PT_MASK;
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| 180 | while (cb > 0 && iPTE < RT_ELEMENTS(pCur->aPTs[iPT].CTX_SUFF(pPT)->a))
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| 181 | {
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| 182 | /* 32-Bit */
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| 183 | pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPTE].u &= fMask | X86_PTE_PG_MASK;
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| 184 | pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPTE].u |= fFlags & ~X86_PTE_PG_MASK;
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| 185 |
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| 186 | /* PAE */
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| 187 | pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPTE / 512].a[iPTE % 512].u &= fMask | X86_PTE_PAE_PG_MASK;
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| 188 | pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPTE / 512].a[iPTE % 512].u |= fFlags & ~X86_PTE_PAE_PG_MASK;
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| 189 |
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| 190 | /* invalidate tls */
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| 191 | PGM_INVL_PG((RTGCUINTPTR)pCur->GCPtr + off);
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| 192 |
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| 193 | /* next */
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| 194 | iPTE++;
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| 195 | cb -= PAGE_SIZE;
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| 196 | off += PAGE_SIZE;
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| 197 | }
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| 198 | }
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| 199 |
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| 200 | return VINF_SUCCESS;
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| 201 | }
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| 202 | /* next */
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| 203 | pCur = pCur->CTX_SUFF(pNext);
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| 204 | }
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| 205 |
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| 206 | AssertMsgFailed(("Page range %#x LB%#x not found\n", GCPtr, cb));
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| 207 | return VERR_INVALID_PARAMETER;
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| 208 | }
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| 209 |
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| 210 |
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| 211 |
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