VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllMap.cpp@ 16376

Last change on this file since 16376 was 16376, checked in by vboxsync, 16 years ago

Paging updates. Deal with mode switches and cr3 updates.
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1/* $Id: PGMAllMap.cpp 16376 2009-01-29 16:46:31Z vboxsync $ */
2/** @file
3 * PGM - Page Manager and Monitor - All context code.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Header Files *
24*******************************************************************************/
25#define LOG_GROUP LOG_GROUP_PGM
26#include <VBox/pgm.h>
27#include "PGMInternal.h"
28#include <VBox/vm.h>
29#include <iprt/assert.h>
30#include <iprt/asm.h>
31#include <VBox/err.h>
32
33
34/**
35 * Maps a range of physical pages at a given virtual address
36 * in the guest context.
37 *
38 * The GC virtual address range must be within an existing mapping.
39 *
40 * @returns VBox status code.
41 * @param pVM The virtual machine.
42 * @param GCPtr Where to map the page(s). Must be page aligned.
43 * @param HCPhys Start of the range of physical pages. Must be page aligned.
44 * @param cbPages Number of bytes to map. Must be page aligned.
45 * @param fFlags Page flags (X86_PTE_*).
46 */
47VMMDECL(int) PGMMap(PVM pVM, RTGCUINTPTR GCPtr, RTHCPHYS HCPhys, uint32_t cbPages, unsigned fFlags)
48{
49 AssertMsg(pVM->pgm.s.offVM, ("Bad init order\n"));
50
51 /*
52 * Validate input.
53 */
54 AssertMsg(RT_ALIGN_T(GCPtr, PAGE_SIZE, RTGCUINTPTR) == GCPtr, ("Invalid alignment GCPtr=%#x\n", GCPtr));
55 AssertMsg(cbPages > 0 && RT_ALIGN_32(cbPages, PAGE_SIZE) == cbPages, ("Invalid cbPages=%#x\n", cbPages));
56 AssertMsg(!(fFlags & X86_PDE_PG_MASK), ("Invalid flags %#x\n", fFlags));
57
58 /* hypervisor defaults */
59 if (!fFlags)
60 fFlags = X86_PTE_P | X86_PTE_A | X86_PTE_D;
61
62 /*
63 * Find the mapping.
64 */
65 PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings);
66 while (pCur)
67 {
68 if (GCPtr - pCur->GCPtr < pCur->cb)
69 {
70 if (GCPtr + cbPages - 1 > pCur->GCPtrLast)
71 {
72 AssertMsgFailed(("Invalid range!!\n"));
73 return VERR_INVALID_PARAMETER;
74 }
75
76 /*
77 * Setup PTE.
78 */
79 X86PTEPAE Pte;
80 Pte.u = fFlags | (HCPhys & X86_PTE_PAE_PG_MASK);
81
82 /*
83 * Update the page tables.
84 */
85 for (;;)
86 {
87 RTGCUINTPTR off = GCPtr - pCur->GCPtr;
88 const unsigned iPT = off >> X86_PD_SHIFT;
89 const unsigned iPageNo = (off >> PAGE_SHIFT) & X86_PT_MASK;
90
91 /* 32-bit */
92 pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPageNo].u = (uint32_t)Pte.u; /* ASSUMES HCPhys < 4GB and/or that we're never gonna do 32-bit on a PAE host! */
93
94 /* pae */
95 pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPageNo / 512].a[iPageNo % 512].u = Pte.u;
96
97 /* next */
98 cbPages -= PAGE_SIZE;
99 if (!cbPages)
100 break;
101 GCPtr += PAGE_SIZE;
102 Pte.u += PAGE_SIZE;
103 }
104
105 return VINF_SUCCESS;
106 }
107
108 /* next */
109 pCur = pCur->CTX_SUFF(pNext);
110 }
111
112 AssertMsgFailed(("GCPtr=%#x was not found in any mapping ranges!\n", GCPtr));
113 return VERR_INVALID_PARAMETER;
114}
115
116
117/**
118 * Sets (replaces) the page flags for a range of pages in a mapping.
119 *
120 * @returns VBox status.
121 * @param pVM VM handle.
122 * @param GCPtr Virtual address of the first page in the range.
123 * @param cb Size (in bytes) of the range to apply the modification to.
124 * @param fFlags Page flags X86_PTE_*, excluding the page mask of course.
125 */
126VMMDECL(int) PGMMapSetPage(PVM pVM, RTGCPTR GCPtr, uint64_t cb, uint64_t fFlags)
127{
128 return PGMMapModifyPage(pVM, GCPtr, cb, fFlags, 0);
129}
130
131
132/**
133 * Modify page flags for a range of pages in a mapping.
134 *
135 * The existing flags are ANDed with the fMask and ORed with the fFlags.
136 *
137 * @returns VBox status code.
138 * @param pVM VM handle.
139 * @param GCPtr Virtual address of the first page in the range.
140 * @param cb Size (in bytes) of the range to apply the modification to.
141 * @param fFlags The OR mask - page flags X86_PTE_*, excluding the page mask of course.
142 * @param fMask The AND mask - page flags X86_PTE_*, excluding the page mask of course.
143 */
144VMMDECL(int) PGMMapModifyPage(PVM pVM, RTGCPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask)
145{
146 /*
147 * Validate input.
148 */
149 AssertMsg(!(fFlags & X86_PTE_PAE_PG_MASK), ("fFlags=%#x\n", fFlags));
150 Assert(cb);
151
152 /*
153 * Align the input.
154 */
155 cb += (RTGCUINTPTR)GCPtr & PAGE_OFFSET_MASK;
156 cb = RT_ALIGN_Z(cb, PAGE_SIZE);
157 GCPtr = (RTGCPTR)((RTGCUINTPTR)GCPtr & PAGE_BASE_GC_MASK);
158
159 /*
160 * Find the mapping.
161 */
162 PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings);
163 while (pCur)
164 {
165 RTGCUINTPTR off = (RTGCUINTPTR)GCPtr - (RTGCUINTPTR)pCur->GCPtr;
166 if (off < pCur->cb)
167 {
168 AssertMsgReturn(off + cb <= pCur->cb,
169 ("Invalid page range %#x LB%#x. mapping '%s' %#x to %#x\n",
170 GCPtr, cb, pCur->pszDesc, pCur->GCPtr, pCur->GCPtrLast),
171 VERR_INVALID_PARAMETER);
172
173 /*
174 * Perform the requested operation.
175 */
176 while (cb > 0)
177 {
178 unsigned iPT = off >> X86_PD_SHIFT;
179 unsigned iPTE = (off >> PAGE_SHIFT) & X86_PT_MASK;
180 while (cb > 0 && iPTE < RT_ELEMENTS(pCur->aPTs[iPT].CTX_SUFF(pPT)->a))
181 {
182 /* 32-Bit */
183 pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPTE].u &= fMask | X86_PTE_PG_MASK;
184 pCur->aPTs[iPT].CTX_SUFF(pPT)->a[iPTE].u |= fFlags & ~X86_PTE_PG_MASK;
185
186 /* PAE */
187 pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPTE / 512].a[iPTE % 512].u &= fMask | X86_PTE_PAE_PG_MASK;
188 pCur->aPTs[iPT].CTX_SUFF(paPaePTs)[iPTE / 512].a[iPTE % 512].u |= fFlags & ~X86_PTE_PAE_PG_MASK;
189
190 /* invalidate tls */
191 PGM_INVL_PG((RTGCUINTPTR)pCur->GCPtr + off);
192
193 /* next */
194 iPTE++;
195 cb -= PAGE_SIZE;
196 off += PAGE_SIZE;
197 }
198 }
199
200 return VINF_SUCCESS;
201 }
202 /* next */
203 pCur = pCur->CTX_SUFF(pNext);
204 }
205
206 AssertMsgFailed(("Page range %#x LB%#x not found\n", GCPtr, cb));
207 return VERR_INVALID_PARAMETER;
208}
209
210
211
212#ifdef VBOX_WITH_PGMPOOL_PAGING_ONLY
213
214/**
215 * Sets all PDEs involved with the mapping in the shadow page table.
216 *
217 * @param pVM The VM handle.
218 * @param pMap Pointer to the mapping in question.
219 * @param iNewPDE The index of the 32-bit PDE corresponding to the base of the mapping.
220 */
221void pgmMapSetShadowPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iNewPDE)
222{
223 if (!pgmMapAreMappingsEnabled(&pVM->pgm.s))
224 return;
225
226 PGMMODE enmShadowMode = PGMGetShadowMode(pVM);
227 Assert(enmShadowMode <= PGMMODE_PAE_NX);
228
229 /*
230 * Init the page tables and insert them into the page directories.
231 */
232 unsigned i = pMap->cPTs;
233 iNewPDE += i;
234 while (i-- > 0)
235 {
236 iNewPDE--;
237
238 switch(enmShadowMode)
239 {
240 case PGMMODE_32_BIT:
241 {
242 PX86PD pShw32BitPd = pgmShwGet32BitPDPtr(&pVM->pgm.s);
243 AssertFatal(pShw32BitPd);
244
245 if (pShw32BitPd->a[iNewPDE].n.u1Present)
246 {
247 Assert(!(pShw32BitPd->a[iNewPDE].u & PGM_PDFLAGS_MAPPING));
248 pgmPoolFree(pVM, pShw32BitPd->a[iNewPDE].u & X86_PDE_PG_MASK, pVM->pgm.s.CTX_SUFF(pShwPageCR3)->idx, iNewPDE);
249 }
250
251 X86PDE Pde;
252 /* Default mapping page directory flags are read/write and supervisor; individual page attributes determine the final flags */
253 Pde.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | (uint32_t)pMap->aPTs[i].HCPhysPT;
254 pShw32BitPd->a[iNewPDE] = Pde;
255 break;
256 }
257
258 case PGMMODE_PAE:
259 case PGMMODE_PAE_NX:
260 {
261 PX86PDPT pShwPdpt;
262 PX86PDPAE pShwPaePd;
263 const unsigned iPdPt = iNewPDE / 256;
264 unsigned iPDE = iNewPDE * 2 % 512;
265
266 pShwPdpt = pgmShwGetPaePDPTPtr(&pVM->pgm.s);
267 Assert(pShwPdpt);
268 pShwPaePd = pgmShwGetPaePDPtr(&pVM->pgm.s, (iPdPt << X86_PDPT_SHIFT));
269 AssertFatal(pShwPaePd);
270
271 PPGMPOOLPAGE pPoolPagePde = pgmPoolGetPageByHCPhys(pVM, pShwPdpt->a[iPdPt].u & X86_PDPE_PG_MASK);
272 AssertFatal(pPoolPagePde);
273
274 if (pShwPaePd->a[iPDE].n.u1Present)
275 {
276 Assert(!(pShwPaePd->a[iPDE].u & PGM_PDFLAGS_MAPPING));
277 pgmPoolFree(pVM, pShwPaePd->a[iPDE].u & X86_PDE_PG_MASK, pPoolPagePde->idx, iNewPDE);
278 }
279
280 X86PDEPAE PdePae0;
281 PdePae0.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT0;
282 pShwPaePd->a[iPDE] = PdePae0;
283
284 /* 2nd 2 MB PDE of the 4 MB region */
285 iPDE++;
286 AssertFatal(iPDE < 512);
287
288 if (pShwPaePd->a[iPDE].n.u1Present)
289 {
290 Assert(!(pShwPaePd->a[iPDE].u & PGM_PDFLAGS_MAPPING));
291 pgmPoolFree(pVM, pShwPaePd->a[iPDE].u & X86_PDE_PG_MASK, pPoolPagePde->idx, iNewPDE);
292 }
293
294 X86PDEPAE PdePae1;
295 PdePae1.u = PGM_PDFLAGS_MAPPING | X86_PDE_P | X86_PDE_A | X86_PDE_RW | X86_PDE_US | pMap->aPTs[i].HCPhysPaePT1;
296 pShwPaePd->a[iPDE] = PdePae1;
297
298 /* Set the PGM_PDFLAGS_MAPPING flag in the page directory pointer entry. (legacy PAE guest mode) */
299 pShwPdpt->a[iPdPt].u |= PGM_PLXFLAGS_MAPPING;
300 }
301 }
302 }
303}
304
305/**
306 * Clears all PDEs involved with the mapping in the shadow page table.
307 *
308 * @param pVM The VM handle.
309 * @param pMap Pointer to the mapping in question.
310 * @param iOldPDE The index of the 32-bit PDE corresponding to the base of the mapping.
311 */
312void pgmMapClearShadowPDEs(PVM pVM, PPGMMAPPING pMap, unsigned iOldPDE)
313{
314 unsigned i = pMap->cPTs;
315 PGMMODE enmShadowMode = PGMGetShadowMode(pVM);
316
317 if (!pgmMapAreMappingsEnabled(&pVM->pgm.s))
318 return;
319
320 iOldPDE += i;
321 while (i-- > 0)
322 {
323 iOldPDE--;
324
325 switch(enmShadowMode)
326 {
327 case PGMMODE_32_BIT:
328 {
329 PX86PD pShw32BitPd = pgmShwGet32BitPDPtr(&pVM->pgm.s);
330 AssertFatal(pShw32BitPd);
331
332 pShw32BitPd->a[iOldPDE].u = 0;
333 break;
334 }
335
336 case PGMMODE_PAE:
337 case PGMMODE_PAE_NX:
338 {
339 PX86PDPT pPdpt = NULL;
340 PX86PDPAE pShwPaePd = NULL;
341
342 const unsigned iPD = iOldPDE / 256; /* iOldPDE * 2 / 512; iOldPDE is in 4 MB pages */
343 unsigned iPDE = iOldPDE * 2 % 512;
344 pPdpt = pgmShwGetPaePDPTPtr(&pVM->pgm.s);
345 pShwPaePd = pgmShwGetPaePDPtr(&pVM->pgm.s, (iPD << X86_PDPT_SHIFT));
346 AssertFatal(pShwPaePd);
347
348 pShwPaePd->a[iPDE].u = 0;
349
350 iPDE++;
351 AssertFatal(iPDE < 512);
352
353 pShwPaePd->a[iPDE].u = 0;
354 /* Clear the PGM_PDFLAGS_MAPPING flag for the page directory pointer entry. (legacy PAE guest mode) */
355 pPdpt->a[iPD].u &= ~PGM_PLXFLAGS_MAPPING;
356 break;
357 }
358 }
359 }
360}
361
362/**
363 * Apply the hypervisor mappings to the active CR3.
364 *
365 * @returns VBox status.
366 * @param pVM The virtual machine.
367 */
368VMMDECL(int) PGMMapActivateAll(PVM pVM)
369{
370 /*
371 * Can skip this if mappings are safely fixed.
372 */
373 if (pVM->pgm.s.fMappingsFixed)
374 return VINF_SUCCESS;
375
376 Assert(PGMGetGuestMode(pVM) >= PGMMODE_32_BIT && PGMGetGuestMode(pVM) <= PGMMODE_PAE_NX);
377
378 /*
379 * Iterate mappings.
380 */
381 for (PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings); pCur; pCur = pCur->CTX_SUFF(pNext))
382 {
383 unsigned iPDE = pCur->GCPtr >> X86_PD_SHIFT;
384
385 pgmMapSetShadowPDEs(pVM, pCur, iPDE);
386 }
387
388 return VINF_SUCCESS;
389}
390
391/**
392 * Remove the hypervisor mappings from the active CR3
393 *
394 * @returns VBox status.
395 * @param pVM The virtual machine.
396 */
397VMMDECL(int) PGMMapDeactivateAll(PVM pVM)
398{
399 /*
400 * Can skip this if mappings are safely fixed.
401 */
402 if (pVM->pgm.s.fMappingsFixed)
403 return VINF_SUCCESS;
404
405 Assert(PGMGetGuestMode(pVM) >= PGMMODE_32_BIT && PGMGetGuestMode(pVM) <= PGMMODE_PAE_NX);
406
407 /*
408 * Iterate mappings.
409 */
410 for (PPGMMAPPING pCur = pVM->pgm.s.CTX_SUFF(pMappings); pCur; pCur = pCur->CTX_SUFF(pNext))
411 {
412 unsigned iPDE = pCur->GCPtr >> X86_PD_SHIFT;
413
414 pgmMapClearShadowPDEs(pVM, pCur, iPDE);
415 }
416 return VINF_SUCCESS;
417}
418#endif /* VBOX_WITH_PGMPOOL_PAGING_ONLY */
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