| 1 | /* $Id: HWSVMR0.h 7496 2008-03-19 10:22:50Z vboxsync $ */
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| 2 | /** @file
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| 3 | * HWACCM AMD-V - Internal header file.
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2006-2007 innotek GmbH
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| 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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| 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | */
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| 17 |
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| 18 | #ifndef ___HWSVMR0_h
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| 19 | #define ___HWSVMR0_h
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| 20 |
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| 21 | #include <VBox/cdefs.h>
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| 22 | #include <VBox/types.h>
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| 23 | #include <VBox/em.h>
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| 24 | #include <VBox/stam.h>
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| 25 | #include <VBox/dis.h>
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| 26 | #include <VBox/hwaccm.h>
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| 27 | #include <VBox/pgm.h>
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| 28 | #include <VBox/hwacc_svm.h>
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| 29 |
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| 30 | __BEGIN_DECLS
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| 31 |
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| 32 | /** @defgroup grp_svm Internal
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| 33 | * @ingroup grp_svm
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| 34 | * @internal
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| 35 | * @{
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| 36 | */
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| 37 |
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| 38 | #ifdef IN_RING0
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| 39 |
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| 40 | /**
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| 41 | * Enters the AMD-V session
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| 42 | *
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| 43 | * @returns VBox status code.
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| 44 | * @param pVM The VM to operate on.
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| 45 | */
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| 46 | HWACCMR0DECL(int) SVMR0Enter(PVM pVM);
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| 47 |
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| 48 | /**
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| 49 | * Leaves the AMD-V session
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| 50 | *
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| 51 | * @returns VBox status code.
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| 52 | * @param pVM The VM to operate on.
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| 53 | */
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| 54 | HWACCMR0DECL(int) SVMR0Leave(PVM pVM);
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| 55 |
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| 56 | /**
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| 57 | * Sets up and activates AMD-V on the current CPU
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| 58 | *
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| 59 | * @returns VBox status code.
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| 60 | * @param idCpu The identifier for the CPU the function is called on.
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| 61 | * @param pVM The VM to operate on.
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| 62 | * @param pvPageCpu Pointer to the global cpu page
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| 63 | * @param pPageCpuPhys Physical address of the global cpu page
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| 64 | */
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| 65 | HWACCMR0DECL(int) SVMR0EnableCpu(RTCPUID idCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
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| 66 |
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| 67 | /**
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| 68 | * Deactivates AMD-V on the current CPU
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| 69 | *
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| 70 | * @returns VBox status code.
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| 71 | * @param idCpu The identifier for the CPU the function is called on.
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| 72 | * @param pvPageCpu Pointer to the global cpu page
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| 73 | * @param pPageCpuPhys Physical address of the global cpu page
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| 74 | */
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| 75 | HWACCMR0DECL(int) SVMR0DisableCpu(RTCPUID idCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
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| 76 |
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| 77 | /**
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| 78 | * Does Ring-0 per VM AMD-V init.
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| 79 | *
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| 80 | * @returns VBox status code.
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| 81 | * @param pVM The VM to operate on.
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| 82 | */
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| 83 | HWACCMR0DECL(int) SVMR0InitVM(PVM pVM);
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| 84 |
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| 85 | /**
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| 86 | * Does Ring-0 per VM AMD-V termination.
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| 87 | *
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| 88 | * @returns VBox status code.
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| 89 | * @param pVM The VM to operate on.
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| 90 | */
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| 91 | HWACCMR0DECL(int) SVMR0TermVM(PVM pVM);
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| 92 |
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| 93 | /**
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| 94 | * Sets up AMD-V for the specified VM
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| 95 | *
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| 96 | * @returns VBox status code.
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| 97 | * @param pVM The VM to operate on.
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| 98 | */
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| 99 | HWACCMR0DECL(int) SVMR0SetupVM(PVM pVM);
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| 100 |
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| 101 |
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| 102 | /**
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| 103 | * Runs guest code in an AMD-V VM.
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| 104 | *
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| 105 | * @note NEVER EVER turn on interrupts here. Due to our illegal entry into the kernel, it might mess things up. (XP kernel traps have been frequently observed)
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| 106 | *
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| 107 | * @returns VBox status code.
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| 108 | * @param pVM The VM to operate on.
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| 109 | * @param pCtx Guest context
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| 110 | */
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| 111 | HWACCMR0DECL(int) SVMR0RunGuestCode(PVM pVM, CPUMCTX *pCtx);
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| 112 |
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| 113 |
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| 114 | /**
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| 115 | * Loads the guest state
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| 116 | *
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| 117 | * @returns VBox status code.
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| 118 | * @param pVM The VM to operate on.
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| 119 | * @param pCtx Guest context
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| 120 | */
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| 121 | HWACCMR0DECL(int) SVMR0LoadGuestState(PVM pVM, CPUMCTX *pCtx);
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| 122 |
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| 123 |
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| 124 | /* Convert hidden selector attribute word between VMX and SVM formats. */
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| 125 | #define SVM_HIDSEGATTR_VMX2SVM(a) (a & 0xFF) | ((a & 0xF000) >> 4)
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| 126 | #define SVM_HIDSEGATTR_SVM2VMX(a) (a & 0xFF) | ((a & 0x0F00) << 4)
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| 127 |
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| 128 | #define SVM_WRITE_SELREG(REG, reg) \
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| 129 | pVMCB->guest.REG.u16Sel = pCtx->reg; \
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| 130 | pVMCB->guest.REG.u32Limit = pCtx->reg##Hid.u32Limit; \
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| 131 | pVMCB->guest.REG.u64Base = pCtx->reg##Hid.u32Base; \
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| 132 | pVMCB->guest.REG.u16Attr = SVM_HIDSEGATTR_VMX2SVM(pCtx->reg##Hid.Attr.u);
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| 133 |
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| 134 | #define SVM_READ_SELREG(REG, reg) \
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| 135 | pCtx->reg = pVMCB->guest.REG.u16Sel; \
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| 136 | pCtx->reg##Hid.u32Limit = pVMCB->guest.REG.u32Limit; \
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| 137 | pCtx->reg##Hid.u32Base = pVMCB->guest.REG.u64Base; \
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| 138 | pCtx->reg##Hid.Attr.u = SVM_HIDSEGATTR_SVM2VMX(pVMCB->guest.REG.u16Attr);
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| 139 |
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| 140 | #endif /* IN_RING0 */
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| 141 |
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| 142 | /** @} */
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| 143 |
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| 144 | __END_DECLS
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| 145 |
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| 146 | #endif
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| 147 |
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