VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/DBGFBp.cpp@ 58909

Last change on this file since 58909 was 58909, checked in by vboxsync, 9 years ago

DBGF: More groundwork for port I/O, MMIO, interrupt and generic event breakpoints.
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1/* $Id: DBGFBp.cpp 58909 2015-11-29 19:23:46Z vboxsync $ */
2/** @file
3 * DBGF - Debugger Facility, Breakpoint Management.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DBGF
23#include <VBox/vmm/dbgf.h>
24#include <VBox/vmm/selm.h>
25#ifdef VBOX_WITH_REM
26# include <VBox/vmm/rem.h>
27#else
28# include <VBox/vmm/iem.h>
29#endif
30#include <VBox/vmm/mm.h>
31#include <VBox/vmm/iom.h>
32#include <VBox/vmm/hm.h>
33#include "DBGFInternal.h"
34#include <VBox/vmm/vm.h>
35#include <VBox/vmm/uvm.h>
36
37#include <VBox/err.h>
38#include <VBox/log.h>
39#include <iprt/assert.h>
40#include <iprt/string.h>
41
42
43/*********************************************************************************************************************************
44* Internal Functions *
45*********************************************************************************************************************************/
46RT_C_DECLS_BEGIN
47static int dbgfR3BpRegArm(PVM pVM, PDBGFBP pBp);
48static int dbgfR3BpInt3Arm(PUVM pUVM, PDBGFBP pBp);
49RT_C_DECLS_END
50
51
52
53/**
54 * Initialize the breakpoint stuff.
55 *
56 * @returns VINF_SUCCESS
57 * @param pVM The cross context VM structure.
58 */
59int dbgfR3BpInit(PVM pVM)
60{
61 /*
62 * Init structures.
63 */
64 unsigned i;
65 for (i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); i++)
66 {
67 pVM->dbgf.s.aHwBreakpoints[i].iBp = i;
68 pVM->dbgf.s.aHwBreakpoints[i].enmType = DBGFBPTYPE_FREE;
69 pVM->dbgf.s.aHwBreakpoints[i].u.Reg.iReg = i;
70 }
71
72 for (i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); i++)
73 {
74 pVM->dbgf.s.aBreakpoints[i].iBp = i + RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints);
75 pVM->dbgf.s.aBreakpoints[i].enmType = DBGFBPTYPE_FREE;
76 }
77
78 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
79 {
80 PVMCPU pVCpu = &pVM->aCpus[idCpu];
81 pVCpu->dbgf.s.iActiveBp = ~0U;
82 }
83
84 /*
85 * Register saved state.
86 */
87 /** @todo */
88
89 return VINF_SUCCESS;
90}
91
92
93
94/**
95 * Allocate a breakpoint.
96 *
97 * @returns Pointer to the allocated breakpoint.
98 * @returns NULL if we're out of breakpoints.
99 * @param pVM The cross context VM structure.
100 * @param enmType The type to allocate.
101 */
102static PDBGFBP dbgfR3BpAlloc(PVM pVM, DBGFBPTYPE enmType)
103{
104 /*
105 * Determine which array to search and where in the array to start
106 * searching (latter for grouping similar BPs, reducing runtime overhead).
107 */
108 unsigned iStart;
109 unsigned cBps;
110 PDBGFBP paBps;
111 switch (enmType)
112 {
113 case DBGFBPTYPE_REG:
114 cBps = RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints);
115 paBps = &pVM->dbgf.s.aHwBreakpoints[0];
116 iStart = 0;
117 break;
118
119 case DBGFBPTYPE_INT3:
120 case DBGFBPTYPE_REM:
121 case DBGFBPTYPE_PORT_IO:
122 case DBGFBPTYPE_MMIO:
123 cBps = RT_ELEMENTS(pVM->dbgf.s.aBreakpoints);
124 paBps = &pVM->dbgf.s.aBreakpoints[0];
125 if (enmType == DBGFBPTYPE_PORT_IO)
126 iStart = cBps / 4 * 2;
127 else if (enmType == DBGFBPTYPE_MMIO)
128 iStart = cBps / 4 * 1;
129 else if (enmType == DBGFBPTYPE_REM)
130 iStart = cBps / 4 * 3;
131 else
132 iStart = 0;
133 break;
134
135 default:
136 AssertMsgFailed(("enmType=%d\n", enmType));
137 return NULL;
138 }
139
140 /*
141 * Search for a free breakpoint entry.
142 */
143 unsigned iBp;
144 for (iBp = iStart; iBp < cBps; iBp++)
145 if (paBps[iBp].enmType == DBGFBPTYPE_FREE)
146 break;
147 if (iBp >= cBps && iStart != 0)
148 for (iBp = 0; iBp < cBps; iBp++)
149 if (paBps[iBp].enmType == DBGFBPTYPE_FREE)
150 break;
151 if (iBp < cBps)
152 {
153 /*
154 * Return what we found.
155 */
156 paBps[iBp].fEnabled = false;
157 paBps[iBp].cHits = 0;
158 paBps[iBp].enmType = enmType;
159 return &paBps[iBp];
160 }
161
162 LogFlow(("dbgfR3BpAlloc: returns NULL - we're out of breakpoint slots! cBps=%u\n", cBps));
163 return NULL;
164}
165
166
167/**
168 * Updates IOM on whether we've got any armed I/O port or MMIO breakpoints.
169 *
170 * @returns VINF_SUCCESS
171 * @param pVM The cross context VM structure.
172 * @param enmType The breakpoint type.
173 * @param pOpt The breakpoint optimization structure to update.
174 */
175static int dbgfR3BpUpdateSearchOptimizations(PVM pVM, DBGFBPTYPE enmType, PDBGFBPSEARCHOPT pOpt)
176{
177 DBGFBPSEARCHOPT Opt = { UINT32_MAX, 0 };
178
179 for (uint32_t iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); iBp++)
180 if ( pVM->dbgf.s.aBreakpoints[iBp].enmType == enmType
181 && pVM->dbgf.s.aBreakpoints[iBp].fEnabled)
182 {
183 if (Opt.iStartSearch > iBp)
184 Opt.iStartSearch = iBp;
185 Opt.cToSearch = iBp - Opt.iStartSearch + 1;
186 }
187
188 *pOpt = Opt;
189 return VINF_SUCCESS;
190}
191
192
193/**
194 * Get a breakpoint give by breakpoint id.
195 *
196 * @returns Pointer to the allocated breakpoint.
197 * @returns NULL if the breakpoint is invalid.
198 * @param pVM The cross context VM structure.
199 * @param iBp The breakpoint id.
200 */
201static PDBGFBP dbgfR3BpGet(PVM pVM, uint32_t iBp)
202{
203 /* Find it. */
204 PDBGFBP pBp;
205 if (iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints))
206 pBp = &pVM->dbgf.s.aHwBreakpoints[iBp];
207 else
208 {
209 iBp -= RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints);
210 if (iBp >= RT_ELEMENTS(pVM->dbgf.s.aBreakpoints))
211 return NULL;
212 pBp = &pVM->dbgf.s.aBreakpoints[iBp];
213 }
214
215 /* check if it's valid. */
216 switch (pBp->enmType)
217 {
218 case DBGFBPTYPE_FREE:
219 return NULL;
220
221 case DBGFBPTYPE_REG:
222 case DBGFBPTYPE_INT3:
223 case DBGFBPTYPE_REM:
224 case DBGFBPTYPE_PORT_IO:
225 case DBGFBPTYPE_MMIO:
226 break;
227
228 default:
229 AssertMsgFailed(("Invalid enmType=%d!\n", pBp->enmType));
230 return NULL;
231 }
232
233 return pBp;
234}
235
236
237/**
238 * Get a breakpoint give by address.
239 *
240 * @returns Pointer to the allocated breakpoint.
241 * @returns NULL if the breakpoint is invalid.
242 * @param pVM The cross context VM structure.
243 * @param enmType The breakpoint type.
244 * @param GCPtr The breakpoint address.
245 */
246static PDBGFBP dbgfR3BpGetByAddr(PVM pVM, DBGFBPTYPE enmType, RTGCUINTPTR GCPtr)
247{
248 /*
249 * Determine which array to search.
250 */
251 unsigned cBps;
252 PDBGFBP paBps;
253 switch (enmType)
254 {
255 case DBGFBPTYPE_REG:
256 cBps = RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints);
257 paBps = &pVM->dbgf.s.aHwBreakpoints[0];
258 break;
259
260 case DBGFBPTYPE_INT3:
261 case DBGFBPTYPE_REM:
262 cBps = RT_ELEMENTS(pVM->dbgf.s.aBreakpoints);
263 paBps = &pVM->dbgf.s.aBreakpoints[0];
264 break;
265
266 default:
267 AssertMsgFailed(("enmType=%d\n", enmType));
268 return NULL;
269 }
270
271 /*
272 * Search.
273 */
274 for (unsigned iBp = 0; iBp < cBps; iBp++)
275 if ( paBps[iBp].enmType == enmType
276 && paBps[iBp].u.GCPtr == GCPtr)
277 return &paBps[iBp];
278
279 return NULL;
280}
281
282
283/**
284 * Frees a breakpoint.
285 *
286 * @param pVM The cross context VM structure.
287 * @param pBp The breakpoint to free.
288 */
289static void dbgfR3BpFree(PVM pVM, PDBGFBP pBp)
290{
291 switch (pBp->enmType)
292 {
293 case DBGFBPTYPE_FREE:
294 AssertMsgFailed(("Already freed!\n"));
295 return;
296
297 case DBGFBPTYPE_REG:
298 Assert(pBp - &pVM->dbgf.s.aHwBreakpoints[0] < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints));
299 break;
300
301 case DBGFBPTYPE_INT3:
302 case DBGFBPTYPE_REM:
303 case DBGFBPTYPE_PORT_IO:
304 case DBGFBPTYPE_MMIO:
305 Assert(pBp - &pVM->dbgf.s.aBreakpoints[0] < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints));
306 break;
307
308 default:
309 AssertMsgFailed(("Invalid enmType=%d!\n", pBp->enmType));
310 return;
311
312 }
313 pBp->enmType = DBGFBPTYPE_FREE;
314 NOREF(pVM);
315}
316
317
318/**
319 * Sets a breakpoint (int 3 based).
320 *
321 * @returns VBox status code.
322 * @param pUVM The user mode VM handle.
323 * @param pAddress The address of the breakpoint.
324 * @param piHitTrigger The hit count at which the breakpoint start triggering.
325 * Use 0 (or 1) if it's gonna trigger at once.
326 * @param piHitDisable The hit count which disables the breakpoint.
327 * Use ~(uint64_t) if it's never gonna be disabled.
328 * @param piBp Where to store the breakpoint id. (optional)
329 * @thread Any thread.
330 */
331static DECLCALLBACK(int) dbgfR3BpSetInt3(PUVM pUVM, PCDBGFADDRESS pAddress, uint64_t *piHitTrigger,
332 uint64_t *piHitDisable, uint32_t *piBp)
333{
334 /*
335 * Validate input.
336 */
337 PVM pVM = pUVM->pVM;
338 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
339 if (!DBGFR3AddrIsValid(pUVM, pAddress))
340 return VERR_INVALID_PARAMETER;
341 if (*piHitTrigger > *piHitDisable)
342 return VERR_INVALID_PARAMETER;
343 AssertMsgReturn(!piBp || VALID_PTR(piBp), ("piBp=%p\n", piBp), VERR_INVALID_POINTER);
344 if (piBp)
345 *piBp = ~0;
346
347 /*
348 * Check if the breakpoint already exists.
349 */
350 PDBGFBP pBp = dbgfR3BpGetByAddr(pVM, DBGFBPTYPE_INT3, pAddress->FlatPtr);
351 if (pBp)
352 {
353 int rc = VINF_SUCCESS;
354 if (!pBp->fEnabled)
355 rc = dbgfR3BpInt3Arm(pUVM, pBp);
356 if (RT_SUCCESS(rc))
357 {
358 rc = VINF_DBGF_BP_ALREADY_EXIST;
359 if (piBp)
360 *piBp = pBp->iBp;
361 }
362 return rc;
363 }
364
365 /*
366 * Allocate and initialize the bp.
367 */
368 pBp = dbgfR3BpAlloc(pVM, DBGFBPTYPE_INT3);
369 if (!pBp)
370 return VERR_DBGF_NO_MORE_BP_SLOTS;
371 pBp->u.Int3.GCPtr = pAddress->FlatPtr;
372 pBp->iHitTrigger = *piHitTrigger;
373 pBp->iHitDisable = *piHitDisable;
374 ASMCompilerBarrier();
375 pBp->fEnabled = true;
376 dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_INT3, &pVM->dbgf.s.Int3);
377
378 /*
379 * Now ask REM to set the breakpoint.
380 */
381 int rc = dbgfR3BpInt3Arm(pUVM, pBp);
382 if (RT_SUCCESS(rc))
383 {
384 if (piBp)
385 *piBp = pBp->iBp;
386 }
387 else
388 dbgfR3BpFree(pVM, pBp);
389
390 return rc;
391}
392
393
394/**
395 * Sets a breakpoint (int 3 based).
396 *
397 * @returns VBox status code.
398 * @param pUVM The user mode VM handle.
399 * @param pAddress The address of the breakpoint.
400 * @param iHitTrigger The hit count at which the breakpoint start triggering.
401 * Use 0 (or 1) if it's gonna trigger at once.
402 * @param iHitDisable The hit count which disables the breakpoint.
403 * Use ~(uint64_t) if it's never gonna be disabled.
404 * @param piBp Where to store the breakpoint id. (optional)
405 * @thread Any thread.
406 */
407VMMR3DECL(int) DBGFR3BpSet(PUVM pUVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable, uint32_t *piBp)
408{
409 /*
410 * This must be done on EMT.
411 */
412 int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetInt3, 5,
413 pUVM, pAddress, &iHitTrigger, &iHitDisable, piBp);
414 LogFlow(("DBGFR3BpSet: returns %Rrc\n", rc));
415 return rc;
416}
417
418
419/**
420 * Arms an int 3 breakpoint.
421 * This is used to implement both DBGFR3BpSetReg() and DBGFR3BpEnable().
422 *
423 * @returns VBox status code.
424 * @param pUVM The user mode VM handle.
425 * @param pBp The breakpoint.
426 */
427static int dbgfR3BpInt3Arm(PUVM pUVM, PDBGFBP pBp)
428{
429 /** @todo should actually use physical address here! */
430
431 /** @todo SMP support! */
432 VMCPUID idCpu = 0;
433
434 /*
435 * Save current byte and write int3 instruction.
436 */
437 DBGFADDRESS Addr;
438 DBGFR3AddrFromFlat(pUVM, &Addr, pBp->u.Int3.GCPtr);
439 int rc = DBGFR3MemRead(pUVM, idCpu, &Addr, &pBp->u.Int3.bOrg, 1);
440 if (RT_SUCCESS(rc))
441 {
442 static const uint8_t s_bInt3 = 0xcc;
443 rc = DBGFR3MemWrite(pUVM, idCpu, &Addr, &s_bInt3, 1);
444 }
445 return rc;
446}
447
448
449/**
450 * Disarms an int 3 breakpoint.
451 * This is used to implement both DBGFR3BpClear() and DBGFR3BpDisable().
452 *
453 * @returns VBox status code.
454 * @param pUVM The user mode VM handle.
455 * @param pBp The breakpoint.
456 */
457static int dbgfR3BpInt3Disarm(PUVM pUVM, PDBGFBP pBp)
458{
459 /* @todo SMP support! */
460 VMCPUID idCpu = 0;
461
462 /*
463 * Check that the current byte is the int3 instruction, and restore the original one.
464 * We currently ignore invalid bytes.
465 */
466 DBGFADDRESS Addr;
467 DBGFR3AddrFromFlat(pUVM, &Addr, pBp->u.Int3.GCPtr);
468 uint8_t bCurrent;
469 int rc = DBGFR3MemRead(pUVM, idCpu, &Addr, &bCurrent, 1);
470 if (bCurrent == 0xcc)
471 rc = DBGFR3MemWrite(pUVM, idCpu, &Addr, &pBp->u.Int3.bOrg, 1);
472 return rc;
473}
474
475
476/**
477 * Sets a register breakpoint.
478 *
479 * @returns VBox status code.
480 * @param pUVM The user mode VM handle.
481 * @param pAddress The address of the breakpoint.
482 * @param piHitTrigger The hit count at which the breakpoint start triggering.
483 * Use 0 (or 1) if it's gonna trigger at once.
484 * @param piHitDisable The hit count which disables the breakpoint.
485 * Use ~(uint64_t) if it's never gonna be disabled.
486 * @param fType The access type (one of the X86_DR7_RW_* defines).
487 * @param cb The access size - 1,2,4 or 8 (the latter is AMD64 long mode only.
488 * Must be 1 if fType is X86_DR7_RW_EO.
489 * @param piBp Where to store the breakpoint id. (optional)
490 * @thread EMT
491 * @internal
492 */
493static DECLCALLBACK(int) dbgfR3BpSetReg(PUVM pUVM, PCDBGFADDRESS pAddress, uint64_t *piHitTrigger, uint64_t *piHitDisable,
494 uint8_t fType, uint8_t cb, uint32_t *piBp)
495{
496 /*
497 * Validate input.
498 */
499 PVM pVM = pUVM->pVM;
500 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
501 if (!DBGFR3AddrIsValid(pUVM, pAddress))
502 return VERR_INVALID_PARAMETER;
503 if (*piHitTrigger > *piHitDisable)
504 return VERR_INVALID_PARAMETER;
505 AssertMsgReturn(!piBp || VALID_PTR(piBp), ("piBp=%p\n", piBp), VERR_INVALID_POINTER);
506 if (piBp)
507 *piBp = ~0;
508 switch (fType)
509 {
510 case X86_DR7_RW_EO:
511 if (cb == 1)
512 break;
513 AssertMsgFailed(("fType=%#x cb=%d != 1\n", fType, cb));
514 return VERR_INVALID_PARAMETER;
515 case X86_DR7_RW_IO:
516 case X86_DR7_RW_RW:
517 case X86_DR7_RW_WO:
518 break;
519 default:
520 AssertMsgFailed(("fType=%#x\n", fType));
521 return VERR_INVALID_PARAMETER;
522 }
523 switch (cb)
524 {
525 case 1:
526 case 2:
527 case 4:
528 break;
529 default:
530 AssertMsgFailed(("cb=%#x\n", cb));
531 return VERR_INVALID_PARAMETER;
532 }
533
534 /*
535 * Check if the breakpoint already exists.
536 */
537 PDBGFBP pBp = dbgfR3BpGetByAddr(pVM, DBGFBPTYPE_REG, pAddress->FlatPtr);
538 if ( pBp
539 && pBp->u.Reg.cb == cb
540 && pBp->u.Reg.fType == fType)
541 {
542 int rc = VINF_SUCCESS;
543 if (!pBp->fEnabled)
544 rc = dbgfR3BpRegArm(pVM, pBp);
545 if (RT_SUCCESS(rc))
546 {
547 rc = VINF_DBGF_BP_ALREADY_EXIST;
548 if (piBp)
549 *piBp = pBp->iBp;
550 }
551 return rc;
552 }
553
554 /*
555 * Allocate and initialize the bp.
556 */
557 pBp = dbgfR3BpAlloc(pVM, DBGFBPTYPE_REG);
558 if (!pBp)
559 return VERR_DBGF_NO_MORE_BP_SLOTS;
560 pBp->iHitTrigger = *piHitTrigger;
561 pBp->iHitDisable = *piHitDisable;
562 Assert(pBp->iBp == pBp->u.Reg.iReg);
563 pBp->u.Reg.GCPtr = pAddress->FlatPtr;
564 pBp->u.Reg.fType = fType;
565 pBp->u.Reg.cb = cb;
566 ASMCompilerBarrier();
567 pBp->fEnabled = true;
568
569 /*
570 * Arm the breakpoint.
571 */
572 int rc = dbgfR3BpRegArm(pVM, pBp);
573 if (RT_SUCCESS(rc))
574 {
575 if (piBp)
576 *piBp = pBp->iBp;
577 }
578 else
579 dbgfR3BpFree(pVM, pBp);
580
581 return rc;
582}
583
584
585/**
586 * Sets a register breakpoint.
587 *
588 * @returns VBox status code.
589 * @param pUVM The user mode VM handle.
590 * @param pAddress The address of the breakpoint.
591 * @param iHitTrigger The hit count at which the breakpoint start triggering.
592 * Use 0 (or 1) if it's gonna trigger at once.
593 * @param iHitDisable The hit count which disables the breakpoint.
594 * Use ~(uint64_t) if it's never gonna be disabled.
595 * @param fType The access type (one of the X86_DR7_RW_* defines).
596 * @param cb The access size - 1,2,4 or 8 (the latter is AMD64 long mode only.
597 * Must be 1 if fType is X86_DR7_RW_EO.
598 * @param piBp Where to store the breakpoint id. (optional)
599 * @thread Any thread.
600 */
601VMMR3DECL(int) DBGFR3BpSetReg(PUVM pUVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable,
602 uint8_t fType, uint8_t cb, uint32_t *piBp)
603{
604 /*
605 * This must be done on EMT.
606 */
607 int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetReg, 7,
608 pUVM, pAddress, &iHitTrigger, &iHitDisable, fType, cb, piBp);
609 LogFlow(("DBGFR3BpSetReg: returns %Rrc\n", rc));
610 return rc;
611
612}
613
614
615/**
616 * @callback_method_impl{FNVMMEMTRENDEZVOUS}
617 */
618static DECLCALLBACK(VBOXSTRICTRC) dbgfR3BpRegRecalcOnCpu(PVM pVM, PVMCPU pVCpu, void *pvUser)
619{
620 NOREF(pVM); NOREF(pvUser);
621
622 /*
623 * CPU 0 updates the enabled hardware breakpoint counts.
624 */
625 if (pVCpu->idCpu == 0)
626 {
627 pVM->dbgf.s.cEnabledHwBreakpoints = 0;
628 pVM->dbgf.s.cEnabledHwIoBreakpoints = 0;
629
630 for (uint32_t iBp = 0; iBp < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); iBp++)
631 if ( pVM->dbgf.s.aHwBreakpoints[iBp].fEnabled
632 && pVM->dbgf.s.aHwBreakpoints[iBp].enmType == DBGFBPTYPE_REG)
633 {
634 pVM->dbgf.s.cEnabledHwBreakpoints += 1;
635 pVM->dbgf.s.cEnabledHwIoBreakpoints += pVM->dbgf.s.aHwBreakpoints[iBp].u.Reg.fType == X86_DR7_RW_IO;
636 }
637 }
638
639 return CPUMRecalcHyperDRx(pVCpu, UINT8_MAX, false);
640}
641
642
643/**
644 * Arms a debug register breakpoint.
645 *
646 * This is used to implement both DBGFR3BpSetReg() and DBGFR3BpEnable().
647 *
648 * @returns VBox status code.
649 * @param pVM The cross context VM structure.
650 * @param pBp The breakpoint.
651 * @thread EMT(0)
652 */
653static int dbgfR3BpRegArm(PVM pVM, PDBGFBP pBp)
654{
655 Assert(pBp->fEnabled);
656 return VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE, dbgfR3BpRegRecalcOnCpu, NULL);
657}
658
659
660/**
661 * Disarms a debug register breakpoint.
662 *
663 * This is used to implement both DBGFR3BpClear() and DBGFR3BpDisable().
664 *
665 * @returns VBox status code.
666 * @param pVM The cross context VM structure.
667 * @param pBp The breakpoint.
668 * @thread EMT(0)
669 */
670static int dbgfR3BpRegDisarm(PVM pVM, PDBGFBP pBp)
671{
672 Assert(!pBp->fEnabled);
673 return VMMR3EmtRendezvous(pVM, VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE, dbgfR3BpRegRecalcOnCpu, NULL);
674}
675
676
677/**
678 * EMT worker for DBGFR3BpSetREM().
679 *
680 * @returns VBox status code.
681 * @param pUVM The user mode VM handle.
682 * @param pAddress The address of the breakpoint.
683 * @param piHitTrigger The hit count at which the breakpoint start triggering.
684 * Use 0 (or 1) if it's gonna trigger at once.
685 * @param piHitDisable The hit count which disables the breakpoint.
686 * Use ~(uint64_t) if it's never gonna be disabled.
687 * @param piBp Where to store the breakpoint id. (optional)
688 * @thread EMT(0)
689 * @internal
690 */
691static DECLCALLBACK(int) dbgfR3BpSetREM(PUVM pUVM, PCDBGFADDRESS pAddress, uint64_t *piHitTrigger,
692 uint64_t *piHitDisable, uint32_t *piBp)
693{
694 /*
695 * Validate input.
696 */
697 PVM pVM = pUVM->pVM;
698 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
699 if (!DBGFR3AddrIsValid(pUVM, pAddress))
700 return VERR_INVALID_PARAMETER;
701 if (*piHitTrigger > *piHitDisable)
702 return VERR_INVALID_PARAMETER;
703 AssertMsgReturn(!piBp || VALID_PTR(piBp), ("piBp=%p\n", piBp), VERR_INVALID_POINTER);
704 if (piBp)
705 *piBp = ~0;
706
707
708 /*
709 * Check if the breakpoint already exists.
710 */
711 PDBGFBP pBp = dbgfR3BpGetByAddr(pVM, DBGFBPTYPE_REM, pAddress->FlatPtr);
712 if (pBp)
713 {
714 int rc = VINF_SUCCESS;
715 if (!pBp->fEnabled)
716#ifdef VBOX_WITH_REM
717 rc = REMR3BreakpointSet(pVM, pBp->u.Rem.GCPtr);
718#else
719 rc = IEMBreakpointSet(pVM, pBp->u.Rem.GCPtr);
720#endif
721 if (RT_SUCCESS(rc))
722 {
723 rc = VINF_DBGF_BP_ALREADY_EXIST;
724 if (piBp)
725 *piBp = pBp->iBp;
726 }
727 return rc;
728 }
729
730 /*
731 * Allocate and initialize the bp.
732 */
733 pBp = dbgfR3BpAlloc(pVM, DBGFBPTYPE_REM);
734 if (!pBp)
735 return VERR_DBGF_NO_MORE_BP_SLOTS;
736 pBp->u.Rem.GCPtr = pAddress->FlatPtr;
737 pBp->iHitTrigger = *piHitTrigger;
738 pBp->iHitDisable = *piHitDisable;
739 ASMCompilerBarrier();
740 pBp->fEnabled = true;
741
742 /*
743 * Now ask REM to set the breakpoint.
744 */
745#ifdef VBOX_WITH_REM
746 int rc = REMR3BreakpointSet(pVM, pAddress->FlatPtr);
747#else
748 int rc = IEMBreakpointSet(pVM, pAddress->FlatPtr);
749#endif
750 if (RT_SUCCESS(rc))
751 {
752 if (piBp)
753 *piBp = pBp->iBp;
754 }
755 else
756 dbgfR3BpFree(pVM, pBp);
757
758 return rc;
759}
760
761
762/**
763 * Sets a recompiler breakpoint.
764 *
765 * @returns VBox status code.
766 * @param pUVM The user mode VM handle.
767 * @param pAddress The address of the breakpoint.
768 * @param iHitTrigger The hit count at which the breakpoint start triggering.
769 * Use 0 (or 1) if it's gonna trigger at once.
770 * @param iHitDisable The hit count which disables the breakpoint.
771 * Use ~(uint64_t) if it's never gonna be disabled.
772 * @param piBp Where to store the breakpoint id. (optional)
773 * @thread Any thread.
774 */
775VMMR3DECL(int) DBGFR3BpSetREM(PUVM pUVM, PCDBGFADDRESS pAddress, uint64_t iHitTrigger, uint64_t iHitDisable, uint32_t *piBp)
776{
777 /*
778 * This must be done on EMT.
779 */
780 int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetREM, 5,
781 pUVM, pAddress, &iHitTrigger, &iHitDisable, piBp);
782 LogFlow(("DBGFR3BpSetREM: returns %Rrc\n", rc));
783 return rc;
784}
785
786
787/**
788 * Updates IOM on whether we've got any armed I/O port or MMIO breakpoints.
789 *
790 * @returns VINF_SUCCESS
791 * @param pVM The cross context VM structure.
792 * @thread EMT(0)
793 */
794static int dbgfR3BpUpdateIom(PVM pVM)
795{
796 dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_PORT_IO, &pVM->dbgf.s.PortIo);
797 if (pVM->dbgf.s.PortIo.cToSearch)
798 ASMAtomicBitSet(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_BREAKPOINT_IO);
799 else
800 ASMAtomicBitClear(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_BREAKPOINT_IO);
801
802 dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_MMIO, &pVM->dbgf.s.Mmio);
803 if (pVM->dbgf.s.Mmio.cToSearch)
804 ASMAtomicBitSet(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_BREAKPOINT_MMIO);
805 else
806 ASMAtomicBitClear(&pVM->dbgf.s.bmSelectedEvents, DBGFEVENT_BREAKPOINT_MMIO);
807
808 IOMR3NotifyBreakpointCountChange(pVM, pVM->dbgf.s.PortIo.cToSearch != 0, pVM->dbgf.s.Mmio.cToSearch != 0);
809 return VINF_SUCCESS;
810}
811
812
813/**
814 * EMT worker for DBGFR3BpSetPortIo.
815 *
816 * @returns VBox status code.
817 * @param pUVM The user mode VM handle.
818 * @param uPort The first I/O port.
819 * @param cPorts The number of I/O ports.
820 * @param fAccess The access we want to break on.
821 * @param piHitTrigger The hit count at which the breakpoint start triggering.
822 * Use 0 (or 1) if it's gonna trigger at once.
823 * @param piHitDisable The hit count which disables the breakpoint.
824 * Use ~(uint64_t) if it's never gonna be disabled.
825 * @param piBp Where to store the breakpoint ID.
826 * @thread EMT(0)
827 */
828static DECLCALLBACK(int) dbgfR3BpSetPortIo(PUVM pUVM, RTIOPORT uPort, RTIOPORT cPorts, uint32_t fAccess,
829 uint64_t const *piHitTrigger, uint64_t const *piHitDisable, uint32_t *piBp)
830{
831 /*
832 * Validate input.
833 */
834 PVM pVM = pUVM->pVM;
835 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
836 *piBp = ~0;
837
838 /*
839 * Check if the breakpoint already exists.
840 */
841 for (uint32_t i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); i++)
842 if ( pVM->dbgf.s.aBreakpoints[i].enmType == DBGFBPTYPE_PORT_IO
843 && pVM->dbgf.s.aBreakpoints[i].u.PortIo.uPort == uPort
844 && pVM->dbgf.s.aBreakpoints[i].u.PortIo.cPorts == cPorts
845 && pVM->dbgf.s.aBreakpoints[i].u.PortIo.fAccess == fAccess)
846 {
847 if (!pVM->dbgf.s.aBreakpoints[i].fEnabled)
848 {
849 pVM->dbgf.s.aBreakpoints[i].fEnabled = true;
850 dbgfR3BpUpdateIom(pVM);
851 }
852 *piBp = pVM->dbgf.s.aBreakpoints[i].iBp;
853 return VINF_DBGF_BP_ALREADY_EXIST;
854 }
855
856 /*
857 * Allocate and initialize the breakpoint.
858 */
859 PDBGFBP pBp = dbgfR3BpAlloc(pVM, DBGFBPTYPE_PORT_IO);
860 if (!pBp)
861 return VERR_DBGF_NO_MORE_BP_SLOTS;
862 pBp->iHitTrigger = *piHitTrigger;
863 pBp->iHitDisable = *piHitDisable;
864 pBp->u.PortIo.uPort = uPort;
865 pBp->u.PortIo.cPorts = cPorts;
866 pBp->u.PortIo.fAccess = fAccess;
867 ASMCompilerBarrier();
868 pBp->fEnabled = true;
869
870 /*
871 * Tell IOM.
872 */
873 dbgfR3BpUpdateIom(pVM);
874 *piBp = pBp->iBp;
875 return VINF_SUCCESS;
876}
877
878
879/**
880 * Sets an I/O port breakpoint.
881 *
882 * @returns VBox status code.
883 * @param pUvm The user mode VM handle.
884 * @param uPort The first I/O port.
885 * @param cPorts The number of I/O ports, see DBGFBPIOACCESS_XXX.
886 * @param fAccess The access we want to break on.
887 * @param iHitTrigger The hit count at which the breakpoint start
888 * triggering. Use 0 (or 1) if it's gonna trigger at
889 * once.
890 * @param iHitDisable The hit count which disables the breakpoint.
891 * Use ~(uint64_t) if it's never gonna be disabled.
892 * @param piBp Where to store the breakpoint ID. Optional.
893 * @thread Any thread.
894 */
895VMMR3DECL(int) DBGFR3BpSetPortIo(PUVM pUVM, RTIOPORT uPort, RTIOPORT cPorts, uint32_t fAccess,
896 uint64_t iHitTrigger, uint64_t iHitDisable, uint32_t *piBp)
897{
898 AssertReturn(!(fAccess & ~DBGFBPIOACCESS_VALID_MASK_PORT_IO), VERR_INVALID_FLAGS);
899 AssertReturn(fAccess, VERR_INVALID_FLAGS);
900 if (iHitTrigger > iHitDisable)
901 return VERR_INVALID_PARAMETER;
902 AssertPtrNullReturn(piBp, VERR_INVALID_POINTER);
903 AssertReturn(cPorts > 0, VERR_OUT_OF_RANGE);
904 AssertReturn((RTIOPORT)(uPort + cPorts) < uPort, VERR_OUT_OF_RANGE);
905
906 /*
907 * This must be done on EMT.
908 */
909 uint32_t iBp = -1;
910 int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetPortIo, 7,
911 pUVM, uPort, cPorts, fAccess, &iHitTrigger, &iHitDisable, piBp);
912 if (piBp)
913 *piBp = iBp;
914 LogFlow(("DBGFR3BpSetPortIo: returns %Rrc iBp=%d\n", rc, iBp));
915 return rc;
916}
917
918
919/**
920 * EMT worker for DBGFR3BpSetMmio.
921 *
922 * @returns VBox status code.
923 * @param pUVM The user mode VM handle.
924 * @param pGCPhys The start of the MMIO range to break on.
925 * @param cb The the size of the MMIO range.
926 * @param fAccess The access we want to break on.
927 * @param piHitTrigger The hit count at which the breakpoint start triggering.
928 * Use 0 (or 1) if it's gonna trigger at once.
929 * @param piHitDisable The hit count which disables the breakpoint.
930 * Use ~(uint64_t) if it's never gonna be disabled.
931 * @param piBp Where to store the breakpoint ID.
932 * @thread EMT(0)
933 */
934static DECLCALLBACK(int) dbgfR3BpSetMmio(PUVM pUVM, PCRTGCPHYS pGCPhys, uint32_t cb, uint32_t fAccess,
935 uint64_t const *piHitTrigger, uint64_t const *piHitDisable, uint32_t *piBp)
936{
937 RTGCPHYS const GCPhys = *pGCPhys;
938
939 /*
940 * Validate input.
941 */
942 PVM pVM = pUVM->pVM;
943 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
944 *piBp = ~0;
945
946 /*
947 * Check if the breakpoint already exists.
948 */
949 for (uint32_t i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); i++)
950 if ( pVM->dbgf.s.aBreakpoints[i].enmType == DBGFBPTYPE_MMIO
951 && pVM->dbgf.s.aBreakpoints[i].u.Mmio.PhysAddr == GCPhys
952 && pVM->dbgf.s.aBreakpoints[i].u.Mmio.cb == cb
953 && pVM->dbgf.s.aBreakpoints[i].u.Mmio.fAccess == fAccess)
954 {
955 if (!pVM->dbgf.s.aBreakpoints[i].fEnabled)
956 {
957 pVM->dbgf.s.aBreakpoints[i].fEnabled = true;
958 dbgfR3BpUpdateIom(pVM);
959 }
960 *piBp = pVM->dbgf.s.aBreakpoints[i].iBp;
961 return VINF_DBGF_BP_ALREADY_EXIST;
962 }
963
964 /*
965 * Allocate and initialize the breakpoint.
966 */
967 PDBGFBP pBp = dbgfR3BpAlloc(pVM, DBGFBPTYPE_PORT_IO);
968 if (!pBp)
969 return VERR_DBGF_NO_MORE_BP_SLOTS;
970 pBp->iHitTrigger = *piHitTrigger;
971 pBp->iHitDisable = *piHitDisable;
972 pBp->u.Mmio.PhysAddr = GCPhys;
973 pBp->u.Mmio.cb = cb;
974 pBp->u.Mmio.fAccess = fAccess;
975 ASMCompilerBarrier();
976 pBp->fEnabled = true;
977
978 /*
979 * Tell IOM.
980 */
981 dbgfR3BpUpdateIom(pVM);
982 *piBp = pBp->iBp;
983 return VINF_SUCCESS;
984}
985
986
987/**
988 * Sets a memory mapped I/O breakpoint.
989 *
990 * @returns VBox status code.
991 * @param pUvm The user mode VM handle.
992 * @param GCPhys The first MMIO address.
993 * @param cb The size of the MMIO range to break on.
994 * @param fAccess The access we want to break on.
995 * @param iHitTrigger The hit count at which the breakpoint start
996 * triggering. Use 0 (or 1) if it's gonna trigger at
997 * once.
998 * @param iHitDisable The hit count which disables the breakpoint.
999 * Use ~(uint64_t) if it's never gonna be disabled.
1000 * @param piBp Where to store the breakpoint ID. Optional.
1001 * @thread Any thread.
1002 */
1003VMMR3DECL(int) DBGFR3BpSetMmio(PUVM pUVM, RTGCPHYS GCPhys, uint32_t cb, uint32_t fAccess,
1004 uint64_t iHitTrigger, uint64_t iHitDisable, uint32_t *piBp)
1005{
1006 AssertReturn(!(fAccess & ~DBGFBPIOACCESS_VALID_MASK_MMIO), VERR_INVALID_FLAGS);
1007 AssertReturn(fAccess, VERR_INVALID_FLAGS);
1008 if (iHitTrigger > iHitDisable)
1009 return VERR_INVALID_PARAMETER;
1010 AssertPtrNullReturn(piBp, VERR_INVALID_POINTER);
1011 AssertReturn(cb, VERR_OUT_OF_RANGE);
1012 AssertReturn(GCPhys + cb < GCPhys, VERR_OUT_OF_RANGE);
1013
1014 /*
1015 * This must be done on EMT.
1016 */
1017 uint32_t iBp = -1;
1018 int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpSetMmio, 7,
1019 pUVM, &GCPhys, cb, fAccess, &iHitTrigger, &iHitDisable, piBp);
1020 if (piBp)
1021 *piBp = iBp;
1022 LogFlow(("DBGFR3BpSetMmio: returns %Rrc iBp=%d\n", rc, iBp));
1023 return rc;
1024}
1025
1026
1027/**
1028 * EMT worker for DBGFR3BpClear().
1029 *
1030 * @returns VBox status code.
1031 * @param pUVM The user mode VM handle.
1032 * @param iBp The id of the breakpoint which should be removed (cleared).
1033 * @thread EMT(0)
1034 * @internal
1035 */
1036static DECLCALLBACK(int) dbgfR3BpClear(PUVM pUVM, uint32_t iBp)
1037{
1038 /*
1039 * Validate input.
1040 */
1041 PVM pVM = pUVM->pVM;
1042 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1043 PDBGFBP pBp = dbgfR3BpGet(pVM, iBp);
1044 if (!pBp)
1045 return VERR_DBGF_BP_NOT_FOUND;
1046
1047 /*
1048 * Disarm the breakpoint if it's enabled.
1049 */
1050 if (pBp->fEnabled)
1051 {
1052 pBp->fEnabled = false;
1053 int rc;
1054 switch (pBp->enmType)
1055 {
1056 case DBGFBPTYPE_REG:
1057 rc = dbgfR3BpRegDisarm(pVM, pBp);
1058 break;
1059
1060 case DBGFBPTYPE_INT3:
1061 rc = dbgfR3BpInt3Disarm(pUVM, pBp);
1062 dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_INT3, &pVM->dbgf.s.Int3);
1063 break;
1064
1065 case DBGFBPTYPE_REM:
1066#ifdef VBOX_WITH_REM
1067 rc = REMR3BreakpointClear(pVM, pBp->u.Rem.GCPtr);
1068#else
1069 rc = IEMBreakpointClear(pVM, pBp->u.Rem.GCPtr);
1070#endif
1071 break;
1072
1073 case DBGFBPTYPE_PORT_IO:
1074 case DBGFBPTYPE_MMIO:
1075 rc = dbgfR3BpUpdateIom(pVM);
1076 break;
1077
1078 default:
1079 AssertMsgFailedReturn(("Invalid enmType=%d!\n", pBp->enmType), VERR_IPE_NOT_REACHED_DEFAULT_CASE);
1080 }
1081 AssertRCReturn(rc, rc);
1082 }
1083
1084 /*
1085 * Free the breakpoint.
1086 */
1087 dbgfR3BpFree(pVM, pBp);
1088 return VINF_SUCCESS;
1089}
1090
1091
1092/**
1093 * Clears a breakpoint.
1094 *
1095 * @returns VBox status code.
1096 * @param pUVM The user mode VM handle.
1097 * @param iBp The id of the breakpoint which should be removed (cleared).
1098 * @thread Any thread.
1099 */
1100VMMR3DECL(int) DBGFR3BpClear(PUVM pUVM, uint32_t iBp)
1101{
1102 /*
1103 * This must be done on EMT.
1104 */
1105 int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpClear, 2, pUVM, iBp);
1106 LogFlow(("DBGFR3BpClear: returns %Rrc\n", rc));
1107 return rc;
1108}
1109
1110
1111/**
1112 * EMT worker for DBGFR3BpEnable().
1113 *
1114 * @returns VBox status code.
1115 * @param pUVM The user mode VM handle.
1116 * @param iBp The id of the breakpoint which should be enabled.
1117 * @thread EMT(0)
1118 * @internal
1119 */
1120static DECLCALLBACK(int) dbgfR3BpEnable(PUVM pUVM, uint32_t iBp)
1121{
1122 /*
1123 * Validate input.
1124 */
1125 PVM pVM = pUVM->pVM;
1126 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1127 PDBGFBP pBp = dbgfR3BpGet(pVM, iBp);
1128 if (!pBp)
1129 return VERR_DBGF_BP_NOT_FOUND;
1130
1131 /*
1132 * Already enabled?
1133 */
1134 if (pBp->fEnabled)
1135 return VINF_DBGF_BP_ALREADY_ENABLED;
1136
1137 /*
1138 * Remove the breakpoint.
1139 */
1140 int rc;
1141 pBp->fEnabled = true;
1142 switch (pBp->enmType)
1143 {
1144 case DBGFBPTYPE_REG:
1145 rc = dbgfR3BpRegArm(pVM, pBp);
1146 break;
1147
1148 case DBGFBPTYPE_INT3:
1149 dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_INT3, &pVM->dbgf.s.Int3);
1150 rc = dbgfR3BpInt3Arm(pUVM, pBp);
1151 break;
1152
1153 case DBGFBPTYPE_REM:
1154#ifdef VBOX_WITH_REM
1155 rc = REMR3BreakpointSet(pVM, pBp->u.Rem.GCPtr);
1156#else
1157 rc = IEMBreakpointSet(pVM, pBp->u.Rem.GCPtr);
1158#endif
1159 break;
1160
1161 case DBGFBPTYPE_PORT_IO:
1162 case DBGFBPTYPE_MMIO:
1163 rc = dbgfR3BpUpdateIom(pVM);
1164 break;
1165
1166 default:
1167 AssertMsgFailedReturn(("Invalid enmType=%d!\n", pBp->enmType), VERR_IPE_NOT_REACHED_DEFAULT_CASE);
1168 }
1169 if (RT_FAILURE(rc))
1170 pBp->fEnabled = false;
1171
1172 return rc;
1173}
1174
1175
1176/**
1177 * Enables a breakpoint.
1178 *
1179 * @returns VBox status code.
1180 * @param pUVM The user mode VM handle.
1181 * @param iBp The id of the breakpoint which should be enabled.
1182 * @thread Any thread.
1183 */
1184VMMR3DECL(int) DBGFR3BpEnable(PUVM pUVM, uint32_t iBp)
1185{
1186 /*
1187 * This must be done on EMT.
1188 */
1189 int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpEnable, 2, pUVM, iBp);
1190 LogFlow(("DBGFR3BpEnable: returns %Rrc\n", rc));
1191 return rc;
1192}
1193
1194
1195/**
1196 * EMT worker for DBGFR3BpDisable().
1197 *
1198 * @returns VBox status code.
1199 * @param pUVM The user mode VM handle.
1200 * @param iBp The id of the breakpoint which should be disabled.
1201 * @thread EMT(0)
1202 * @internal
1203 */
1204static DECLCALLBACK(int) dbgfR3BpDisable(PUVM pUVM, uint32_t iBp)
1205{
1206 /*
1207 * Validate input.
1208 */
1209 PVM pVM = pUVM->pVM;
1210 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1211 PDBGFBP pBp = dbgfR3BpGet(pVM, iBp);
1212 if (!pBp)
1213 return VERR_DBGF_BP_NOT_FOUND;
1214
1215 /*
1216 * Already enabled?
1217 */
1218 if (!pBp->fEnabled)
1219 return VINF_DBGF_BP_ALREADY_DISABLED;
1220
1221 /*
1222 * Remove the breakpoint.
1223 */
1224 pBp->fEnabled = false;
1225 int rc;
1226 switch (pBp->enmType)
1227 {
1228 case DBGFBPTYPE_REG:
1229 rc = dbgfR3BpRegDisarm(pVM, pBp);
1230 break;
1231
1232 case DBGFBPTYPE_INT3:
1233 rc = dbgfR3BpInt3Disarm(pUVM, pBp);
1234 dbgfR3BpUpdateSearchOptimizations(pVM, DBGFBPTYPE_INT3, &pVM->dbgf.s.Int3);
1235 break;
1236
1237 case DBGFBPTYPE_REM:
1238#ifdef VBOX_WITH_REM
1239 rc = REMR3BreakpointClear(pVM, pBp->u.Rem.GCPtr);
1240#else
1241 rc = IEMBreakpointClear(pVM, pBp->u.Rem.GCPtr);
1242#endif
1243 break;
1244
1245 case DBGFBPTYPE_PORT_IO:
1246 case DBGFBPTYPE_MMIO:
1247 rc = dbgfR3BpUpdateIom(pVM);
1248 break;
1249
1250 default:
1251 AssertMsgFailedReturn(("Invalid enmType=%d!\n", pBp->enmType), VERR_IPE_NOT_REACHED_DEFAULT_CASE);
1252 }
1253
1254 return rc;
1255}
1256
1257
1258/**
1259 * Disables a breakpoint.
1260 *
1261 * @returns VBox status code.
1262 * @param pUVM The user mode VM handle.
1263 * @param iBp The id of the breakpoint which should be disabled.
1264 * @thread Any thread.
1265 */
1266VMMR3DECL(int) DBGFR3BpDisable(PUVM pUVM, uint32_t iBp)
1267{
1268 /*
1269 * This must be done on EMT.
1270 */
1271 int rc = VMR3ReqCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpDisable, 2, pUVM, iBp);
1272 LogFlow(("DBGFR3BpDisable: returns %Rrc\n", rc));
1273 return rc;
1274}
1275
1276
1277/**
1278 * EMT worker for DBGFR3BpEnum().
1279 *
1280 * @returns VBox status code.
1281 * @param pUVM The user mode VM handle.
1282 * @param pfnCallback The callback function.
1283 * @param pvUser The user argument to pass to the callback.
1284 * @thread EMT
1285 * @internal
1286 */
1287static DECLCALLBACK(int) dbgfR3BpEnum(PUVM pUVM, PFNDBGFBPENUM pfnCallback, void *pvUser)
1288{
1289 /*
1290 * Validate input.
1291 */
1292 PVM pVM = pUVM->pVM;
1293 VM_ASSERT_VALID_EXT_RETURN(pVM, VERR_INVALID_VM_HANDLE);
1294 AssertPtrReturn(pfnCallback, VERR_INVALID_POINTER);
1295
1296 /*
1297 * Enumerate the hardware breakpoints.
1298 */
1299 unsigned i;
1300 for (i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aHwBreakpoints); i++)
1301 if (pVM->dbgf.s.aHwBreakpoints[i].enmType != DBGFBPTYPE_FREE)
1302 {
1303 int rc = pfnCallback(pUVM, pvUser, &pVM->dbgf.s.aHwBreakpoints[i]);
1304 if (RT_FAILURE(rc) || rc == VINF_CALLBACK_RETURN)
1305 return rc;
1306 }
1307
1308 /*
1309 * Enumerate the other breakpoints.
1310 */
1311 for (i = 0; i < RT_ELEMENTS(pVM->dbgf.s.aBreakpoints); i++)
1312 if (pVM->dbgf.s.aBreakpoints[i].enmType != DBGFBPTYPE_FREE)
1313 {
1314 int rc = pfnCallback(pUVM, pvUser, &pVM->dbgf.s.aBreakpoints[i]);
1315 if (RT_FAILURE(rc) || rc == VINF_CALLBACK_RETURN)
1316 return rc;
1317 }
1318
1319 return VINF_SUCCESS;
1320}
1321
1322
1323/**
1324 * Enumerate the breakpoints.
1325 *
1326 * @returns VBox status code.
1327 * @param pUVM The user mode VM handle.
1328 * @param pfnCallback The callback function.
1329 * @param pvUser The user argument to pass to the callback.
1330 * @thread Any thread but the callback will be called from EMT.
1331 */
1332VMMR3DECL(int) DBGFR3BpEnum(PUVM pUVM, PFNDBGFBPENUM pfnCallback, void *pvUser)
1333{
1334 /*
1335 * This must be done on EMT.
1336 */
1337 int rc = VMR3ReqPriorityCallWaitU(pUVM, 0 /*idDstCpu*/, (PFNRT)dbgfR3BpEnum, 3, pUVM, pfnCallback, pvUser);
1338 LogFlow(("DBGFR3BpClear: returns %Rrc\n", rc));
1339 return rc;
1340}
1341
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