EMHM.cpp@ 72544

Last change on this file since 72544 was 72488, checked in by vboxsync, 7 years ago
NEM,CPUM,EM: Don't sync in/out the entire state when leaving the inner NEM loop, only what IEM/TRPM might need. Speeds up MMIO and I/O requiring return to ring-3. bugref:9044
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File size: 18.6 KB

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1	/* $Id: EMHM.cpp 72488 2018-06-09 12:24:35Z vboxsync $ */
2	/** @file
3	* EM - Execution Monitor / Manager - hardware virtualization
4	*/
5
6	/*
7	* Copyright (C) 2006-2017 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_EM
23	#define VMCPU_INCL_CPUM_GST_CTX
24	#include <VBox/vmm/em.h>
25	#include <VBox/vmm/vmm.h>
26	#include <VBox/vmm/csam.h>
27	#include <VBox/vmm/selm.h>
28	#include <VBox/vmm/trpm.h>
29	#include <VBox/vmm/iem.h>
30	#include <VBox/vmm/iom.h>
31	#include <VBox/vmm/dbgf.h>
32	#include <VBox/vmm/pgm.h>
33	#ifdef VBOX_WITH_REM
34	# include <VBox/vmm/rem.h>
35	#endif
36	#include <VBox/vmm/tm.h>
37	#include <VBox/vmm/mm.h>
38	#include <VBox/vmm/ssm.h>
39	#include <VBox/vmm/pdmapi.h>
40	#include <VBox/vmm/pdmcritsect.h>
41	#include <VBox/vmm/pdmqueue.h>
42	#include <VBox/vmm/hm.h>
43	#include "EMInternal.h"
44	#include <VBox/vmm/vm.h>
45	#include <VBox/vmm/gim.h>
46	#include <VBox/vmm/cpumdis.h>
47	#include <VBox/dis.h>
48	#include <VBox/disopcode.h>
49	#include <VBox/vmm/dbgf.h>
50	#include "VMMTracing.h"
51
52	#include <iprt/asm.h>
53
54
55	/*********************************************************************************************************************************
56	* Defined Constants And Macros *
57	*********************************************************************************************************************************/
58	#if 0 /* Disabled till after 2.1.0 when we've time to test it. */
59	#define EM_NOTIFY_HM
60	#endif
61
62
63	/*********************************************************************************************************************************
64	* Internal Functions *
65	*********************************************************************************************************************************/
66	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
67	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
68	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx);
69
70	#define EMHANDLERC_WITH_HM
71	#define emR3ExecuteInstruction emR3HmExecuteInstruction
72	#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
73	#include "EMHandleRCTmpl.h"
74
75
76	/**
77	* Executes instruction in HM mode if we can.
78	*
79	* This is somewhat comparable to REMR3EmulateInstruction.
80	*
81	* @returns VBox strict status code.
82	* @retval VINF_EM_DBG_STEPPED on success.
83	* @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
84	* HM right now.
85	*
86	* @param pVM The cross context VM structure.
87	* @param pVCpu The cross context virtual CPU structure for the calling EMT.
88	* @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
89	* @thread EMT.
90	*/
91	VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
92	{
93	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
94	Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
95
96	if (!HMR3CanExecuteGuest(pVM, pCtx))
97	return VINF_EM_RESCHEDULE;
98
99	uint64_t const uOldRip = pCtx->rip;
100	for (;;)
101	{
102	/*
103	* Service necessary FFs before going into HM.
104	*/
105	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
106	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
107	{
108	VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu, pCtx);
109	if (rcStrict != VINF_SUCCESS)
110	{
111	Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
112	return rcStrict;
113	}
114	}
115
116	/*
117	* Go execute it.
118	*/
119	bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
120	VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
121	HMSetSingleInstruction(pVM, pVCpu, fOld);
122	LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
123
124	/*
125	* Handle high priority FFs and informational status codes. We don't do
126	* normal FF processing the caller or the next call can deal with them.
127	*/
128	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
129	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
130	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
131	{
132	rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
133	LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
134	}
135
136	if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST \|\| rcStrict > VINF_EM_LAST))
137	{
138	rcStrict = emR3HmHandleRC(pVM, pVCpu, pCtx, VBOXSTRICTRC_TODO(rcStrict));
139	Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
140	}
141
142	/*
143	* Done?
144	*/
145	if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
146	\|\| !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
147	\|\| pCtx->rip != uOldRip)
148	{
149	if (rcStrict == VINF_SUCCESS && pCtx->rip != uOldRip)
150	rcStrict = VINF_EM_DBG_STEPPED;
151	Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pCtx->rip));
152	return rcStrict;
153	}
154	}
155	}
156
157
158	/**
159	* Executes one (or perhaps a few more) instruction(s).
160	*
161	* @returns VBox status code suitable for EM.
162	*
163	* @param pVM The cross context VM structure.
164	* @param pVCpu The cross context virtual CPU structure.
165	* @param rcRC Return code from RC.
166	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
167	* instruction and prefix the log output with this text.
168	*/
169	#if defined(LOG_ENABLED) \|\| defined(DOXYGEN_RUNNING)
170	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
171	#else
172	static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
173	#endif
174	{
175	#ifdef LOG_ENABLED
176	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
177	#endif
178	int rc;
179	NOREF(rcRC);
180
181	#ifdef LOG_ENABLED
182	/*
183	* Log it.
184	*/
185	Log(("EMINS: %04x:%RGv RSP=%RGv\n", pCtx->cs.Sel, (RTGCPTR)pCtx->rip, (RTGCPTR)pCtx->rsp));
186	if (pszPrefix)
187	{
188	DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
189	DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
190	}
191	#endif
192
193	/*
194	* Use IEM and fallback on REM if the functionality is missing.
195	* Once IEM gets mature enough, nothing should ever fall back.
196	*/
197	STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
198	rc = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
199	STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
200
201	if ( rc == VERR_IEM_ASPECT_NOT_IMPLEMENTED
202	\|\| rc == VERR_IEM_INSTR_NOT_IMPLEMENTED)
203	{
204	#ifdef VBOX_WITH_REM
205	STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
206	EMRemLock(pVM);
207	/* Flush the recompiler TLB if the VCPU has changed. */
208	if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
209	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
210	pVM->em.s.idLastRemCpu = pVCpu->idCpu;
211
212	rc = REMR3EmulateInstruction(pVM, pVCpu);
213	EMRemUnlock(pVM);
214	STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
215	#else /* !VBOX_WITH_REM */
216	NOREF(pVM);
217	#endif /* !VBOX_WITH_REM */
218	}
219
220	#ifdef EM_NOTIFY_HM
221	if (pVCpu->em.s.enmState == EMSTATE_DEBUG_GUEST_HM)
222	HMR3NotifyEmulated(pVCpu);
223	#endif
224	return rc;
225	}
226
227
228	/**
229	* Executes one (or perhaps a few more) instruction(s).
230	* This is just a wrapper for discarding pszPrefix in non-logging builds.
231	*
232	* @returns VBox status code suitable for EM.
233	* @param pVM The cross context VM structure.
234	* @param pVCpu The cross context virtual CPU structure.
235	* @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
236	* instruction and prefix the log output with this text.
237	* @param rcGC GC return code
238	*/
239	DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
240	{
241	#ifdef LOG_ENABLED
242	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
243	#else
244	RT_NOREF_PV(pszPrefix);
245	return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
246	#endif
247	}
248
249	/**
250	* Executes one (or perhaps a few more) IO instruction(s).
251	*
252	* @returns VBox status code suitable for EM.
253	* @param pVM The cross context VM structure.
254	* @param pVCpu The cross context virtual CPU structure.
255	*/
256	static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
257	{
258	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
259
260	STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
261
262	/*
263	* Try to restart the io instruction that was refused in ring-0.
264	*/
265	VBOXSTRICTRC rcStrict = HMR3RestartPendingIOInstr(pVM, pVCpu, pCtx);
266	if (IOM_SUCCESS(rcStrict))
267	{
268	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
269	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
270	return VBOXSTRICTRC_TODO(rcStrict); /* rip already updated. */
271	}
272	AssertMsgReturn(rcStrict == VERR_NOT_FOUND, ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
273	RT_SUCCESS_NP(rcStrict) ? VERR_IPE_UNEXPECTED_INFO_STATUS : VBOXSTRICTRC_TODO(rcStrict));
274
275	/*
276	* Hand it over to the interpreter.
277	*/
278	rcStrict = IEMExecOne(pVCpu);
279	LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
280	STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
281	STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
282	return VBOXSTRICTRC_TODO(rcStrict);
283	}
284
285
286	/**
287	* Process HM specific forced actions.
288	*
289	* This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
290	* or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
291	*
292	* @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
293	* EM statuses.
294	* @param pVM The cross context VM structure.
295	* @param pVCpu The cross context virtual CPU structure.
296	* @param pCtx Pointer to the guest CPU context.
297	*/
298	static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx)
299	{
300	/*
301	* Sync page directory.
302	*/
303	if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3 \| VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
304	{
305	Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
306	int rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
307	if (RT_FAILURE(rc))
308	return rc;
309
310	#ifdef VBOX_WITH_RAW_MODE
311	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
312	#endif
313
314	/* Prefetch pages for EIP and ESP. */
315	/** @todo This is rather expensive. Should investigate if it really helps at all. */
316	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(pCtx), pCtx->rip));
317	if (rc == VINF_SUCCESS)
318	rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(pCtx), pCtx->rsp));
319	if (rc != VINF_SUCCESS)
320	{
321	if (rc != VINF_PGM_SYNC_CR3)
322	{
323	AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
324	return rc;
325	}
326	rc = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
327	if (RT_FAILURE(rc))
328	return rc;
329	}
330	/** @todo maybe prefetch the supervisor stack page as well */
331	#ifdef VBOX_WITH_RAW_MODE
332	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
333	#endif
334	}
335
336	/*
337	* Allocate handy pages (just in case the above actions have consumed some pages).
338	*/
339	if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
340	{
341	int rc = PGMR3PhysAllocateHandyPages(pVM);
342	if (RT_FAILURE(rc))
343	return rc;
344	}
345
346	/*
347	* Check whether we're out of memory now.
348	*
349	* This may stem from some of the above actions or operations that has been executed
350	* since we ran FFs. The allocate handy pages must for instance always be followed by
351	* this check.
352	*/
353	if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY))
354	return VINF_EM_NO_MEMORY;
355
356	return VINF_SUCCESS;
357	}
358
359
360	/**
361	* Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
362	*
363	* This function contains the raw-mode version of the inner
364	* execution loop (the outer loop being in EMR3ExecuteVM()).
365	*
366	* @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
367	* VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
368	*
369	* @param pVM The cross context VM structure.
370	* @param pVCpu The cross context virtual CPU structure.
371	* @param pfFFDone Where to store an indicator telling whether or not
372	* FFs were done before returning.
373	*/
374	int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
375	{
376	int rc = VERR_IPE_UNINITIALIZED_STATUS;
377	PCPUMCTX pCtx = pVCpu->em.s.pCtx;
378
379	LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
380	*pfFFDone = false;
381
382	STAM_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
383
384	#ifdef EM_NOTIFY_HM
385	HMR3NotifyScheduled(pVCpu);
386	#endif
387
388	/*
389	* Spin till we get a forced action which returns anything but VINF_SUCCESS.
390	*/
391	for (;;)
392	{
393	STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
394
395	/* Check if a forced reschedule is pending. */
396	if (HMR3IsRescheduleRequired(pVM, pCtx))
397	{
398	rc = VINF_EM_RESCHEDULE;
399	break;
400	}
401
402	/*
403	* Process high priority pre-execution raw-mode FFs.
404	*/
405	#ifdef VBOX_WITH_RAW_MODE
406	Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS \| VMCPU_FF_SELM_SYNC_GDT \| VMCPU_FF_SELM_SYNC_LDT));
407	#endif
408	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
409	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
410	{
411	rc = emR3HmForcedActions(pVM, pVCpu, pCtx);
412	if (rc != VINF_SUCCESS)
413	break;
414	}
415
416	#ifdef LOG_ENABLED
417	/*
418	* Log important stuff before entering GC.
419	*/
420	if (TRPMHasTrap(pVCpu))
421	Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pCtx->cs.Sel, (RTGCPTR)pCtx->rip));
422
423	uint32_t cpl = CPUMGetGuestCPL(pVCpu);
424	if (pVM->cCpus == 1)
425	{
426	if (pCtx->eflags.Bits.u1VM)
427	Log(("HWV86: %08X IF=%d\n", pCtx->eip, pCtx->eflags.Bits.u1IF));
428	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
429	Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
430	else
431	Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
432	}
433	else
434	{
435	if (pCtx->eflags.Bits.u1VM)
436	Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pCtx->eip, pCtx->eflags.Bits.u1IF));
437	else if (CPUMIsGuestIn64BitCodeEx(pCtx))
438	Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->rsp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
439	else
440	Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pCtx->cs.Sel, pCtx->eip, pCtx->esp, pCtx->eflags.Bits.u1IF, pCtx->eflags.Bits.u2IOPL, (uint32_t)pCtx->cr0, (uint32_t)pCtx->cr4, (uint32_t)pCtx->msrEFER));
441	}
442	#endif /* LOG_ENABLED */
443
444	/*
445	* Execute the code.
446	*/
447	STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
448
449	if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
450	{
451	STAM_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
452	rc = VMMR3HmRunGC(pVM, pVCpu);
453	STAM_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
454	}
455	else
456	{
457	/* Give up this time slice; virtual time continues */
458	STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
459	RTThreadSleep(5);
460	STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
461	rc = VINF_SUCCESS;
462	}
463
464
465	/*
466	* Deal with high priority post execution FFs before doing anything else.
467	*/
468	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
469	if ( VM_FF_IS_PENDING(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
470	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
471	rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
472
473	/*
474	* Process the returned status code.
475	*/
476	if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
477	break;
478
479	rc = emR3HmHandleRC(pVM, pVCpu, pCtx, rc);
480	if (rc != VINF_SUCCESS)
481	break;
482
483	/*
484	* Check and execute forced actions.
485	*/
486	#ifdef VBOX_HIGH_RES_TIMERS_HACK
487	TMTimerPollVoid(pVM, pVCpu);
488	#endif
489	if ( VM_FF_IS_PENDING(pVM, VM_FF_ALL_MASK)
490	\|\| VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_ALL_MASK))
491	{
492	rc = emR3ForcedActions(pVM, pVCpu, rc);
493	VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
494	if ( rc != VINF_SUCCESS
495	&& rc != VINF_EM_RESCHEDULE_HM)
496	{
497	*pfFFDone = true;
498	break;
499	}
500	}
501	}
502
503	/*
504	* Return to outer loop.
505	*/
506	#if defined(LOG_ENABLED) && defined(DEBUG)
507	RTLogFlush(NULL);
508	#endif
509	return rc;
510	}
511

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source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 72544

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