VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/VMM.cpp@ 49966

Last change on this file since 49966 was 49893, checked in by vboxsync, 11 years ago

MSR rewrite: initial hacking - half disabled.
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1/* $Id: VMM.cpp 49893 2013-12-13 00:40:20Z vboxsync $ */
2/** @file
3 * VMM - The Virtual Machine Monitor Core.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18//#define NO_SUPCALLR0VMM
19
20/** @page pg_vmm VMM - The Virtual Machine Monitor
21 *
22 * The VMM component is two things at the moment, it's a component doing a few
23 * management and routing tasks, and it's the whole virtual machine monitor
24 * thing. For hysterical reasons, it is not doing all the management that one
25 * would expect, this is instead done by @ref pg_vm. We'll address this
26 * misdesign eventually.
27 *
28 * @see grp_vmm, grp_vm
29 *
30 *
31 * @section sec_vmmstate VMM State
32 *
33 * @image html VM_Statechart_Diagram.gif
34 *
35 * To be written.
36 *
37 *
38 * @subsection subsec_vmm_init VMM Initialization
39 *
40 * To be written.
41 *
42 *
43 * @subsection subsec_vmm_term VMM Termination
44 *
45 * To be written.
46 *
47 *
48 * @sections sec_vmm_limits VMM Limits
49 *
50 * There are various resource limits imposed by the VMM and it's
51 * sub-components. We'll list some of them here.
52 *
53 * On 64-bit hosts:
54 * - Max 8191 VMs. Imposed by GVMM's handle allocation (GVMM_MAX_HANDLES),
55 * can be increased up to 64K - 1.
56 * - Max 16TB - 64KB of the host memory can be used for backing VM RAM and
57 * ROM pages. The limit is imposed by the 32-bit page ID used by GMM.
58 * - A VM can be assigned all the memory we can use (16TB), however, the
59 * Main API will restrict this to 2TB (MM_RAM_MAX_IN_MB).
60 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
61 *
62 * On 32-bit hosts:
63 * - Max 127 VMs. Imposed by GMM's per page structure.
64 * - Max 64GB - 64KB of the host memory can be used for backing VM RAM and
65 * ROM pages. The limit is imposed by the 28-bit page ID used
66 * internally in GMM. It is also limited by PAE.
67 * - A VM can be assigned all the memory GMM can allocate, however, the
68 * Main API will restrict this to 3584MB (MM_RAM_MAX_IN_MB).
69 * - Max 32 virtual CPUs (VMM_MAX_CPU_COUNT).
70 *
71 */
72
73/*******************************************************************************
74* Header Files *
75*******************************************************************************/
76#define LOG_GROUP LOG_GROUP_VMM
77#include <VBox/vmm/vmm.h>
78#include <VBox/vmm/vmapi.h>
79#include <VBox/vmm/pgm.h>
80#include <VBox/vmm/cfgm.h>
81#include <VBox/vmm/pdmqueue.h>
82#include <VBox/vmm/pdmcritsect.h>
83#include <VBox/vmm/pdmcritsectrw.h>
84#include <VBox/vmm/pdmapi.h>
85#include <VBox/vmm/cpum.h>
86#include <VBox/vmm/mm.h>
87#include <VBox/vmm/iom.h>
88#include <VBox/vmm/trpm.h>
89#include <VBox/vmm/selm.h>
90#include <VBox/vmm/em.h>
91#include <VBox/sup.h>
92#include <VBox/vmm/dbgf.h>
93#include <VBox/vmm/csam.h>
94#include <VBox/vmm/patm.h>
95#ifdef VBOX_WITH_REM
96# include <VBox/vmm/rem.h>
97#endif
98#include <VBox/vmm/ssm.h>
99#include <VBox/vmm/ftm.h>
100#include <VBox/vmm/tm.h>
101#include "VMMInternal.h"
102#include "VMMSwitcher.h"
103#include <VBox/vmm/vm.h>
104#include <VBox/vmm/uvm.h>
105
106#include <VBox/err.h>
107#include <VBox/param.h>
108#include <VBox/version.h>
109#include <VBox/vmm/hm.h>
110#include <iprt/assert.h>
111#include <iprt/alloc.h>
112#include <iprt/asm.h>
113#include <iprt/time.h>
114#include <iprt/semaphore.h>
115#include <iprt/stream.h>
116#include <iprt/string.h>
117#include <iprt/stdarg.h>
118#include <iprt/ctype.h>
119#include <iprt/x86.h>
120
121
122
123/*******************************************************************************
124* Defined Constants And Macros *
125*******************************************************************************/
126/** The saved state version. */
127#define VMM_SAVED_STATE_VERSION 4
128/** The saved state version used by v3.0 and earlier. (Teleportation) */
129#define VMM_SAVED_STATE_VERSION_3_0 3
130
131
132/*******************************************************************************
133* Internal Functions *
134*******************************************************************************/
135static int vmmR3InitStacks(PVM pVM);
136static int vmmR3InitLoggers(PVM pVM);
137static void vmmR3InitRegisterStats(PVM pVM);
138static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM);
139static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
140static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser);
141static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu);
142static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
143
144
145/**
146 * Initializes the VMM.
147 *
148 * @returns VBox status code.
149 * @param pVM Pointer to the VM.
150 */
151VMMR3_INT_DECL(int) VMMR3Init(PVM pVM)
152{
153 LogFlow(("VMMR3Init\n"));
154
155 /*
156 * Assert alignment, sizes and order.
157 */
158 AssertMsg(pVM->vmm.s.offVM == 0, ("Already initialized!\n"));
159 AssertCompile(sizeof(pVM->vmm.s) <= sizeof(pVM->vmm.padding));
160 AssertCompile(sizeof(pVM->aCpus[0].vmm.s) <= sizeof(pVM->aCpus[0].vmm.padding));
161
162 /*
163 * Init basic VM VMM members.
164 */
165 pVM->vmm.s.offVM = RT_OFFSETOF(VM, vmm);
166 pVM->vmm.s.pahEvtRendezvousEnterOrdered = NULL;
167 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
168 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
169 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
170 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
171
172 /** @cfgm{YieldEMTInterval, uint32_t, 1, UINT32_MAX, 23, ms}
173 * The EMT yield interval. The EMT yielding is a hack we employ to play a
174 * bit nicer with the rest of the system (like for instance the GUI).
175 */
176 int rc = CFGMR3QueryU32Def(CFGMR3GetRoot(pVM), "YieldEMTInterval", &pVM->vmm.s.cYieldEveryMillies,
177 23 /* Value arrived at after experimenting with the grub boot prompt. */);
178 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"YieldEMTInterval\", rc=%Rrc\n", rc), rc);
179
180
181 /** @cfgm{VMM/UsePeriodicPreemptionTimers, boolean, true}
182 * Controls whether we employ per-cpu preemption timers to limit the time
183 * spent executing guest code. This option is not available on all
184 * platforms and we will silently ignore this setting then. If we are
185 * running in VT-x mode, we will use the VMX-preemption timer instead of
186 * this one when possible.
187 */
188 PCFGMNODE pCfgVMM = CFGMR3GetChild(CFGMR3GetRoot(pVM), "VMM");
189 rc = CFGMR3QueryBoolDef(pCfgVMM, "UsePeriodicPreemptionTimers", &pVM->vmm.s.fUsePeriodicPreemptionTimers, true);
190 AssertMsgRCReturn(rc, ("Configuration error. Failed to query \"VMM/UsePeriodicPreemptionTimers\", rc=%Rrc\n", rc), rc);
191
192 /*
193 * Initialize the VMM rendezvous semaphores.
194 */
195 pVM->vmm.s.pahEvtRendezvousEnterOrdered = (PRTSEMEVENT)MMR3HeapAlloc(pVM, MM_TAG_VMM, sizeof(RTSEMEVENT) * pVM->cCpus);
196 if (!pVM->vmm.s.pahEvtRendezvousEnterOrdered)
197 return VERR_NO_MEMORY;
198 for (VMCPUID i = 0; i < pVM->cCpus; i++)
199 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
200 for (VMCPUID i = 0; i < pVM->cCpus; i++)
201 {
202 rc = RTSemEventCreate(&pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
203 AssertRCReturn(rc, rc);
204 }
205 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousEnterOneByOne);
206 AssertRCReturn(rc, rc);
207 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
208 AssertRCReturn(rc, rc);
209 rc = RTSemEventMultiCreate(&pVM->vmm.s.hEvtMulRendezvousDone);
210 AssertRCReturn(rc, rc);
211 rc = RTSemEventCreate(&pVM->vmm.s.hEvtRendezvousDoneCaller);
212 AssertRCReturn(rc, rc);
213
214 /*
215 * Register the saved state data unit.
216 */
217 rc = SSMR3RegisterInternal(pVM, "vmm", 1, VMM_SAVED_STATE_VERSION, VMM_STACK_SIZE + sizeof(RTGCPTR),
218 NULL, NULL, NULL,
219 NULL, vmmR3Save, NULL,
220 NULL, vmmR3Load, NULL);
221 if (RT_FAILURE(rc))
222 return rc;
223
224 /*
225 * Register the Ring-0 VM handle with the session for fast ioctl calls.
226 */
227 rc = SUPR3SetVMForFastIOCtl(pVM->pVMR0);
228 if (RT_FAILURE(rc))
229 return rc;
230
231 /*
232 * Init various sub-components.
233 */
234 rc = vmmR3SwitcherInit(pVM);
235 if (RT_SUCCESS(rc))
236 {
237 rc = vmmR3InitStacks(pVM);
238 if (RT_SUCCESS(rc))
239 {
240 rc = vmmR3InitLoggers(pVM);
241
242#ifdef VBOX_WITH_NMI
243 /*
244 * Allocate mapping for the host APIC.
245 */
246 if (RT_SUCCESS(rc))
247 {
248 rc = MMR3HyperReserve(pVM, PAGE_SIZE, "Host APIC", &pVM->vmm.s.GCPtrApicBase);
249 AssertRC(rc);
250 }
251#endif
252 if (RT_SUCCESS(rc))
253 {
254 /*
255 * Debug info and statistics.
256 */
257 DBGFR3InfoRegisterInternal(pVM, "fflags", "Displays the current Forced actions Flags.", vmmR3InfoFF);
258 vmmR3InitRegisterStats(pVM);
259 vmmInitFormatTypes();
260
261 return VINF_SUCCESS;
262 }
263 }
264 /** @todo: Need failure cleanup. */
265
266 //more todo in here?
267 //if (RT_SUCCESS(rc))
268 //{
269 //}
270 //int rc2 = vmmR3TermCoreCode(pVM);
271 //AssertRC(rc2));
272 }
273
274 return rc;
275}
276
277
278/**
279 * Allocate & setup the VMM RC stack(s) (for EMTs).
280 *
281 * The stacks are also used for long jumps in Ring-0.
282 *
283 * @returns VBox status code.
284 * @param pVM Pointer to the VM.
285 *
286 * @remarks The optional guard page gets it protection setup up during R3 init
287 * completion because of init order issues.
288 */
289static int vmmR3InitStacks(PVM pVM)
290{
291 int rc = VINF_SUCCESS;
292#ifdef VMM_R0_SWITCH_STACK
293 uint32_t fFlags = MMHYPER_AONR_FLAGS_KERNEL_MAPPING;
294#else
295 uint32_t fFlags = 0;
296#endif
297
298 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
299 {
300 PVMCPU pVCpu = &pVM->aCpus[idCpu];
301
302#ifdef VBOX_STRICT_VMM_STACK
303 rc = MMR3HyperAllocOnceNoRelEx(pVM, PAGE_SIZE + VMM_STACK_SIZE + PAGE_SIZE,
304#else
305 rc = MMR3HyperAllocOnceNoRelEx(pVM, VMM_STACK_SIZE,
306#endif
307 PAGE_SIZE, MM_TAG_VMM, fFlags, (void **)&pVCpu->vmm.s.pbEMTStackR3);
308 if (RT_SUCCESS(rc))
309 {
310#ifdef VBOX_STRICT_VMM_STACK
311 pVCpu->vmm.s.pbEMTStackR3 += PAGE_SIZE;
312#endif
313#ifdef VBOX_WITH_2X_4GB_ADDR_SPACE
314 /* MMHyperR3ToR0 returns R3 when not doing hardware assisted virtualization. */
315 if (!HMIsEnabled(pVM))
316 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = NIL_RTR0PTR;
317 else
318#endif
319 pVCpu->vmm.s.CallRing3JmpBufR0.pvSavedStack = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
320 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
321 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
322 AssertRelease(pVCpu->vmm.s.pbEMTStackRC);
323
324 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC);
325 }
326 }
327
328 return rc;
329}
330
331
332/**
333 * Initialize the loggers.
334 *
335 * @returns VBox status code.
336 * @param pVM Pointer to the VM.
337 */
338static int vmmR3InitLoggers(PVM pVM)
339{
340 int rc;
341#define RTLogCalcSizeForR0(cGroups, fFlags) (RT_OFFSETOF(VMMR0LOGGER, Logger.afGroups[cGroups]) + PAGE_SIZE)
342
343 /*
344 * Allocate RC & R0 Logger instances (they are finalized in the relocator).
345 */
346#ifdef LOG_ENABLED
347 PRTLOGGER pLogger = RTLogDefaultInstance();
348 if (pLogger)
349 {
350 if (!HMIsEnabled(pVM))
351 {
352 pVM->vmm.s.cbRCLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pLogger->cGroups]);
353 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCLoggerR3);
354 if (RT_FAILURE(rc))
355 return rc;
356 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
357 }
358
359# ifdef VBOX_WITH_R0_LOGGING
360 size_t const cbLogger = RTLogCalcSizeForR0(pLogger->cGroups, 0);
361 for (VMCPUID i = 0; i < pVM->cCpus; i++)
362 {
363 PVMCPU pVCpu = &pVM->aCpus[i];
364 rc = MMR3HyperAllocOnceNoRelEx(pVM, cbLogger, PAGE_SIZE, MM_TAG_VMM, MMHYPER_AONR_FLAGS_KERNEL_MAPPING,
365 (void **)&pVCpu->vmm.s.pR0LoggerR3);
366 if (RT_FAILURE(rc))
367 return rc;
368 pVCpu->vmm.s.pR0LoggerR3->pVM = pVM->pVMR0;
369 //pVCpu->vmm.s.pR0LoggerR3->fCreated = false;
370 pVCpu->vmm.s.pR0LoggerR3->cbLogger = (uint32_t)cbLogger;
371 pVCpu->vmm.s.pR0LoggerR0 = MMHyperR3ToR0(pVM, pVCpu->vmm.s.pR0LoggerR3);
372 }
373# endif
374 }
375#endif /* LOG_ENABLED */
376
377#ifdef VBOX_WITH_RC_RELEASE_LOGGING
378 /*
379 * Allocate RC release logger instances (finalized in the relocator).
380 */
381 if (!HMIsEnabled(pVM))
382 {
383 PRTLOGGER pRelLogger = RTLogRelDefaultInstance();
384 if (pRelLogger)
385 {
386 pVM->vmm.s.cbRCRelLogger = RT_OFFSETOF(RTLOGGERRC, afGroups[pRelLogger->cGroups]);
387 rc = MMR3HyperAllocOnceNoRel(pVM, pVM->vmm.s.cbRCRelLogger, 0, MM_TAG_VMM, (void **)&pVM->vmm.s.pRCRelLoggerR3);
388 if (RT_FAILURE(rc))
389 return rc;
390 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
391 }
392 }
393#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
394 return VINF_SUCCESS;
395}
396
397
398/**
399 * VMMR3Init worker that register the statistics with STAM.
400 *
401 * @param pVM The shared VM structure.
402 */
403static void vmmR3InitRegisterStats(PVM pVM)
404{
405 /*
406 * Statistics.
407 */
408 STAM_REG(pVM, &pVM->vmm.s.StatRunRC, STAMTYPE_COUNTER, "/VMM/RunRC", STAMUNIT_OCCURENCES, "Number of context switches.");
409 STAM_REG(pVM, &pVM->vmm.s.StatRZRetNormal, STAMTYPE_COUNTER, "/VMM/RZRet/Normal", STAMUNIT_OCCURENCES, "Number of VINF_SUCCESS returns.");
410 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterrupt, STAMTYPE_COUNTER, "/VMM/RZRet/Interrupt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT returns.");
411 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptHyper, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptHyper", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_HYPER returns.");
412 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGuestTrap, STAMTYPE_COUNTER, "/VMM/RZRet/GuestTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_GUEST_TRAP returns.");
413 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitch, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitch", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH returns.");
414 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRingSwitchInt, STAMTYPE_COUNTER, "/VMM/RZRet/RingSwitchInt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_RING_SWITCH_INT returns.");
415 STAM_REG(pVM, &pVM->vmm.s.StatRZRetStaleSelector, STAMTYPE_COUNTER, "/VMM/RZRet/StaleSelector", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_STALE_SELECTOR returns.");
416 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIRETTrap, STAMTYPE_COUNTER, "/VMM/RZRet/IRETTrap", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_IRET_TRAP returns.");
417 STAM_REG(pVM, &pVM->vmm.s.StatRZRetEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/Emulate", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION returns.");
418 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOBlockEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/EmulateIOBlock", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_EMULATE_IO_BLOCK returns.");
419 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchEmulate, STAMTYPE_COUNTER, "/VMM/RZRet/PatchEmulate", STAMUNIT_OCCURENCES, "Number of VINF_PATCH_EMULATE_INSTR returns.");
420 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIORead, STAMTYPE_COUNTER, "/VMM/RZRet/IORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_READ returns.");
421 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/IOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_IOPORT_WRITE returns.");
422 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIORead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIORead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ returns.");
423 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_WRITE returns.");
424 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOReadWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOReadWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_R3_MMIO_READ_WRITE returns.");
425 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchRead, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchRead", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_READ returns.");
426 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMMIOPatchWrite, STAMTYPE_COUNTER, "/VMM/RZRet/MMIOPatchWrite", STAMUNIT_OCCURENCES, "Number of VINF_IOM_HC_MMIO_PATCH_WRITE returns.");
427 STAM_REG(pVM, &pVM->vmm.s.StatRZRetLDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/LDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_GDT_FAULT returns.");
428 STAM_REG(pVM, &pVM->vmm.s.StatRZRetGDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/GDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_LDT_FAULT returns.");
429 STAM_REG(pVM, &pVM->vmm.s.StatRZRetIDTFault, STAMTYPE_COUNTER, "/VMM/RZRet/IDTFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_IDT_FAULT returns.");
430 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTSSFault, STAMTYPE_COUNTER, "/VMM/RZRet/TSSFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_TSS_FAULT returns.");
431 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPDFault, STAMTYPE_COUNTER, "/VMM/RZRet/PDFault", STAMUNIT_OCCURENCES, "Number of VINF_EM_EXECUTE_INSTRUCTION_PD_FAULT returns.");
432 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCSAMTask, STAMTYPE_COUNTER, "/VMM/RZRet/CSAMTask", STAMUNIT_OCCURENCES, "Number of VINF_CSAM_PENDING_ACTION returns.");
433 STAM_REG(pVM, &pVM->vmm.s.StatRZRetSyncCR3, STAMTYPE_COUNTER, "/VMM/RZRet/SyncCR", STAMUNIT_OCCURENCES, "Number of VINF_PGM_SYNC_CR3 returns.");
434 STAM_REG(pVM, &pVM->vmm.s.StatRZRetMisc, STAMTYPE_COUNTER, "/VMM/RZRet/Misc", STAMUNIT_OCCURENCES, "Number of misc returns.");
435 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchInt3, STAMTYPE_COUNTER, "/VMM/RZRet/PatchInt3", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_INT3 returns.");
436 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchPF, STAMTYPE_COUNTER, "/VMM/RZRet/PatchPF", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_PF returns.");
437 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchGP, STAMTYPE_COUNTER, "/VMM/RZRet/PatchGP", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PATCH_TRAP_GP returns.");
438 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchIretIRQ, STAMTYPE_COUNTER, "/VMM/RZRet/PatchIret", STAMUNIT_OCCURENCES, "Number of VINF_PATM_PENDING_IRQ_AFTER_IRET returns.");
439 STAM_REG(pVM, &pVM->vmm.s.StatRZRetRescheduleREM, STAMTYPE_COUNTER, "/VMM/RZRet/ScheduleREM", STAMUNIT_OCCURENCES, "Number of VINF_EM_RESCHEDULE_REM returns.");
440 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
441 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Unknown, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Unknown", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
442 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3TMVirt, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/TMVirt", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
443 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3HandyPages, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Handy", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
444 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3PDMQueues, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/PDMQueue", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
445 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Rendezvous, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Rendezvous", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
446 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3Timer, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/Timer", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
447 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3DMA, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/DMA", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
448 STAM_REG(pVM, &pVM->vmm.s.StatRZRetToR3CritSect, STAMTYPE_COUNTER, "/VMM/RZRet/ToR3/CritSect", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TO_R3 returns.");
449 STAM_REG(pVM, &pVM->vmm.s.StatRZRetTimerPending, STAMTYPE_COUNTER, "/VMM/RZRet/TimerPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_TIMER_PENDING returns.");
450 STAM_REG(pVM, &pVM->vmm.s.StatRZRetInterruptPending, STAMTYPE_COUNTER, "/VMM/RZRet/InterruptPending", STAMUNIT_OCCURENCES, "Number of VINF_EM_RAW_INTERRUPT_PENDING returns.");
451 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPATMDuplicateFn, STAMTYPE_COUNTER, "/VMM/RZRet/PATMDuplicateFn", STAMUNIT_OCCURENCES, "Number of VINF_PATM_DUPLICATE_FUNCTION returns.");
452 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMChangeMode, STAMTYPE_COUNTER, "/VMM/RZRet/PGMChangeMode", STAMUNIT_OCCURENCES, "Number of VINF_PGM_CHANGE_MODE returns.");
453 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPGMFlushPending, STAMTYPE_COUNTER, "/VMM/RZRet/PGMFlushPending", STAMUNIT_OCCURENCES, "Number of VINF_PGM_POOL_FLUSH_PENDING returns.");
454 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPendingRequest, STAMTYPE_COUNTER, "/VMM/RZRet/PendingRequest", STAMUNIT_OCCURENCES, "Number of VINF_EM_PENDING_REQUEST returns.");
455 STAM_REG(pVM, &pVM->vmm.s.StatRZRetPatchTPR, STAMTYPE_COUNTER, "/VMM/RZRet/PatchTPR", STAMUNIT_OCCURENCES, "Number of VINF_EM_HM_PATCH_TPR_INSTR returns.");
456 STAM_REG(pVM, &pVM->vmm.s.StatRZRetCallRing3, STAMTYPE_COUNTER, "/VMM/RZCallR3/Misc", STAMUNIT_OCCURENCES, "Number of Other ring-3 calls.");
457 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_LOCK calls.");
458 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPDMCritSectEnter, STAMTYPE_COUNTER, "/VMM/RZCallR3/PDMCritSectEnter", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PDM_CRITSECT_ENTER calls.");
459 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMLock, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMLock", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_LOCK calls.");
460 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMPoolGrow, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMPoolGrow", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_POOL_GROW calls.");
461 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMMapChunk, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMMapChunk", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_MAP_CHUNK calls.");
462 STAM_REG(pVM, &pVM->vmm.s.StatRZCallPGMAllocHandy, STAMTYPE_COUNTER, "/VMM/RZCallR3/PGMAllocHandy", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES calls.");
463 STAM_REG(pVM, &pVM->vmm.s.StatRZCallRemReplay, STAMTYPE_COUNTER, "/VMM/RZCallR3/REMReplay", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS calls.");
464 STAM_REG(pVM, &pVM->vmm.s.StatRZCallLogFlush, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMMLogFlush", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VMM_LOGGER_FLUSH calls.");
465 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMSetError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_ERROR calls.");
466 STAM_REG(pVM, &pVM->vmm.s.StatRZCallVMSetRuntimeError, STAMTYPE_COUNTER, "/VMM/RZCallR3/VMRuntimeError", STAMUNIT_OCCURENCES, "Number of VMMCALLRING3_VM_SET_RUNTIME_ERROR calls.");
467
468#ifdef VBOX_WITH_STATISTICS
469 for (VMCPUID i = 0; i < pVM->cCpus; i++)
470 {
471 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedMax, STAMTYPE_U32_RESET, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Max amount of stack used.", "/VMM/Stack/CPU%u/Max", i);
472 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cbUsedAvg, STAMTYPE_U32, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES, "Average stack usage.", "/VMM/Stack/CPU%u/Avg", i);
473 STAMR3RegisterF(pVM, &pVM->aCpus[i].vmm.s.CallRing3JmpBufR0.cUsedTotal, STAMTYPE_U64, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, "Number of stack usages.", "/VMM/Stack/CPU%u/Uses", i);
474 }
475#endif
476}
477
478
479/**
480 * Initializes the R0 VMM.
481 *
482 * @returns VBox status code.
483 * @param pVM Pointer to the VM.
484 */
485VMMR3_INT_DECL(int) VMMR3InitR0(PVM pVM)
486{
487 int rc;
488 PVMCPU pVCpu = VMMGetCpu(pVM);
489 Assert(pVCpu && pVCpu->idCpu == 0);
490
491#ifdef LOG_ENABLED
492 /*
493 * Initialize the ring-0 logger if we haven't done so yet.
494 */
495 if ( pVCpu->vmm.s.pR0LoggerR3
496 && !pVCpu->vmm.s.pR0LoggerR3->fCreated)
497 {
498 rc = VMMR3UpdateLoggers(pVM);
499 if (RT_FAILURE(rc))
500 return rc;
501 }
502#endif
503
504 /*
505 * Call Ring-0 entry with init code.
506 */
507 for (;;)
508 {
509#ifdef NO_SUPCALLR0VMM
510 //rc = VERR_GENERAL_FAILURE;
511 rc = VINF_SUCCESS;
512#else
513 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_INIT,
514 RT_MAKE_U64(VMMGetSvnRev(), vmmGetBuildType()), NULL);
515#endif
516 /*
517 * Flush the logs.
518 */
519#ifdef LOG_ENABLED
520 if ( pVCpu->vmm.s.pR0LoggerR3
521 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
522 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
523#endif
524 if (rc != VINF_VMM_CALL_HOST)
525 break;
526 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
527 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
528 break;
529 /* Resume R0 */
530 }
531
532 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
533 {
534 LogRel(("R0 init failed, rc=%Rra\n", rc));
535 if (RT_SUCCESS(rc))
536 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
537 }
538
539 /* Log whether thread-context hooks are used (on Linux this can depend on how the kernel is configured). */
540 if (pVM->aCpus[0].vmm.s.hR0ThreadCtx != NIL_RTTHREADCTX)
541 LogRel(("VMM: Thread-context hooks enabled!\n"));
542 else
543 LogRel(("VMM: Thread-context hooks unavailable.\n"));
544
545 return rc;
546}
547
548
549#ifdef VBOX_WITH_RAW_MODE
550/**
551 * Initializes the RC VMM.
552 *
553 * @returns VBox status code.
554 * @param pVM Pointer to the VM.
555 */
556VMMR3_INT_DECL(int) VMMR3InitRC(PVM pVM)
557{
558 PVMCPU pVCpu = VMMGetCpu(pVM);
559 Assert(pVCpu && pVCpu->idCpu == 0);
560
561 /* In VMX mode, there's no need to init RC. */
562 if (HMIsEnabled(pVM))
563 return VINF_SUCCESS;
564
565 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
566
567 /*
568 * Call VMMGCInit():
569 * -# resolve the address.
570 * -# setup stackframe and EIP to use the trampoline.
571 * -# do a generic hypervisor call.
572 */
573 RTRCPTR RCPtrEP;
574 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "VMMGCEntry", &RCPtrEP);
575 if (RT_SUCCESS(rc))
576 {
577 CPUMSetHyperESP(pVCpu, pVCpu->vmm.s.pbEMTStackBottomRC); /* Clear the stack. */
578 uint64_t u64TS = RTTimeProgramStartNanoTS();
579 CPUMPushHyper(pVCpu, (uint32_t)(u64TS >> 32)); /* Param 4: The program startup TS - Hi. */
580 CPUMPushHyper(pVCpu, (uint32_t)u64TS); /* Param 4: The program startup TS - Lo. */
581 CPUMPushHyper(pVCpu, vmmGetBuildType()); /* Param 3: Version argument. */
582 CPUMPushHyper(pVCpu, VMMGetSvnRev()); /* Param 2: Version argument. */
583 CPUMPushHyper(pVCpu, VMMGC_DO_VMMGC_INIT); /* Param 1: Operation. */
584 CPUMPushHyper(pVCpu, pVM->pVMRC); /* Param 0: pVM */
585 CPUMPushHyper(pVCpu, 6 * sizeof(RTRCPTR)); /* trampoline param: stacksize. */
586 CPUMPushHyper(pVCpu, RCPtrEP); /* Call EIP. */
587 CPUMSetHyperEIP(pVCpu, pVM->vmm.s.pfnCallTrampolineRC);
588 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
589
590 for (;;)
591 {
592#ifdef NO_SUPCALLR0VMM
593 //rc = VERR_GENERAL_FAILURE;
594 rc = VINF_SUCCESS;
595#else
596 rc = SUPR3CallVMMR0(pVM->pVMR0, 0 /* VCPU 0 */, VMMR0_DO_CALL_HYPERVISOR, NULL);
597#endif
598#ifdef LOG_ENABLED
599 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
600 if ( pLogger
601 && pLogger->offScratch > 0)
602 RTLogFlushRC(NULL, pLogger);
603#endif
604#ifdef VBOX_WITH_RC_RELEASE_LOGGING
605 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
606 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
607 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
608#endif
609 if (rc != VINF_VMM_CALL_HOST)
610 break;
611 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
612 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
613 break;
614 }
615
616 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
617 {
618 VMMR3FatalDump(pVM, pVCpu, rc);
619 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
620 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
621 }
622 AssertRC(rc);
623 }
624 return rc;
625}
626#endif /* VBOX_WITH_RAW_MODE */
627
628
629/**
630 * Called when an init phase completes.
631 *
632 * @returns VBox status code.
633 * @param pVM Pointer to the VM.
634 * @param enmWhat Which init phase.
635 */
636VMMR3_INT_DECL(int) VMMR3InitCompleted(PVM pVM, VMINITCOMPLETED enmWhat)
637{
638 int rc = VINF_SUCCESS;
639
640 switch (enmWhat)
641 {
642 case VMINITCOMPLETED_RING3:
643 {
644 /*
645 * CPUM's post-initialization (APIC base MSR caching).
646 */
647 rc = CPUMR3InitCompleted(pVM);
648 AssertRCReturn(rc, rc);
649
650 /*
651 * Set page attributes to r/w for stack pages.
652 */
653 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
654 {
655 rc = PGMMapSetPage(pVM, pVM->aCpus[idCpu].vmm.s.pbEMTStackRC, VMM_STACK_SIZE,
656 X86_PTE_P | X86_PTE_A | X86_PTE_D | X86_PTE_RW);
657 AssertRCReturn(rc, rc);
658 }
659
660 /*
661 * Create the EMT yield timer.
662 */
663 rc = TMR3TimerCreateInternal(pVM, TMCLOCK_REAL, vmmR3YieldEMT, NULL, "EMT Yielder", &pVM->vmm.s.pYieldTimer);
664 AssertRCReturn(rc, rc);
665
666 rc = TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldEveryMillies);
667 AssertRCReturn(rc, rc);
668
669#ifdef VBOX_WITH_NMI
670 /*
671 * Map the host APIC into GC - This is AMD/Intel + Host OS specific!
672 */
673 rc = PGMMap(pVM, pVM->vmm.s.GCPtrApicBase, 0xfee00000, PAGE_SIZE,
674 X86_PTE_P | X86_PTE_RW | X86_PTE_PWT | X86_PTE_PCD | X86_PTE_A | X86_PTE_D);
675 AssertRCReturn(rc, rc);
676#endif
677
678#ifdef VBOX_STRICT_VMM_STACK
679 /*
680 * Setup the stack guard pages: Two inaccessible pages at each sides of the
681 * stack to catch over/under-flows.
682 */
683 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
684 {
685 uint8_t *pbEMTStackR3 = pVM->aCpus[idCpu].vmm.s.pbEMTStackR3;
686
687 memset(pbEMTStackR3 - PAGE_SIZE, 0xcc, PAGE_SIZE);
688 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, true /*fSet*/);
689
690 memset(pbEMTStackR3 + VMM_STACK_SIZE, 0xcc, PAGE_SIZE);
691 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, true /*fSet*/);
692 }
693 pVM->vmm.s.fStackGuardsStationed = true;
694#endif
695 break;
696 }
697
698 case VMINITCOMPLETED_HM:
699 {
700 /*
701 * Disable the periodic preemption timers if we can use the
702 * VMX-preemption timer instead.
703 */
704 if ( pVM->vmm.s.fUsePeriodicPreemptionTimers
705 && HMR3IsVmxPreemptionTimerUsed(pVM))
706 pVM->vmm.s.fUsePeriodicPreemptionTimers = false;
707 LogRel(("VMM: fUsePeriodicPreemptionTimers=%RTbool\n", pVM->vmm.s.fUsePeriodicPreemptionTimers));
708
709 /*
710 * CPUM's post-initialization (print CPUIDs).
711 */
712 CPUMR3LogCpuIds(pVM);
713 break;
714 }
715
716 default: /* shuts up gcc */
717 break;
718 }
719
720 return rc;
721}
722
723
724/**
725 * Terminate the VMM bits.
726 *
727 * @returns VINF_SUCCESS.
728 * @param pVM Pointer to the VM.
729 */
730VMMR3_INT_DECL(int) VMMR3Term(PVM pVM)
731{
732 PVMCPU pVCpu = VMMGetCpu(pVM);
733 Assert(pVCpu && pVCpu->idCpu == 0);
734
735 /*
736 * Call Ring-0 entry with termination code.
737 */
738 int rc;
739 for (;;)
740 {
741#ifdef NO_SUPCALLR0VMM
742 //rc = VERR_GENERAL_FAILURE;
743 rc = VINF_SUCCESS;
744#else
745 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, 0 /*idCpu*/, VMMR0_DO_VMMR0_TERM, 0, NULL);
746#endif
747 /*
748 * Flush the logs.
749 */
750#ifdef LOG_ENABLED
751 if ( pVCpu->vmm.s.pR0LoggerR3
752 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
753 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
754#endif
755 if (rc != VINF_VMM_CALL_HOST)
756 break;
757 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
758 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
759 break;
760 /* Resume R0 */
761 }
762 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
763 {
764 LogRel(("VMMR3Term: R0 term failed, rc=%Rra. (warning)\n", rc));
765 if (RT_SUCCESS(rc))
766 rc = VERR_IPE_UNEXPECTED_INFO_STATUS;
767 }
768
769 for (VMCPUID i = 0; i < pVM->cCpus; i++)
770 {
771 RTSemEventDestroy(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i]);
772 pVM->vmm.s.pahEvtRendezvousEnterOrdered[i] = NIL_RTSEMEVENT;
773 }
774 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
775 pVM->vmm.s.hEvtRendezvousEnterOneByOne = NIL_RTSEMEVENT;
776 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
777 pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce = NIL_RTSEMEVENTMULTI;
778 RTSemEventMultiDestroy(pVM->vmm.s.hEvtMulRendezvousDone);
779 pVM->vmm.s.hEvtMulRendezvousDone = NIL_RTSEMEVENTMULTI;
780 RTSemEventDestroy(pVM->vmm.s.hEvtRendezvousDoneCaller);
781 pVM->vmm.s.hEvtRendezvousDoneCaller = NIL_RTSEMEVENT;
782
783#ifdef VBOX_STRICT_VMM_STACK
784 /*
785 * Make the two stack guard pages present again.
786 */
787 if (pVM->vmm.s.fStackGuardsStationed)
788 {
789 for (VMCPUID i = 0; i < pVM->cCpus; i++)
790 {
791 uint8_t *pbEMTStackR3 = pVM->aCpus[i].vmm.s.pbEMTStackR3;
792 MMR3HyperSetGuard(pVM, pbEMTStackR3 - PAGE_SIZE, PAGE_SIZE, false /*fSet*/);
793 MMR3HyperSetGuard(pVM, pbEMTStackR3 + VMM_STACK_SIZE, PAGE_SIZE, false /*fSet*/);
794 }
795 pVM->vmm.s.fStackGuardsStationed = false;
796 }
797#endif
798
799 vmmTermFormatTypes();
800 return rc;
801}
802
803
804/**
805 * Applies relocations to data and code managed by this
806 * component. This function will be called at init and
807 * whenever the VMM need to relocate it self inside the GC.
808 *
809 * The VMM will need to apply relocations to the core code.
810 *
811 * @param pVM Pointer to the VM.
812 * @param offDelta The relocation delta.
813 */
814VMMR3_INT_DECL(void) VMMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
815{
816 LogFlow(("VMMR3Relocate: offDelta=%RGv\n", offDelta));
817
818 /*
819 * Recalc the RC address.
820 */
821#ifdef VBOX_WITH_RAW_MODE
822 pVM->vmm.s.pvCoreCodeRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pvCoreCodeR3);
823#endif
824
825 /*
826 * The stack.
827 */
828 for (VMCPUID i = 0; i < pVM->cCpus; i++)
829 {
830 PVMCPU pVCpu = &pVM->aCpus[i];
831
832 CPUMSetHyperESP(pVCpu, CPUMGetHyperESP(pVCpu) + offDelta);
833
834 pVCpu->vmm.s.pbEMTStackRC = MMHyperR3ToRC(pVM, pVCpu->vmm.s.pbEMTStackR3);
835 pVCpu->vmm.s.pbEMTStackBottomRC = pVCpu->vmm.s.pbEMTStackRC + VMM_STACK_SIZE;
836 }
837
838 /*
839 * All the switchers.
840 */
841 vmmR3SwitcherRelocate(pVM, offDelta);
842
843 /*
844 * Get other RC entry points.
845 */
846 if (!HMIsEnabled(pVM))
847 {
848 int rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuest", &pVM->vmm.s.pfnCPUMRCResumeGuest);
849 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuest not found! rc=%Rra\n", rc));
850
851 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "CPUMGCResumeGuestV86", &pVM->vmm.s.pfnCPUMRCResumeGuestV86);
852 AssertReleaseMsgRC(rc, ("CPUMGCResumeGuestV86 not found! rc=%Rra\n", rc));
853 }
854
855 /*
856 * Update the logger.
857 */
858 VMMR3UpdateLoggers(pVM);
859}
860
861
862/**
863 * Updates the settings for the RC and R0 loggers.
864 *
865 * @returns VBox status code.
866 * @param pVM Pointer to the VM.
867 */
868VMMR3_INT_DECL(int) VMMR3UpdateLoggers(PVM pVM)
869{
870 /*
871 * Simply clone the logger instance (for RC).
872 */
873 int rc = VINF_SUCCESS;
874 RTRCPTR RCPtrLoggerFlush = 0;
875
876 if ( pVM->vmm.s.pRCLoggerR3
877#ifdef VBOX_WITH_RC_RELEASE_LOGGING
878 || pVM->vmm.s.pRCRelLoggerR3
879#endif
880 )
881 {
882 Assert(!HMIsEnabled(pVM));
883 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerFlush", &RCPtrLoggerFlush);
884 AssertReleaseMsgRC(rc, ("vmmGCLoggerFlush not found! rc=%Rra\n", rc));
885 }
886
887 if (pVM->vmm.s.pRCLoggerR3)
888 {
889 Assert(!HMIsEnabled(pVM));
890 RTRCPTR RCPtrLoggerWrapper = 0;
891 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCLoggerWrapper", &RCPtrLoggerWrapper);
892 AssertReleaseMsgRC(rc, ("vmmGCLoggerWrapper not found! rc=%Rra\n", rc));
893
894 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
895 rc = RTLogCloneRC(NULL /* default */, pVM->vmm.s.pRCLoggerR3, pVM->vmm.s.cbRCLogger,
896 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
897 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
898 }
899
900#ifdef VBOX_WITH_RC_RELEASE_LOGGING
901 if (pVM->vmm.s.pRCRelLoggerR3)
902 {
903 Assert(!HMIsEnabled(pVM));
904 RTRCPTR RCPtrLoggerWrapper = 0;
905 rc = PDMR3LdrGetSymbolRC(pVM, VMMGC_MAIN_MODULE_NAME, "vmmGCRelLoggerWrapper", &RCPtrLoggerWrapper);
906 AssertReleaseMsgRC(rc, ("vmmGCRelLoggerWrapper not found! rc=%Rra\n", rc));
907
908 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
909 rc = RTLogCloneRC(RTLogRelDefaultInstance(), pVM->vmm.s.pRCRelLoggerR3, pVM->vmm.s.cbRCRelLogger,
910 RCPtrLoggerWrapper, RCPtrLoggerFlush, RTLOGFLAGS_BUFFERED);
911 AssertReleaseMsgRC(rc, ("RTLogCloneRC failed! rc=%Rra\n", rc));
912 }
913#endif /* VBOX_WITH_RC_RELEASE_LOGGING */
914
915#ifdef LOG_ENABLED
916 /*
917 * For the ring-0 EMT logger, we use a per-thread logger instance
918 * in ring-0. Only initialize it once.
919 */
920 PRTLOGGER const pDefault = RTLogDefaultInstance();
921 for (VMCPUID i = 0; i < pVM->cCpus; i++)
922 {
923 PVMCPU pVCpu = &pVM->aCpus[i];
924 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
925 if (pR0LoggerR3)
926 {
927 if (!pR0LoggerR3->fCreated)
928 {
929 RTR0PTR pfnLoggerWrapper = NIL_RTR0PTR;
930 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerWrapper", &pfnLoggerWrapper);
931 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerWrapper not found! rc=%Rra\n", rc), rc);
932
933 RTR0PTR pfnLoggerFlush = NIL_RTR0PTR;
934 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerFlush", &pfnLoggerFlush);
935 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerFlush not found! rc=%Rra\n", rc), rc);
936
937 rc = RTLogCreateForR0(&pR0LoggerR3->Logger, pR0LoggerR3->cbLogger,
938 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
939 pfnLoggerWrapper, pfnLoggerFlush,
940 RTLOGFLAGS_BUFFERED, RTLOGDEST_DUMMY);
941 AssertReleaseMsgRCReturn(rc, ("RTLogCreateForR0 failed! rc=%Rra\n", rc), rc);
942
943 RTR0PTR pfnLoggerPrefix = NIL_RTR0PTR;
944 rc = PDMR3LdrGetSymbolR0(pVM, VMMR0_MAIN_MODULE_NAME, "vmmR0LoggerPrefix", &pfnLoggerPrefix);
945 AssertReleaseMsgRCReturn(rc, ("vmmR0LoggerPrefix not found! rc=%Rra\n", rc), rc);
946 rc = RTLogSetCustomPrefixCallbackForR0(&pR0LoggerR3->Logger,
947 pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
948 pfnLoggerPrefix, NIL_RTR0PTR);
949 AssertReleaseMsgRCReturn(rc, ("RTLogSetCustomPrefixCallback failed! rc=%Rra\n", rc), rc);
950
951 pR0LoggerR3->idCpu = i;
952 pR0LoggerR3->fCreated = true;
953 pR0LoggerR3->fFlushingDisabled = false;
954
955 }
956
957 rc = RTLogCopyGroupsAndFlagsForR0(&pR0LoggerR3->Logger, pVCpu->vmm.s.pR0LoggerR0 + RT_OFFSETOF(VMMR0LOGGER, Logger),
958 pDefault, RTLOGFLAGS_BUFFERED, UINT32_MAX);
959 AssertRC(rc);
960 }
961 }
962#endif
963 return rc;
964}
965
966
967/**
968 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg1Weak output.
969 *
970 * @returns Pointer to the buffer.
971 * @param pVM Pointer to the VM.
972 */
973VMMR3DECL(const char *) VMMR3GetRZAssertMsg1(PVM pVM)
974{
975 if (HMIsEnabled(pVM))
976 return pVM->vmm.s.szRing0AssertMsg1;
977
978 RTRCPTR RCPtr;
979 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg1", &RCPtr);
980 if (RT_SUCCESS(rc))
981 return (const char *)MMHyperRCToR3(pVM, RCPtr);
982
983 return NULL;
984}
985
986
987/**
988 * Returns the VMCPU of the specified virtual CPU.
989 *
990 * @returns The VMCPU pointer. NULL if @a idCpu or @a pUVM is invalid.
991 *
992 * @param pUVM The user mode VM handle.
993 * @param idCpu The ID of the virtual CPU.
994 */
995VMMR3DECL(PVMCPU) VMMR3GetCpuByIdU(PUVM pUVM, RTCPUID idCpu)
996{
997 UVM_ASSERT_VALID_EXT_RETURN(pUVM, NULL);
998 AssertReturn(idCpu < pUVM->cCpus, NULL);
999 VM_ASSERT_VALID_EXT_RETURN(pUVM->pVM, NULL);
1000 return &pUVM->pVM->aCpus[idCpu];
1001}
1002
1003
1004/**
1005 * Gets the pointer to a buffer containing the R0/RC RTAssertMsg2Weak output.
1006 *
1007 * @returns Pointer to the buffer.
1008 * @param pVM Pointer to the VM.
1009 */
1010VMMR3DECL(const char *) VMMR3GetRZAssertMsg2(PVM pVM)
1011{
1012 if (HMIsEnabled(pVM))
1013 return pVM->vmm.s.szRing0AssertMsg2;
1014
1015 RTRCPTR RCPtr;
1016 int rc = PDMR3LdrGetSymbolRC(pVM, NULL, "g_szRTAssertMsg2", &RCPtr);
1017 if (RT_SUCCESS(rc))
1018 return (const char *)MMHyperRCToR3(pVM, RCPtr);
1019
1020 return NULL;
1021}
1022
1023
1024/**
1025 * Execute state save operation.
1026 *
1027 * @returns VBox status code.
1028 * @param pVM Pointer to the VM.
1029 * @param pSSM SSM operation handle.
1030 */
1031static DECLCALLBACK(int) vmmR3Save(PVM pVM, PSSMHANDLE pSSM)
1032{
1033 LogFlow(("vmmR3Save:\n"));
1034
1035 /*
1036 * Save the started/stopped state of all CPUs except 0 as it will always
1037 * be running. This avoids breaking the saved state version. :-)
1038 */
1039 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1040 SSMR3PutBool(pSSM, VMCPUSTATE_IS_STARTED(VMCPU_GET_STATE(&pVM->aCpus[i])));
1041
1042 return SSMR3PutU32(pSSM, UINT32_MAX); /* terminator */
1043}
1044
1045
1046/**
1047 * Execute state load operation.
1048 *
1049 * @returns VBox status code.
1050 * @param pVM Pointer to the VM.
1051 * @param pSSM SSM operation handle.
1052 * @param uVersion Data layout version.
1053 * @param uPass The data pass.
1054 */
1055static DECLCALLBACK(int) vmmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
1056{
1057 LogFlow(("vmmR3Load:\n"));
1058 Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
1059
1060 /*
1061 * Validate version.
1062 */
1063 if ( uVersion != VMM_SAVED_STATE_VERSION
1064 && uVersion != VMM_SAVED_STATE_VERSION_3_0)
1065 {
1066 AssertMsgFailed(("vmmR3Load: Invalid version uVersion=%u!\n", uVersion));
1067 return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
1068 }
1069
1070 if (uVersion <= VMM_SAVED_STATE_VERSION_3_0)
1071 {
1072 /* Ignore the stack bottom, stack pointer and stack bits. */
1073 RTRCPTR RCPtrIgnored;
1074 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1075 SSMR3GetRCPtr(pSSM, &RCPtrIgnored);
1076#ifdef RT_OS_DARWIN
1077 if ( SSMR3HandleVersion(pSSM) >= VBOX_FULL_VERSION_MAKE(3,0,0)
1078 && SSMR3HandleVersion(pSSM) < VBOX_FULL_VERSION_MAKE(3,1,0)
1079 && SSMR3HandleRevision(pSSM) >= 48858
1080 && ( !strcmp(SSMR3HandleHostOSAndArch(pSSM), "darwin.x86")
1081 || !strcmp(SSMR3HandleHostOSAndArch(pSSM), "") )
1082 )
1083 SSMR3Skip(pSSM, 16384);
1084 else
1085 SSMR3Skip(pSSM, 8192);
1086#else
1087 SSMR3Skip(pSSM, 8192);
1088#endif
1089 }
1090
1091 /*
1092 * Restore the VMCPU states. VCPU 0 is always started.
1093 */
1094 VMCPU_SET_STATE(&pVM->aCpus[0], VMCPUSTATE_STARTED);
1095 for (VMCPUID i = 1; i < pVM->cCpus; i++)
1096 {
1097 bool fStarted;
1098 int rc = SSMR3GetBool(pSSM, &fStarted);
1099 if (RT_FAILURE(rc))
1100 return rc;
1101 VMCPU_SET_STATE(&pVM->aCpus[i], fStarted ? VMCPUSTATE_STARTED : VMCPUSTATE_STOPPED);
1102 }
1103
1104 /* terminator */
1105 uint32_t u32;
1106 int rc = SSMR3GetU32(pSSM, &u32);
1107 if (RT_FAILURE(rc))
1108 return rc;
1109 if (u32 != UINT32_MAX)
1110 {
1111 AssertMsgFailed(("u32=%#x\n", u32));
1112 return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
1113 }
1114 return VINF_SUCCESS;
1115}
1116
1117
1118#ifdef VBOX_WITH_RAW_MODE
1119/**
1120 * Resolve a builtin RC symbol.
1121 *
1122 * Called by PDM when loading or relocating RC modules.
1123 *
1124 * @returns VBox status
1125 * @param pVM Pointer to the VM.
1126 * @param pszSymbol Symbol to resolv
1127 * @param pRCPtrValue Where to store the symbol value.
1128 *
1129 * @remark This has to work before VMMR3Relocate() is called.
1130 */
1131VMMR3_INT_DECL(int) VMMR3GetImportRC(PVM pVM, const char *pszSymbol, PRTRCPTR pRCPtrValue)
1132{
1133 if (!strcmp(pszSymbol, "g_Logger"))
1134 {
1135 if (pVM->vmm.s.pRCLoggerR3)
1136 pVM->vmm.s.pRCLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCLoggerR3);
1137 *pRCPtrValue = pVM->vmm.s.pRCLoggerRC;
1138 }
1139 else if (!strcmp(pszSymbol, "g_RelLogger"))
1140 {
1141# ifdef VBOX_WITH_RC_RELEASE_LOGGING
1142 if (pVM->vmm.s.pRCRelLoggerR3)
1143 pVM->vmm.s.pRCRelLoggerRC = MMHyperR3ToRC(pVM, pVM->vmm.s.pRCRelLoggerR3);
1144 *pRCPtrValue = pVM->vmm.s.pRCRelLoggerRC;
1145# else
1146 *pRCPtrValue = NIL_RTRCPTR;
1147# endif
1148 }
1149 else
1150 return VERR_SYMBOL_NOT_FOUND;
1151 return VINF_SUCCESS;
1152}
1153#endif /* VBOX_WITH_RAW_MODE */
1154
1155
1156/**
1157 * Suspends the CPU yielder.
1158 *
1159 * @param pVM Pointer to the VM.
1160 */
1161VMMR3_INT_DECL(void) VMMR3YieldSuspend(PVM pVM)
1162{
1163 VMCPU_ASSERT_EMT(&pVM->aCpus[0]);
1164 if (!pVM->vmm.s.cYieldResumeMillies)
1165 {
1166 uint64_t u64Now = TMTimerGet(pVM->vmm.s.pYieldTimer);
1167 uint64_t u64Expire = TMTimerGetExpire(pVM->vmm.s.pYieldTimer);
1168 if (u64Now >= u64Expire || u64Expire == ~(uint64_t)0)
1169 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1170 else
1171 pVM->vmm.s.cYieldResumeMillies = TMTimerToMilli(pVM->vmm.s.pYieldTimer, u64Expire - u64Now);
1172 TMTimerStop(pVM->vmm.s.pYieldTimer);
1173 }
1174 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1175}
1176
1177
1178/**
1179 * Stops the CPU yielder.
1180 *
1181 * @param pVM Pointer to the VM.
1182 */
1183VMMR3_INT_DECL(void) VMMR3YieldStop(PVM pVM)
1184{
1185 if (!pVM->vmm.s.cYieldResumeMillies)
1186 TMTimerStop(pVM->vmm.s.pYieldTimer);
1187 pVM->vmm.s.cYieldResumeMillies = pVM->vmm.s.cYieldEveryMillies;
1188 pVM->vmm.s.u64LastYield = RTTimeNanoTS();
1189}
1190
1191
1192/**
1193 * Resumes the CPU yielder when it has been a suspended or stopped.
1194 *
1195 * @param pVM Pointer to the VM.
1196 */
1197VMMR3_INT_DECL(void) VMMR3YieldResume(PVM pVM)
1198{
1199 if (pVM->vmm.s.cYieldResumeMillies)
1200 {
1201 TMTimerSetMillies(pVM->vmm.s.pYieldTimer, pVM->vmm.s.cYieldResumeMillies);
1202 pVM->vmm.s.cYieldResumeMillies = 0;
1203 }
1204}
1205
1206
1207/**
1208 * Internal timer callback function.
1209 *
1210 * @param pVM The VM.
1211 * @param pTimer The timer handle.
1212 * @param pvUser User argument specified upon timer creation.
1213 */
1214static DECLCALLBACK(void) vmmR3YieldEMT(PVM pVM, PTMTIMER pTimer, void *pvUser)
1215{
1216 NOREF(pvUser);
1217
1218 /*
1219 * This really needs some careful tuning. While we shouldn't be too greedy since
1220 * that'll cause the rest of the system to stop up, we shouldn't be too nice either
1221 * because that'll cause us to stop up.
1222 *
1223 * The current logic is to use the default interval when there is no lag worth
1224 * mentioning, but when we start accumulating lag we don't bother yielding at all.
1225 *
1226 * (This depends on the TMCLOCK_VIRTUAL_SYNC to be scheduled before TMCLOCK_REAL
1227 * so the lag is up to date.)
1228 */
1229 const uint64_t u64Lag = TMVirtualSyncGetLag(pVM);
1230 if ( u64Lag < 50000000 /* 50ms */
1231 || ( u64Lag < 1000000000 /* 1s */
1232 && RTTimeNanoTS() - pVM->vmm.s.u64LastYield < 500000000 /* 500 ms */)
1233 )
1234 {
1235 uint64_t u64Elapsed = RTTimeNanoTS();
1236 pVM->vmm.s.u64LastYield = u64Elapsed;
1237
1238 RTThreadYield();
1239
1240#ifdef LOG_ENABLED
1241 u64Elapsed = RTTimeNanoTS() - u64Elapsed;
1242 Log(("vmmR3YieldEMT: %RI64 ns\n", u64Elapsed));
1243#endif
1244 }
1245 TMTimerSetMillies(pTimer, pVM->vmm.s.cYieldEveryMillies);
1246}
1247
1248
1249#ifdef VBOX_WITH_RAW_MODE
1250/**
1251 * Executes guest code in the raw-mode context.
1252 *
1253 * @param pVM Pointer to the VM.
1254 * @param pVCpu Pointer to the VMCPU.
1255 */
1256VMMR3_INT_DECL(int) VMMR3RawRunGC(PVM pVM, PVMCPU pVCpu)
1257{
1258 Log2(("VMMR3RawRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1259
1260 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1261
1262 /*
1263 * Set the hypervisor to resume executing a CPUM resume function
1264 * in CPUMRCA.asm.
1265 */
1266 CPUMSetHyperState(pVCpu,
1267 CPUMGetGuestEFlags(pVCpu) & X86_EFL_VM
1268 ? pVM->vmm.s.pfnCPUMRCResumeGuestV86
1269 : pVM->vmm.s.pfnCPUMRCResumeGuest, /* eip */
1270 pVCpu->vmm.s.pbEMTStackBottomRC, /* esp */
1271 0, /* eax */
1272 VM_RC_ADDR(pVM, &pVCpu->cpum) /* edx */);
1273
1274 /*
1275 * We hide log flushes (outer) and hypervisor interrupts (inner).
1276 */
1277 for (;;)
1278 {
1279#ifdef VBOX_STRICT
1280 if (RT_UNLIKELY(!CPUMGetHyperCR3(pVCpu) || CPUMGetHyperCR3(pVCpu) != PGMGetHyperCR3(pVCpu)))
1281 EMR3FatalError(pVCpu, VERR_VMM_HYPER_CR3_MISMATCH);
1282 PGMMapCheck(pVM);
1283# ifdef VBOX_WITH_SAFE_STR
1284 SELMR3CheckShadowTR(pVM);
1285# endif
1286#endif
1287 int rc;
1288 do
1289 {
1290#ifdef NO_SUPCALLR0VMM
1291 rc = VERR_GENERAL_FAILURE;
1292#else
1293 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1294 if (RT_LIKELY(rc == VINF_SUCCESS))
1295 rc = pVCpu->vmm.s.iLastGZRc;
1296#endif
1297 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1298
1299 /*
1300 * Flush the logs.
1301 */
1302#ifdef LOG_ENABLED
1303 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1304 if ( pLogger
1305 && pLogger->offScratch > 0)
1306 RTLogFlushRC(NULL, pLogger);
1307#endif
1308#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1309 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1310 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1311 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1312#endif
1313 if (rc != VINF_VMM_CALL_HOST)
1314 {
1315 Log2(("VMMR3RawRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1316 return rc;
1317 }
1318 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1319 if (RT_FAILURE(rc))
1320 return rc;
1321 /* Resume GC */
1322 }
1323}
1324#endif /* VBOX_WITH_RAW_MODE */
1325
1326
1327/**
1328 * Executes guest code (Intel VT-x and AMD-V).
1329 *
1330 * @param pVM Pointer to the VM.
1331 * @param pVCpu Pointer to the VMCPU.
1332 */
1333VMMR3_INT_DECL(int) VMMR3HmRunGC(PVM pVM, PVMCPU pVCpu)
1334{
1335 Log2(("VMMR3HmRunGC: (cs:eip=%04x:%08x)\n", CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1336
1337 for (;;)
1338 {
1339 int rc;
1340 do
1341 {
1342#ifdef NO_SUPCALLR0VMM
1343 rc = VERR_GENERAL_FAILURE;
1344#else
1345 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_HM_RUN, pVCpu->idCpu);
1346 if (RT_LIKELY(rc == VINF_SUCCESS))
1347 rc = pVCpu->vmm.s.iLastGZRc;
1348#endif
1349 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1350
1351#if 0 /* todo triggers too often */
1352 Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3));
1353#endif
1354
1355#ifdef LOG_ENABLED
1356 /*
1357 * Flush the log
1358 */
1359 PVMMR0LOGGER pR0LoggerR3 = pVCpu->vmm.s.pR0LoggerR3;
1360 if ( pR0LoggerR3
1361 && pR0LoggerR3->Logger.offScratch > 0)
1362 RTLogFlushR0(NULL, &pR0LoggerR3->Logger);
1363#endif /* !LOG_ENABLED */
1364 if (rc != VINF_VMM_CALL_HOST)
1365 {
1366 Log2(("VMMR3HmRunGC: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1367 return rc;
1368 }
1369 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
1370 if (RT_FAILURE(rc))
1371 return rc;
1372 /* Resume R0 */
1373 }
1374}
1375
1376/**
1377 * VCPU worker for VMMSendSipi.
1378 *
1379 * @param pVM Pointer to the VM.
1380 * @param idCpu Virtual CPU to perform SIPI on
1381 * @param uVector SIPI vector
1382 */
1383DECLCALLBACK(int) vmmR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1384{
1385 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1386 VMCPU_ASSERT_EMT(pVCpu);
1387
1388 /** @todo what are we supposed to do if the processor is already running? */
1389 if (EMGetState(pVCpu) != EMSTATE_WAIT_SIPI)
1390 return VERR_ACCESS_DENIED;
1391
1392
1393 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu);
1394
1395 pCtx->cs.Sel = uVector << 8;
1396 pCtx->cs.ValidSel = uVector << 8;
1397 pCtx->cs.fFlags = CPUMSELREG_FLAGS_VALID;
1398 pCtx->cs.u64Base = uVector << 12;
1399 pCtx->cs.u32Limit = UINT32_C(0x0000ffff);
1400 pCtx->rip = 0;
1401
1402 Log(("vmmR3SendSipi for VCPU %d with vector %x\n", idCpu, uVector));
1403
1404# if 1 /* If we keep the EMSTATE_WAIT_SIPI method, then move this to EM.cpp. */
1405 EMSetState(pVCpu, EMSTATE_HALTED);
1406 return VINF_EM_RESCHEDULE;
1407# else /* And if we go the VMCPU::enmState way it can stay here. */
1408 VMCPU_ASSERT_STATE(pVCpu, VMCPUSTATE_STOPPED);
1409 VMCPU_SET_STATE(pVCpu, VMCPUSTATE_STARTED);
1410 return VINF_SUCCESS;
1411# endif
1412}
1413
1414DECLCALLBACK(int) vmmR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1415{
1416 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1417 VMCPU_ASSERT_EMT(pVCpu);
1418
1419 Log(("vmmR3SendInitIpi for VCPU %d\n", idCpu));
1420
1421 PGMR3ResetCpu(pVM, pVCpu);
1422 CPUMR3ResetCpu(pVM, pVCpu);
1423
1424 return VINF_EM_WAIT_SIPI;
1425}
1426
1427/**
1428 * Sends SIPI to the virtual CPU by setting CS:EIP into vector-dependent state
1429 * and unhalting processor
1430 *
1431 * @param pVM Pointer to the VM.
1432 * @param idCpu Virtual CPU to perform SIPI on
1433 * @param uVector SIPI vector
1434 */
1435VMMR3_INT_DECL(void) VMMR3SendSipi(PVM pVM, VMCPUID idCpu, uint32_t uVector)
1436{
1437 AssertReturnVoid(idCpu < pVM->cCpus);
1438
1439 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendSipi, 3, pVM, idCpu, uVector);
1440 AssertRC(rc);
1441}
1442
1443/**
1444 * Sends init IPI to the virtual CPU.
1445 *
1446 * @param pVM Pointer to the VM.
1447 * @param idCpu Virtual CPU to perform int IPI on
1448 */
1449VMMR3_INT_DECL(void) VMMR3SendInitIpi(PVM pVM, VMCPUID idCpu)
1450{
1451 AssertReturnVoid(idCpu < pVM->cCpus);
1452
1453 int rc = VMR3ReqCallNoWait(pVM, idCpu, (PFNRT)vmmR3SendInitIpi, 2, pVM, idCpu);
1454 AssertRC(rc);
1455}
1456
1457/**
1458 * Registers the guest memory range that can be used for patching
1459 *
1460 * @returns VBox status code.
1461 * @param pVM Pointer to the VM.
1462 * @param pPatchMem Patch memory range
1463 * @param cbPatchMem Size of the memory range
1464 */
1465VMMR3DECL(int) VMMR3RegisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1466{
1467 VM_ASSERT_EMT(pVM);
1468 if (HMIsEnabled(pVM))
1469 return HMR3EnablePatching(pVM, pPatchMem, cbPatchMem);
1470
1471 return VERR_NOT_SUPPORTED;
1472}
1473
1474/**
1475 * Deregisters the guest memory range that can be used for patching
1476 *
1477 * @returns VBox status code.
1478 * @param pVM Pointer to the VM.
1479 * @param pPatchMem Patch memory range
1480 * @param cbPatchMem Size of the memory range
1481 */
1482VMMR3DECL(int) VMMR3DeregisterPatchMemory(PVM pVM, RTGCPTR pPatchMem, unsigned cbPatchMem)
1483{
1484 if (HMIsEnabled(pVM))
1485 return HMR3DisablePatching(pVM, pPatchMem, cbPatchMem);
1486
1487 return VINF_SUCCESS;
1488}
1489
1490
1491/**
1492 * Count returns and have the last non-caller EMT wake up the caller.
1493 *
1494 * @returns VBox strict informational status code for EM scheduling. No failures
1495 * will be returned here, those are for the caller only.
1496 *
1497 * @param pVM Pointer to the VM.
1498 */
1499DECL_FORCE_INLINE(int) vmmR3EmtRendezvousNonCallerReturn(PVM pVM)
1500{
1501 int rcRet = ASMAtomicReadS32(&pVM->vmm.s.i32RendezvousStatus);
1502 uint32_t cReturned = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsReturned);
1503 if (cReturned == pVM->cCpus - 1U)
1504 {
1505 int rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousDoneCaller);
1506 AssertLogRelRC(rc);
1507 }
1508
1509 AssertLogRelMsgReturn( rcRet <= VINF_SUCCESS
1510 || (rcRet >= VINF_EM_FIRST && rcRet <= VINF_EM_LAST),
1511 ("%Rrc\n", rcRet),
1512 VERR_IPE_UNEXPECTED_INFO_STATUS);
1513 return RT_SUCCESS(rcRet) ? rcRet : VINF_SUCCESS;
1514}
1515
1516
1517/**
1518 * Common worker for VMMR3EmtRendezvous and VMMR3EmtRendezvousFF.
1519 *
1520 * @returns VBox strict informational status code for EM scheduling. No failures
1521 * will be returned here, those are for the caller only. When
1522 * fIsCaller is set, VINF_SUCCESS is always returned.
1523 *
1524 * @param pVM Pointer to the VM.
1525 * @param pVCpu The VMCPU structure for the calling EMT.
1526 * @param fIsCaller Whether we're the VMMR3EmtRendezvous caller or
1527 * not.
1528 * @param fFlags The flags.
1529 * @param pfnRendezvous The callback.
1530 * @param pvUser The user argument for the callback.
1531 */
1532static int vmmR3EmtRendezvousCommon(PVM pVM, PVMCPU pVCpu, bool fIsCaller,
1533 uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1534{
1535 int rc;
1536
1537 /*
1538 * Enter, the last EMT triggers the next callback phase.
1539 */
1540 uint32_t cEntered = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsEntered);
1541 if (cEntered != pVM->cCpus)
1542 {
1543 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1544 {
1545 /* Wait for our turn. */
1546 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, RT_INDEFINITE_WAIT);
1547 AssertLogRelRC(rc);
1548 }
1549 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1550 {
1551 /* Wait for the last EMT to arrive and wake everyone up. */
1552 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce, RT_INDEFINITE_WAIT);
1553 AssertLogRelRC(rc);
1554 }
1555 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1556 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1557 {
1558 /* Wait for our turn. */
1559 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1560 AssertLogRelRC(rc);
1561 }
1562 else
1563 {
1564 Assert((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE);
1565
1566 /*
1567 * The execute once is handled specially to optimize the code flow.
1568 *
1569 * The last EMT to arrive will perform the callback and the other
1570 * EMTs will wait on the Done/DoneCaller semaphores (instead of
1571 * the EnterOneByOne/AllAtOnce) in the meanwhile. When the callback
1572 * returns, that EMT will initiate the normal return sequence.
1573 */
1574 if (!fIsCaller)
1575 {
1576 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1577 AssertLogRelRC(rc);
1578
1579 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1580 }
1581 return VINF_SUCCESS;
1582 }
1583 }
1584 else
1585 {
1586 /*
1587 * All EMTs are waiting, clear the FF and take action according to the
1588 * execution method.
1589 */
1590 VM_FF_CLEAR(pVM, VM_FF_EMT_RENDEZVOUS);
1591
1592 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE)
1593 {
1594 /* Wake up everyone. */
1595 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce);
1596 AssertLogRelRC(rc);
1597 }
1598 else if ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1599 || (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1600 {
1601 /* Figure out who to wake up and wake it up. If it's ourself, then
1602 it's easy otherwise wait for our turn. */
1603 VMCPUID iFirst = (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING
1604 ? 0
1605 : pVM->cCpus - 1U;
1606 if (pVCpu->idCpu != iFirst)
1607 {
1608 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[iFirst]);
1609 AssertLogRelRC(rc);
1610 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu], RT_INDEFINITE_WAIT);
1611 AssertLogRelRC(rc);
1612 }
1613 }
1614 /* else: execute the handler on the current EMT and wake up one or more threads afterwards. */
1615 }
1616
1617
1618 /*
1619 * Do the callback and update the status if necessary.
1620 */
1621 if ( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1622 || RT_SUCCESS(ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus)) )
1623 {
1624 VBOXSTRICTRC rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1625 if (rcStrict != VINF_SUCCESS)
1626 {
1627 AssertLogRelMsg( rcStrict <= VINF_SUCCESS
1628 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1629 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
1630 int32_t i32RendezvousStatus;
1631 do
1632 {
1633 i32RendezvousStatus = ASMAtomicUoReadS32(&pVM->vmm.s.i32RendezvousStatus);
1634 if ( rcStrict == i32RendezvousStatus
1635 || RT_FAILURE(i32RendezvousStatus)
1636 || ( i32RendezvousStatus != VINF_SUCCESS
1637 && rcStrict > i32RendezvousStatus))
1638 break;
1639 } while (!ASMAtomicCmpXchgS32(&pVM->vmm.s.i32RendezvousStatus, VBOXSTRICTRC_VAL(rcStrict), i32RendezvousStatus));
1640 }
1641 }
1642
1643 /*
1644 * Increment the done counter and take action depending on whether we're
1645 * the last to finish callback execution.
1646 */
1647 uint32_t cDone = ASMAtomicIncU32(&pVM->vmm.s.cRendezvousEmtsDone);
1648 if ( cDone != pVM->cCpus
1649 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE)
1650 {
1651 /* Signal the next EMT? */
1652 if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ONE_BY_ONE)
1653 {
1654 rc = RTSemEventSignal(pVM->vmm.s.hEvtRendezvousEnterOneByOne);
1655 AssertLogRelRC(rc);
1656 }
1657 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_ASCENDING)
1658 {
1659 Assert(cDone == pVCpu->idCpu + 1U);
1660 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVCpu->idCpu + 1U]);
1661 AssertLogRelRC(rc);
1662 }
1663 else if ((fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) == VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING)
1664 {
1665 Assert(pVM->cCpus - cDone == pVCpu->idCpu);
1666 rc = RTSemEventSignal(pVM->vmm.s.pahEvtRendezvousEnterOrdered[pVM->cCpus - cDone - 1U]);
1667 AssertLogRelRC(rc);
1668 }
1669
1670 /* Wait for the rest to finish (the caller waits on hEvtRendezvousDoneCaller). */
1671 if (!fIsCaller)
1672 {
1673 rc = RTSemEventMultiWait(pVM->vmm.s.hEvtMulRendezvousDone, RT_INDEFINITE_WAIT);
1674 AssertLogRelRC(rc);
1675 }
1676 }
1677 else
1678 {
1679 /* Callback execution is all done, tell the rest to return. */
1680 rc = RTSemEventMultiSignal(pVM->vmm.s.hEvtMulRendezvousDone);
1681 AssertLogRelRC(rc);
1682 }
1683
1684 if (!fIsCaller)
1685 return vmmR3EmtRendezvousNonCallerReturn(pVM);
1686 return VINF_SUCCESS;
1687}
1688
1689
1690/**
1691 * Called in response to VM_FF_EMT_RENDEZVOUS.
1692 *
1693 * @returns VBox strict status code - EM scheduling. No errors will be returned
1694 * here, nor will any non-EM scheduling status codes be returned.
1695 *
1696 * @param pVM Pointer to the VM.
1697 * @param pVCpu The handle of the calling EMT.
1698 *
1699 * @thread EMT
1700 */
1701VMMR3_INT_DECL(int) VMMR3EmtRendezvousFF(PVM pVM, PVMCPU pVCpu)
1702{
1703 Assert(!pVCpu->vmm.s.fInRendezvous);
1704 pVCpu->vmm.s.fInRendezvous = true;
1705 int rc = vmmR3EmtRendezvousCommon(pVM, pVCpu, false /* fIsCaller */, pVM->vmm.s.fRendezvousFlags,
1706 pVM->vmm.s.pfnRendezvous, pVM->vmm.s.pvRendezvousUser);
1707 pVCpu->vmm.s.fInRendezvous = false;
1708 return rc;
1709}
1710
1711
1712/**
1713 * EMT rendezvous.
1714 *
1715 * Gathers all the EMTs and execute some code on each of them, either in a one
1716 * by one fashion or all at once.
1717 *
1718 * @returns VBox strict status code. This will be the first error,
1719 * VINF_SUCCESS, or an EM scheduling status code.
1720 *
1721 * @param pVM Pointer to the VM.
1722 * @param fFlags Flags indicating execution methods. See
1723 * grp_VMMR3EmtRendezvous_fFlags.
1724 * @param pfnRendezvous The callback.
1725 * @param pvUser User argument for the callback.
1726 *
1727 * @thread Any.
1728 */
1729VMMR3DECL(int) VMMR3EmtRendezvous(PVM pVM, uint32_t fFlags, PFNVMMEMTRENDEZVOUS pfnRendezvous, void *pvUser)
1730{
1731 /*
1732 * Validate input.
1733 */
1734 AssertReturn(pVM, VERR_INVALID_VM_HANDLE);
1735 AssertMsg( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_INVALID
1736 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) <= VMMEMTRENDEZVOUS_FLAGS_TYPE_DESCENDING
1737 && !(fFlags & ~VMMEMTRENDEZVOUS_FLAGS_VALID_MASK), ("%#x\n", fFlags));
1738 AssertMsg( !(fFlags & VMMEMTRENDEZVOUS_FLAGS_STOP_ON_ERROR)
1739 || ( (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ALL_AT_ONCE
1740 && (fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK) != VMMEMTRENDEZVOUS_FLAGS_TYPE_ONCE),
1741 ("type %u\n", fFlags & VMMEMTRENDEZVOUS_FLAGS_TYPE_MASK));
1742
1743 VBOXSTRICTRC rcStrict;
1744 PVMCPU pVCpu = VMMGetCpu(pVM);
1745 if (!pVCpu)
1746 /*
1747 * Forward the request to an EMT thread.
1748 */
1749 rcStrict = VMR3ReqCallWait(pVM, VMCPUID_ANY,
1750 (PFNRT)VMMR3EmtRendezvous, 4, pVM, fFlags, pfnRendezvous, pvUser);
1751 else if (pVM->cCpus == 1)
1752 {
1753 /*
1754 * Shortcut for the single EMT case.
1755 */
1756 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1757 pVCpu->vmm.s.fInRendezvous = true;
1758 rcStrict = pfnRendezvous(pVM, pVCpu, pvUser);
1759 pVCpu->vmm.s.fInRendezvous = false;
1760 }
1761 else
1762 {
1763 /*
1764 * Spin lock. If busy, wait for the other EMT to finish while keeping a
1765 * lookout of the RENDEZVOUS FF.
1766 */
1767 int rc;
1768 rcStrict = VINF_SUCCESS;
1769 if (RT_UNLIKELY(!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0)))
1770 {
1771 AssertLogRelReturn(!pVCpu->vmm.s.fInRendezvous, VERR_DEADLOCK);
1772
1773 while (!ASMAtomicCmpXchgU32(&pVM->vmm.s.u32RendezvousLock, 0x77778888, 0))
1774 {
1775 if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
1776 {
1777 rc = VMMR3EmtRendezvousFF(pVM, pVCpu);
1778 if ( rc != VINF_SUCCESS
1779 && ( rcStrict == VINF_SUCCESS
1780 || rcStrict > rc))
1781 rcStrict = rc;
1782 /** @todo Perhaps deal with termination here? */
1783 }
1784 ASMNopPause();
1785 }
1786 }
1787 Assert(!VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS));
1788 Assert(!pVCpu->vmm.s.fInRendezvous);
1789 pVCpu->vmm.s.fInRendezvous = true;
1790
1791 /*
1792 * Clear the slate. This is a semaphore ping-pong orgy. :-)
1793 */
1794 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1795 {
1796 rc = RTSemEventWait(pVM->vmm.s.pahEvtRendezvousEnterOrdered[i], 0);
1797 AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1798 }
1799 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousEnterOneByOne, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1800 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousEnterAllAtOnce); AssertLogRelRC(rc);
1801 rc = RTSemEventMultiReset(pVM->vmm.s.hEvtMulRendezvousDone); AssertLogRelRC(rc);
1802 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, 0); AssertLogRelMsg(rc == VERR_TIMEOUT || rc == VINF_SUCCESS, ("%Rrc\n", rc));
1803 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsEntered, 0);
1804 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsDone, 0);
1805 ASMAtomicWriteU32(&pVM->vmm.s.cRendezvousEmtsReturned, 0);
1806 ASMAtomicWriteS32(&pVM->vmm.s.i32RendezvousStatus, VINF_SUCCESS);
1807 ASMAtomicWritePtr((void * volatile *)&pVM->vmm.s.pfnRendezvous, (void *)(uintptr_t)pfnRendezvous);
1808 ASMAtomicWritePtr(&pVM->vmm.s.pvRendezvousUser, pvUser);
1809 ASMAtomicWriteU32(&pVM->vmm.s.fRendezvousFlags, fFlags);
1810
1811 /*
1812 * Set the FF and poke the other EMTs.
1813 */
1814 VM_FF_SET(pVM, VM_FF_EMT_RENDEZVOUS);
1815 VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_POKE);
1816
1817 /*
1818 * Do the same ourselves.
1819 */
1820 vmmR3EmtRendezvousCommon(pVM, pVCpu, true /* fIsCaller */, fFlags, pfnRendezvous, pvUser);
1821
1822 /*
1823 * The caller waits for the other EMTs to be done and return before doing
1824 * the cleanup. This makes away with wakeup / reset races we would otherwise
1825 * risk in the multiple release event semaphore code (hEvtRendezvousDoneCaller).
1826 */
1827 rc = RTSemEventWait(pVM->vmm.s.hEvtRendezvousDoneCaller, RT_INDEFINITE_WAIT);
1828 AssertLogRelRC(rc);
1829
1830 /*
1831 * Get the return code and clean up a little bit.
1832 */
1833 int rcMy = pVM->vmm.s.i32RendezvousStatus;
1834 ASMAtomicWriteNullPtr((void * volatile *)&pVM->vmm.s.pfnRendezvous);
1835
1836 ASMAtomicWriteU32(&pVM->vmm.s.u32RendezvousLock, 0);
1837 pVCpu->vmm.s.fInRendezvous = false;
1838
1839 /*
1840 * Merge rcStrict and rcMy.
1841 */
1842 AssertRC(VBOXSTRICTRC_VAL(rcStrict));
1843 if ( rcMy != VINF_SUCCESS
1844 && ( rcStrict == VINF_SUCCESS
1845 || rcStrict > rcMy))
1846 rcStrict = rcMy;
1847 }
1848
1849 AssertLogRelMsgReturn( rcStrict <= VINF_SUCCESS
1850 || (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST),
1851 ("%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)),
1852 VERR_IPE_UNEXPECTED_INFO_STATUS);
1853 return VBOXSTRICTRC_VAL(rcStrict);
1854}
1855
1856
1857/**
1858 * Disables/enables EMT rendezvous.
1859 *
1860 * This is used to make sure EMT rendezvous does not take place while
1861 * processing a priority request.
1862 *
1863 * @returns Old rendezvous-disabled state.
1864 * @param pVCpu The handle of the calling EMT.
1865 * @param fDisabled True if disabled, false if enabled.
1866 */
1867VMMR3_INT_DECL(bool) VMMR3EmtRendezvousSetDisabled(PVMCPU pVCpu, bool fDisabled)
1868{
1869 VMCPU_ASSERT_EMT(pVCpu);
1870 bool fOld = pVCpu->vmm.s.fInRendezvous;
1871 pVCpu->vmm.s.fInRendezvous = fDisabled;
1872 return fOld;
1873}
1874
1875
1876/**
1877 * Read from the ring 0 jump buffer stack
1878 *
1879 * @returns VBox status code.
1880 *
1881 * @param pVM Pointer to the VM.
1882 * @param idCpu The ID of the source CPU context (for the address).
1883 * @param R0Addr Where to start reading.
1884 * @param pvBuf Where to store the data we've read.
1885 * @param cbRead The number of bytes to read.
1886 */
1887VMMR3_INT_DECL(int) VMMR3ReadR0Stack(PVM pVM, VMCPUID idCpu, RTHCUINTPTR R0Addr, void *pvBuf, size_t cbRead)
1888{
1889 PVMCPU pVCpu = VMMGetCpuById(pVM, idCpu);
1890 AssertReturn(pVCpu, VERR_INVALID_PARAMETER);
1891
1892#ifdef VMM_R0_SWITCH_STACK
1893 RTHCUINTPTR off = R0Addr - MMHyperCCToR0(pVM, pVCpu->vmm.s.pbEMTStackR3);
1894#else
1895 RTHCUINTPTR off = pVCpu->vmm.s.CallRing3JmpBufR0.cbSavedStack - (pVCpu->vmm.s.CallRing3JmpBufR0.SpCheck - R0Addr);
1896#endif
1897 if ( off > VMM_STACK_SIZE
1898 || off + cbRead >= VMM_STACK_SIZE)
1899 return VERR_INVALID_POINTER;
1900
1901 memcpy(pvBuf, &pVCpu->vmm.s.pbEMTStackR3[off], cbRead);
1902 return VINF_SUCCESS;
1903}
1904
1905#ifdef VBOX_WITH_RAW_MODE
1906
1907/**
1908 * Calls a RC function.
1909 *
1910 * @param pVM Pointer to the VM.
1911 * @param RCPtrEntry The address of the RC function.
1912 * @param cArgs The number of arguments in the ....
1913 * @param ... Arguments to the function.
1914 */
1915VMMR3DECL(int) VMMR3CallRC(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, ...)
1916{
1917 va_list args;
1918 va_start(args, cArgs);
1919 int rc = VMMR3CallRCV(pVM, RCPtrEntry, cArgs, args);
1920 va_end(args);
1921 return rc;
1922}
1923
1924
1925/**
1926 * Calls a RC function.
1927 *
1928 * @param pVM Pointer to the VM.
1929 * @param RCPtrEntry The address of the RC function.
1930 * @param cArgs The number of arguments in the ....
1931 * @param args Arguments to the function.
1932 */
1933VMMR3DECL(int) VMMR3CallRCV(PVM pVM, RTRCPTR RCPtrEntry, unsigned cArgs, va_list args)
1934{
1935 /* Raw mode implies 1 VCPU. */
1936 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
1937 PVMCPU pVCpu = &pVM->aCpus[0];
1938
1939 Log2(("VMMR3CallGCV: RCPtrEntry=%RRv cArgs=%d\n", RCPtrEntry, cArgs));
1940
1941 /*
1942 * Setup the call frame using the trampoline.
1943 */
1944 CPUMSetHyperState(pVCpu,
1945 pVM->vmm.s.pfnCallTrampolineRC, /* eip */
1946 pVCpu->vmm.s.pbEMTStackBottomRC - cArgs * sizeof(RTGCUINTPTR32), /* esp */
1947 RCPtrEntry, /* eax */
1948 cArgs /* edx */
1949 );
1950
1951#if 0
1952 memset(pVCpu->vmm.s.pbEMTStackR3, 0xaa, VMM_STACK_SIZE); /* Clear the stack. */
1953#endif
1954 PRTGCUINTPTR32 pFrame = (PRTGCUINTPTR32)(pVCpu->vmm.s.pbEMTStackR3 + VMM_STACK_SIZE) - cArgs;
1955 int i = cArgs;
1956 while (i-- > 0)
1957 *pFrame++ = va_arg(args, RTGCUINTPTR32);
1958
1959 CPUMPushHyper(pVCpu, cArgs * sizeof(RTGCUINTPTR32)); /* stack frame size */
1960 CPUMPushHyper(pVCpu, RCPtrEntry); /* what to call */
1961
1962 /*
1963 * We hide log flushes (outer) and hypervisor interrupts (inner).
1964 */
1965 for (;;)
1966 {
1967 int rc;
1968 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
1969 do
1970 {
1971#ifdef NO_SUPCALLR0VMM
1972 rc = VERR_GENERAL_FAILURE;
1973#else
1974 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
1975 if (RT_LIKELY(rc == VINF_SUCCESS))
1976 rc = pVCpu->vmm.s.iLastGZRc;
1977#endif
1978 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
1979
1980 /*
1981 * Flush the loggers.
1982 */
1983#ifdef LOG_ENABLED
1984 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
1985 if ( pLogger
1986 && pLogger->offScratch > 0)
1987 RTLogFlushRC(NULL, pLogger);
1988#endif
1989#ifdef VBOX_WITH_RC_RELEASE_LOGGING
1990 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
1991 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
1992 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
1993#endif
1994 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
1995 VMMR3FatalDump(pVM, pVCpu, rc);
1996 if (rc != VINF_VMM_CALL_HOST)
1997 {
1998 Log2(("VMMR3CallGCV: returns %Rrc (cs:eip=%04x:%08x)\n", rc, CPUMGetGuestCS(pVCpu), CPUMGetGuestEIP(pVCpu)));
1999 return rc;
2000 }
2001 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2002 if (RT_FAILURE(rc))
2003 return rc;
2004 }
2005}
2006
2007#endif /* VBOX_WITH_RAW_MODE */
2008
2009/**
2010 * Wrapper for SUPR3CallVMMR0Ex which will deal with VINF_VMM_CALL_HOST returns.
2011 *
2012 * @returns VBox status code.
2013 * @param pVM Pointer to the VM.
2014 * @param uOperation Operation to execute.
2015 * @param u64Arg Constant argument.
2016 * @param pReqHdr Pointer to a request header. See SUPR3CallVMMR0Ex for
2017 * details.
2018 */
2019VMMR3DECL(int) VMMR3CallR0(PVM pVM, uint32_t uOperation, uint64_t u64Arg, PSUPVMMR0REQHDR pReqHdr)
2020{
2021 PVMCPU pVCpu = VMMGetCpu(pVM);
2022 AssertReturn(pVCpu, VERR_VM_THREAD_NOT_EMT);
2023
2024 /*
2025 * Call Ring-0 entry with init code.
2026 */
2027 int rc;
2028 for (;;)
2029 {
2030#ifdef NO_SUPCALLR0VMM
2031 rc = VERR_GENERAL_FAILURE;
2032#else
2033 rc = SUPR3CallVMMR0Ex(pVM->pVMR0, pVCpu->idCpu, uOperation, u64Arg, pReqHdr);
2034#endif
2035 /*
2036 * Flush the logs.
2037 */
2038#ifdef LOG_ENABLED
2039 if ( pVCpu->vmm.s.pR0LoggerR3
2040 && pVCpu->vmm.s.pR0LoggerR3->Logger.offScratch > 0)
2041 RTLogFlushR0(NULL, &pVCpu->vmm.s.pR0LoggerR3->Logger);
2042#endif
2043 if (rc != VINF_VMM_CALL_HOST)
2044 break;
2045 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2046 if (RT_FAILURE(rc) || (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST))
2047 break;
2048 /* Resume R0 */
2049 }
2050
2051 AssertLogRelMsgReturn(rc == VINF_SUCCESS || RT_FAILURE(rc),
2052 ("uOperation=%u rc=%Rrc\n", uOperation, rc),
2053 VERR_IPE_UNEXPECTED_INFO_STATUS);
2054 return rc;
2055}
2056
2057
2058#ifdef VBOX_WITH_RAW_MODE
2059/**
2060 * Resumes executing hypervisor code when interrupted by a queue flush or a
2061 * debug event.
2062 *
2063 * @returns VBox status code.
2064 * @param pVM Pointer to the VM.
2065 * @param pVCpu Pointer to the VMCPU.
2066 */
2067VMMR3DECL(int) VMMR3ResumeHyper(PVM pVM, PVMCPU pVCpu)
2068{
2069 Log(("VMMR3ResumeHyper: eip=%RRv esp=%RRv\n", CPUMGetHyperEIP(pVCpu), CPUMGetHyperESP(pVCpu)));
2070 AssertReturn(pVM->cCpus == 1, VERR_RAW_MODE_INVALID_SMP);
2071
2072 /*
2073 * We hide log flushes (outer) and hypervisor interrupts (inner).
2074 */
2075 for (;;)
2076 {
2077 int rc;
2078 Assert(CPUMGetHyperCR3(pVCpu) && CPUMGetHyperCR3(pVCpu) == PGMGetHyperCR3(pVCpu));
2079 do
2080 {
2081# ifdef NO_SUPCALLR0VMM
2082 rc = VERR_GENERAL_FAILURE;
2083# else
2084 rc = SUPR3CallVMMR0Fast(pVM->pVMR0, VMMR0_DO_RAW_RUN, 0);
2085 if (RT_LIKELY(rc == VINF_SUCCESS))
2086 rc = pVCpu->vmm.s.iLastGZRc;
2087# endif
2088 } while (rc == VINF_EM_RAW_INTERRUPT_HYPER);
2089
2090 /*
2091 * Flush the loggers.
2092 */
2093# ifdef LOG_ENABLED
2094 PRTLOGGERRC pLogger = pVM->vmm.s.pRCLoggerR3;
2095 if ( pLogger
2096 && pLogger->offScratch > 0)
2097 RTLogFlushRC(NULL, pLogger);
2098# endif
2099# ifdef VBOX_WITH_RC_RELEASE_LOGGING
2100 PRTLOGGERRC pRelLogger = pVM->vmm.s.pRCRelLoggerR3;
2101 if (RT_UNLIKELY(pRelLogger && pRelLogger->offScratch > 0))
2102 RTLogFlushRC(RTLogRelDefaultInstance(), pRelLogger);
2103# endif
2104 if (rc == VERR_TRPM_PANIC || rc == VERR_TRPM_DONT_PANIC)
2105 VMMR3FatalDump(pVM, pVCpu, rc);
2106 if (rc != VINF_VMM_CALL_HOST)
2107 {
2108 Log(("VMMR3ResumeHyper: returns %Rrc\n", rc));
2109 return rc;
2110 }
2111 rc = vmmR3ServiceCallRing3Request(pVM, pVCpu);
2112 if (RT_FAILURE(rc))
2113 return rc;
2114 }
2115}
2116#endif /* VBOX_WITH_RAW_MODE */
2117
2118
2119/**
2120 * Service a call to the ring-3 host code.
2121 *
2122 * @returns VBox status code.
2123 * @param pVM Pointer to the VM.
2124 * @param pVCpu Pointer to the VMCPU.
2125 * @remark Careful with critsects.
2126 */
2127static int vmmR3ServiceCallRing3Request(PVM pVM, PVMCPU pVCpu)
2128{
2129 /*
2130 * We must also check for pending critsect exits or else we can deadlock
2131 * when entering other critsects here.
2132 */
2133 if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
2134 PDMCritSectBothFF(pVCpu);
2135
2136 switch (pVCpu->vmm.s.enmCallRing3Operation)
2137 {
2138 /*
2139 * Acquire a critical section.
2140 */
2141 case VMMCALLRING3_PDM_CRIT_SECT_ENTER:
2142 {
2143 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectEnterEx((PPDMCRITSECT)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2144 true /*fCallRing3*/);
2145 break;
2146 }
2147
2148 /*
2149 * Enter a r/w critical section exclusively.
2150 */
2151 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_EXCL:
2152 {
2153 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterExclEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2154 true /*fCallRing3*/);
2155 break;
2156 }
2157
2158 /*
2159 * Enter a r/w critical section shared.
2160 */
2161 case VMMCALLRING3_PDM_CRIT_SECT_RW_ENTER_SHARED:
2162 {
2163 pVCpu->vmm.s.rcCallRing3 = PDMR3CritSectRwEnterSharedEx((PPDMCRITSECTRW)(uintptr_t)pVCpu->vmm.s.u64CallRing3Arg,
2164 true /*fCallRing3*/);
2165 break;
2166 }
2167
2168 /*
2169 * Acquire the PDM lock.
2170 */
2171 case VMMCALLRING3_PDM_LOCK:
2172 {
2173 pVCpu->vmm.s.rcCallRing3 = PDMR3LockCall(pVM);
2174 break;
2175 }
2176
2177 /*
2178 * Grow the PGM pool.
2179 */
2180 case VMMCALLRING3_PGM_POOL_GROW:
2181 {
2182 pVCpu->vmm.s.rcCallRing3 = PGMR3PoolGrow(pVM);
2183 break;
2184 }
2185
2186 /*
2187 * Maps an page allocation chunk into ring-3 so ring-0 can use it.
2188 */
2189 case VMMCALLRING3_PGM_MAP_CHUNK:
2190 {
2191 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysChunkMap(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2192 break;
2193 }
2194
2195 /*
2196 * Allocates more handy pages.
2197 */
2198 case VMMCALLRING3_PGM_ALLOCATE_HANDY_PAGES:
2199 {
2200 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateHandyPages(pVM);
2201 break;
2202 }
2203
2204 /*
2205 * Allocates a large page.
2206 */
2207 case VMMCALLRING3_PGM_ALLOCATE_LARGE_HANDY_PAGE:
2208 {
2209 pVCpu->vmm.s.rcCallRing3 = PGMR3PhysAllocateLargeHandyPage(pVM, pVCpu->vmm.s.u64CallRing3Arg);
2210 break;
2211 }
2212
2213 /*
2214 * Acquire the PGM lock.
2215 */
2216 case VMMCALLRING3_PGM_LOCK:
2217 {
2218 pVCpu->vmm.s.rcCallRing3 = PGMR3LockCall(pVM);
2219 break;
2220 }
2221
2222 /*
2223 * Acquire the MM hypervisor heap lock.
2224 */
2225 case VMMCALLRING3_MMHYPER_LOCK:
2226 {
2227 pVCpu->vmm.s.rcCallRing3 = MMR3LockCall(pVM);
2228 break;
2229 }
2230
2231#ifdef VBOX_WITH_REM
2232 /*
2233 * Flush REM handler notifications.
2234 */
2235 case VMMCALLRING3_REM_REPLAY_HANDLER_NOTIFICATIONS:
2236 {
2237 REMR3ReplayHandlerNotifications(pVM);
2238 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2239 break;
2240 }
2241#endif
2242
2243 /*
2244 * This is a noop. We just take this route to avoid unnecessary
2245 * tests in the loops.
2246 */
2247 case VMMCALLRING3_VMM_LOGGER_FLUSH:
2248 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2249 LogAlways(("*FLUSH*\n"));
2250 break;
2251
2252 /*
2253 * Set the VM error message.
2254 */
2255 case VMMCALLRING3_VM_SET_ERROR:
2256 VMR3SetErrorWorker(pVM);
2257 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2258 break;
2259
2260 /*
2261 * Set the VM runtime error message.
2262 */
2263 case VMMCALLRING3_VM_SET_RUNTIME_ERROR:
2264 pVCpu->vmm.s.rcCallRing3 = VMR3SetRuntimeErrorWorker(pVM);
2265 break;
2266
2267 /*
2268 * Signal a ring 0 hypervisor assertion.
2269 * Cancel the longjmp operation that's in progress.
2270 */
2271 case VMMCALLRING3_VM_R0_ASSERTION:
2272 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2273 pVCpu->vmm.s.CallRing3JmpBufR0.fInRing3Call = false;
2274#ifdef RT_ARCH_X86
2275 pVCpu->vmm.s.CallRing3JmpBufR0.eip = 0;
2276#else
2277 pVCpu->vmm.s.CallRing3JmpBufR0.rip = 0;
2278#endif
2279#ifdef VMM_R0_SWITCH_STACK
2280 *(uint64_t *)pVCpu->vmm.s.pbEMTStackR3 = 0; /* clear marker */
2281#endif
2282 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg1));
2283 LogRel(("%s", pVM->vmm.s.szRing0AssertMsg2));
2284 return VERR_VMM_RING0_ASSERTION;
2285
2286 /*
2287 * A forced switch to ring 0 for preemption purposes.
2288 */
2289 case VMMCALLRING3_VM_R0_PREEMPT:
2290 pVCpu->vmm.s.rcCallRing3 = VINF_SUCCESS;
2291 break;
2292
2293 case VMMCALLRING3_FTM_SET_CHECKPOINT:
2294 pVCpu->vmm.s.rcCallRing3 = FTMR3SetCheckpoint(pVM, (FTMCHECKPOINTTYPE)pVCpu->vmm.s.u64CallRing3Arg);
2295 break;
2296
2297 default:
2298 AssertMsgFailed(("enmCallRing3Operation=%d\n", pVCpu->vmm.s.enmCallRing3Operation));
2299 return VERR_VMM_UNKNOWN_RING3_CALL;
2300 }
2301
2302 pVCpu->vmm.s.enmCallRing3Operation = VMMCALLRING3_INVALID;
2303 return VINF_SUCCESS;
2304}
2305
2306
2307/**
2308 * Displays the Force action Flags.
2309 *
2310 * @param pVM Pointer to the VM.
2311 * @param pHlp The output helpers.
2312 * @param pszArgs The additional arguments (ignored).
2313 */
2314static DECLCALLBACK(void) vmmR3InfoFF(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
2315{
2316 int c;
2317 uint32_t f;
2318 NOREF(pszArgs);
2319
2320#define PRINT_FLAG(prf,flag) do { \
2321 if (f & (prf##flag)) \
2322 { \
2323 static const char *s_psz = #flag; \
2324 if (!(c % 6)) \
2325 pHlp->pfnPrintf(pHlp, "%s\n %s", c ? "," : "", s_psz); \
2326 else \
2327 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2328 c++; \
2329 f &= ~(prf##flag); \
2330 } \
2331 } while (0)
2332
2333#define PRINT_GROUP(prf,grp,sfx) do { \
2334 if (f & (prf##grp##sfx)) \
2335 { \
2336 static const char *s_psz = #grp; \
2337 if (!(c % 5)) \
2338 pHlp->pfnPrintf(pHlp, "%s %s", c ? ",\n" : " Groups:\n", s_psz); \
2339 else \
2340 pHlp->pfnPrintf(pHlp, ", %s", s_psz); \
2341 c++; \
2342 } \
2343 } while (0)
2344
2345 /*
2346 * The global flags.
2347 */
2348 const uint32_t fGlobalForcedActions = pVM->fGlobalForcedActions;
2349 pHlp->pfnPrintf(pHlp, "Global FFs: %#RX32", fGlobalForcedActions);
2350
2351 /* show the flag mnemonics */
2352 c = 0;
2353 f = fGlobalForcedActions;
2354 PRINT_FLAG(VM_FF_,TM_VIRTUAL_SYNC);
2355 PRINT_FLAG(VM_FF_,PDM_QUEUES);
2356 PRINT_FLAG(VM_FF_,PDM_DMA);
2357 PRINT_FLAG(VM_FF_,DBGF);
2358 PRINT_FLAG(VM_FF_,REQUEST);
2359 PRINT_FLAG(VM_FF_,CHECK_VM_STATE);
2360 PRINT_FLAG(VM_FF_,RESET);
2361 PRINT_FLAG(VM_FF_,EMT_RENDEZVOUS);
2362 PRINT_FLAG(VM_FF_,PGM_NEED_HANDY_PAGES);
2363 PRINT_FLAG(VM_FF_,PGM_NO_MEMORY);
2364 PRINT_FLAG(VM_FF_,PGM_POOL_FLUSH_PENDING);
2365 PRINT_FLAG(VM_FF_,REM_HANDLER_NOTIFY);
2366 PRINT_FLAG(VM_FF_,DEBUG_SUSPEND);
2367 if (f)
2368 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2369 else
2370 pHlp->pfnPrintf(pHlp, "\n");
2371
2372 /* the groups */
2373 c = 0;
2374 f = fGlobalForcedActions;
2375 PRINT_GROUP(VM_FF_,EXTERNAL_SUSPENDED,_MASK);
2376 PRINT_GROUP(VM_FF_,EXTERNAL_HALTED,_MASK);
2377 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE,_MASK);
2378 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2379 PRINT_GROUP(VM_FF_,HIGH_PRIORITY_POST,_MASK);
2380 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY_POST,_MASK);
2381 PRINT_GROUP(VM_FF_,NORMAL_PRIORITY,_MASK);
2382 PRINT_GROUP(VM_FF_,ALL_REM,_MASK);
2383 if (c)
2384 pHlp->pfnPrintf(pHlp, "\n");
2385
2386 /*
2387 * Per CPU flags.
2388 */
2389 for (VMCPUID i = 0; i < pVM->cCpus; i++)
2390 {
2391 const uint32_t fLocalForcedActions = pVM->aCpus[i].fLocalForcedActions;
2392 pHlp->pfnPrintf(pHlp, "CPU %u FFs: %#RX32", i, fLocalForcedActions);
2393
2394 /* show the flag mnemonics */
2395 c = 0;
2396 f = fLocalForcedActions;
2397 PRINT_FLAG(VMCPU_FF_,INTERRUPT_APIC);
2398 PRINT_FLAG(VMCPU_FF_,INTERRUPT_PIC);
2399 PRINT_FLAG(VMCPU_FF_,TIMER);
2400 PRINT_FLAG(VMCPU_FF_,PDM_CRITSECT);
2401 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3);
2402 PRINT_FLAG(VMCPU_FF_,PGM_SYNC_CR3_NON_GLOBAL);
2403 PRINT_FLAG(VMCPU_FF_,TLB_FLUSH);
2404 PRINT_FLAG(VMCPU_FF_,INHIBIT_INTERRUPTS);
2405 PRINT_FLAG(VMCPU_FF_,TO_R3);
2406#ifdef VBOX_WITH_RAW_MODE
2407 PRINT_FLAG(VMCPU_FF_,TRPM_SYNC_IDT);
2408 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_TSS);
2409 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_GDT);
2410 PRINT_FLAG(VMCPU_FF_,SELM_SYNC_LDT);
2411 PRINT_FLAG(VMCPU_FF_,CSAM_SCAN_PAGE);
2412 PRINT_FLAG(VMCPU_FF_,CSAM_PENDING_ACTION);
2413#endif
2414 if (f)
2415 pHlp->pfnPrintf(pHlp, "%s\n Unknown bits: %#RX32\n", c ? "," : "", f);
2416 else
2417 pHlp->pfnPrintf(pHlp, "\n");
2418
2419 if (fLocalForcedActions & VMCPU_FF_INHIBIT_INTERRUPTS)
2420 pHlp->pfnPrintf(pHlp, " intr inhibit RIP: %RGp\n", EMGetInhibitInterruptsPC(&pVM->aCpus[i]));
2421
2422 /* the groups */
2423 c = 0;
2424 f = fLocalForcedActions;
2425 PRINT_GROUP(VMCPU_FF_,EXTERNAL_SUSPENDED,_MASK);
2426 PRINT_GROUP(VMCPU_FF_,EXTERNAL_HALTED,_MASK);
2427 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE,_MASK);
2428 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_PRE_RAW,_MASK);
2429 PRINT_GROUP(VMCPU_FF_,HIGH_PRIORITY_POST,_MASK);
2430 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY_POST,_MASK);
2431 PRINT_GROUP(VMCPU_FF_,NORMAL_PRIORITY,_MASK);
2432 PRINT_GROUP(VMCPU_FF_,RESUME_GUEST,_MASK);
2433 PRINT_GROUP(VMCPU_FF_,HM_TO_R3,_MASK);
2434 PRINT_GROUP(VMCPU_FF_,ALL_REM,_MASK);
2435 if (c)
2436 pHlp->pfnPrintf(pHlp, "\n");
2437 }
2438
2439#undef PRINT_FLAG
2440#undef PRINT_GROUP
2441}
2442
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