VirtualBox

source: vbox/trunk/src/VBox/VMM/include/CPUMInternal.mac@ 44418

Last change on this file since 44418 was 43657, checked in by vboxsync, 12 years ago

VMM: APIC refactor. Moved APIC base MSR to the VCPU (where it belongs) for lockless accesses.

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 15.4 KB
Line 
1; $Id: CPUMInternal.mac 43657 2012-10-16 15:34:05Z vboxsync $
2;; @file
3; CPUM - Internal header file (asm).
4;
5
6;
7; Copyright (C) 2006-2010 Oracle Corporation
8;
9; This file is part of VirtualBox Open Source Edition (OSE), as
10; available from http://www.virtualbox.org. This file is free software;
11; you can redistribute it and/or modify it under the terms of the GNU
12; General Public License (GPL) as published by the Free Software
13; Foundation, in version 2 as it comes in the "COPYING" file of the
14; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16;
17
18%include "VBox/asmdefs.mac"
19
20%define CPUM_USED_FPU RT_BIT(0)
21%define CPUM_USED_FPU_SINCE_REM RT_BIT(1)
22%define CPUM_USE_SYSENTER RT_BIT(2)
23%define CPUM_USE_SYSCALL RT_BIT(3)
24%define CPUM_USE_DEBUG_REGS_HOST RT_BIT(4)
25%define CPUM_USE_DEBUG_REGS RT_BIT(5)
26%define CPUM_SYNC_FPU_STATE RT_BIT(7)
27%define CPUM_SYNC_DEBUG_STATE RT_BIT(8)
28
29%define CPUM_HANDLER_DS 1
30%define CPUM_HANDLER_ES 2
31%define CPUM_HANDLER_FS 3
32%define CPUM_HANDLER_GS 4
33%define CPUM_HANDLER_IRET 5
34%define CPUM_HANDLER_TYPEMASK 0ffh
35%define CPUM_HANDLER_CTXCORE_IN_EBP RT_BIT(31)
36
37%define VMMGCRET_USED_FPU 040000000h
38
39%define FPUSTATE_SIZE 512
40
41;; if anyone figures how to do %if HC_ARCH_BITS == 64 || defined(VBOX_WITH_HYBRID_32BIT_KERNEL) in
42; nasm please tell / fix this hack.
43%ifdef VBOX_WITH_HYBRID_32BIT_KERNEL
44 %define fVBOX_WITH_HYBRID_32BIT_KERNEL 1
45%else
46 %define fVBOX_WITH_HYBRID_32BIT_KERNEL 0
47%endif
48
49struc CPUM
50 ;...
51 .offCPUMCPU0 resd 1
52 .fHostUseFlags resd 1
53
54 ; CPUID eax=1
55 .CPUFeatures.edx resd 1
56 .CPUFeatures.ecx resd 1
57
58 ; CPUID eax=0x80000001
59 .CPUFeaturesExt.edx resd 1
60 .CPUFeaturesExt.ecx resd 1
61
62 .enmHostCpuVendor resd 1
63 .enmGuestCpuVendor resd 1
64
65 ; CR4 masks
66 .CR4.AndMask resd 1
67 .CR4.OrMask resd 1
68 ; entered rawmode?
69 .fSyntheticCpu resb 1
70 .u8PortableCpuIdLevel resb 1
71 .fPendingRestore resb 1
72%if RTHCPTR_CB == 8
73 .abPadding resb 5
74%else
75 .abPadding resb 1
76%endif
77
78 ; CPUID leafs
79 .aGuestCpuIdStd resb 16*6
80 .aGuestCpuIdExt resb 16*10
81 .aGuestCpuIdCentaur resb 16*4
82 .aGuestCpuIdHyper resb 16*4
83 .GuestCpuIdDef resb 16
84
85%if HC_ARCH_BITS == 32
86 .abPadding2 resb 4
87%endif
88
89%ifdef VBOX_WITH_VMMR0_DISABLE_LAPIC_NMI
90 .pvApicBase RTR0PTR_RES 1
91 .fApicDisVectors resd 1
92 .abPadding3 resb 4
93%endif
94endstruc
95
96struc CPUMCPU
97 ;
98 ; Hypervisor Context.
99 ;
100 .Hyper.fpu resb 512
101 .Hyper.eax resq 1
102 .Hyper.ecx resq 1
103 .Hyper.edx resq 1
104 .Hyper.ebx resq 1
105 .Hyper.esp resq 1
106 .Hyper.ebp resq 1
107 .Hyper.esi resq 1
108 .Hyper.edi resq 1
109 .Hyper.r8 resq 1
110 .Hyper.r9 resq 1
111 .Hyper.r10 resq 1
112 .Hyper.r11 resq 1
113 .Hyper.r12 resq 1
114 .Hyper.r13 resq 1
115 .Hyper.r14 resq 1
116 .Hyper.r15 resq 1
117 .Hyper.es.Sel resw 1
118 .Hyper.es.PaddingSel resw 1
119 .Hyper.es.ValidSel resw 1
120 .Hyper.es.fFlags resw 1
121 .Hyper.es.u64Base resq 1
122 .Hyper.es.u32Limit resd 1
123 .Hyper.es.Attr resd 1
124 .Hyper.cs.Sel resw 1
125 .Hyper.cs.PaddingSel resw 1
126 .Hyper.cs.ValidSel resw 1
127 .Hyper.cs.fFlags resw 1
128 .Hyper.cs.u64Base resq 1
129 .Hyper.cs.u32Limit resd 1
130 .Hyper.cs.Attr resd 1
131 .Hyper.ss.Sel resw 1
132 .Hyper.ss.PaddingSel resw 1
133 .Hyper.ss.ValidSel resw 1
134 .Hyper.ss.fFlags resw 1
135 .Hyper.ss.u64Base resq 1
136 .Hyper.ss.u32Limit resd 1
137 .Hyper.ss.Attr resd 1
138 .Hyper.ds.Sel resw 1
139 .Hyper.ds.PaddingSel resw 1
140 .Hyper.ds.ValidSel resw 1
141 .Hyper.ds.fFlags resw 1
142 .Hyper.ds.u64Base resq 1
143 .Hyper.ds.u32Limit resd 1
144 .Hyper.ds.Attr resd 1
145 .Hyper.fs.Sel resw 1
146 .Hyper.fs.PaddingSel resw 1
147 .Hyper.fs.ValidSel resw 1
148 .Hyper.fs.fFlags resw 1
149 .Hyper.fs.u64Base resq 1
150 .Hyper.fs.u32Limit resd 1
151 .Hyper.fs.Attr resd 1
152 .Hyper.gs.Sel resw 1
153 .Hyper.gs.PaddingSel resw 1
154 .Hyper.gs.ValidSel resw 1
155 .Hyper.gs.fFlags resw 1
156 .Hyper.gs.u64Base resq 1
157 .Hyper.gs.u32Limit resd 1
158 .Hyper.gs.Attr resd 1
159 .Hyper.eip resq 1
160 .Hyper.eflags resq 1
161 .Hyper.cr0 resq 1
162 .Hyper.cr2 resq 1
163 .Hyper.cr3 resq 1
164 .Hyper.cr4 resq 1
165 .Hyper.dr resq 8
166 .Hyper.gdtrPadding resw 3
167 .Hyper.gdtr resw 0
168 .Hyper.gdtr.cbGdt resw 1
169 .Hyper.gdtr.pGdt resq 1
170 .Hyper.idtrPadding resw 3
171 .Hyper.idtr resw 0
172 .Hyper.idtr.cbIdt resw 1
173 .Hyper.idtr.pIdt resq 1
174 .Hyper.ldtr.Sel resw 1
175 .Hyper.ldtr.PaddingSel resw 1
176 .Hyper.ldtr.ValidSel resw 1
177 .Hyper.ldtr.fFlags resw 1
178 .Hyper.ldtr.u64Base resq 1
179 .Hyper.ldtr.u32Limit resd 1
180 .Hyper.ldtr.Attr resd 1
181 .Hyper.tr.Sel resw 1
182 .Hyper.tr.PaddingSel resw 1
183 .Hyper.tr.ValidSel resw 1
184 .Hyper.tr.fFlags resw 1
185 .Hyper.tr.u64Base resq 1
186 .Hyper.tr.u32Limit resd 1
187 .Hyper.tr.Attr resd 1
188 .Hyper.SysEnter.cs resb 8
189 .Hyper.SysEnter.eip resb 8
190 .Hyper.SysEnter.esp resb 8
191 .Hyper.msrEFER resb 8
192 .Hyper.msrSTAR resb 8
193 .Hyper.msrPAT resb 8
194 .Hyper.msrLSTAR resb 8
195 .Hyper.msrCSTAR resb 8
196 .Hyper.msrSFMASK resb 8
197 .Hyper.msrKERNELGSBASE resb 8
198 .Hyper.msrApicBase resb 8
199
200 ;
201 ; Host context state
202 ;
203 alignb 64
204 .Host.fpu resb FPUSTATE_SIZE
205
206%if HC_ARCH_BITS == 64 || fVBOX_WITH_HYBRID_32BIT_KERNEL
207 ;.Host.rax resq 1 - scratch
208 .Host.rbx resq 1
209 ;.Host.rcx resq 1 - scratch
210 ;.Host.rdx resq 1 - scratch
211 .Host.rdi resq 1
212 .Host.rsi resq 1
213 .Host.rbp resq 1
214 .Host.rsp resq 1
215 ;.Host.r8 resq 1 - scratch
216 ;.Host.r9 resq 1 - scratch
217 .Host.r10 resq 1
218 .Host.r11 resq 1
219 .Host.r12 resq 1
220 .Host.r13 resq 1
221 .Host.r14 resq 1
222 .Host.r15 resq 1
223 ;.Host.rip resd 1 - scratch
224 .Host.rflags resq 1
225%endif
226%if HC_ARCH_BITS == 32
227 ;.Host.eax resd 1 - scratch
228 .Host.ebx resd 1
229 ;.Host.edx resd 1 - scratch
230 ;.Host.ecx resd 1 - scratch
231 .Host.edi resd 1
232 .Host.esi resd 1
233 .Host.ebp resd 1
234 .Host.eflags resd 1
235 ;.Host.eip resd 1 - scratch
236 ; lss pair!
237 .Host.esp resd 1
238%endif
239 .Host.ss resw 1
240 .Host.ssPadding resw 1
241 .Host.gs resw 1
242 .Host.gsPadding resw 1
243 .Host.fs resw 1
244 .Host.fsPadding resw 1
245 .Host.es resw 1
246 .Host.esPadding resw 1
247 .Host.ds resw 1
248 .Host.dsPadding resw 1
249 .Host.cs resw 1
250 .Host.csPadding resw 1
251
252%if HC_ARCH_BITS == 32 && fVBOX_WITH_HYBRID_32BIT_KERNEL == 0
253 .Host.cr0 resd 1
254 ;.Host.cr2 resd 1 - scratch
255 .Host.cr3 resd 1
256 .Host.cr4 resd 1
257
258 .Host.dr0 resd 1
259 .Host.dr1 resd 1
260 .Host.dr2 resd 1
261 .Host.dr3 resd 1
262 .Host.dr6 resd 1
263 .Host.dr7 resd 1
264
265 .Host.gdtr resb 6 ; GDT limit + linear address
266 .Host.gdtrPadding resw 1
267 .Host.idtr resb 6 ; IDT limit + linear address
268 .Host.idtrPadding resw 1
269 .Host.ldtr resw 1
270 .Host.ldtrPadding resw 1
271 .Host.tr resw 1
272 .Host.trPadding resw 1
273
274 .Host.SysEnterPadding resd 1
275 .Host.SysEnter.cs resq 1
276 .Host.SysEnter.eip resq 1
277 .Host.SysEnter.esp resq 1
278 .Host.efer resq 1
279
280%else ; 64-bit
281
282 .Host.cr0 resq 1
283 ;.Host.cr2 resq 1 - scratch
284 .Host.cr3 resq 1
285 .Host.cr4 resq 1
286 .Host.cr8 resq 1
287
288 .Host.dr0 resq 1
289 .Host.dr1 resq 1
290 .Host.dr2 resq 1
291 .Host.dr3 resq 1
292 .Host.dr6 resq 1
293 .Host.dr7 resq 1
294
295 .Host.gdtr resb 10 ; GDT limit + linear address
296 .Host.gdtrPadding resw 1
297 .Host.idtr resb 10 ; IDT limit + linear address
298 .Host.idtrPadding resw 1
299 .Host.ldtr resw 1
300 .Host.ldtrPadding resw 1
301 .Host.tr resw 1
302 .Host.trPadding resw 1
303
304 .Host.SysEnter.cs resq 1
305 .Host.SysEnter.eip resq 1
306 .Host.SysEnter.esp resq 1
307 .Host.FSbase resq 1
308 .Host.GSbase resq 1
309 .Host.efer resq 1
310%endif ; 64-bit
311
312%ifdef VBOX_WITH_CRASHDUMP_MAGIC
313 .aMagic resb 56
314 .uMagic resq 1
315%endif
316 ;
317 ; Guest context state
318 ; (Identical to the .Hyper chunk above.)
319 ;
320 alignb 64
321 .Guest.fpu resb 512
322 .Guest.eax resq 1
323 .Guest.ecx resq 1
324 .Guest.edx resq 1
325 .Guest.ebx resq 1
326 .Guest.esp resq 1
327 .Guest.ebp resq 1
328 .Guest.esi resq 1
329 .Guest.edi resq 1
330 .Guest.r8 resq 1
331 .Guest.r9 resq 1
332 .Guest.r10 resq 1
333 .Guest.r11 resq 1
334 .Guest.r12 resq 1
335 .Guest.r13 resq 1
336 .Guest.r14 resq 1
337 .Guest.r15 resq 1
338 .Guest.es.Sel resw 1
339 .Guest.es.PaddingSel resw 1
340 .Guest.es.ValidSel resw 1
341 .Guest.es.fFlags resw 1
342 .Guest.es.u64Base resq 1
343 .Guest.es.u32Limit resd 1
344 .Guest.es.Attr resd 1
345 .Guest.cs.Sel resw 1
346 .Guest.cs.PaddingSel resw 1
347 .Guest.cs.ValidSel resw 1
348 .Guest.cs.fFlags resw 1
349 .Guest.cs.u64Base resq 1
350 .Guest.cs.u32Limit resd 1
351 .Guest.cs.Attr resd 1
352 .Guest.ss.Sel resw 1
353 .Guest.ss.PaddingSel resw 1
354 .Guest.ss.ValidSel resw 1
355 .Guest.ss.fFlags resw 1
356 .Guest.ss.u64Base resq 1
357 .Guest.ss.u32Limit resd 1
358 .Guest.ss.Attr resd 1
359 .Guest.ds.Sel resw 1
360 .Guest.ds.PaddingSel resw 1
361 .Guest.ds.ValidSel resw 1
362 .Guest.ds.fFlags resw 1
363 .Guest.ds.u64Base resq 1
364 .Guest.ds.u32Limit resd 1
365 .Guest.ds.Attr resd 1
366 .Guest.fs.Sel resw 1
367 .Guest.fs.PaddingSel resw 1
368 .Guest.fs.ValidSel resw 1
369 .Guest.fs.fFlags resw 1
370 .Guest.fs.u64Base resq 1
371 .Guest.fs.u32Limit resd 1
372 .Guest.fs.Attr resd 1
373 .Guest.gs.Sel resw 1
374 .Guest.gs.PaddingSel resw 1
375 .Guest.gs.ValidSel resw 1
376 .Guest.gs.fFlags resw 1
377 .Guest.gs.u64Base resq 1
378 .Guest.gs.u32Limit resd 1
379 .Guest.gs.Attr resd 1
380 .Guest.eip resq 1
381 .Guest.eflags resq 1
382 .Guest.cr0 resq 1
383 .Guest.cr2 resq 1
384 .Guest.cr3 resq 1
385 .Guest.cr4 resq 1
386 .Guest.dr resq 8
387 .Guest.gdtrPadding resw 3
388 .Guest.gdtr resw 0
389 .Guest.gdtr.cbGdt resw 1
390 .Guest.gdtr.pGdt resq 1
391 .Guest.idtrPadding resw 3
392 .Guest.idtr resw 0
393 .Guest.idtr.cbIdt resw 1
394 .Guest.idtr.pIdt resq 1
395 .Guest.ldtr.Sel resw 1
396 .Guest.ldtr.PaddingSel resw 1
397 .Guest.ldtr.ValidSel resw 1
398 .Guest.ldtr.fFlags resw 1
399 .Guest.ldtr.u64Base resq 1
400 .Guest.ldtr.u32Limit resd 1
401 .Guest.ldtr.Attr resd 1
402 .Guest.tr.Sel resw 1
403 .Guest.tr.PaddingSel resw 1
404 .Guest.tr.ValidSel resw 1
405 .Guest.tr.fFlags resw 1
406 .Guest.tr.u64Base resq 1
407 .Guest.tr.u32Limit resd 1
408 .Guest.tr.Attr resd 1
409 .Guest.SysEnter.cs resb 8
410 .Guest.SysEnter.eip resb 8
411 .Guest.SysEnter.esp resb 8
412 .Guest.msrEFER resb 8
413 .Guest.msrSTAR resb 8
414 .Guest.msrPAT resb 8
415 .Guest.msrLSTAR resb 8
416 .Guest.msrCSTAR resb 8
417 .Guest.msrSFMASK resb 8
418 .Guest.msrKERNELGSBASE resb 8
419 .Guest.msrApicBase resb 8
420
421
422 alignb 64
423 .GuestMsrs.au64 resq 64
424
425 ;
426 ; Other stuff.
427 ;
428 .fUseFlags resd 1
429 .fChanged resd 1
430 .offCPUM resd 1
431 .u32RetCode resd 1
432 .fRawEntered resb 1
433 .fRemEntered resb 1
434 .abPadding2 resb (64 - 16 - 2)
435endstruc
436
437
438;;
439; Converts the CPUM pointer to CPUMCPU
440; @param %1 register name
441%macro CPUMCPU_FROM_CPUM 1
442 add %1, dword [%1 + CPUM.offCPUMCPU0]
443%endmacro
444
445;;
446; Converts the CPUM pointer to CPUMCPU
447; @param %1 register name (PVM)
448; @param %2 register name (CPUMCPU offset)
449%macro CPUMCPU_FROM_CPUM_WITH_OFFSET 2
450 add %1, %2
451%endmacro
452
453;;
454; Converts the CPUMCPU pointer to CPUM
455; @param %1 register name
456%macro CPUM_FROM_CPUMCPU 1
457 sub %1, dword [%1 + CPUMCPU.offCPUM]
458%endmacro
459
460;;
461; Converts the CPUMCPU pointer to CPUM
462; @param %1 register name (PVM)
463; @param %2 register name (CPUMCPU offset)
464%macro CPUM_FROM_CPUMCPU_WITH_OFFSET 2
465 sub %1, %2
466%endmacro
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette