Changeset 102876 in vbox
- Timestamp:
- Jan 15, 2024 2:26:27 PM (12 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 13 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r102867 r102876 4639 4639 * Clear RF and finish the instruction (maybe raise #DB). 4640 4640 */ 4641 return iemRegFinishClearingRF(pVCpu );4641 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 4642 4642 } 4643 4643 … … 4673 4673 * Clear RF and finish the instruction (maybe raise #DB). 4674 4674 */ 4675 return iemRegFinishClearingRF(pVCpu );4675 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 4676 4676 } 4677 4677 … … 4721 4721 * Clear RF and finish the instruction (maybe raise #DB). 4722 4722 */ 4723 return iemRegFinishClearingRF(pVCpu );4723 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 4724 4724 } 4725 4725 -
trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp
r102785 r102876 933 933 pVCpu->cpum.GstCtx.rip = uNewPC; 934 934 IEM_FLUSH_PREFETCH_LIGHT(pVCpu, cbInstr); 935 return iemRegFinishClearingRF(pVCpu );935 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 936 936 } 937 937 return rcStrict; … … 957 957 pVCpu->cpum.GstCtx.rip = uNewPC; 958 958 IEM_FLUSH_PREFETCH_LIGHT(pVCpu, cbInstr); 959 return iemRegFinishClearingRF(pVCpu );959 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 960 960 } 961 961 return rcStrict; … … 981 981 pVCpu->cpum.GstCtx.rip = uNewPC; 982 982 IEM_FLUSH_PREFETCH_LIGHT(pVCpu, cbInstr); 983 return iemRegFinishClearingRF(pVCpu );983 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 984 984 } 985 985 return rcStrict; … … 1005 1005 pVCpu->cpum.GstCtx.rip = uNewPC; 1006 1006 IEM_FLUSH_PREFETCH_LIGHT(pVCpu, cbInstr); 1007 return iemRegFinishClearingRF(pVCpu );1007 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 1008 1008 } 1009 1009 return rcStrict; … … 1029 1029 pVCpu->cpum.GstCtx.rip = uNewPC; 1030 1030 IEM_FLUSH_PREFETCH_LIGHT(pVCpu, cbInstr); 1031 return iemRegFinishClearingRF(pVCpu );1031 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 1032 1032 } 1033 1033 return rcStrict; … … 1053 1053 pVCpu->cpum.GstCtx.rip = uNewPC; 1054 1054 IEM_FLUSH_PREFETCH_LIGHT(pVCpu, cbInstr); 1055 return iemRegFinishClearingRF(pVCpu );1055 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 1056 1056 } 1057 1057 return rcStrict; … … 1967 1967 | iemCalc32BitFlatIndicator(pVCpu); 1968 1968 1969 return iemRegFinishClearingRF(pVCpu );1969 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 1970 1970 } 1971 1971 … … 2092 2092 IEM_FLUSH_PREFETCH_HEAVY(pVCpu, cbInstr); 2093 2093 2094 return iemRegFinishClearingRF(pVCpu );2094 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2095 2095 } 2096 2096 … … 2156 2156 pVCpu->cpum.GstCtx.cs.u64Base = (uint32_t)uSel << 4; 2157 2157 2158 return iemRegFinishClearingRF(pVCpu );2158 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2159 2159 } 2160 2160 … … 2318 2318 IEM_FLUSH_PREFETCH_HEAVY(pVCpu, cbInstr); 2319 2319 2320 return iemRegFinishClearingRF(pVCpu );2320 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2321 2321 } 2322 2322 … … 2395 2395 pVCpu->cpum.GstCtx.cs.fFlags = CPUMSELREG_FLAGS_VALID; 2396 2396 pVCpu->cpum.GstCtx.cs.u64Base = (uint32_t)uNewCs << 4; 2397 return iemRegFinishClearingRF(pVCpu );2397 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2398 2398 } 2399 2399 … … 2736 2736 IEM_FLUSH_PREFETCH_HEAVY(pVCpu, cbInstr); /** @todo use light flush for same privilege? */ 2737 2737 2738 return iemRegFinishClearingRF(pVCpu );2738 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2739 2739 } 2740 2740 … … 2819 2819 RT_NOREF(cbInstr); 2820 2820 2821 return iemRegFinishClearingRF(pVCpu );2821 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2822 2822 } 2823 2823 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstOneByte.cpp.h
r102719 r102876 12444 12444 IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_64BIT, 0); 12445 12445 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12446 IEM_MC_ SUB_GREG_U16(X86_GREG_xCX, 1);12447 IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {12446 IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) { 12447 IEM_MC_SUB_GREG_U16(X86_GREG_xCX, 1); 12448 12448 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12449 12449 } IEM_MC_ELSE() { 12450 IEM_MC_SUB_GREG_U16(X86_GREG_xCX, 1); 12450 12451 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12451 12452 } IEM_MC_ENDIF(); … … 12456 12457 IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0); 12457 12458 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12458 IEM_MC_ SUB_GREG_U32(X86_GREG_xCX, 1);12459 IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {12459 IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) { 12460 IEM_MC_SUB_GREG_U32(X86_GREG_xCX, 1); 12460 12461 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12461 12462 } IEM_MC_ELSE() { 12463 IEM_MC_SUB_GREG_U32(X86_GREG_xCX, 1); 12462 12464 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12463 12465 } IEM_MC_ENDIF(); … … 12468 12470 IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0); 12469 12471 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12470 IEM_MC_ SUB_GREG_U64(X86_GREG_xCX, 1);12471 IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) {12472 IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(X86_EFL_ZF) { 12473 IEM_MC_SUB_GREG_U64(X86_GREG_xCX, 1); 12472 12474 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12473 12475 } IEM_MC_ELSE() { 12476 IEM_MC_SUB_GREG_U64(X86_GREG_xCX, 1); 12474 12477 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12475 12478 } IEM_MC_ENDIF(); … … 12496 12499 IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_64BIT, 0); 12497 12500 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12498 IEM_MC_ SUB_GREG_U16(X86_GREG_xCX, 1);12499 IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_SET(X86_EFL_ZF) {12501 IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(X86_EFL_ZF) { 12502 IEM_MC_SUB_GREG_U16(X86_GREG_xCX, 1); 12500 12503 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12501 12504 } IEM_MC_ELSE() { 12505 IEM_MC_SUB_GREG_U16(X86_GREG_xCX, 1); 12502 12506 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12503 12507 } IEM_MC_ENDIF(); … … 12508 12512 IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0); 12509 12513 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12510 IEM_MC_ SUB_GREG_U32(X86_GREG_xCX, 1);12511 IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_SET(X86_EFL_ZF) {12514 IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(X86_EFL_ZF) { 12515 IEM_MC_SUB_GREG_U32(X86_GREG_xCX, 1); 12512 12516 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12513 12517 } IEM_MC_ELSE() { 12518 IEM_MC_SUB_GREG_U32(X86_GREG_xCX, 1); 12514 12519 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12515 12520 } IEM_MC_ENDIF(); … … 12520 12525 IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0); 12521 12526 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12522 IEM_MC_ SUB_GREG_U64(X86_GREG_xCX, 1);12523 IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_SET(X86_EFL_ZF) {12527 IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(X86_EFL_ZF) { 12528 IEM_MC_SUB_GREG_U64(X86_GREG_xCX, 1); 12524 12529 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12525 12530 } IEM_MC_ELSE() { 12531 IEM_MC_SUB_GREG_U64(X86_GREG_xCX, 1); 12526 12532 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12527 12533 } IEM_MC_ENDIF(); … … 12588 12594 IEM_MC_BEGIN(0, 0, IEM_MC_F_NOT_64BIT, 0); 12589 12595 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12590 IEM_MC_ SUB_GREG_U16(X86_GREG_xCX, 1);12591 IEM_MC_IF_CX_IS_NZ() {12596 IEM_MC_IF_CX_IS_NOT_ONE() { 12597 IEM_MC_SUB_GREG_U16(X86_GREG_xCX, 1); 12592 12598 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12593 12599 } IEM_MC_ELSE() { 12600 IEM_MC_STORE_GREG_U16_CONST(X86_GREG_xCX, 0); 12594 12601 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12595 12602 } IEM_MC_ENDIF(); … … 12600 12607 IEM_MC_BEGIN(0, 0, IEM_MC_F_MIN_386, 0); 12601 12608 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12602 IEM_MC_ SUB_GREG_U32(X86_GREG_xCX, 1);12603 IEM_MC_IF_ECX_IS_NZ() {12609 IEM_MC_IF_ECX_IS_NOT_ONE() { 12610 IEM_MC_SUB_GREG_U32(X86_GREG_xCX, 1); 12604 12611 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12605 12612 } IEM_MC_ELSE() { 12613 IEM_MC_STORE_GREG_U32_CONST(X86_GREG_xCX, 0); 12606 12614 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12607 12615 } IEM_MC_ENDIF(); … … 12612 12620 IEM_MC_BEGIN(0, 0, IEM_MC_F_64BIT, 0); 12613 12621 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12614 IEM_MC_ SUB_GREG_U64(X86_GREG_xCX, 1);12615 IEM_MC_IF_RCX_IS_NZ() {12622 IEM_MC_IF_RCX_IS_NOT_ONE() { 12623 IEM_MC_SUB_GREG_U64(X86_GREG_xCX, 1); 12616 12624 IEM_MC_REL_JMP_S8_AND_FINISH(i8Imm); 12617 12625 } IEM_MC_ELSE() { 12626 IEM_MC_STORE_GREG_U64_CONST(X86_GREG_xCX, 0); 12618 12627 IEM_MC_ADVANCE_RIP_AND_FINISH(); 12619 12628 } IEM_MC_ENDIF(); -
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r102584 r102876 1825 1825 def __init__(self, sName, asParams, aoIfBranch = None, aoElseBranch = None): 1826 1826 McStmt.__init__(self, sName, asParams); 1827 self.aoIfBranch = [] if aoIfBranch is None else list(aoIfBranch); 1828 self.aoElseBranch = [] if aoElseBranch is None else list(aoElseBranch); 1827 self.aoIfBranch = [] if aoIfBranch is None else list(aoIfBranch); 1828 self.aoElseBranch = [] if aoElseBranch is None else list(aoElseBranch); 1829 self.oIfBranchAnnotation = None; ##< User specific IF-branch annotation. 1830 self.oElseBranchAnnotation = None; ##< User specific IF-branch annotation. 1829 1831 1830 1832 def renderCode(self, cchIndent = 0): … … 2776 2778 # 2777 2779 # The info columns: 2778 # - col 0: boolean entry indicating whether the statement modifies state and 2779 # must not be used before IEMOP_HL_DONE_*. 2780 # - col 1: boolean entry indicating native recompiler support. 2780 # - col 1+0: boolean entry indicating whether the statement modifies state and 2781 # must not be used before IEMOP_HL_DONE_*. 2782 # - col 1+1: boolean entry indicating similar to the previous column but is 2783 # used to decide when to emit calls for conditional jumps (Jmp/NoJmp). 2784 # The difference is that most IEM_MC_IF_XXX entries are False here. 2785 # - col 1+2: boolean entry indicating native recompiler support. 2781 2786 # 2782 2787 # The raw table was generated via the following command … … 2784 2789 # | sort | uniq | gawk "{printf """ %%-60s (%%s, True)\n""", $1, $2}" 2785 2790 g_dMcStmtParsers = { 2786 'IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE': (McBlock.parseMcGeneric, False, True, ), 2787 'IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ': (McBlock.parseMcGeneric, False, True, ), 2788 'IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE': (McBlock.parseMcGeneric, False, True, ), 2789 'IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ': (McBlock.parseMcGeneric, False, True, ), 2790 'IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE': (McBlock.parseMcGeneric, False, True, ), 2791 'IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ': (McBlock.parseMcGeneric, False, True, ), 2792 'IEM_MC_ADD_GREG_U16': (McBlock.parseMcGeneric, True, True, ), 2793 'IEM_MC_ADD_GREG_U16_TO_LOCAL': (McBlock.parseMcGeneric, False, False, ), 2794 'IEM_MC_ADD_GREG_U32': (McBlock.parseMcGeneric, True, True, ), 2795 'IEM_MC_ADD_GREG_U32_TO_LOCAL': (McBlock.parseMcGeneric, False, False, ), 2796 'IEM_MC_ADD_GREG_U64': (McBlock.parseMcGeneric, True, True, ), 2797 'IEM_MC_ADD_GREG_U64_TO_LOCAL': (McBlock.parseMcGeneric, False, False, ), 2798 'IEM_MC_ADD_GREG_U8_TO_LOCAL': (McBlock.parseMcGeneric, False, False, ), 2799 'IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR': (McBlock.parseMcGeneric, True, False, ), 2800 'IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR': (McBlock.parseMcGeneric, True, False, ), 2801 'IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR': (McBlock.parseMcGeneric, True, False, ), 2802 'IEM_MC_ADVANCE_RIP_AND_FINISH': (McBlock.parseMcGeneric, True, True, ), 2803 'IEM_MC_AND_2LOCS_U32': (McBlock.parseMcGeneric, False, False, ), 2804 'IEM_MC_AND_ARG_U16': (McBlock.parseMcGeneric, False, False, ), 2805 'IEM_MC_AND_ARG_U32': (McBlock.parseMcGeneric, False, False, ), 2806 'IEM_MC_AND_ARG_U64': (McBlock.parseMcGeneric, False, False, ), 2807 'IEM_MC_AND_GREG_U16': (McBlock.parseMcGeneric, True, False, ), 2808 'IEM_MC_AND_GREG_U32': (McBlock.parseMcGeneric, True, False, ), 2809 'IEM_MC_AND_GREG_U64': (McBlock.parseMcGeneric, True, False, ), 2810 'IEM_MC_AND_GREG_U8': (McBlock.parseMcGeneric, True, False, ), 2811 'IEM_MC_AND_LOCAL_U16': (McBlock.parseMcGeneric, False, False, ), 2812 'IEM_MC_AND_LOCAL_U32': (McBlock.parseMcGeneric, False, False, ), 2813 'IEM_MC_AND_LOCAL_U64': (McBlock.parseMcGeneric, False, False, ), 2814 'IEM_MC_AND_LOCAL_U8': (McBlock.parseMcGeneric, False, False, ), 2815 'IEM_MC_ARG': (McBlock.parseMcArg, False, True, ), 2816 'IEM_MC_ARG_CONST': (McBlock.parseMcArgConst, False, True, ), 2817 'IEM_MC_ARG_LOCAL_EFLAGS': (McBlock.parseMcArgLocalEFlags, False, True, ), 2818 'IEM_MC_ARG_LOCAL_REF': (McBlock.parseMcArgLocalRef, False, True, ), 2819 'IEM_MC_ASSIGN_TO_SMALLER': (McBlock.parseMcGeneric, False, True, ), 2820 'IEM_MC_BEGIN': (McBlock.parseMcBegin, False, True, ), 2821 'IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2822 'IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2823 'IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2824 'IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2825 'IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2826 'IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2827 'IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2828 'IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2829 'IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2830 'IEM_MC_BSWAP_LOCAL_U16': (McBlock.parseMcGeneric, False, False, ), 2831 'IEM_MC_BSWAP_LOCAL_U32': (McBlock.parseMcGeneric, False, False, ), 2832 'IEM_MC_BSWAP_LOCAL_U64': (McBlock.parseMcGeneric, False, False, ), 2833 'IEM_MC_CALC_RM_EFF_ADDR': (McBlock.parseMcGeneric, False, False, ), 2834 'IEM_MC_CALL_AIMPL_3': (McBlock.parseMcCallAImpl, True, True, ), 2835 'IEM_MC_CALL_AIMPL_4': (McBlock.parseMcCallAImpl, True, True, ), 2836 'IEM_MC_CALL_AVX_AIMPL_2': (McBlock.parseMcCallAvxAImpl, True, False, ), 2837 'IEM_MC_CALL_AVX_AIMPL_3': (McBlock.parseMcCallAvxAImpl, True, False, ), 2838 'IEM_MC_CALL_CIMPL_0': (McBlock.parseMcCallCImpl, True, False, ), 2839 'IEM_MC_CALL_CIMPL_1': (McBlock.parseMcCallCImpl, True, False, ), 2840 'IEM_MC_CALL_CIMPL_2': (McBlock.parseMcCallCImpl, True, False, ), 2841 'IEM_MC_CALL_CIMPL_3': (McBlock.parseMcCallCImpl, True, False, ), 2842 'IEM_MC_CALL_CIMPL_4': (McBlock.parseMcCallCImpl, True, False, ), 2843 'IEM_MC_CALL_CIMPL_5': (McBlock.parseMcCallCImpl, True, False, ), 2844 'IEM_MC_CALL_FPU_AIMPL_1': (McBlock.parseMcCallFpuAImpl, True, False, ), 2845 'IEM_MC_CALL_FPU_AIMPL_2': (McBlock.parseMcCallFpuAImpl, True, False, ), 2846 'IEM_MC_CALL_FPU_AIMPL_3': (McBlock.parseMcCallFpuAImpl, True, False, ), 2847 'IEM_MC_CALL_MMX_AIMPL_2': (McBlock.parseMcCallMmxAImpl, True, False, ), 2848 'IEM_MC_CALL_MMX_AIMPL_3': (McBlock.parseMcCallMmxAImpl, True, False, ), 2849 'IEM_MC_CALL_SSE_AIMPL_2': (McBlock.parseMcCallSseAImpl, True, False, ), 2850 'IEM_MC_CALL_SSE_AIMPL_3': (McBlock.parseMcCallSseAImpl, True, False, ), 2851 'IEM_MC_CALL_VOID_AIMPL_0': (McBlock.parseMcCallVoidAImpl, True, True, ), 2852 'IEM_MC_CALL_VOID_AIMPL_1': (McBlock.parseMcCallVoidAImpl, True, True, ), 2853 'IEM_MC_CALL_VOID_AIMPL_2': (McBlock.parseMcCallVoidAImpl, True, True, ), 2854 'IEM_MC_CALL_VOID_AIMPL_3': (McBlock.parseMcCallVoidAImpl, True, True, ), 2855 'IEM_MC_CALL_VOID_AIMPL_4': (McBlock.parseMcCallVoidAImpl, True, True, ), 2856 'IEM_MC_CLEAR_EFL_BIT': (McBlock.parseMcGeneric, True, False, ), 2857 'IEM_MC_CLEAR_FSW_EX': (McBlock.parseMcGeneric, True, False, ), 2858 'IEM_MC_CLEAR_HIGH_GREG_U64': (McBlock.parseMcGeneric, True, True, ), 2859 'IEM_MC_CLEAR_XREG_U32_MASK': (McBlock.parseMcGeneric, True, False, ), 2860 'IEM_MC_CLEAR_YREG_128_UP': (McBlock.parseMcGeneric, True, False, ), 2861 'IEM_MC_COMMIT_EFLAGS': (McBlock.parseMcGeneric, True, True, ), 2862 'IEM_MC_COPY_XREG_U128': (McBlock.parseMcGeneric, True, False, ), 2863 'IEM_MC_COPY_YREG_U128_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2864 'IEM_MC_COPY_YREG_U256_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2865 'IEM_MC_COPY_YREG_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 2866 'IEM_MC_DEFER_TO_CIMPL_0_RET': (McBlock.parseMcDeferToCImpl, False, False, ), 2867 'IEM_MC_DEFER_TO_CIMPL_1_RET': (McBlock.parseMcDeferToCImpl, False, False, ), 2868 'IEM_MC_DEFER_TO_CIMPL_2_RET': (McBlock.parseMcDeferToCImpl, False, False, ), 2869 'IEM_MC_DEFER_TO_CIMPL_3_RET': (McBlock.parseMcDeferToCImpl, False, False, ), 2870 'IEM_MC_END': (McBlock.parseMcGeneric, True, True, ), 2871 'IEM_MC_FETCH_EFLAGS': (McBlock.parseMcGeneric, False, True, ), 2872 'IEM_MC_FETCH_EFLAGS_U8': (McBlock.parseMcGeneric, False, False, ), 2873 'IEM_MC_FETCH_FCW': (McBlock.parseMcGeneric, False, False, ), 2874 'IEM_MC_FETCH_FSW': (McBlock.parseMcGeneric, False, False, ), 2875 'IEM_MC_FETCH_GREG_U16': (McBlock.parseMcGeneric, False, True, ), 2876 'IEM_MC_FETCH_GREG_U16_SX_U32': (McBlock.parseMcGeneric, False, True, ), 2877 'IEM_MC_FETCH_GREG_U16_SX_U64': (McBlock.parseMcGeneric, False, True, ), 2878 'IEM_MC_FETCH_GREG_U16_ZX_U32': (McBlock.parseMcGeneric, False, True, ), 2879 'IEM_MC_FETCH_GREG_U16_ZX_U64': (McBlock.parseMcGeneric, False, True, ), 2880 'IEM_MC_FETCH_GREG_U32': (McBlock.parseMcGeneric, False, True, ), 2881 'IEM_MC_FETCH_GREG_U32_SX_U64': (McBlock.parseMcGeneric, False, True, ), 2882 'IEM_MC_FETCH_GREG_U32_ZX_U64': (McBlock.parseMcGeneric, False, True, ), 2883 'IEM_MC_FETCH_GREG_U64': (McBlock.parseMcGeneric, False, True, ), 2884 'IEM_MC_FETCH_GREG_U64_ZX_U64': (McBlock.parseMcGeneric, False, True, ), 2885 'IEM_MC_FETCH_GREG_U8': (McBlock.parseMcGeneric, False, True, ), # thrd var 2886 'IEM_MC_FETCH_GREG_U8_SX_U16': (McBlock.parseMcGeneric, False, True, ), # thrd var 2887 'IEM_MC_FETCH_GREG_U8_SX_U32': (McBlock.parseMcGeneric, False, True, ), # thrd var 2888 'IEM_MC_FETCH_GREG_U8_SX_U64': (McBlock.parseMcGeneric, False, True, ), # thrd var 2889 'IEM_MC_FETCH_GREG_U8_ZX_U16': (McBlock.parseMcGeneric, False, True, ), # thrd var 2890 'IEM_MC_FETCH_GREG_U8_ZX_U32': (McBlock.parseMcGeneric, False, True, ), # thrd var 2891 'IEM_MC_FETCH_GREG_U8_ZX_U64': (McBlock.parseMcGeneric, False, True, ), # thrd var 2892 'IEM_MC_FETCH_GREG_PAIR_U32': (McBlock.parseMcGeneric, False, False, ), 2893 'IEM_MC_FETCH_GREG_PAIR_U64': (McBlock.parseMcGeneric, False, False, ), 2894 'IEM_MC_FETCH_MEM_D80': (McBlock.parseMcGeneric, True, False, ), 2895 'IEM_MC_FETCH_MEM_I16': (McBlock.parseMcGeneric, True, False, ), 2896 'IEM_MC_FETCH_MEM_I32': (McBlock.parseMcGeneric, True, False, ), 2897 'IEM_MC_FETCH_MEM_I64': (McBlock.parseMcGeneric, True, False, ), 2898 'IEM_MC_FETCH_MEM_R32': (McBlock.parseMcGeneric, True, False, ), 2899 'IEM_MC_FETCH_MEM_R64': (McBlock.parseMcGeneric, True, False, ), 2900 'IEM_MC_FETCH_MEM_R80': (McBlock.parseMcGeneric, True, False, ), 2901 'IEM_MC_FETCH_MEM_U128': (McBlock.parseMcGeneric, True, False, ), 2902 'IEM_MC_FETCH_MEM_U128_ALIGN_SSE': (McBlock.parseMcGeneric, True, False, ), 2903 'IEM_MC_FETCH_MEM_U128_NO_AC': (McBlock.parseMcGeneric, True, False, ), 2904 'IEM_MC_FETCH_MEM_U128_AND_XREG_U128': (McBlock.parseMcGeneric, True, False, ), 2905 'IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_RAX_RDX_U64': (McBlock.parseMcGeneric, True, False, ), 2906 'IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64':(McBlock.parseMcGeneric, True, False, ), 2907 'IEM_MC_FETCH_MEM_U16': (McBlock.parseMcGeneric, True, True, ), 2908 'IEM_MC_FETCH_MEM_U16_DISP': (McBlock.parseMcGeneric, True, True, ), 2909 'IEM_MC_FETCH_MEM_U16_SX_U32': (McBlock.parseMcGeneric, True, True, ), # movsx 2910 'IEM_MC_FETCH_MEM_U16_SX_U64': (McBlock.parseMcGeneric, True, True, ), # movsx 2911 'IEM_MC_FETCH_MEM_U16_ZX_U32': (McBlock.parseMcGeneric, True, True, ), # movzx 2912 'IEM_MC_FETCH_MEM_U16_ZX_U64': (McBlock.parseMcGeneric, True, True, ), # movzx 2913 'IEM_MC_FETCH_MEM_U256': (McBlock.parseMcGeneric, True, False, ), 2914 'IEM_MC_FETCH_MEM_U256_ALIGN_AVX': (McBlock.parseMcGeneric, True, False, ), 2915 'IEM_MC_FETCH_MEM_U256_NO_AC': (McBlock.parseMcGeneric, True, False, ), 2916 'IEM_MC_FETCH_MEM_U32': (McBlock.parseMcGeneric, True, True, ), 2917 'IEM_MC_FETCH_MEM_U32_DISP': (McBlock.parseMcGeneric, True, True, ), #bounds only 2918 'IEM_MC_FETCH_MEM_U32_SX_U64': (McBlock.parseMcGeneric, True, True, ), # movsx 2919 'IEM_MC_FETCH_MEM_U32_ZX_U64': (McBlock.parseMcGeneric, True, True, ), # movzx 2920 'IEM_MC_FETCH_MEM_U64': (McBlock.parseMcGeneric, True, True, ), 2921 'IEM_MC_FETCH_MEM_U64_ALIGN_U128': (McBlock.parseMcGeneric, True, False, ), 2922 'IEM_MC_FETCH_MEM_U8': (McBlock.parseMcGeneric, True, True, ), 2923 'IEM_MC_FETCH_MEM_U8_SX_U16': (McBlock.parseMcGeneric, True, True, ), # movsx 2924 'IEM_MC_FETCH_MEM_U8_SX_U32': (McBlock.parseMcGeneric, True, True, ), # movsx 2925 'IEM_MC_FETCH_MEM_U8_SX_U64': (McBlock.parseMcGeneric, True, True, ), # movsx 2926 'IEM_MC_FETCH_MEM_U8_ZX_U16': (McBlock.parseMcGeneric, True, True, ), # movzx 2927 'IEM_MC_FETCH_MEM_U8_ZX_U32': (McBlock.parseMcGeneric, True, True, ), # movzx 2928 'IEM_MC_FETCH_MEM_U8_ZX_U64': (McBlock.parseMcGeneric, True, True, ), # movzx 2929 'IEM_MC_FETCH_MEM_XMM': (McBlock.parseMcGeneric, True, False, ), 2930 'IEM_MC_FETCH_MEM_XMM_ALIGN_SSE': (McBlock.parseMcGeneric, True, False, ), 2931 'IEM_MC_FETCH_MEM_XMM_NO_AC': (McBlock.parseMcGeneric, True, False, ), 2932 'IEM_MC_FETCH_MEM_XMM_U32': (McBlock.parseMcGeneric, True, False, ), 2933 'IEM_MC_FETCH_MEM_XMM_U64': (McBlock.parseMcGeneric, True, False, ), 2934 'IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM': (McBlock.parseMcGeneric, True, False, ), 2935 'IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM': (McBlock.parseMcGeneric, True, False, ), 2936 'IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM': (McBlock.parseMcGeneric, True, False, ), 2937 'IEM_MC_FETCH_MEM_YMM': (McBlock.parseMcGeneric, True, False, ), 2938 'IEM_MC_FETCH_MEM_YMM_ALIGN_AVX': (McBlock.parseMcGeneric, True, False, ), 2939 'IEM_MC_FETCH_MEM_YMM_NO_AC': (McBlock.parseMcGeneric, True, False, ), 2940 'IEM_MC_FETCH_MEM16_U8': (McBlock.parseMcGeneric, True, False, ), 2941 'IEM_MC_FETCH_MEM32_U8': (McBlock.parseMcGeneric, True, False, ), 2942 'IEM_MC_FETCH_MREG_U32': (McBlock.parseMcGeneric, False, False, ), 2943 'IEM_MC_FETCH_MREG_U64': (McBlock.parseMcGeneric, False, False, ), 2944 'IEM_MC_FETCH_SREG_BASE_U32': (McBlock.parseMcGeneric, False, False, ), 2945 'IEM_MC_FETCH_SREG_BASE_U64': (McBlock.parseMcGeneric, False, False, ), 2946 'IEM_MC_FETCH_SREG_U16': (McBlock.parseMcGeneric, False, True, ), 2947 'IEM_MC_FETCH_SREG_ZX_U32': (McBlock.parseMcGeneric, False, True, ), 2948 'IEM_MC_FETCH_SREG_ZX_U64': (McBlock.parseMcGeneric, False, True, ), 2949 'IEM_MC_FETCH_XREG_U128': (McBlock.parseMcGeneric, False, False, ), 2950 'IEM_MC_FETCH_XREG_U16': (McBlock.parseMcGeneric, False, False, ), 2951 'IEM_MC_FETCH_XREG_U32': (McBlock.parseMcGeneric, False, False, ), 2952 'IEM_MC_FETCH_XREG_U64': (McBlock.parseMcGeneric, False, False, ), 2953 'IEM_MC_FETCH_XREG_U8': (McBlock.parseMcGeneric, False, False, ), 2954 'IEM_MC_FETCH_XREG_XMM': (McBlock.parseMcGeneric, False, False, ), 2955 'IEM_MC_FETCH_XREG_PAIR_U128': (McBlock.parseMcGeneric, False, False, ), 2956 'IEM_MC_FETCH_XREG_PAIR_U128_AND_RAX_RDX_U64': (McBlock.parseMcGeneric, False, False, ), 2957 'IEM_MC_FETCH_XREG_PAIR_U128_AND_EAX_EDX_U32_SX_U64': (McBlock.parseMcGeneric, False, False, ), 2958 'IEM_MC_FETCH_XREG_PAIR_XMM': (McBlock.parseMcGeneric, False, False, ), 2959 'IEM_MC_FETCH_YREG_2ND_U64': (McBlock.parseMcGeneric, False, False, ), 2960 'IEM_MC_FETCH_YREG_U128': (McBlock.parseMcGeneric, False, False, ), 2961 'IEM_MC_FETCH_YREG_U256': (McBlock.parseMcGeneric, False, False, ), 2962 'IEM_MC_FETCH_YREG_U32': (McBlock.parseMcGeneric, False, False, ), 2963 'IEM_MC_FETCH_YREG_U64': (McBlock.parseMcGeneric, False, False, ), 2964 'IEM_MC_FLIP_EFL_BIT': (McBlock.parseMcGeneric, True, False, ), 2965 'IEM_MC_FPU_FROM_MMX_MODE': (McBlock.parseMcGeneric, True, False, ), 2966 'IEM_MC_FPU_STACK_DEC_TOP': (McBlock.parseMcGeneric, True, False, ), 2967 'IEM_MC_FPU_STACK_FREE': (McBlock.parseMcGeneric, True, False, ), 2968 'IEM_MC_FPU_STACK_INC_TOP': (McBlock.parseMcGeneric, True, False, ), 2969 'IEM_MC_FPU_STACK_PUSH_OVERFLOW': (McBlock.parseMcGeneric, True, False, ), 2970 'IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP': (McBlock.parseMcGeneric, True, False, ), 2971 'IEM_MC_FPU_STACK_PUSH_UNDERFLOW': (McBlock.parseMcGeneric, True, False, ), 2972 'IEM_MC_FPU_STACK_PUSH_UNDERFLOW_TWO': (McBlock.parseMcGeneric, True, False, ), 2973 'IEM_MC_FPU_STACK_UNDERFLOW': (McBlock.parseMcGeneric, True, False, ), 2974 'IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP': (McBlock.parseMcGeneric, True, False, ), 2975 'IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP': (McBlock.parseMcGeneric, True, False, ), 2976 'IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP': (McBlock.parseMcGeneric, True, False, ), 2977 'IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP': (McBlock.parseMcGeneric, True, False, ), 2978 'IEM_MC_FPU_TO_MMX_MODE': (McBlock.parseMcGeneric, True, False, ), 2979 'IEM_MC_HINT_FLUSH_GUEST_SHADOW': (McBlock.parseMcGeneric, True, True, ), 2980 'IEM_MC_IF_CX_IS_NZ': (McBlock.parseMcGenericCond, True, True, ), 2981 'IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_NOT_SET': (McBlock.parseMcGenericCond, True, True, ), 2982 'IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_SET': (McBlock.parseMcGenericCond, True, True, ), 2983 'IEM_MC_IF_ECX_IS_NZ': (McBlock.parseMcGenericCond, True, True, ), 2984 'IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_NOT_SET': (McBlock.parseMcGenericCond, True, True, ), 2985 'IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_SET': (McBlock.parseMcGenericCond, True, True, ), 2986 'IEM_MC_IF_EFL_ANY_BITS_SET': (McBlock.parseMcGenericCond, True, True, ), 2987 'IEM_MC_IF_EFL_BIT_NOT_SET': (McBlock.parseMcGenericCond, True, True, ), 2988 'IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ': (McBlock.parseMcGenericCond, True, True, ), 2989 'IEM_MC_IF_EFL_BIT_SET': (McBlock.parseMcGenericCond, True, True, ), 2990 'IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE': (McBlock.parseMcGenericCond, True, True, ), 2991 'IEM_MC_IF_EFL_BITS_EQ': (McBlock.parseMcGenericCond, True, True, ), 2992 'IEM_MC_IF_EFL_BITS_NE': (McBlock.parseMcGenericCond, True, True, ), 2993 'IEM_MC_IF_EFL_NO_BITS_SET': (McBlock.parseMcGenericCond, True, True, ), 2994 'IEM_MC_IF_FCW_IM': (McBlock.parseMcGenericCond, True, False, ), 2995 'IEM_MC_IF_FPUREG_IS_EMPTY': (McBlock.parseMcGenericCond, True, False, ), 2996 'IEM_MC_IF_FPUREG_NOT_EMPTY': (McBlock.parseMcGenericCond, True, False, ), 2997 'IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80': (McBlock.parseMcGenericCond, True, False, ), 2998 'IEM_MC_IF_GREG_BIT_SET': (McBlock.parseMcGenericCond, True, False, ), 2999 'IEM_MC_IF_LOCAL_IS_Z': (McBlock.parseMcGenericCond, True, False, ), 3000 'IEM_MC_IF_MXCSR_XCPT_PENDING': (McBlock.parseMcGenericCond, True, False, ), 3001 'IEM_MC_IF_RCX_IS_NZ': (McBlock.parseMcGenericCond, True, True, ), 3002 'IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_NOT_SET': (McBlock.parseMcGenericCond, True, True, ), 3003 'IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_SET': (McBlock.parseMcGenericCond, True, True, ), 3004 'IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80': (McBlock.parseMcGenericCond, True, False, ), 3005 'IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST': (McBlock.parseMcGenericCond, True, False, ), 3006 'IEM_MC_IMPLICIT_AVX_AIMPL_ARGS': (McBlock.parseMcImplicitAvxAArgs, False, False, ), 3007 'IEM_MC_INT_CLEAR_ZMM_256_UP': (McBlock.parseMcGeneric, True, False, ), 3008 'IEM_MC_LOCAL': (McBlock.parseMcLocal, False, True, ), 3009 'IEM_MC_LOCAL_ASSIGN': (McBlock.parseMcLocalAssign, False, True, ), 3010 'IEM_MC_LOCAL_CONST': (McBlock.parseMcLocalConst, False, True, ), 3011 'IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT': (McBlock.parseMcGeneric, True, False, ), 3012 'IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE': (McBlock.parseMcGeneric, True, False, ), 3013 'IEM_MC_MAYBE_RAISE_FPU_XCPT': (McBlock.parseMcGeneric, True, False, ), 3014 'IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT': (McBlock.parseMcGeneric, True, False, ), 3015 'IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT': (McBlock.parseMcGeneric, True, False, ), 3016 'IEM_MC_MAYBE_RAISE_NON_CANONICAL_ADDR_GP0': (McBlock.parseMcGeneric, True, False, ), 3017 'IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT': (McBlock.parseMcGeneric, True, False, ), 3018 'IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT': (McBlock.parseMcGeneric, True, False, ), 3019 'IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE': (McBlock.parseMcGeneric, True, False, ), 3020 'IEM_MC_MEM_COMMIT_AND_UNMAP_RW': (McBlock.parseMcGeneric, True, True, ), 3021 'IEM_MC_MEM_COMMIT_AND_UNMAP_RO': (McBlock.parseMcGeneric, True, True, ), 3022 'IEM_MC_MEM_COMMIT_AND_UNMAP_WO': (McBlock.parseMcGeneric, True, True, ), 3023 'IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO': (McBlock.parseMcGeneric, True, False, ), 3024 'IEM_MC_MEM_MAP_D80_WO': (McBlock.parseMcGeneric, True, True, ), 3025 'IEM_MC_MEM_MAP_I16_WO': (McBlock.parseMcGeneric, True, True, ), 3026 'IEM_MC_MEM_MAP_I32_WO': (McBlock.parseMcGeneric, True, True, ), 3027 'IEM_MC_MEM_MAP_I64_WO': (McBlock.parseMcGeneric, True, True, ), 3028 'IEM_MC_MEM_MAP_R32_WO': (McBlock.parseMcGeneric, True, True, ), 3029 'IEM_MC_MEM_MAP_R64_WO': (McBlock.parseMcGeneric, True, True, ), 3030 'IEM_MC_MEM_MAP_R80_WO': (McBlock.parseMcGeneric, True, True, ), 3031 'IEM_MC_MEM_MAP_U8_RW': (McBlock.parseMcGeneric, True, True, ), 3032 'IEM_MC_MEM_MAP_U8_RO': (McBlock.parseMcGeneric, True, True, ), 3033 'IEM_MC_MEM_MAP_U8_WO': (McBlock.parseMcGeneric, True, True, ), 3034 'IEM_MC_MEM_MAP_U16_RW': (McBlock.parseMcGeneric, True, True, ), 3035 'IEM_MC_MEM_MAP_U16_RO': (McBlock.parseMcGeneric, True, True, ), 3036 'IEM_MC_MEM_MAP_U16_WO': (McBlock.parseMcGeneric, True, True, ), 3037 'IEM_MC_MEM_MAP_U32_RW': (McBlock.parseMcGeneric, True, True, ), 3038 'IEM_MC_MEM_MAP_U32_RO': (McBlock.parseMcGeneric, True, True, ), 3039 'IEM_MC_MEM_MAP_U32_WO': (McBlock.parseMcGeneric, True, True, ), 3040 'IEM_MC_MEM_MAP_U64_RW': (McBlock.parseMcGeneric, True, True, ), 3041 'IEM_MC_MEM_MAP_U64_RO': (McBlock.parseMcGeneric, True, True, ), 3042 'IEM_MC_MEM_MAP_U64_WO': (McBlock.parseMcGeneric, True, True, ), 3043 'IEM_MC_MEM_MAP_U128_RW': (McBlock.parseMcGeneric, True, True, ), 3044 'IEM_MC_MEM_MAP_U128_RO': (McBlock.parseMcGeneric, True, True, ), 3045 'IEM_MC_MEM_MAP_U128_WO': (McBlock.parseMcGeneric, True, True, ), 3046 'IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO': (McBlock.parseMcGeneric, True, True, ), 3047 'IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3048 'IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3049 'IEM_MC_MERGE_YREG_U64HI_U64HI_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3050 'IEM_MC_MERGE_YREG_U64LO_U64LO_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3051 'IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3052 'IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3053 'IEM_MC_MODIFIED_MREG': (McBlock.parseMcGeneric, True, False, ), 3054 'IEM_MC_MODIFIED_MREG_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3055 'IEM_MC_OR_2LOCS_U32': (McBlock.parseMcGeneric, False, False, ), 3056 'IEM_MC_OR_GREG_U16': (McBlock.parseMcGeneric, True, False, ), 3057 'IEM_MC_OR_GREG_U32': (McBlock.parseMcGeneric, True, False, ), 3058 'IEM_MC_OR_GREG_U64': (McBlock.parseMcGeneric, True, False, ), 3059 'IEM_MC_OR_GREG_U8': (McBlock.parseMcGeneric, True, False, ), 3060 'IEM_MC_OR_LOCAL_U16': (McBlock.parseMcGeneric, False, False, ), 3061 'IEM_MC_OR_LOCAL_U32': (McBlock.parseMcGeneric, False, False, ), 3062 'IEM_MC_OR_LOCAL_U8': (McBlock.parseMcGeneric, False, False, ), 3063 'IEM_MC_POP_GREG_U16': (McBlock.parseMcGeneric, True, True, ), 3064 'IEM_MC_POP_GREG_U32': (McBlock.parseMcGeneric, True, True, ), 3065 'IEM_MC_POP_GREG_U64': (McBlock.parseMcGeneric, True, True, ), 3066 'IEM_MC_PREPARE_AVX_USAGE': (McBlock.parseMcGeneric, False, True), 3067 'IEM_MC_PREPARE_FPU_USAGE': (McBlock.parseMcGeneric, False, True), 3068 'IEM_MC_PREPARE_SSE_USAGE': (McBlock.parseMcGeneric, False, True), 3069 'IEM_MC_PUSH_FPU_RESULT': (McBlock.parseMcGeneric, True, False, ), 3070 'IEM_MC_PUSH_FPU_RESULT_MEM_OP': (McBlock.parseMcGeneric, True, False, ), 3071 'IEM_MC_PUSH_FPU_RESULT_TWO': (McBlock.parseMcGeneric, True, False, ), 3072 'IEM_MC_PUSH_U16': (McBlock.parseMcGeneric, True, True, ), 3073 'IEM_MC_PUSH_U32': (McBlock.parseMcGeneric, True, True, ), 3074 'IEM_MC_PUSH_U32_SREG': (McBlock.parseMcGeneric, True, True, ), 3075 'IEM_MC_PUSH_U64': (McBlock.parseMcGeneric, True, True, ), 3076 'IEM_MC_RAISE_DIVIDE_ERROR': (McBlock.parseMcGeneric, True, False, ), 3077 'IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO': (McBlock.parseMcGeneric, True, False, ), 3078 'IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED': (McBlock.parseMcGeneric, True, False, ), 3079 'IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT': (McBlock.parseMcGeneric, True, False, ), 3080 'IEM_MC_REF_EFLAGS': (McBlock.parseMcGeneric, False, True, ), 3081 'IEM_MC_REF_FPUREG': (McBlock.parseMcGeneric, False, False, ), 3082 'IEM_MC_REF_GREG_I32': (McBlock.parseMcGeneric, False, True, ), 3083 'IEM_MC_REF_GREG_I32_CONST': (McBlock.parseMcGeneric, False, True, ), 3084 'IEM_MC_REF_GREG_I64': (McBlock.parseMcGeneric, False, True, ), 3085 'IEM_MC_REF_GREG_I64_CONST': (McBlock.parseMcGeneric, False, True, ), 3086 'IEM_MC_REF_GREG_U16': (McBlock.parseMcGeneric, False, True, ), 3087 'IEM_MC_REF_GREG_U16_CONST': (McBlock.parseMcGeneric, False, True, ), 3088 'IEM_MC_REF_GREG_U32': (McBlock.parseMcGeneric, False, True, ), 3089 'IEM_MC_REF_GREG_U32_CONST': (McBlock.parseMcGeneric, False, True, ), 3090 'IEM_MC_REF_GREG_U64': (McBlock.parseMcGeneric, False, True, ), 3091 'IEM_MC_REF_GREG_U64_CONST': (McBlock.parseMcGeneric, False, True, ), 3092 'IEM_MC_REF_GREG_U8': (McBlock.parseMcGeneric, False, False, ), # threaded 3093 'IEM_MC_REF_GREG_U8_CONST': (McBlock.parseMcGeneric, False, False, ), # threaded 3094 'IEM_MC_REF_LOCAL': (McBlock.parseMcGeneric, False, False, ), # eliminate! 3095 'IEM_MC_REF_MREG_U32_CONST': (McBlock.parseMcGeneric, False, False, ), 3096 'IEM_MC_REF_MREG_U64': (McBlock.parseMcGeneric, False, False, ), 3097 'IEM_MC_REF_MREG_U64_CONST': (McBlock.parseMcGeneric, False, False, ), 3098 'IEM_MC_REF_MXCSR': (McBlock.parseMcGeneric, False, False, ), 3099 'IEM_MC_REF_XREG_R32_CONST': (McBlock.parseMcGeneric, False, False, ), 3100 'IEM_MC_REF_XREG_R64_CONST': (McBlock.parseMcGeneric, False, False, ), 3101 'IEM_MC_REF_XREG_U128': (McBlock.parseMcGeneric, False, False, ), 3102 'IEM_MC_REF_XREG_U128_CONST': (McBlock.parseMcGeneric, False, False, ), 3103 'IEM_MC_REF_XREG_U32_CONST': (McBlock.parseMcGeneric, False, False, ), 3104 'IEM_MC_REF_XREG_U64_CONST': (McBlock.parseMcGeneric, False, False, ), 3105 'IEM_MC_REF_XREG_XMM_CONST': (McBlock.parseMcGeneric, False, False, ), 3106 'IEM_MC_REF_YREG_U128': (McBlock.parseMcGeneric, False, False, ), 3107 'IEM_MC_REF_YREG_U128_CONST': (McBlock.parseMcGeneric, False, False, ), 3108 'IEM_MC_REF_YREG_U64_CONST': (McBlock.parseMcGeneric, False, False, ), 3109 'IEM_MC_REL_JMP_S16_AND_FINISH': (McBlock.parseMcGeneric, True, False, ), 3110 'IEM_MC_REL_JMP_S32_AND_FINISH': (McBlock.parseMcGeneric, True, False, ), 3111 'IEM_MC_REL_JMP_S8_AND_FINISH': (McBlock.parseMcGeneric, True, False, ), 3112 'IEM_MC_RETURN_ON_FAILURE': (McBlock.parseMcGeneric, False, False, ), 3113 'IEM_MC_SAR_LOCAL_S16': (McBlock.parseMcGeneric, False, False, ), 3114 'IEM_MC_SAR_LOCAL_S32': (McBlock.parseMcGeneric, False, False, ), 3115 'IEM_MC_SAR_LOCAL_S64': (McBlock.parseMcGeneric, False, False, ), 3116 'IEM_MC_SET_EFL_BIT': (McBlock.parseMcGeneric, True, False, ), 3117 'IEM_MC_SET_FPU_RESULT': (McBlock.parseMcGeneric, True, False, ), 3118 'IEM_MC_SET_RIP_U16_AND_FINISH': (McBlock.parseMcGeneric, True, False, ), 3119 'IEM_MC_SET_RIP_U32_AND_FINISH': (McBlock.parseMcGeneric, True, False, ), 3120 'IEM_MC_SET_RIP_U64_AND_FINISH': (McBlock.parseMcGeneric, True, False, ), 3121 'IEM_MC_SHL_LOCAL_S16': (McBlock.parseMcGeneric, False, False, ), 3122 'IEM_MC_SHL_LOCAL_S32': (McBlock.parseMcGeneric, False, False, ), 3123 'IEM_MC_SHL_LOCAL_S64': (McBlock.parseMcGeneric, False, False, ), 3124 'IEM_MC_SHR_LOCAL_U8': (McBlock.parseMcGeneric, False, False, ), 3125 'IEM_MC_SSE_UPDATE_MXCSR': (McBlock.parseMcGeneric, True, False, ), 3126 'IEM_MC_STORE_FPU_RESULT': (McBlock.parseMcGeneric, True, False, ), 3127 'IEM_MC_STORE_FPU_RESULT_MEM_OP': (McBlock.parseMcGeneric, True, False, ), 3128 'IEM_MC_STORE_FPU_RESULT_THEN_POP': (McBlock.parseMcGeneric, True, False, ), 3129 'IEM_MC_STORE_FPU_RESULT_WITH_MEM_OP_THEN_POP': (McBlock.parseMcGeneric, True, False, ), 3130 'IEM_MC_STORE_FPUREG_R80_SRC_REF': (McBlock.parseMcGeneric, True, False, ), 3131 'IEM_MC_STORE_GREG_I64': (McBlock.parseMcGeneric, True, False, ), 3132 'IEM_MC_STORE_GREG_U16': (McBlock.parseMcGeneric, True, True, ), 3133 'IEM_MC_STORE_GREG_U16_CONST': (McBlock.parseMcGeneric, True, True, ), 3134 'IEM_MC_STORE_GREG_U32': (McBlock.parseMcGeneric, True, True, ), 3135 'IEM_MC_STORE_GREG_U32_CONST': (McBlock.parseMcGeneric, True, True, ), 3136 'IEM_MC_STORE_GREG_U64': (McBlock.parseMcGeneric, True, True, ), 3137 'IEM_MC_STORE_GREG_U64_CONST': (McBlock.parseMcGeneric, True, True, ), 3138 'IEM_MC_STORE_GREG_U8': (McBlock.parseMcGeneric, True, True, ), # thrd var 3139 'IEM_MC_STORE_GREG_U8_CONST': (McBlock.parseMcGeneric, True, True, ), # thrd var 3140 'IEM_MC_STORE_GREG_PAIR_U32': (McBlock.parseMcGeneric, True, False, ), 3141 'IEM_MC_STORE_GREG_PAIR_U64': (McBlock.parseMcGeneric, True, False, ), 3142 'IEM_MC_STORE_MEM_I16_CONST_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3143 'IEM_MC_STORE_MEM_I32_CONST_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3144 'IEM_MC_STORE_MEM_I64_CONST_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3145 'IEM_MC_STORE_MEM_I8_CONST_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3146 'IEM_MC_STORE_MEM_INDEF_D80_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3147 'IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3148 'IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3149 'IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF': (McBlock.parseMcGeneric, True, False, ), 3150 'IEM_MC_STORE_MEM_U128': (McBlock.parseMcGeneric, True, False, ), 3151 'IEM_MC_STORE_MEM_U128_ALIGN_SSE': (McBlock.parseMcGeneric, True, False, ), 3152 'IEM_MC_STORE_MEM_U16': (McBlock.parseMcGeneric, True, True, ), 3153 'IEM_MC_STORE_MEM_U16_CONST': (McBlock.parseMcGeneric, True, True, ), 3154 'IEM_MC_STORE_MEM_U256': (McBlock.parseMcGeneric, True, False, ), 3155 'IEM_MC_STORE_MEM_U256_ALIGN_AVX': (McBlock.parseMcGeneric, True, False, ), 3156 'IEM_MC_STORE_MEM_U32': (McBlock.parseMcGeneric, True, True, ), 3157 'IEM_MC_STORE_MEM_U32_CONST': (McBlock.parseMcGeneric, True, True, ), 3158 'IEM_MC_STORE_MEM_U64': (McBlock.parseMcGeneric, True, True, ), 3159 'IEM_MC_STORE_MEM_U64_CONST': (McBlock.parseMcGeneric, True, True, ), 3160 'IEM_MC_STORE_MEM_U8': (McBlock.parseMcGeneric, True, True, ), 3161 'IEM_MC_STORE_MEM_U8_CONST': (McBlock.parseMcGeneric, True, True, ), 3162 'IEM_MC_STORE_MREG_U32_ZX_U64': (McBlock.parseMcGeneric, True, False, ), 3163 'IEM_MC_STORE_MREG_U64': (McBlock.parseMcGeneric, True, False, ), 3164 'IEM_MC_STORE_SREG_BASE_U32': (McBlock.parseMcGeneric, True, False, ), 3165 'IEM_MC_STORE_SREG_BASE_U64': (McBlock.parseMcGeneric, True, False, ), 3166 'IEM_MC_STORE_SSE_RESULT': (McBlock.parseMcGeneric, True, False, ), 3167 'IEM_MC_STORE_XREG_HI_U64': (McBlock.parseMcGeneric, True, False, ), 3168 'IEM_MC_STORE_XREG_R32': (McBlock.parseMcGeneric, True, False, ), 3169 'IEM_MC_STORE_XREG_R64': (McBlock.parseMcGeneric, True, False, ), 3170 'IEM_MC_STORE_XREG_U128': (McBlock.parseMcGeneric, True, False, ), 3171 'IEM_MC_STORE_XREG_U16': (McBlock.parseMcGeneric, True, False, ), 3172 'IEM_MC_STORE_XREG_U32': (McBlock.parseMcGeneric, True, False, ), 3173 'IEM_MC_STORE_XREG_U32_U128': (McBlock.parseMcGeneric, True, False, ), 3174 'IEM_MC_STORE_XREG_U32_ZX_U128': (McBlock.parseMcGeneric, True, False, ), 3175 'IEM_MC_STORE_XREG_U64': (McBlock.parseMcGeneric, True, False, ), 3176 'IEM_MC_STORE_XREG_U64_ZX_U128': (McBlock.parseMcGeneric, True, False, ), 3177 'IEM_MC_STORE_XREG_U8': (McBlock.parseMcGeneric, True, False, ), 3178 'IEM_MC_STORE_XREG_XMM': (McBlock.parseMcGeneric, True, False, ), 3179 'IEM_MC_STORE_XREG_XMM_U32': (McBlock.parseMcGeneric, True, False, ), 3180 'IEM_MC_STORE_XREG_XMM_U64': (McBlock.parseMcGeneric, True, False, ), 3181 'IEM_MC_STORE_YREG_U128': (McBlock.parseMcGeneric, True, False, ), 3182 'IEM_MC_STORE_YREG_U128_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3183 'IEM_MC_STORE_YREG_U256_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3184 'IEM_MC_STORE_YREG_U32_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3185 'IEM_MC_STORE_YREG_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, False, ), 3186 'IEM_MC_SUB_GREG_U16': (McBlock.parseMcGeneric, True, True, ), 3187 'IEM_MC_SUB_GREG_U32': (McBlock.parseMcGeneric, True, True, ), 3188 'IEM_MC_SUB_GREG_U64': (McBlock.parseMcGeneric, True, True, ), 3189 'IEM_MC_SUB_LOCAL_U16': (McBlock.parseMcGeneric, False, False, ), 3190 'IEM_MC_UPDATE_FPU_OPCODE_IP': (McBlock.parseMcGeneric, True, False, ), 3191 'IEM_MC_UPDATE_FSW': (McBlock.parseMcGeneric, True, False, ), 3192 'IEM_MC_UPDATE_FSW_CONST': (McBlock.parseMcGeneric, True, False, ), 3193 'IEM_MC_UPDATE_FSW_THEN_POP': (McBlock.parseMcGeneric, True, False, ), 3194 'IEM_MC_UPDATE_FSW_THEN_POP_POP': (McBlock.parseMcGeneric, True, False, ), 3195 'IEM_MC_UPDATE_FSW_WITH_MEM_OP': (McBlock.parseMcGeneric, True, False, ), 3196 'IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP': (McBlock.parseMcGeneric, True, False, ), 3197 'IEM_MC_NO_NATIVE_RECOMPILE': (McBlock.parseMcGeneric, False, False, ), 2791 'IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE': (McBlock.parseMcGeneric, False, False, True, ), 2792 'IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ': (McBlock.parseMcGeneric, False, False, True, ), 2793 'IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE': (McBlock.parseMcGeneric, False, False, True, ), 2794 'IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ': (McBlock.parseMcGeneric, False, False, True, ), 2795 'IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE': (McBlock.parseMcGeneric, False, False, True, ), 2796 'IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ': (McBlock.parseMcGeneric, False, False, True, ), 2797 'IEM_MC_ADD_GREG_U16': (McBlock.parseMcGeneric, True, True, True, ), 2798 'IEM_MC_ADD_GREG_U16_TO_LOCAL': (McBlock.parseMcGeneric, False, False, False, ), 2799 'IEM_MC_ADD_GREG_U32': (McBlock.parseMcGeneric, True, True, True, ), 2800 'IEM_MC_ADD_GREG_U32_TO_LOCAL': (McBlock.parseMcGeneric, False, False, False, ), 2801 'IEM_MC_ADD_GREG_U64': (McBlock.parseMcGeneric, True, True, True, ), 2802 'IEM_MC_ADD_GREG_U64_TO_LOCAL': (McBlock.parseMcGeneric, False, False, False, ), 2803 'IEM_MC_ADD_GREG_U8_TO_LOCAL': (McBlock.parseMcGeneric, False, False, False, ), 2804 'IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR': (McBlock.parseMcGeneric, True, True, False, ), 2805 'IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR': (McBlock.parseMcGeneric, True, True, False, ), 2806 'IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR': (McBlock.parseMcGeneric, True, True, False, ), 2807 'IEM_MC_ADVANCE_RIP_AND_FINISH': (McBlock.parseMcGeneric, True, True, True, ), 2808 'IEM_MC_AND_2LOCS_U32': (McBlock.parseMcGeneric, False, False, False, ), 2809 'IEM_MC_AND_ARG_U16': (McBlock.parseMcGeneric, False, False, False, ), 2810 'IEM_MC_AND_ARG_U32': (McBlock.parseMcGeneric, False, False, False, ), 2811 'IEM_MC_AND_ARG_U64': (McBlock.parseMcGeneric, False, False, False, ), 2812 'IEM_MC_AND_GREG_U16': (McBlock.parseMcGeneric, True, True, False, ), 2813 'IEM_MC_AND_GREG_U32': (McBlock.parseMcGeneric, True, True, False, ), 2814 'IEM_MC_AND_GREG_U64': (McBlock.parseMcGeneric, True, True, False, ), 2815 'IEM_MC_AND_GREG_U8': (McBlock.parseMcGeneric, True, True, False, ), 2816 'IEM_MC_AND_LOCAL_U16': (McBlock.parseMcGeneric, False, False, False, ), 2817 'IEM_MC_AND_LOCAL_U32': (McBlock.parseMcGeneric, False, False, False, ), 2818 'IEM_MC_AND_LOCAL_U64': (McBlock.parseMcGeneric, False, False, False, ), 2819 'IEM_MC_AND_LOCAL_U8': (McBlock.parseMcGeneric, False, False, False, ), 2820 'IEM_MC_ARG': (McBlock.parseMcArg, False, False, True, ), 2821 'IEM_MC_ARG_CONST': (McBlock.parseMcArgConst, False, False, True, ), 2822 'IEM_MC_ARG_LOCAL_EFLAGS': (McBlock.parseMcArgLocalEFlags, False, False, True, ), 2823 'IEM_MC_ARG_LOCAL_REF': (McBlock.parseMcArgLocalRef, False, False, True, ), 2824 'IEM_MC_ASSIGN_TO_SMALLER': (McBlock.parseMcGeneric, False, False, True, ), 2825 'IEM_MC_BEGIN': (McBlock.parseMcBegin, False, False, True, ), 2826 'IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2827 'IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2828 'IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2829 'IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2830 'IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2831 'IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2832 'IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2833 'IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2834 'IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2835 'IEM_MC_BSWAP_LOCAL_U16': (McBlock.parseMcGeneric, False, False, False, ), 2836 'IEM_MC_BSWAP_LOCAL_U32': (McBlock.parseMcGeneric, False, False, False, ), 2837 'IEM_MC_BSWAP_LOCAL_U64': (McBlock.parseMcGeneric, False, False, False, ), 2838 'IEM_MC_CALC_RM_EFF_ADDR': (McBlock.parseMcGeneric, False, False, False, ), 2839 'IEM_MC_CALL_AIMPL_3': (McBlock.parseMcCallAImpl, True, True, True, ), 2840 'IEM_MC_CALL_AIMPL_4': (McBlock.parseMcCallAImpl, True, True, True, ), 2841 'IEM_MC_CALL_AVX_AIMPL_2': (McBlock.parseMcCallAvxAImpl, True, True, False, ), 2842 'IEM_MC_CALL_AVX_AIMPL_3': (McBlock.parseMcCallAvxAImpl, True, True, False, ), 2843 'IEM_MC_CALL_CIMPL_0': (McBlock.parseMcCallCImpl, True, True, False, ), 2844 'IEM_MC_CALL_CIMPL_1': (McBlock.parseMcCallCImpl, True, True, False, ), 2845 'IEM_MC_CALL_CIMPL_2': (McBlock.parseMcCallCImpl, True, True, False, ), 2846 'IEM_MC_CALL_CIMPL_3': (McBlock.parseMcCallCImpl, True, True, False, ), 2847 'IEM_MC_CALL_CIMPL_4': (McBlock.parseMcCallCImpl, True, True, False, ), 2848 'IEM_MC_CALL_CIMPL_5': (McBlock.parseMcCallCImpl, True, True, False, ), 2849 'IEM_MC_CALL_FPU_AIMPL_1': (McBlock.parseMcCallFpuAImpl, True, True, False, ), 2850 'IEM_MC_CALL_FPU_AIMPL_2': (McBlock.parseMcCallFpuAImpl, True, True, False, ), 2851 'IEM_MC_CALL_FPU_AIMPL_3': (McBlock.parseMcCallFpuAImpl, True, True, False, ), 2852 'IEM_MC_CALL_MMX_AIMPL_2': (McBlock.parseMcCallMmxAImpl, True, True, False, ), 2853 'IEM_MC_CALL_MMX_AIMPL_3': (McBlock.parseMcCallMmxAImpl, True, True, False, ), 2854 'IEM_MC_CALL_SSE_AIMPL_2': (McBlock.parseMcCallSseAImpl, True, True, False, ), 2855 'IEM_MC_CALL_SSE_AIMPL_3': (McBlock.parseMcCallSseAImpl, True, True, False, ), 2856 'IEM_MC_CALL_VOID_AIMPL_0': (McBlock.parseMcCallVoidAImpl, True, True, True, ), 2857 'IEM_MC_CALL_VOID_AIMPL_1': (McBlock.parseMcCallVoidAImpl, True, True, True, ), 2858 'IEM_MC_CALL_VOID_AIMPL_2': (McBlock.parseMcCallVoidAImpl, True, True, True, ), 2859 'IEM_MC_CALL_VOID_AIMPL_3': (McBlock.parseMcCallVoidAImpl, True, True, True, ), 2860 'IEM_MC_CALL_VOID_AIMPL_4': (McBlock.parseMcCallVoidAImpl, True, True, True, ), 2861 'IEM_MC_CLEAR_EFL_BIT': (McBlock.parseMcGeneric, True, True, False, ), 2862 'IEM_MC_CLEAR_FSW_EX': (McBlock.parseMcGeneric, True, True, False, ), 2863 'IEM_MC_CLEAR_HIGH_GREG_U64': (McBlock.parseMcGeneric, True, True, True, ), 2864 'IEM_MC_CLEAR_XREG_U32_MASK': (McBlock.parseMcGeneric, True, True, False, ), 2865 'IEM_MC_CLEAR_YREG_128_UP': (McBlock.parseMcGeneric, True, True, False, ), 2866 'IEM_MC_COMMIT_EFLAGS': (McBlock.parseMcGeneric, True, True, True, ), 2867 'IEM_MC_COPY_XREG_U128': (McBlock.parseMcGeneric, True, True, False, ), 2868 'IEM_MC_COPY_YREG_U128_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2869 'IEM_MC_COPY_YREG_U256_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2870 'IEM_MC_COPY_YREG_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 2871 'IEM_MC_DEFER_TO_CIMPL_0_RET': (McBlock.parseMcDeferToCImpl, False, False, False, ), 2872 'IEM_MC_DEFER_TO_CIMPL_1_RET': (McBlock.parseMcDeferToCImpl, False, False, False, ), 2873 'IEM_MC_DEFER_TO_CIMPL_2_RET': (McBlock.parseMcDeferToCImpl, False, False, False, ), 2874 'IEM_MC_DEFER_TO_CIMPL_3_RET': (McBlock.parseMcDeferToCImpl, False, False, False, ), 2875 'IEM_MC_END': (McBlock.parseMcGeneric, True, True, True, ), 2876 'IEM_MC_FETCH_EFLAGS': (McBlock.parseMcGeneric, False, False, True, ), 2877 'IEM_MC_FETCH_EFLAGS_U8': (McBlock.parseMcGeneric, False, False, False, ), 2878 'IEM_MC_FETCH_FCW': (McBlock.parseMcGeneric, False, False, False, ), 2879 'IEM_MC_FETCH_FSW': (McBlock.parseMcGeneric, False, False, False, ), 2880 'IEM_MC_FETCH_GREG_U16': (McBlock.parseMcGeneric, False, False, True, ), 2881 'IEM_MC_FETCH_GREG_U16_SX_U32': (McBlock.parseMcGeneric, False, False, True, ), 2882 'IEM_MC_FETCH_GREG_U16_SX_U64': (McBlock.parseMcGeneric, False, False, True, ), 2883 'IEM_MC_FETCH_GREG_U16_ZX_U32': (McBlock.parseMcGeneric, False, False, True, ), 2884 'IEM_MC_FETCH_GREG_U16_ZX_U64': (McBlock.parseMcGeneric, False, False, True, ), 2885 'IEM_MC_FETCH_GREG_U32': (McBlock.parseMcGeneric, False, False, True, ), 2886 'IEM_MC_FETCH_GREG_U32_SX_U64': (McBlock.parseMcGeneric, False, False, True, ), 2887 'IEM_MC_FETCH_GREG_U32_ZX_U64': (McBlock.parseMcGeneric, False, False, True, ), 2888 'IEM_MC_FETCH_GREG_U64': (McBlock.parseMcGeneric, False, False, True, ), 2889 'IEM_MC_FETCH_GREG_U64_ZX_U64': (McBlock.parseMcGeneric, False, False, True, ), 2890 'IEM_MC_FETCH_GREG_U8': (McBlock.parseMcGeneric, False, False, True, ), # thrd var 2891 'IEM_MC_FETCH_GREG_U8_SX_U16': (McBlock.parseMcGeneric, False, False, True, ), # thrd var 2892 'IEM_MC_FETCH_GREG_U8_SX_U32': (McBlock.parseMcGeneric, False, False, True, ), # thrd var 2893 'IEM_MC_FETCH_GREG_U8_SX_U64': (McBlock.parseMcGeneric, False, False, True, ), # thrd var 2894 'IEM_MC_FETCH_GREG_U8_ZX_U16': (McBlock.parseMcGeneric, False, False, True, ), # thrd var 2895 'IEM_MC_FETCH_GREG_U8_ZX_U32': (McBlock.parseMcGeneric, False, False, True, ), # thrd var 2896 'IEM_MC_FETCH_GREG_U8_ZX_U64': (McBlock.parseMcGeneric, False, False, True, ), # thrd var 2897 'IEM_MC_FETCH_GREG_PAIR_U32': (McBlock.parseMcGeneric, False, False, False, ), 2898 'IEM_MC_FETCH_GREG_PAIR_U64': (McBlock.parseMcGeneric, False, False, False, ), 2899 'IEM_MC_FETCH_MEM_D80': (McBlock.parseMcGeneric, True, True, False, ), 2900 'IEM_MC_FETCH_MEM_I16': (McBlock.parseMcGeneric, True, True, False, ), 2901 'IEM_MC_FETCH_MEM_I32': (McBlock.parseMcGeneric, True, True, False, ), 2902 'IEM_MC_FETCH_MEM_I64': (McBlock.parseMcGeneric, True, True, False, ), 2903 'IEM_MC_FETCH_MEM_R32': (McBlock.parseMcGeneric, True, True, False, ), 2904 'IEM_MC_FETCH_MEM_R64': (McBlock.parseMcGeneric, True, True, False, ), 2905 'IEM_MC_FETCH_MEM_R80': (McBlock.parseMcGeneric, True, True, False, ), 2906 'IEM_MC_FETCH_MEM_U128': (McBlock.parseMcGeneric, True, True, False, ), 2907 'IEM_MC_FETCH_MEM_U128_ALIGN_SSE': (McBlock.parseMcGeneric, True, True, False, ), 2908 'IEM_MC_FETCH_MEM_U128_NO_AC': (McBlock.parseMcGeneric, True, True, False, ), 2909 'IEM_MC_FETCH_MEM_U128_AND_XREG_U128': (McBlock.parseMcGeneric, True, True, False, ), 2910 'IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_RAX_RDX_U64': (McBlock.parseMcGeneric, True, True, False, ), 2911 'IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64':(McBlock.parseMcGeneric, True, True, False, ), 2912 'IEM_MC_FETCH_MEM_U16': (McBlock.parseMcGeneric, True, True, True, ), 2913 'IEM_MC_FETCH_MEM_U16_DISP': (McBlock.parseMcGeneric, True, True, True, ), 2914 'IEM_MC_FETCH_MEM_U16_SX_U32': (McBlock.parseMcGeneric, True, True, True, ), # movsx 2915 'IEM_MC_FETCH_MEM_U16_SX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movsx 2916 'IEM_MC_FETCH_MEM_U16_ZX_U32': (McBlock.parseMcGeneric, True, True, True, ), # movzx 2917 'IEM_MC_FETCH_MEM_U16_ZX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movzx 2918 'IEM_MC_FETCH_MEM_U256': (McBlock.parseMcGeneric, True, True, False, ), 2919 'IEM_MC_FETCH_MEM_U256_ALIGN_AVX': (McBlock.parseMcGeneric, True, True, False, ), 2920 'IEM_MC_FETCH_MEM_U256_NO_AC': (McBlock.parseMcGeneric, True, True, False, ), 2921 'IEM_MC_FETCH_MEM_U32': (McBlock.parseMcGeneric, True, True, True, ), 2922 'IEM_MC_FETCH_MEM_U32_DISP': (McBlock.parseMcGeneric, True, True, True, ), #bounds only 2923 'IEM_MC_FETCH_MEM_U32_SX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movsx 2924 'IEM_MC_FETCH_MEM_U32_ZX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movzx 2925 'IEM_MC_FETCH_MEM_U64': (McBlock.parseMcGeneric, True, True, True, ), 2926 'IEM_MC_FETCH_MEM_U64_ALIGN_U128': (McBlock.parseMcGeneric, True, True, False, ), 2927 'IEM_MC_FETCH_MEM_U8': (McBlock.parseMcGeneric, True, True, True, ), 2928 'IEM_MC_FETCH_MEM_U8_SX_U16': (McBlock.parseMcGeneric, True, True, True, ), # movsx 2929 'IEM_MC_FETCH_MEM_U8_SX_U32': (McBlock.parseMcGeneric, True, True, True, ), # movsx 2930 'IEM_MC_FETCH_MEM_U8_SX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movsx 2931 'IEM_MC_FETCH_MEM_U8_ZX_U16': (McBlock.parseMcGeneric, True, True, True, ), # movzx 2932 'IEM_MC_FETCH_MEM_U8_ZX_U32': (McBlock.parseMcGeneric, True, True, True, ), # movzx 2933 'IEM_MC_FETCH_MEM_U8_ZX_U64': (McBlock.parseMcGeneric, True, True, True, ), # movzx 2934 'IEM_MC_FETCH_MEM_XMM': (McBlock.parseMcGeneric, True, True, False, ), 2935 'IEM_MC_FETCH_MEM_XMM_ALIGN_SSE': (McBlock.parseMcGeneric, True, True, False, ), 2936 'IEM_MC_FETCH_MEM_XMM_NO_AC': (McBlock.parseMcGeneric, True, True, False, ), 2937 'IEM_MC_FETCH_MEM_XMM_U32': (McBlock.parseMcGeneric, True, True, False, ), 2938 'IEM_MC_FETCH_MEM_XMM_U64': (McBlock.parseMcGeneric, True, True, False, ), 2939 'IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 2940 'IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 2941 'IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 2942 'IEM_MC_FETCH_MEM_YMM': (McBlock.parseMcGeneric, True, True, False, ), 2943 'IEM_MC_FETCH_MEM_YMM_ALIGN_AVX': (McBlock.parseMcGeneric, True, True, False, ), 2944 'IEM_MC_FETCH_MEM_YMM_NO_AC': (McBlock.parseMcGeneric, True, True, False, ), 2945 'IEM_MC_FETCH_MEM16_U8': (McBlock.parseMcGeneric, True, True, False, ), 2946 'IEM_MC_FETCH_MEM32_U8': (McBlock.parseMcGeneric, True, True, False, ), 2947 'IEM_MC_FETCH_MREG_U32': (McBlock.parseMcGeneric, False, False, False, ), 2948 'IEM_MC_FETCH_MREG_U64': (McBlock.parseMcGeneric, False, False, False, ), 2949 'IEM_MC_FETCH_SREG_BASE_U32': (McBlock.parseMcGeneric, False, False, False, ), 2950 'IEM_MC_FETCH_SREG_BASE_U64': (McBlock.parseMcGeneric, False, False, False, ), 2951 'IEM_MC_FETCH_SREG_U16': (McBlock.parseMcGeneric, False, False, True, ), 2952 'IEM_MC_FETCH_SREG_ZX_U32': (McBlock.parseMcGeneric, False, False, True, ), 2953 'IEM_MC_FETCH_SREG_ZX_U64': (McBlock.parseMcGeneric, False, False, True, ), 2954 'IEM_MC_FETCH_XREG_U128': (McBlock.parseMcGeneric, False, False, False, ), 2955 'IEM_MC_FETCH_XREG_U16': (McBlock.parseMcGeneric, False, False, False, ), 2956 'IEM_MC_FETCH_XREG_U32': (McBlock.parseMcGeneric, False, False, False, ), 2957 'IEM_MC_FETCH_XREG_U64': (McBlock.parseMcGeneric, False, False, False, ), 2958 'IEM_MC_FETCH_XREG_U8': (McBlock.parseMcGeneric, False, False, False, ), 2959 'IEM_MC_FETCH_XREG_XMM': (McBlock.parseMcGeneric, False, False, False, ), 2960 'IEM_MC_FETCH_XREG_PAIR_U128': (McBlock.parseMcGeneric, False, False, False, ), 2961 'IEM_MC_FETCH_XREG_PAIR_U128_AND_RAX_RDX_U64': (McBlock.parseMcGeneric, False, False, False, ), 2962 'IEM_MC_FETCH_XREG_PAIR_U128_AND_EAX_EDX_U32_SX_U64': (McBlock.parseMcGeneric, False, False, False, ), 2963 'IEM_MC_FETCH_XREG_PAIR_XMM': (McBlock.parseMcGeneric, False, False, False, ), 2964 'IEM_MC_FETCH_YREG_2ND_U64': (McBlock.parseMcGeneric, False, False, False, ), 2965 'IEM_MC_FETCH_YREG_U128': (McBlock.parseMcGeneric, False, False, False, ), 2966 'IEM_MC_FETCH_YREG_U256': (McBlock.parseMcGeneric, False, False, False, ), 2967 'IEM_MC_FETCH_YREG_U32': (McBlock.parseMcGeneric, False, False, False, ), 2968 'IEM_MC_FETCH_YREG_U64': (McBlock.parseMcGeneric, False, False, False, ), 2969 'IEM_MC_FLIP_EFL_BIT': (McBlock.parseMcGeneric, True, True, False, ), 2970 'IEM_MC_FPU_FROM_MMX_MODE': (McBlock.parseMcGeneric, True, True, False, ), 2971 'IEM_MC_FPU_STACK_DEC_TOP': (McBlock.parseMcGeneric, True, True, False, ), 2972 'IEM_MC_FPU_STACK_FREE': (McBlock.parseMcGeneric, True, True, False, ), 2973 'IEM_MC_FPU_STACK_INC_TOP': (McBlock.parseMcGeneric, True, True, False, ), 2974 'IEM_MC_FPU_STACK_PUSH_OVERFLOW': (McBlock.parseMcGeneric, True, True, False, ), 2975 'IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP': (McBlock.parseMcGeneric, True, True, False, ), 2976 'IEM_MC_FPU_STACK_PUSH_UNDERFLOW': (McBlock.parseMcGeneric, True, True, False, ), 2977 'IEM_MC_FPU_STACK_PUSH_UNDERFLOW_TWO': (McBlock.parseMcGeneric, True, True, False, ), 2978 'IEM_MC_FPU_STACK_UNDERFLOW': (McBlock.parseMcGeneric, True, True, False, ), 2979 'IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP': (McBlock.parseMcGeneric, True, True, False, ), 2980 'IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP': (McBlock.parseMcGeneric, True, True, False, ), 2981 'IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP': (McBlock.parseMcGeneric, True, True, False, ), 2982 'IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP': (McBlock.parseMcGeneric, True, True, False, ), 2983 'IEM_MC_FPU_TO_MMX_MODE': (McBlock.parseMcGeneric, True, True, False, ), 2984 'IEM_MC_HINT_FLUSH_GUEST_SHADOW': (McBlock.parseMcGeneric, True, True, True, ), 2985 'IEM_MC_IF_CX_IS_NZ': (McBlock.parseMcGenericCond, True, False, True, ), 2986 'IEM_MC_IF_CX_IS_NOT_ONE': (McBlock.parseMcGenericCond, True, False, True, ), 2987 'IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 2988 'IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 2989 'IEM_MC_IF_ECX_IS_NZ': (McBlock.parseMcGenericCond, True, False, True, ), 2990 'IEM_MC_IF_ECX_IS_NOT_ONE': (McBlock.parseMcGenericCond, True, False, True, ), 2991 'IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 2992 'IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 2993 'IEM_MC_IF_EFL_ANY_BITS_SET': (McBlock.parseMcGenericCond, True, False, True, ), 2994 'IEM_MC_IF_EFL_BIT_NOT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 2995 'IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ': (McBlock.parseMcGenericCond, True, False, True, ), 2996 'IEM_MC_IF_EFL_BIT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 2997 'IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE': (McBlock.parseMcGenericCond, True, False, True, ), 2998 'IEM_MC_IF_EFL_BITS_EQ': (McBlock.parseMcGenericCond, True, False, True, ), 2999 'IEM_MC_IF_EFL_BITS_NE': (McBlock.parseMcGenericCond, True, False, True, ), 3000 'IEM_MC_IF_EFL_NO_BITS_SET': (McBlock.parseMcGenericCond, True, False, True, ), 3001 'IEM_MC_IF_FCW_IM': (McBlock.parseMcGenericCond, True, True, False, ), 3002 'IEM_MC_IF_FPUREG_IS_EMPTY': (McBlock.parseMcGenericCond, True, True, False, ), 3003 'IEM_MC_IF_FPUREG_NOT_EMPTY': (McBlock.parseMcGenericCond, True, True, False, ), 3004 'IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80': (McBlock.parseMcGenericCond, True, True, False, ), 3005 'IEM_MC_IF_GREG_BIT_SET': (McBlock.parseMcGenericCond, True, False, False, ), 3006 'IEM_MC_IF_LOCAL_IS_Z': (McBlock.parseMcGenericCond, True, False, False, ), 3007 'IEM_MC_IF_MXCSR_XCPT_PENDING': (McBlock.parseMcGenericCond, True, True, False, ), 3008 'IEM_MC_IF_RCX_IS_NZ': (McBlock.parseMcGenericCond, True, False, True, ), 3009 'IEM_MC_IF_RCX_IS_NOT_ONE': (McBlock.parseMcGenericCond, True, False, True, ), 3010 'IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 3011 'IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET': (McBlock.parseMcGenericCond, True, False, True, ), 3012 'IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80': (McBlock.parseMcGenericCond, True, True, False, ), 3013 'IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST': (McBlock.parseMcGenericCond, True, True, False, ), 3014 'IEM_MC_IMPLICIT_AVX_AIMPL_ARGS': (McBlock.parseMcImplicitAvxAArgs, False, False, False, ), 3015 'IEM_MC_INT_CLEAR_ZMM_256_UP': (McBlock.parseMcGeneric, True, True, False, ), 3016 'IEM_MC_LOCAL': (McBlock.parseMcLocal, False, False, True, ), 3017 'IEM_MC_LOCAL_ASSIGN': (McBlock.parseMcLocalAssign, False, False, True, ), 3018 'IEM_MC_LOCAL_CONST': (McBlock.parseMcLocalConst, False, False, True, ), 3019 'IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT': (McBlock.parseMcGeneric, True, True, False, ), 3020 'IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE': (McBlock.parseMcGeneric, True, True, False, ), 3021 'IEM_MC_MAYBE_RAISE_FPU_XCPT': (McBlock.parseMcGeneric, True, True, False, ), 3022 'IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT': (McBlock.parseMcGeneric, True, True, False, ), 3023 'IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT': (McBlock.parseMcGeneric, True, True, False, ), 3024 'IEM_MC_MAYBE_RAISE_NON_CANONICAL_ADDR_GP0': (McBlock.parseMcGeneric, True, True, False, ), 3025 'IEM_MC_MAYBE_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT': (McBlock.parseMcGeneric, True, True, False, ), 3026 'IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT': (McBlock.parseMcGeneric, True, True, False, ), 3027 'IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE': (McBlock.parseMcGeneric, True, True, False, ), 3028 'IEM_MC_MEM_COMMIT_AND_UNMAP_RW': (McBlock.parseMcGeneric, True, True, True, ), 3029 'IEM_MC_MEM_COMMIT_AND_UNMAP_RO': (McBlock.parseMcGeneric, True, True, True, ), 3030 'IEM_MC_MEM_COMMIT_AND_UNMAP_WO': (McBlock.parseMcGeneric, True, True, True, ), 3031 'IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO': (McBlock.parseMcGeneric, True, True, False, ), 3032 'IEM_MC_MEM_MAP_D80_WO': (McBlock.parseMcGeneric, True, True, True, ), 3033 'IEM_MC_MEM_MAP_I16_WO': (McBlock.parseMcGeneric, True, True, True, ), 3034 'IEM_MC_MEM_MAP_I32_WO': (McBlock.parseMcGeneric, True, True, True, ), 3035 'IEM_MC_MEM_MAP_I64_WO': (McBlock.parseMcGeneric, True, True, True, ), 3036 'IEM_MC_MEM_MAP_R32_WO': (McBlock.parseMcGeneric, True, True, True, ), 3037 'IEM_MC_MEM_MAP_R64_WO': (McBlock.parseMcGeneric, True, True, True, ), 3038 'IEM_MC_MEM_MAP_R80_WO': (McBlock.parseMcGeneric, True, True, True, ), 3039 'IEM_MC_MEM_MAP_U8_RW': (McBlock.parseMcGeneric, True, True, True, ), 3040 'IEM_MC_MEM_MAP_U8_RO': (McBlock.parseMcGeneric, True, True, True, ), 3041 'IEM_MC_MEM_MAP_U8_WO': (McBlock.parseMcGeneric, True, True, True, ), 3042 'IEM_MC_MEM_MAP_U16_RW': (McBlock.parseMcGeneric, True, True, True, ), 3043 'IEM_MC_MEM_MAP_U16_RO': (McBlock.parseMcGeneric, True, True, True, ), 3044 'IEM_MC_MEM_MAP_U16_WO': (McBlock.parseMcGeneric, True, True, True, ), 3045 'IEM_MC_MEM_MAP_U32_RW': (McBlock.parseMcGeneric, True, True, True, ), 3046 'IEM_MC_MEM_MAP_U32_RO': (McBlock.parseMcGeneric, True, True, True, ), 3047 'IEM_MC_MEM_MAP_U32_WO': (McBlock.parseMcGeneric, True, True, True, ), 3048 'IEM_MC_MEM_MAP_U64_RW': (McBlock.parseMcGeneric, True, True, True, ), 3049 'IEM_MC_MEM_MAP_U64_RO': (McBlock.parseMcGeneric, True, True, True, ), 3050 'IEM_MC_MEM_MAP_U64_WO': (McBlock.parseMcGeneric, True, True, True, ), 3051 'IEM_MC_MEM_MAP_U128_RW': (McBlock.parseMcGeneric, True, True, True, ), 3052 'IEM_MC_MEM_MAP_U128_RO': (McBlock.parseMcGeneric, True, True, True, ), 3053 'IEM_MC_MEM_MAP_U128_WO': (McBlock.parseMcGeneric, True, True, True, ), 3054 'IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO': (McBlock.parseMcGeneric, True, True, True, ), 3055 'IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3056 'IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3057 'IEM_MC_MERGE_YREG_U64HI_U64HI_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3058 'IEM_MC_MERGE_YREG_U64LO_U64LO_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3059 'IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3060 'IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3061 'IEM_MC_MODIFIED_MREG': (McBlock.parseMcGeneric, True, True, False, ), 3062 'IEM_MC_MODIFIED_MREG_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3063 'IEM_MC_OR_2LOCS_U32': (McBlock.parseMcGeneric, False, False, False, ), 3064 'IEM_MC_OR_GREG_U16': (McBlock.parseMcGeneric, True, True, False, ), 3065 'IEM_MC_OR_GREG_U32': (McBlock.parseMcGeneric, True, True, False, ), 3066 'IEM_MC_OR_GREG_U64': (McBlock.parseMcGeneric, True, True, False, ), 3067 'IEM_MC_OR_GREG_U8': (McBlock.parseMcGeneric, True, True, False, ), 3068 'IEM_MC_OR_LOCAL_U16': (McBlock.parseMcGeneric, False, False, False, ), 3069 'IEM_MC_OR_LOCAL_U32': (McBlock.parseMcGeneric, False, False, False, ), 3070 'IEM_MC_OR_LOCAL_U8': (McBlock.parseMcGeneric, False, False, False, ), 3071 'IEM_MC_POP_GREG_U16': (McBlock.parseMcGeneric, True, True, True, ), 3072 'IEM_MC_POP_GREG_U32': (McBlock.parseMcGeneric, True, True, True, ), 3073 'IEM_MC_POP_GREG_U64': (McBlock.parseMcGeneric, True, True, True, ), 3074 'IEM_MC_PREPARE_AVX_USAGE': (McBlock.parseMcGeneric, False, False, True), 3075 'IEM_MC_PREPARE_FPU_USAGE': (McBlock.parseMcGeneric, False, False, True), 3076 'IEM_MC_PREPARE_SSE_USAGE': (McBlock.parseMcGeneric, False, False, True), 3077 'IEM_MC_PUSH_FPU_RESULT': (McBlock.parseMcGeneric, True, True, False, ), 3078 'IEM_MC_PUSH_FPU_RESULT_MEM_OP': (McBlock.parseMcGeneric, True, True, False, ), 3079 'IEM_MC_PUSH_FPU_RESULT_TWO': (McBlock.parseMcGeneric, True, True, False, ), 3080 'IEM_MC_PUSH_U16': (McBlock.parseMcGeneric, True, True, True, ), 3081 'IEM_MC_PUSH_U32': (McBlock.parseMcGeneric, True, True, True, ), 3082 'IEM_MC_PUSH_U32_SREG': (McBlock.parseMcGeneric, True, True, True, ), 3083 'IEM_MC_PUSH_U64': (McBlock.parseMcGeneric, True, True, True, ), 3084 'IEM_MC_RAISE_DIVIDE_ERROR': (McBlock.parseMcGeneric, True, True, False, ), 3085 'IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO': (McBlock.parseMcGeneric, True, True, False, ), 3086 'IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED': (McBlock.parseMcGeneric, True, True, False, ), 3087 'IEM_MC_RAISE_SSE_AVX_SIMD_FP_OR_UD_XCPT': (McBlock.parseMcGeneric, True, True, False, ), 3088 'IEM_MC_REF_EFLAGS': (McBlock.parseMcGeneric, False, False, True, ), 3089 'IEM_MC_REF_FPUREG': (McBlock.parseMcGeneric, False, False, False, ), 3090 'IEM_MC_REF_GREG_I32': (McBlock.parseMcGeneric, False, False, True, ), 3091 'IEM_MC_REF_GREG_I32_CONST': (McBlock.parseMcGeneric, False, False, True, ), 3092 'IEM_MC_REF_GREG_I64': (McBlock.parseMcGeneric, False, False, True, ), 3093 'IEM_MC_REF_GREG_I64_CONST': (McBlock.parseMcGeneric, False, False, True, ), 3094 'IEM_MC_REF_GREG_U16': (McBlock.parseMcGeneric, False, False, True, ), 3095 'IEM_MC_REF_GREG_U16_CONST': (McBlock.parseMcGeneric, False, False, True, ), 3096 'IEM_MC_REF_GREG_U32': (McBlock.parseMcGeneric, False, False, True, ), 3097 'IEM_MC_REF_GREG_U32_CONST': (McBlock.parseMcGeneric, False, False, True, ), 3098 'IEM_MC_REF_GREG_U64': (McBlock.parseMcGeneric, False, False, True, ), 3099 'IEM_MC_REF_GREG_U64_CONST': (McBlock.parseMcGeneric, False, False, True, ), 3100 'IEM_MC_REF_GREG_U8': (McBlock.parseMcGeneric, False, False, False, ), # threaded 3101 'IEM_MC_REF_GREG_U8_CONST': (McBlock.parseMcGeneric, False, False, False, ), # threaded 3102 'IEM_MC_REF_LOCAL': (McBlock.parseMcGeneric, False, False, False, ), # eliminate! 3103 'IEM_MC_REF_MREG_U32_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3104 'IEM_MC_REF_MREG_U64': (McBlock.parseMcGeneric, False, False, False, ), 3105 'IEM_MC_REF_MREG_U64_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3106 'IEM_MC_REF_MXCSR': (McBlock.parseMcGeneric, False, False, False, ), 3107 'IEM_MC_REF_XREG_R32_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3108 'IEM_MC_REF_XREG_R64_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3109 'IEM_MC_REF_XREG_U128': (McBlock.parseMcGeneric, False, False, False, ), 3110 'IEM_MC_REF_XREG_U128_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3111 'IEM_MC_REF_XREG_U32_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3112 'IEM_MC_REF_XREG_U64_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3113 'IEM_MC_REF_XREG_XMM_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3114 'IEM_MC_REF_YREG_U128': (McBlock.parseMcGeneric, False, False, False, ), 3115 'IEM_MC_REF_YREG_U128_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3116 'IEM_MC_REF_YREG_U64_CONST': (McBlock.parseMcGeneric, False, False, False, ), 3117 'IEM_MC_REL_JMP_S16_AND_FINISH': (McBlock.parseMcGeneric, True, True, False, ), 3118 'IEM_MC_REL_JMP_S32_AND_FINISH': (McBlock.parseMcGeneric, True, True, False, ), 3119 'IEM_MC_REL_JMP_S8_AND_FINISH': (McBlock.parseMcGeneric, True, True, False, ), 3120 'IEM_MC_RETURN_ON_FAILURE': (McBlock.parseMcGeneric, False, False, False, ), 3121 'IEM_MC_SAR_LOCAL_S16': (McBlock.parseMcGeneric, False, False, False, ), 3122 'IEM_MC_SAR_LOCAL_S32': (McBlock.parseMcGeneric, False, False, False, ), 3123 'IEM_MC_SAR_LOCAL_S64': (McBlock.parseMcGeneric, False, False, False, ), 3124 'IEM_MC_SET_EFL_BIT': (McBlock.parseMcGeneric, True, True, False, ), 3125 'IEM_MC_SET_FPU_RESULT': (McBlock.parseMcGeneric, True, True, False, ), 3126 'IEM_MC_SET_RIP_U16_AND_FINISH': (McBlock.parseMcGeneric, True, True, False, ), 3127 'IEM_MC_SET_RIP_U32_AND_FINISH': (McBlock.parseMcGeneric, True, True, False, ), 3128 'IEM_MC_SET_RIP_U64_AND_FINISH': (McBlock.parseMcGeneric, True, True, False, ), 3129 'IEM_MC_SHL_LOCAL_S16': (McBlock.parseMcGeneric, False, False, False, ), 3130 'IEM_MC_SHL_LOCAL_S32': (McBlock.parseMcGeneric, False, False, False, ), 3131 'IEM_MC_SHL_LOCAL_S64': (McBlock.parseMcGeneric, False, False, False, ), 3132 'IEM_MC_SHR_LOCAL_U8': (McBlock.parseMcGeneric, False, False, False, ), 3133 'IEM_MC_SSE_UPDATE_MXCSR': (McBlock.parseMcGeneric, True, True, False, ), 3134 'IEM_MC_STORE_FPU_RESULT': (McBlock.parseMcGeneric, True, True, False, ), 3135 'IEM_MC_STORE_FPU_RESULT_MEM_OP': (McBlock.parseMcGeneric, True, True, False, ), 3136 'IEM_MC_STORE_FPU_RESULT_THEN_POP': (McBlock.parseMcGeneric, True, True, False, ), 3137 'IEM_MC_STORE_FPU_RESULT_WITH_MEM_OP_THEN_POP': (McBlock.parseMcGeneric, True, True, False, ), 3138 'IEM_MC_STORE_FPUREG_R80_SRC_REF': (McBlock.parseMcGeneric, True, True, False, ), 3139 'IEM_MC_STORE_GREG_I64': (McBlock.parseMcGeneric, True, True, False, ), 3140 'IEM_MC_STORE_GREG_U16': (McBlock.parseMcGeneric, True, True, True, ), 3141 'IEM_MC_STORE_GREG_U16_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3142 'IEM_MC_STORE_GREG_U32': (McBlock.parseMcGeneric, True, True, True, ), 3143 'IEM_MC_STORE_GREG_U32_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3144 'IEM_MC_STORE_GREG_U64': (McBlock.parseMcGeneric, True, True, True, ), 3145 'IEM_MC_STORE_GREG_U64_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3146 'IEM_MC_STORE_GREG_U8': (McBlock.parseMcGeneric, True, True, True, ), # thrd var 3147 'IEM_MC_STORE_GREG_U8_CONST': (McBlock.parseMcGeneric, True, True, True, ), # thrd var 3148 'IEM_MC_STORE_GREG_PAIR_U32': (McBlock.parseMcGeneric, True, True, False, ), 3149 'IEM_MC_STORE_GREG_PAIR_U64': (McBlock.parseMcGeneric, True, True, False, ), 3150 'IEM_MC_STORE_MEM_I16_CONST_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3151 'IEM_MC_STORE_MEM_I32_CONST_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3152 'IEM_MC_STORE_MEM_I64_CONST_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3153 'IEM_MC_STORE_MEM_I8_CONST_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3154 'IEM_MC_STORE_MEM_INDEF_D80_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3155 'IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3156 'IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3157 'IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3158 'IEM_MC_STORE_MEM_U128': (McBlock.parseMcGeneric, True, True, False, ), 3159 'IEM_MC_STORE_MEM_U128_ALIGN_SSE': (McBlock.parseMcGeneric, True, True, False, ), 3160 'IEM_MC_STORE_MEM_U16': (McBlock.parseMcGeneric, True, True, True, ), 3161 'IEM_MC_STORE_MEM_U16_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3162 'IEM_MC_STORE_MEM_U256': (McBlock.parseMcGeneric, True, True, False, ), 3163 'IEM_MC_STORE_MEM_U256_ALIGN_AVX': (McBlock.parseMcGeneric, True, True, False, ), 3164 'IEM_MC_STORE_MEM_U32': (McBlock.parseMcGeneric, True, True, True, ), 3165 'IEM_MC_STORE_MEM_U32_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3166 'IEM_MC_STORE_MEM_U64': (McBlock.parseMcGeneric, True, True, True, ), 3167 'IEM_MC_STORE_MEM_U64_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3168 'IEM_MC_STORE_MEM_U8': (McBlock.parseMcGeneric, True, True, True, ), 3169 'IEM_MC_STORE_MEM_U8_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3170 'IEM_MC_STORE_MREG_U32_ZX_U64': (McBlock.parseMcGeneric, True, True, False, ), 3171 'IEM_MC_STORE_MREG_U64': (McBlock.parseMcGeneric, True, True, False, ), 3172 'IEM_MC_STORE_SREG_BASE_U32': (McBlock.parseMcGeneric, True, True, False, ), 3173 'IEM_MC_STORE_SREG_BASE_U64': (McBlock.parseMcGeneric, True, True, False, ), 3174 'IEM_MC_STORE_SSE_RESULT': (McBlock.parseMcGeneric, True, True, False, ), 3175 'IEM_MC_STORE_XREG_HI_U64': (McBlock.parseMcGeneric, True, True, False, ), 3176 'IEM_MC_STORE_XREG_R32': (McBlock.parseMcGeneric, True, True, False, ), 3177 'IEM_MC_STORE_XREG_R64': (McBlock.parseMcGeneric, True, True, False, ), 3178 'IEM_MC_STORE_XREG_U128': (McBlock.parseMcGeneric, True, True, False, ), 3179 'IEM_MC_STORE_XREG_U16': (McBlock.parseMcGeneric, True, True, False, ), 3180 'IEM_MC_STORE_XREG_U32': (McBlock.parseMcGeneric, True, True, False, ), 3181 'IEM_MC_STORE_XREG_U32_U128': (McBlock.parseMcGeneric, True, True, False, ), 3182 'IEM_MC_STORE_XREG_U32_ZX_U128': (McBlock.parseMcGeneric, True, True, False, ), 3183 'IEM_MC_STORE_XREG_U64': (McBlock.parseMcGeneric, True, True, False, ), 3184 'IEM_MC_STORE_XREG_U64_ZX_U128': (McBlock.parseMcGeneric, True, True, False, ), 3185 'IEM_MC_STORE_XREG_U8': (McBlock.parseMcGeneric, True, True, False, ), 3186 'IEM_MC_STORE_XREG_XMM': (McBlock.parseMcGeneric, True, True, False, ), 3187 'IEM_MC_STORE_XREG_XMM_U32': (McBlock.parseMcGeneric, True, True, False, ), 3188 'IEM_MC_STORE_XREG_XMM_U64': (McBlock.parseMcGeneric, True, True, False, ), 3189 'IEM_MC_STORE_YREG_U128': (McBlock.parseMcGeneric, True, True, False, ), 3190 'IEM_MC_STORE_YREG_U128_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3191 'IEM_MC_STORE_YREG_U256_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3192 'IEM_MC_STORE_YREG_U32_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3193 'IEM_MC_STORE_YREG_U64_ZX_VLMAX': (McBlock.parseMcGeneric, True, True, False, ), 3194 'IEM_MC_SUB_GREG_U16': (McBlock.parseMcGeneric, True, True, True, ), 3195 'IEM_MC_SUB_GREG_U32': (McBlock.parseMcGeneric, True, True, True, ), 3196 'IEM_MC_SUB_GREG_U64': (McBlock.parseMcGeneric, True, True, True, ), 3197 'IEM_MC_SUB_LOCAL_U16': (McBlock.parseMcGeneric, False, False, False, ), 3198 'IEM_MC_UPDATE_FPU_OPCODE_IP': (McBlock.parseMcGeneric, True, True, False, ), 3199 'IEM_MC_UPDATE_FSW': (McBlock.parseMcGeneric, True, True, False, ), 3200 'IEM_MC_UPDATE_FSW_CONST': (McBlock.parseMcGeneric, True, True, False, ), 3201 'IEM_MC_UPDATE_FSW_THEN_POP': (McBlock.parseMcGeneric, True, True, False, ), 3202 'IEM_MC_UPDATE_FSW_THEN_POP_POP': (McBlock.parseMcGeneric, True, True, False, ), 3203 'IEM_MC_UPDATE_FSW_WITH_MEM_OP': (McBlock.parseMcGeneric, True, True, False, ), 3204 'IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP': (McBlock.parseMcGeneric, True, True, False, ), 3205 'IEM_MC_NO_NATIVE_RECOMPILE': (McBlock.parseMcGeneric, False, False, False, ), 3198 3206 }; 3199 3207 -
trunk/src/VBox/VMM/VMMAll/IEMAllN8vePython.py
r102587 r102876 47 47 ## Supplememnts g_dMcStmtParsers. 48 48 g_dMcStmtThreaded = { 49 'IEM_MC_DEFER_TO_CIMPL_0_RET_THREADED': (None,True, True, ),50 'IEM_MC_DEFER_TO_CIMPL_1_RET_THREADED': (None,True, True, ),51 'IEM_MC_DEFER_TO_CIMPL_2_RET_THREADED': (None,True, True, ),52 'IEM_MC_DEFER_TO_CIMPL_3_RET_THREADED': (None,True, True, ),53 54 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16': (None,True, True, ),55 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32': (None,True, True, ),56 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64': (None,True, True, ),57 58 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None,True, True, ),59 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None,True, True, ),60 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None,True, True, ),61 62 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16': (None,True, True, ),63 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32': (None,True, True, ),64 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64': (None,True, True, ),65 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16': (None,True, True, ),66 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32': (None,True, True, ),67 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64': (None,True, True, ),68 'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32': (None,True, True, ),69 'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64': (None,True, True, ),70 71 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None,True, True, ),72 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None,True, True, ),73 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None,True, True, ),74 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None,True, True, ),75 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None,True, True, ),76 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None,True, True, ),77 'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None,True, True, ),78 'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None,True, True, ),79 80 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16': (None,True, True, ),81 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32': (None,True, True, ),82 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64': (None,True, True, ),83 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC16': (None,True, True, ),84 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32': (None,True, True, ),85 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64': (None,True, True, ),86 'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC32': (None,True, True, ),87 'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64': (None,True, True, ),88 89 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None,True, True, ),90 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None,True, True, ),91 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None,True, True, ),92 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None,True, True, ),93 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None,True, True, ),94 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None,True, True, ),95 'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None,True, True, ),96 'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None,True, True, ),97 98 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_16': (None, False, True, ),99 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_32': (None, False, True, ),100 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_ADDR32': (None, False, True, ),101 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_FSGS': (None, False, True, ),102 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_64': (None, False, True, ),103 104 'IEM_MC_CALL_CIMPL_1_THREADED': (None,True, True, ),105 'IEM_MC_CALL_CIMPL_2_THREADED': (None,True, True, ),106 'IEM_MC_CALL_CIMPL_3_THREADED': (None,True, True, ),107 'IEM_MC_CALL_CIMPL_4_THREADED': (None,True, True, ),108 'IEM_MC_CALL_CIMPL_5_THREADED': (None,True, True, ),109 110 'IEM_MC_STORE_GREG_U8_THREADED': (None,True, True, ),111 'IEM_MC_STORE_GREG_U8_CONST_THREADED': (None,True, True, ),112 'IEM_MC_FETCH_GREG_U8_THREADED': (None, False, True, ),113 'IEM_MC_FETCH_GREG_U8_SX_U16_THREADED': (None, False, True, ),114 'IEM_MC_FETCH_GREG_U8_SX_U32_THREADED': (None, False, True, ),115 'IEM_MC_FETCH_GREG_U8_SX_U64_THREADED': (None, False, True, ),116 'IEM_MC_FETCH_GREG_U8_ZX_U16_THREADED': (None, False, True, ),117 'IEM_MC_FETCH_GREG_U8_ZX_U32_THREADED': (None, False, True, ),118 'IEM_MC_FETCH_GREG_U8_ZX_U64_THREADED': (None, False, True, ),119 'IEM_MC_REF_GREG_U8_THREADED': (None,True, True, ),49 'IEM_MC_DEFER_TO_CIMPL_0_RET_THREADED': (None, True, True, True, ), 50 'IEM_MC_DEFER_TO_CIMPL_1_RET_THREADED': (None, True, True, True, ), 51 'IEM_MC_DEFER_TO_CIMPL_2_RET_THREADED': (None, True, True, True, ), 52 'IEM_MC_DEFER_TO_CIMPL_3_RET_THREADED': (None, True, True, True, ), 53 54 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16': (None, True, True, True, ), 55 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32': (None, True, True, True, ), 56 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64': (None, True, True, True, ), 57 58 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None, True, True, True, ), 59 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None, True, True, True, ), 60 'IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None, True, True, True, ), 61 62 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16': (None, True, True, True, ), 63 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32': (None, True, True, True, ), 64 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64': (None, True, True, True, ), 65 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16': (None, True, True, True, ), 66 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32': (None, True, True, True, ), 67 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64': (None, True, True, True, ), 68 'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32': (None, True, True, True, ), 69 'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64': (None, True, True, True, ), 70 71 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None, True, True, True, ), 72 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None, True, True, True, ), 73 'IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None, True, True, True, ), 74 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None, True, True, True, ), 75 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None, True, True, True, ), 76 'IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None, True, True, True, ), 77 'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None, True, True, True, ), 78 'IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None, True, True, True, ), 79 80 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16': (None, True, True, True, ), 81 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32': (None, True, True, True, ), 82 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64': (None, True, True, True, ), 83 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC16': (None, True, True, True, ), 84 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32': (None, True, True, True, ), 85 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64': (None, True, True, True, ), 86 'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC32': (None, True, True, True, ), 87 'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64': (None, True, True, True, ), 88 89 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None, True, True, True, ), 90 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None, True, True, True, ), 91 'IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None, True, True, True, ), 92 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC16_WITH_FLAGS': (None, True, True, True, ), 93 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None, True, True, True, ), 94 'IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None, True, True, True, ), 95 'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC32_WITH_FLAGS': (None, True, True, True, ), 96 'IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS': (None, True, True, True, ), 97 98 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_16': (None, False, False, True, ), 99 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_32': (None, False, False, True, ), 100 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_ADDR32': (None, False, False, True, ), 101 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_FSGS': (None, False, False, True, ), 102 'IEM_MC_CALC_RM_EFF_ADDR_THREADED_64': (None, False, False, True, ), 103 104 'IEM_MC_CALL_CIMPL_1_THREADED': (None, True, True, True, ), 105 'IEM_MC_CALL_CIMPL_2_THREADED': (None, True, True, True, ), 106 'IEM_MC_CALL_CIMPL_3_THREADED': (None, True, True, True, ), 107 'IEM_MC_CALL_CIMPL_4_THREADED': (None, True, True, True, ), 108 'IEM_MC_CALL_CIMPL_5_THREADED': (None, True, True, True, ), 109 110 'IEM_MC_STORE_GREG_U8_THREADED': (None, True, True, True, ), 111 'IEM_MC_STORE_GREG_U8_CONST_THREADED': (None, True, True, True, ), 112 'IEM_MC_FETCH_GREG_U8_THREADED': (None, False, False, True, ), 113 'IEM_MC_FETCH_GREG_U8_SX_U16_THREADED': (None, False, False, True, ), 114 'IEM_MC_FETCH_GREG_U8_SX_U32_THREADED': (None, False, False, True, ), 115 'IEM_MC_FETCH_GREG_U8_SX_U64_THREADED': (None, False, False, True, ), 116 'IEM_MC_FETCH_GREG_U8_ZX_U16_THREADED': (None, False, False, True, ), 117 'IEM_MC_FETCH_GREG_U8_ZX_U32_THREADED': (None, False, False, True, ), 118 'IEM_MC_FETCH_GREG_U8_ZX_U64_THREADED': (None, False, False, True, ), 119 'IEM_MC_REF_GREG_U8_THREADED': (None, True, True, True, ), 120 120 121 121 # Flat Mem: 122 'IEM_MC_FETCH_MEM16_FLAT_U8': (None,True, False, ),123 'IEM_MC_FETCH_MEM32_FLAT_U8': (None,True, False, ),124 'IEM_MC_FETCH_MEM_FLAT_D80': (None,True, False, ),125 'IEM_MC_FETCH_MEM_FLAT_I16': (None,True, False, ),126 'IEM_MC_FETCH_MEM_FLAT_I32': (None,True, False, ),127 'IEM_MC_FETCH_MEM_FLAT_I64': (None,True, False, ),128 'IEM_MC_FETCH_MEM_FLAT_R32': (None,True, False, ),129 'IEM_MC_FETCH_MEM_FLAT_R64': (None,True, False, ),130 'IEM_MC_FETCH_MEM_FLAT_R80': (None,True, False, ),131 'IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE': (None,True, False, ),132 'IEM_MC_FETCH_MEM_FLAT_U128_NO_AC': (None,True, False, ),133 'IEM_MC_FETCH_MEM_FLAT_U128': (None,True, False, ),134 'IEM_MC_FETCH_MEM_FLAT_U16_DISP': (None,True, True, ),135 'IEM_MC_FETCH_MEM_FLAT_U16_SX_U32': (None,True, True, ),136 'IEM_MC_FETCH_MEM_FLAT_U16_SX_U64': (None,True, True, ),137 'IEM_MC_FETCH_MEM_FLAT_U16': (None,True, True, ),138 'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32': (None,True, True, ),139 'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64': (None,True, True, ),140 'IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX': (None,True, False, ),141 'IEM_MC_FETCH_MEM_FLAT_U256_NO_AC': (None,True, False, ),142 'IEM_MC_FETCH_MEM_FLAT_U256': (None,True, False, ),143 'IEM_MC_FETCH_MEM_FLAT_U32': (None,True, True, ),144 'IEM_MC_FETCH_MEM_FLAT_U32_DISP': (None,True, True, ),145 'IEM_MC_FETCH_MEM_FLAT_U32_SX_U64': (None,True, True, ),146 'IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64': (None,True, True, ),147 'IEM_MC_FETCH_MEM_FLAT_U64': (None,True, True, ),148 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U16': (None,True, True, ),149 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U32': (None,True, True, ),150 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U64': (None,True, True, ),151 'IEM_MC_FETCH_MEM_FLAT_U8': (None,True, True, ),152 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16': (None,True, True, ),153 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32': (None,True, True, ),154 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64': (None,True, True, ),155 'IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE': (None,True, False, ),156 'IEM_MC_FETCH_MEM_FLAT_XMM_U32': (None,True, False, ),157 'IEM_MC_FETCH_MEM_FLAT_XMM_U64': (None,True, False, ),158 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128': (None,True, False, ),159 'IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM': (None,True, False, ),160 'IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM': (None,True, False, ),161 'IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM': (None,True, False, ),162 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_RAX_RDX_U64': (None,True, False, ),163 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64': (None,True, False, ),164 'IEM_MC_MEM_FLAT_MAP_D80_WO': (None,True, True, ),165 'IEM_MC_MEM_FLAT_MAP_I16_WO': (None,True, True, ),166 'IEM_MC_MEM_FLAT_MAP_I32_WO': (None,True, True, ),167 'IEM_MC_MEM_FLAT_MAP_I64_WO': (None,True, True, ),168 'IEM_MC_MEM_FLAT_MAP_R32_WO': (None,True, True, ),169 'IEM_MC_MEM_FLAT_MAP_R64_WO': (None,True, True, ),170 'IEM_MC_MEM_FLAT_MAP_R80_WO': (None,True, True, ),171 'IEM_MC_MEM_FLAT_MAP_U8_RO': (None,True, True, ),172 'IEM_MC_MEM_FLAT_MAP_U8_RW': (None,True, True, ),173 'IEM_MC_MEM_FLAT_MAP_U16_RO': (None,True, True, ),174 'IEM_MC_MEM_FLAT_MAP_U16_RW': (None,True, True, ),175 'IEM_MC_MEM_FLAT_MAP_U32_RO': (None,True, True, ),176 'IEM_MC_MEM_FLAT_MAP_U32_RW': (None,True, True, ),177 'IEM_MC_MEM_FLAT_MAP_U64_RO': (None,True, True, ),178 'IEM_MC_MEM_FLAT_MAP_U64_RW': (None,True, True, ),179 'IEM_MC_MEM_FLAT_MAP_U128_RW': (None,True, True, ),180 'IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE': (None,True, False, ),181 'IEM_MC_STORE_MEM_FLAT_U128': (None,True, False, ),182 'IEM_MC_STORE_MEM_FLAT_U16': (None,True, True, ),183 'IEM_MC_STORE_MEM_FLAT_U16_CONST': (None,True, True, ),184 'IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX': (None,True, False, ),185 'IEM_MC_STORE_MEM_FLAT_U256': (None,True, False, ),186 'IEM_MC_STORE_MEM_FLAT_U32': (None,True, True, ),187 'IEM_MC_STORE_MEM_FLAT_U32_CONST': (None,True, True, ),188 'IEM_MC_STORE_MEM_FLAT_U64': (None,True, True, ),189 'IEM_MC_STORE_MEM_FLAT_U64_CONST': (None,True, True, ),190 'IEM_MC_STORE_MEM_FLAT_U8': (None,True, True, ),191 'IEM_MC_STORE_MEM_FLAT_U8_CONST': (None,True, True, ),122 'IEM_MC_FETCH_MEM16_FLAT_U8': (None, True, True, False, ), 123 'IEM_MC_FETCH_MEM32_FLAT_U8': (None, True, True, False, ), 124 'IEM_MC_FETCH_MEM_FLAT_D80': (None, True, True, False, ), 125 'IEM_MC_FETCH_MEM_FLAT_I16': (None, True, True, False, ), 126 'IEM_MC_FETCH_MEM_FLAT_I32': (None, True, True, False, ), 127 'IEM_MC_FETCH_MEM_FLAT_I64': (None, True, True, False, ), 128 'IEM_MC_FETCH_MEM_FLAT_R32': (None, True, True, False, ), 129 'IEM_MC_FETCH_MEM_FLAT_R64': (None, True, True, False, ), 130 'IEM_MC_FETCH_MEM_FLAT_R80': (None, True, True, False, ), 131 'IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE': (None, True, True, False, ), 132 'IEM_MC_FETCH_MEM_FLAT_U128_NO_AC': (None, True, True, False, ), 133 'IEM_MC_FETCH_MEM_FLAT_U128': (None, True, True, False, ), 134 'IEM_MC_FETCH_MEM_FLAT_U16_DISP': (None, True, True, True, ), 135 'IEM_MC_FETCH_MEM_FLAT_U16_SX_U32': (None, True, True, True, ), 136 'IEM_MC_FETCH_MEM_FLAT_U16_SX_U64': (None, True, True, True, ), 137 'IEM_MC_FETCH_MEM_FLAT_U16': (None, True, True, True, ), 138 'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32': (None, True, True, True, ), 139 'IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64': (None, True, True, True, ), 140 'IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX': (None, True, True, False, ), 141 'IEM_MC_FETCH_MEM_FLAT_U256_NO_AC': (None, True, True, False, ), 142 'IEM_MC_FETCH_MEM_FLAT_U256': (None, True, True, False, ), 143 'IEM_MC_FETCH_MEM_FLAT_U32': (None, True, True, True, ), 144 'IEM_MC_FETCH_MEM_FLAT_U32_DISP': (None, True, True, True, ), 145 'IEM_MC_FETCH_MEM_FLAT_U32_SX_U64': (None, True, True, True, ), 146 'IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64': (None, True, True, True, ), 147 'IEM_MC_FETCH_MEM_FLAT_U64': (None, True, True, True, ), 148 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U16': (None, True, True, True, ), 149 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U32': (None, True, True, True, ), 150 'IEM_MC_FETCH_MEM_FLAT_U8_SX_U64': (None, True, True, True, ), 151 'IEM_MC_FETCH_MEM_FLAT_U8': (None, True, True, True, ), 152 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16': (None, True, True, True, ), 153 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32': (None, True, True, True, ), 154 'IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64': (None, True, True, True, ), 155 'IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE': (None, True, True, False, ), 156 'IEM_MC_FETCH_MEM_FLAT_XMM_U32': (None, True, True, False, ), 157 'IEM_MC_FETCH_MEM_FLAT_XMM_U64': (None, True, True, False, ), 158 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128': (None, True, True, False, ), 159 'IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM': (None, True, True, False, ), 160 'IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM': (None, True, True, False, ), 161 'IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM': (None, True, True, False, ), 162 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_RAX_RDX_U64': (None, True, True, False, ), 163 'IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64': (None, True, True, False, ), 164 'IEM_MC_MEM_FLAT_MAP_D80_WO': (None, True, True, True, ), 165 'IEM_MC_MEM_FLAT_MAP_I16_WO': (None, True, True, True, ), 166 'IEM_MC_MEM_FLAT_MAP_I32_WO': (None, True, True, True, ), 167 'IEM_MC_MEM_FLAT_MAP_I64_WO': (None, True, True, True, ), 168 'IEM_MC_MEM_FLAT_MAP_R32_WO': (None, True, True, True, ), 169 'IEM_MC_MEM_FLAT_MAP_R64_WO': (None, True, True, True, ), 170 'IEM_MC_MEM_FLAT_MAP_R80_WO': (None, True, True, True, ), 171 'IEM_MC_MEM_FLAT_MAP_U8_RO': (None, True, True, True, ), 172 'IEM_MC_MEM_FLAT_MAP_U8_RW': (None, True, True, True, ), 173 'IEM_MC_MEM_FLAT_MAP_U16_RO': (None, True, True, True, ), 174 'IEM_MC_MEM_FLAT_MAP_U16_RW': (None, True, True, True, ), 175 'IEM_MC_MEM_FLAT_MAP_U32_RO': (None, True, True, True, ), 176 'IEM_MC_MEM_FLAT_MAP_U32_RW': (None, True, True, True, ), 177 'IEM_MC_MEM_FLAT_MAP_U64_RO': (None, True, True, True, ), 178 'IEM_MC_MEM_FLAT_MAP_U64_RW': (None, True, True, True, ), 179 'IEM_MC_MEM_FLAT_MAP_U128_RW': (None, True, True, True, ), 180 'IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE': (None, True, True, False, ), 181 'IEM_MC_STORE_MEM_FLAT_U128': (None, True, True, False, ), 182 'IEM_MC_STORE_MEM_FLAT_U16': (None, True, True, True, ), 183 'IEM_MC_STORE_MEM_FLAT_U16_CONST': (None, True, True, True, ), 184 'IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX': (None, True, True, False, ), 185 'IEM_MC_STORE_MEM_FLAT_U256': (None, True, True, False, ), 186 'IEM_MC_STORE_MEM_FLAT_U32': (None, True, True, True, ), 187 'IEM_MC_STORE_MEM_FLAT_U32_CONST': (None, True, True, True, ), 188 'IEM_MC_STORE_MEM_FLAT_U64': (None, True, True, True, ), 189 'IEM_MC_STORE_MEM_FLAT_U64_CONST': (None, True, True, True, ), 190 'IEM_MC_STORE_MEM_FLAT_U8': (None, True, True, True, ), 191 'IEM_MC_STORE_MEM_FLAT_U8_CONST': (None, True, True, True, ), 192 192 193 193 # Flat Stack: 194 'IEM_MC_FLAT64_PUSH_U16': (None,True, True, ),195 'IEM_MC_FLAT64_PUSH_U64': (None,True, True, ),196 'IEM_MC_FLAT64_POP_GREG_U16': (None,True, True, ),197 'IEM_MC_FLAT64_POP_GREG_U64': (None,True, True, ),198 'IEM_MC_FLAT32_PUSH_U16': (None,True, True, ),199 'IEM_MC_FLAT32_PUSH_U32': (None,True, True, ),200 'IEM_MC_FLAT32_POP_GREG_U16': (None,True, True, ),201 'IEM_MC_FLAT32_POP_GREG_U32': (None,True, True, ),194 'IEM_MC_FLAT64_PUSH_U16': (None, True, True, True, ), 195 'IEM_MC_FLAT64_PUSH_U64': (None, True, True, True, ), 196 'IEM_MC_FLAT64_POP_GREG_U16': (None, True, True, True, ), 197 'IEM_MC_FLAT64_POP_GREG_U64': (None, True, True, True, ), 198 'IEM_MC_FLAT32_PUSH_U16': (None, True, True, True, ), 199 'IEM_MC_FLAT32_PUSH_U32': (None, True, True, True, ), 200 'IEM_MC_FLAT32_POP_GREG_U16': (None, True, True, True, ), 201 'IEM_MC_FLAT32_POP_GREG_U32': (None, True, True, True, ), 202 202 }; 203 203 … … 516 516 if not aInfo: 517 517 raise Exception('Unknown statement: %s' % (oStmt.sName, )); 518 if aInfo[ 2] is False:518 if aInfo[3] is False: 519 519 dRet[oStmt.sName] = 1; 520 elif aInfo[ 2] is not True:521 if isinstance(aInfo[ 2], str):522 if aInfo[ 2] != sHostArch:520 elif aInfo[3] is not True: 521 if isinstance(aInfo[3], str): 522 if aInfo[3] != sHostArch: 523 523 dRet[oStmt.sName] = 1; 524 elif sHostArch not in aInfo[ 2]:524 elif sHostArch not in aInfo[3]: 525 525 dRet[oStmt.sName] = 1; 526 526 #elif not self.fDecode: -
trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp
r102847 r102876 5794 5794 5795 5795 5796 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr) \ 5797 off = iemNativeEmitAddToRip64AndFinishingNoFlags(pReNative, off, (a_cbInstr)) 5798 5799 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr) \ 5800 IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr); \ 5801 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5796 /** The VINF_SUCCESS dummy. */ 5797 template<int const a_rcNormal> 5798 DECL_FORCE_INLINE(uint32_t) 5799 iemNativeEmitFinishInstructionWithStatus(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxInstr) 5800 { 5801 AssertCompile(a_rcNormal == VINF_SUCCESS || a_rcNormal == VINF_IEM_REEXEC_BREAK); 5802 if (a_rcNormal != VINF_SUCCESS) 5803 { 5804 #ifdef IEMNATIVE_WITH_INSTRUCTION_COUNTING 5805 off = iemNativeEmitStoreImmToVCpuU8(pReNative, off, idxInstr, RT_UOFFSETOF(VMCPUCC, iem.s.idxTbCurInstr)); 5806 #endif 5807 return iemNativeEmitJmpToNewLabel(pReNative, off, kIemNativeLabelType_ReturnBreak); 5808 } 5809 return off; 5810 } 5811 5812 5813 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr, a_rcNormal) \ 5814 off = iemNativeEmitAddToRip64AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \ 5815 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5816 5817 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr, a_rcNormal) \ 5818 off = iemNativeEmitAddToRip64AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \ 5819 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 5820 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5802 5821 5803 5822 /** Same as iemRegAddToRip64AndFinishingNoFlags. */ … … 5819 5838 5820 5839 5821 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr) \ 5822 off = iemNativeEmitAddToEip32AndFinishingNoFlags(pReNative, off, (a_cbInstr)) 5823 5824 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr) \ 5825 IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr); \ 5826 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5840 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr, a_rcNormal) \ 5841 off = iemNativeEmitAddToEip32AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \ 5842 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5843 5844 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr, a_rcNormal) \ 5845 off = iemNativeEmitAddToEip32AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \ 5846 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 5847 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5827 5848 5828 5849 /** Same as iemRegAddToEip32AndFinishingNoFlags. */ … … 5844 5865 5845 5866 5846 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr) \ 5847 off = iemNativeEmitAddToIp16AndFinishingNoFlags(pReNative, off, (a_cbInstr)) 5848 5849 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr) \ 5850 IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr); \ 5851 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5867 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr, a_rcNormal) \ 5868 off = iemNativeEmitAddToIp16AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \ 5869 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5870 5871 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr, a_rcNormal) \ 5872 off = iemNativeEmitAddToIp16AndFinishingNoFlags(pReNative, off, (a_cbInstr)); \ 5873 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 5874 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5852 5875 5853 5876 /** Same as iemRegAddToIp16AndFinishingNoFlags. */ … … 5875 5898 *********************************************************************************************************************************/ 5876 5899 5877 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize ) \5900 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) \ 5878 5901 off = iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), \ 5879 (a_enmEffOpSize), pCallEntry->idxInstr) 5880 5881 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize) \ 5882 IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize); \ 5883 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5884 5885 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr) \ 5902 (a_enmEffOpSize), pCallEntry->idxInstr); \ 5903 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5904 5905 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) \ 5906 off = iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), \ 5907 (a_enmEffOpSize), pCallEntry->idxInstr); \ 5908 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 5909 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5910 5911 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_rcNormal) \ 5886 5912 off = iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), \ 5887 IEMMODE_16BIT, pCallEntry->idxInstr) 5888 5889 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr) \ 5890 IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr); \ 5891 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5892 5893 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr) \ 5913 IEMMODE_16BIT, pCallEntry->idxInstr); \ 5914 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5915 5916 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) \ 5917 off = iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), \ 5918 IEMMODE_16BIT, pCallEntry->idxInstr); \ 5919 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 5920 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5921 5922 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr, a_rcNormal) \ 5894 5923 off = iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), \ 5895 IEMMODE_64BIT, pCallEntry->idxInstr) 5896 5897 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr) \ 5898 IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr); \ 5899 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5924 IEMMODE_64BIT, pCallEntry->idxInstr); \ 5925 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5926 5927 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) \ 5928 off = iemNativeEmitRip64RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), \ 5929 IEMMODE_64BIT, pCallEntry->idxInstr); \ 5930 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 5931 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5900 5932 5901 5933 /** Same as iemRegRip64RelativeJumpS8AndFinishNoFlags, … … 5937 5969 5938 5970 5939 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize ) \5971 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) \ 5940 5972 off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), \ 5941 (a_enmEffOpSize), pCallEntry->idxInstr) 5942 5943 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize) \ 5944 IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize); \ 5945 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5946 5947 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr) \ 5973 (a_enmEffOpSize), pCallEntry->idxInstr); \ 5974 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5975 5976 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) \ 5977 off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), \ 5978 (a_enmEffOpSize), pCallEntry->idxInstr); \ 5979 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 5980 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5981 5982 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_rcNormal) \ 5948 5983 off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), \ 5949 IEMMODE_16BIT, pCallEntry->idxInstr) 5950 5951 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr) \ 5952 IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr); \ 5953 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5954 5955 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr) \ 5984 IEMMODE_16BIT, pCallEntry->idxInstr); \ 5985 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5986 5987 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) \ 5988 off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), \ 5989 IEMMODE_16BIT, pCallEntry->idxInstr); \ 5990 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 5991 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5992 5993 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr, a_rcNormal) \ 5956 5994 off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), \ 5957 IEMMODE_32BIT, pCallEntry->idxInstr) 5958 5959 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr) \ 5960 IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr); \ 5961 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 5995 IEMMODE_32BIT, pCallEntry->idxInstr); \ 5996 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5997 5998 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) \ 5999 off = iemNativeEmitEip32RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), \ 6000 IEMMODE_32BIT, pCallEntry->idxInstr); \ 6001 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 6002 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 5962 6003 5963 6004 /** Same as iemRegEip32RelativeJumpS8AndFinishNoFlags, … … 5995 6036 5996 6037 5997 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr) \ 5998 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), pCallEntry->idxInstr) 5999 6000 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr) \ 6001 IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr); \ 6002 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 6003 6004 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr) \ 6005 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), pCallEntry->idxInstr) 6006 6007 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr) \ 6008 IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr); \ 6009 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 6010 6011 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr) \ 6012 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), pCallEntry->idxInstr) 6013 6014 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr) \ 6015 IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr); \ 6016 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off) 6038 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr, a_rcNormal) \ 6039 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), pCallEntry->idxInstr); \ 6040 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 6041 6042 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr, a_rcNormal) \ 6043 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int8_t)(a_i8), pCallEntry->idxInstr); \ 6044 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 6045 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 6046 6047 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr, a_rcNormal) \ 6048 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), pCallEntry->idxInstr); \ 6049 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 6050 6051 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) \ 6052 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (int16_t)(a_i16), pCallEntry->idxInstr); \ 6053 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 6054 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 6055 6056 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr, a_rcNormal) \ 6057 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), pCallEntry->idxInstr); \ 6058 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 6059 6060 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) \ 6061 off = iemNativeEmitIp16RelativeJumpAndFinishingNoFlags(pReNative, off, (a_cbInstr), (a_i32), pCallEntry->idxInstr); \ 6062 off = iemNativeEmitFinishInstructionFlagsCheck(pReNative, off); \ 6063 off = iemNativeEmitFinishInstructionWithStatus<a_rcNormal>(pReNative, off, pCallEntry->idxInstr) 6017 6064 6018 6065 /** Same as iemRegIp16RelativeJumpS8AndFinishNoFlags. */ … … 6661 6708 6662 6709 6663 #define IEM_MC_IF_CX_IS_N Z_AND_EFL_BIT_SET(a_fBit) \6664 off = iemNativeEmitIfCxIsNot ZeroAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/); \6710 #define IEM_MC_IF_CX_IS_NOT_ONE() \ 6711 off = iemNativeEmitIfCxIsNotOne(pReNative, off); \ 6665 6712 do { 6666 6713 6667 #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) \ 6668 off = iemNativeEmitIfCxIsNotZeroAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/); \ 6714 /** Emits code for IEM_MC_IF_CX_IS_NOT_ONE. */ 6715 DECL_INLINE_THROW(uint32_t) iemNativeEmitIfCxIsNotOne(PIEMRECOMPILERSTATE pReNative, uint32_t off) 6716 { 6717 PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative); 6718 6719 uint8_t const idxGstRcxReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, IEMNATIVEGSTREG_GPR(X86_GREG_xCX), 6720 kIemNativeGstRegUse_ReadOnly); 6721 #ifdef RT_ARCH_AMD64 6722 off = iemNativeEmitTestIfGpr16EqualsImmAndJmpToLabel(pReNative, off, idxGstRcxReg, 1, pEntry->idxLabelElse); 6723 #else 6724 uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off); 6725 off = iemNativeEmitTestIfGpr16EqualsImmAndJmpToLabel(pReNative, off, idxGstRcxReg, 1, pEntry->idxLabelElse, idxTmpReg); 6726 iemNativeRegFreeTmp(pReNative, idxTmpReg); 6727 #endif 6728 iemNativeRegFreeTmp(pReNative, idxGstRcxReg); 6729 6730 iemNativeCondStartIfBlock(pReNative, off); 6731 return off; 6732 } 6733 6734 6735 #define IEM_MC_IF_ECX_IS_NOT_ONE() \ 6736 off = iemNativeEmitIfRcxEcxIsNotOne(pReNative, off, false /*f64Bit*/); \ 6669 6737 do { 6670 6738 6671 /** Emits code for IEM_MC_IF_CX_IS_NZ. */ 6739 #define IEM_MC_IF_RCX_IS_NOT_ONE() \ 6740 off = iemNativeEmitIfRcxEcxIsNotOne(pReNative, off, true /*f64Bit*/); \ 6741 do { 6742 6743 /** Emits code for IEM_MC_IF_ECX_IS_NOT_ONE and IEM_MC_IF_RCX_IS_NOT_ONE. */ 6744 DECL_INLINE_THROW(uint32_t) iemNativeEmitIfRcxEcxIsNotOne(PIEMRECOMPILERSTATE pReNative, uint32_t off, bool f64Bit) 6745 { 6746 PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative); 6747 6748 uint8_t const idxGstRcxReg = iemNativeRegAllocTmpForGuestReg(pReNative, &off, IEMNATIVEGSTREG_GPR(X86_GREG_xCX), 6749 kIemNativeGstRegUse_ReadOnly); 6750 if (f64Bit) 6751 off = iemNativeEmitTestIfGprEqualsImmAndJmpToLabel(pReNative, off, idxGstRcxReg, 1, pEntry->idxLabelElse); 6752 else 6753 off = iemNativeEmitTestIfGpr32EqualsImmAndJmpToLabel(pReNative, off, idxGstRcxReg, 1, pEntry->idxLabelElse); 6754 iemNativeRegFreeTmp(pReNative, idxGstRcxReg); 6755 6756 iemNativeCondStartIfBlock(pReNative, off); 6757 return off; 6758 } 6759 6760 6761 #define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 6762 off = iemNativeEmitIfCxIsNotOneAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/); \ 6763 do { 6764 6765 #define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 6766 off = iemNativeEmitIfCxIsNotOneAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/); \ 6767 do { 6768 6769 /** Emits code for IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET and 6770 * IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET. */ 6672 6771 DECL_INLINE_THROW(uint32_t) 6673 iemNativeEmitIfCxIsNot ZeroAndTestEflagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl, bool fCheckIfSet)6772 iemNativeEmitIfCxIsNotOneAndTestEflagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint32_t fBitInEfl, bool fCheckIfSet) 6674 6773 { 6675 6774 PIEMNATIVECOND const pEntry = iemNativeCondPushIf(pReNative); … … 6688 6787 * worth it. */ 6689 6788 /* Check CX. */ 6690 off = iemNativeEmitTestAnyBitsInGprAndJmpToLabelIfNoneSet(pReNative, off, idxGstRcxReg, UINT16_MAX, pEntry->idxLabelElse); 6789 #ifdef RT_ARCH_AMD64 6790 off = iemNativeEmitTestIfGpr16EqualsImmAndJmpToLabel(pReNative, off, idxGstRcxReg, 1, pEntry->idxLabelElse); 6791 #else 6792 uint8_t const idxTmpReg = iemNativeRegAllocTmp(pReNative, &off); 6793 off = iemNativeEmitTestIfGpr16EqualsImmAndJmpToLabel(pReNative, off, idxGstRcxReg, 1, pEntry->idxLabelElse, idxTmpReg); 6794 iemNativeRegFreeTmp(pReNative, idxTmpReg); 6795 #endif 6691 6796 6692 6797 /* Check the EFlags bit. */ … … 6704 6809 6705 6810 6706 #define IEM_MC_IF_ECX_IS_N Z_AND_EFL_BIT_SET(a_fBit) \6707 off = iemNativeEmitIfRcxEcxIsNot ZeroAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/, false /*f64Bit*/); \6811 #define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 6812 off = iemNativeEmitIfRcxEcxIsNotOneAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/, false /*f64Bit*/); \ 6708 6813 do { 6709 6814 6710 #define IEM_MC_IF_ECX_IS_N Z_AND_EFL_BIT_NOT_SET(a_fBit) \6711 off = iemNativeEmitIfRcxEcxIsNot ZeroAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/, false /*f64Bit*/); \6815 #define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 6816 off = iemNativeEmitIfRcxEcxIsNotOneAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/, false /*f64Bit*/); \ 6712 6817 do { 6713 6818 6714 #define IEM_MC_IF_RCX_IS_N Z_AND_EFL_BIT_SET(a_fBit) \6715 off = iemNativeEmitIfRcxEcxIsNot ZeroAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/, true /*f64Bit*/); \6819 #define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 6820 off = iemNativeEmitIfRcxEcxIsNotOneAndTestEflagsBit(pReNative, off, a_fBit, true /*fCheckIfSet*/, true /*f64Bit*/); \ 6716 6821 do { 6717 6822 6718 #define IEM_MC_IF_RCX_IS_N Z_AND_EFL_BIT_NOT_SET(a_fBit) \6719 off = iemNativeEmitIfRcxEcxIsNot ZeroAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/, true /*f64Bit*/); \6823 #define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 6824 off = iemNativeEmitIfRcxEcxIsNotOneAndTestEflagsBit(pReNative, off, a_fBit, false /*fCheckIfSet*/, true /*f64Bit*/); \ 6720 6825 do { 6721 6826 6722 /** Emits code for IEM_MC_IF_ECX_IS_N Z_AND_EFL_BIT_SET,6723 * IEM_MC_IF_ECX_IS_N Z_AND_EFL_BIT_NOT_SET,6724 * IEM_MC_IF_RCX_IS_N Z_AND_EFL_BIT_SET and6725 * IEM_MC_IF_RCX_IS_N Z_AND_EFL_BIT_NOT_SET. */6827 /** Emits code for IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET, 6828 * IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET, 6829 * IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET and 6830 * IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET. */ 6726 6831 DECL_INLINE_THROW(uint32_t) 6727 iemNativeEmitIfRcxEcxIsNot ZeroAndTestEflagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off,6832 iemNativeEmitIfRcxEcxIsNotOneAndTestEflagsBit(PIEMRECOMPILERSTATE pReNative, uint32_t off, 6728 6833 uint32_t fBitInEfl, bool fCheckIfSet, bool f64Bit) 6729 6834 { … … 6743 6848 * worth it. */ 6744 6849 /* Check RCX/ECX. */ 6745 off = iemNativeEmitTestIfGprIsZeroAndJmpToLabel(pReNative, off, idxGstRcxReg, f64Bit, pEntry->idxLabelElse); 6850 if (f64Bit) 6851 off = iemNativeEmitTestIfGprEqualsImmAndJmpToLabel(pReNative, off, idxGstRcxReg, 1, pEntry->idxLabelElse); 6852 else 6853 off = iemNativeEmitTestIfGpr32EqualsImmAndJmpToLabel(pReNative, off, idxGstRcxReg, 1, pEntry->idxLabelElse); 6746 6854 6747 6855 /* Check the EFlags bit. */ -
trunk/src/VBox/VMM/VMMAll/IEMAllThrdFuncs.cpp
r102586 r102876 79 79 /** Variant of IEM_MC_ADVANCE_RIP_AND_FINISH with instruction length as param 80 80 * and only used when we're in 16-bit code on a pre-386 CPU. */ 81 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr ) \82 return iemRegAddToIp16AndFinishingNoFlags(pVCpu, a_cbInstr )81 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr, a_rcNormal) \ 82 return iemRegAddToIp16AndFinishingNoFlags(pVCpu, a_cbInstr, a_rcNormal) 83 83 84 84 /** Variant of IEM_MC_ADVANCE_RIP_AND_FINISH with instruction length as param 85 85 * and used for 16-bit and 32-bit code on 386 and later CPUs. */ 86 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr ) \87 return iemRegAddToEip32AndFinishingNoFlags(pVCpu, a_cbInstr )86 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr, a_rcNormal) \ 87 return iemRegAddToEip32AndFinishingNoFlags(pVCpu, a_cbInstr, a_rcNormal) 88 88 89 89 /** Variant of IEM_MC_ADVANCE_RIP_AND_FINISH with instruction length as param 90 90 * and only used when we're in 64-bit code. */ 91 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr ) \92 return iemRegAddToRip64AndFinishingNoFlags(pVCpu, a_cbInstr )91 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr, a_rcNormal) \ 92 return iemRegAddToRip64AndFinishingNoFlags(pVCpu, a_cbInstr, a_rcNormal) 93 93 94 94 … … 96 96 * and only used when we're in 16-bit code on a pre-386 CPU and we need to 97 97 * check and clear flags. */ 98 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr ) \99 return iemRegAddToIp16AndFinishingClearingRF(pVCpu, a_cbInstr )98 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr, a_rcNormal) \ 99 return iemRegAddToIp16AndFinishingClearingRF(pVCpu, a_cbInstr, a_rcNormal) 100 100 101 101 /** Variant of IEM_MC_ADVANCE_RIP_AND_FINISH with instruction length as param 102 102 * and used for 16-bit and 32-bit code on 386 and later CPUs and we need to 103 103 * check and clear flags. */ 104 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr ) \105 return iemRegAddToEip32AndFinishingClearingRF(pVCpu, a_cbInstr )104 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr, a_rcNormal) \ 105 return iemRegAddToEip32AndFinishingClearingRF(pVCpu, a_cbInstr, a_rcNormal) 106 106 107 107 /** Variant of IEM_MC_ADVANCE_RIP_AND_FINISH with instruction length as param 108 108 * and only used when we're in 64-bit code and we need to check and clear 109 109 * flags. */ 110 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr ) \111 return iemRegAddToRip64AndFinishingClearingRF(pVCpu, a_cbInstr )110 #define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr, a_rcNormal) \ 111 return iemRegAddToRip64AndFinishingClearingRF(pVCpu, a_cbInstr, a_rcNormal) 112 112 113 113 #undef IEM_MC_ADVANCE_RIP_AND_FINISH … … 116 116 /** Variant of IEM_MC_REL_JMP_S8_AND_FINISH with instruction length as extra 117 117 * parameter, for use in 16-bit code on a pre-386 CPU. */ 118 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr ) \119 return iemRegIp16RelativeJumpS8AndFinishNoFlags(pVCpu, a_cbInstr, (a_i8) )118 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr, a_rcNormal) \ 119 return iemRegIp16RelativeJumpS8AndFinishNoFlags(pVCpu, a_cbInstr, (a_i8), a_rcNormal) 120 120 121 121 /** Variant of IEM_MC_REL_JMP_S8_AND_FINISH with instruction length and operand 122 122 * size as extra parameters, for use in 16-bit and 32-bit code on 386 and 123 123 * later CPUs. */ 124 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize ) \125 return iemRegEip32RelativeJumpS8AndFinishNoFlags(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize )124 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) \ 125 return iemRegEip32RelativeJumpS8AndFinishNoFlags(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize, a_rcNormal) 126 126 127 127 /** Variant of IEM_MC_REL_JMP_S8_AND_FINISH with instruction length and operand 128 128 * size as extra parameters, for use in 64-bit code. */ 129 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize ) \130 return iemRegRip64RelativeJumpS8AndFinishNoFlags(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize )129 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) \ 130 return iemRegRip64RelativeJumpS8AndFinishNoFlags(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize, a_rcNormal) 131 131 132 132 … … 134 134 * parameter, for use in 16-bit code on a pre-386 CPU and we need to check and 135 135 * clear flags. */ 136 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr ) \137 return iemRegIp16RelativeJumpS8AndFinishClearingRF(pVCpu, a_cbInstr, (a_i8) )136 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr, a_rcNormal) \ 137 return iemRegIp16RelativeJumpS8AndFinishClearingRF(pVCpu, a_cbInstr, (a_i8), a_rcNormal) 138 138 139 139 /** Variant of IEM_MC_REL_JMP_S8_AND_FINISH with instruction length and operand 140 140 * size as extra parameters, for use in 16-bit and 32-bit code on 386 and 141 141 * later CPUs and we need to check and clear flags. */ 142 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize ) \143 return iemRegEip32RelativeJumpS8AndFinishClearingRF(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize )142 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) \ 143 return iemRegEip32RelativeJumpS8AndFinishClearingRF(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize, a_rcNormal) 144 144 145 145 /** Variant of IEM_MC_REL_JMP_S8_AND_FINISH with instruction length and operand 146 146 * size as extra parameters, for use in 64-bit code and we need to check and 147 147 * clear flags. */ 148 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize ) \149 return iemRegRip64RelativeJumpS8AndFinishClearingRF(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize )148 #define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) \ 149 return iemRegRip64RelativeJumpS8AndFinishClearingRF(pVCpu, a_cbInstr, (a_i8), a_enmEffOpSize, a_rcNormal) 150 150 151 151 #undef IEM_MC_REL_JMP_S8_AND_FINISH … … 154 154 /** Variant of IEM_MC_REL_JMP_S16_AND_FINISH with instruction length as 155 155 * param, for use in 16-bit code on a pre-386 CPU. */ 156 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr ) \157 return iemRegEip32RelativeJumpS16AndFinishNoFlags(pVCpu, a_cbInstr, (a_i16) )156 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr, a_rcNormal) \ 157 return iemRegEip32RelativeJumpS16AndFinishNoFlags(pVCpu, a_cbInstr, (a_i16), a_rcNormal) 158 158 159 159 /** Variant of IEM_MC_REL_JMP_S16_AND_FINISH with instruction length as 160 160 * param, for use in 16-bit and 32-bit code on 386 and later CPUs. */ 161 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr ) \162 return iemRegEip32RelativeJumpS16AndFinishNoFlags(pVCpu, a_cbInstr, (a_i16) )161 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_rcNormal) \ 162 return iemRegEip32RelativeJumpS16AndFinishNoFlags(pVCpu, a_cbInstr, (a_i16), a_rcNormal) 163 163 164 164 /** Variant of IEM_MC_REL_JMP_S16_AND_FINISH with instruction length as 165 165 * param, for use in 64-bit code. */ 166 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr ) \167 return iemRegRip64RelativeJumpS16AndFinishNoFlags(pVCpu, a_cbInstr, (a_i16) )166 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_rcNormal) \ 167 return iemRegRip64RelativeJumpS16AndFinishNoFlags(pVCpu, a_cbInstr, (a_i16), a_rcNormal) 168 168 169 169 … … 171 171 * param, for use in 16-bit code on a pre-386 CPU and we need to check and 172 172 * clear flags. */ 173 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr ) \174 return iemRegEip32RelativeJumpS16AndFinishClearingRF(pVCpu, a_cbInstr, (a_i16) )173 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) \ 174 return iemRegEip32RelativeJumpS16AndFinishClearingRF(pVCpu, a_cbInstr, (a_i16), a_rcNormal) 175 175 176 176 /** Variant of IEM_MC_REL_JMP_S16_AND_FINISH with instruction length as 177 177 * param, for use in 16-bit and 32-bit code on 386 and later CPUs and we need 178 178 * to check and clear flags. */ 179 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr ) \180 return iemRegEip32RelativeJumpS16AndFinishClearingRF(pVCpu, a_cbInstr, (a_i16) )179 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) \ 180 return iemRegEip32RelativeJumpS16AndFinishClearingRF(pVCpu, a_cbInstr, (a_i16), a_rcNormal) 181 181 182 182 /** Variant of IEM_MC_REL_JMP_S16_AND_FINISH with instruction length as 183 183 * param, for use in 64-bit code and we need to check and clear flags. */ 184 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr ) \185 return iemRegRip64RelativeJumpS16AndFinishClearingRF(pVCpu, a_cbInstr, (a_i16) )184 #define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) \ 185 return iemRegRip64RelativeJumpS16AndFinishClearingRF(pVCpu, a_cbInstr, (a_i16), a_rcNormal) 186 186 187 187 #undef IEM_MC_REL_JMP_S16_AND_FINISH … … 191 191 * an extra parameter - dummy for pre-386 variations not eliminated by the 192 192 * python script. */ 193 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr ) \194 do { RT_NOREF(pVCpu, a_i32, a_cbInstr ); AssertFailedReturn(VERR_IEM_IPE_9); } while (0)193 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr, a_rcNormal) \ 194 do { RT_NOREF(pVCpu, a_i32, a_cbInstr, a_rcNormal); AssertFailedReturn(VERR_IEM_IPE_9); } while (0) 195 195 196 196 /** Variant of IEM_MC_REL_JMP_S32_AND_FINISH with instruction length as 197 197 * an extra parameter, for use in 16-bit and 32-bit code on 386+. */ 198 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr ) \199 return iemRegEip32RelativeJumpS32AndFinishNoFlags(pVCpu, a_cbInstr, (a_i32) )198 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr, a_rcNormal) \ 199 return iemRegEip32RelativeJumpS32AndFinishNoFlags(pVCpu, a_cbInstr, (a_i32), a_rcNormal) 200 200 201 201 /** Variant of IEM_MC_REL_JMP_S32_AND_FINISH with instruction length as 202 202 * an extra parameter, for use in 64-bit code. */ 203 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr ) \204 return iemRegRip64RelativeJumpS32AndFinishNoFlags(pVCpu, a_cbInstr, (a_i32) )203 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr, a_rcNormal) \ 204 return iemRegRip64RelativeJumpS32AndFinishNoFlags(pVCpu, a_cbInstr, (a_i32), a_rcNormal) 205 205 206 206 … … 208 208 * an extra parameter - dummy for pre-386 variations not eliminated by the 209 209 * python script. */ 210 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr ) \211 do { RT_NOREF(pVCpu, a_i32, a_cbInstr ); AssertFailedReturn(VERR_IEM_IPE_9); } while (0)210 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) \ 211 do { RT_NOREF(pVCpu, a_i32, a_cbInstr, a_rcNormal); AssertFailedReturn(VERR_IEM_IPE_9); } while (0) 212 212 213 213 /** Variant of IEM_MC_REL_JMP_S32_AND_FINISH with instruction length as 214 214 * an extra parameter, for use in 16-bit and 32-bit code on 386+ and we need 215 215 * to check and clear flags. */ 216 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr ) \217 return iemRegEip32RelativeJumpS32AndFinishClearingRF(pVCpu, a_cbInstr, (a_i32) )216 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) \ 217 return iemRegEip32RelativeJumpS32AndFinishClearingRF(pVCpu, a_cbInstr, (a_i32), a_rcNormal) 218 218 219 219 /** Variant of IEM_MC_REL_JMP_S32_AND_FINISH with instruction length as 220 220 * an extra parameter, for use in 64-bit code and we need to check and clear 221 221 * flags. */ 222 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr ) \223 return iemRegRip64RelativeJumpS32AndFinishClearingRF(pVCpu, a_cbInstr, (a_i32) )222 #define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) \ 223 return iemRegRip64RelativeJumpS32AndFinishClearingRF(pVCpu, a_cbInstr, (a_i32), a_rcNormal) 224 224 225 225 #undef IEM_MC_REL_JMP_S32_AND_FINISH -
trunk/src/VBox/VMM/VMMAll/IEMAllThrdPython.py
r102782 r102876 130 130 }; 131 131 132 ## @name McStmtCond.oIfBranchAnnotation/McStmtCond.oElseBranchAnnotation values 133 ## @{ 134 g_ksFinishAnnotation_Advance = 'Advance'; 135 g_ksFinishAnnotation_RelJmp = 'RelJmp'; 136 g_ksFinishAnnotation_SetJmp = 'SetJmp'; 137 g_ksFinishAnnotation_DeferToCImpl = 'DeferToCImpl'; 138 ## @} 139 140 132 141 class ThreadedParamRef(object): 133 142 """ … … 165 174 ## These variations will match translation block selection/distinctions as well. 166 175 ## @{ 167 ksVariation_Default = ''; ##< No variations - only used by IEM_MC_DEFER_TO_CIMPL_X_RET. 168 ksVariation_16 = '_16'; ##< 16-bit mode code (386+). 169 ksVariation_16f = '_16f'; ##< 16-bit mode code (386+), check+clear eflags. 170 ksVariation_16_Addr32 = '_16_Addr32'; ##< 16-bit mode code (386+), address size prefixed to 32-bit addressing. 171 ksVariation_16f_Addr32 = '_16f_Addr32'; ##< 16-bit mode code (386+), address size prefixed to 32-bit addressing, eflags. 172 ksVariation_16_Pre386 = '_16_Pre386'; ##< 16-bit mode code, pre-386 CPU target. 173 ksVariation_16f_Pre386 = '_16f_Pre386'; ##< 16-bit mode code, pre-386 CPU target, check+clear eflags. 174 ksVariation_32 = '_32'; ##< 32-bit mode code (386+). 175 ksVariation_32f = '_32f'; ##< 32-bit mode code (386+), check+clear eflags. 176 ksVariation_32_Flat = '_32_Flat'; ##< 32-bit mode code (386+) with CS, DS, E,S and SS flat and 4GB wide. 177 ksVariation_32f_Flat = '_32f_Flat'; ##< 32-bit mode code (386+) with CS, DS, E,S and SS flat and 4GB wide, eflags. 178 ksVariation_32_Addr16 = '_32_Addr16'; ##< 32-bit mode code (386+), address size prefixed to 16-bit addressing. 179 ksVariation_32f_Addr16 = '_32f_Addr16'; ##< 32-bit mode code (386+), address size prefixed to 16-bit addressing, eflags. 180 ksVariation_64 = '_64'; ##< 64-bit mode code. 181 ksVariation_64f = '_64f'; ##< 64-bit mode code, check+clear eflags. 182 ksVariation_64_FsGs = '_64_FsGs'; ##< 64-bit mode code, with memory accesses via FS or GS. 183 ksVariation_64f_FsGs = '_64f_FsGs'; ##< 64-bit mode code, with memory accesses via FS or GS, check+clear eflags. 184 ksVariation_64_Addr32 = '_64_Addr32'; ##< 64-bit mode code, address size prefixed to 32-bit addressing. 185 ksVariation_64f_Addr32 = '_64f_Addr32'; ##< 64-bit mode code, address size prefixed to 32-bit addressing, c+c eflags. 176 # pylint: disable=line-too-long 177 ksVariation_Default = ''; ##< No variations - only used by IEM_MC_DEFER_TO_CIMPL_X_RET. 178 ksVariation_16 = '_16'; ##< 16-bit mode code (386+). 179 ksVariation_16f = '_16f'; ##< 16-bit mode code (386+), check+clear eflags. 180 ksVariation_16_Jmp = '_16_Jmp'; ##< 16-bit mode code (386+), conditional jump taken. 181 ksVariation_16f_Jmp = '_16f_Jmp'; ##< 16-bit mode code (386+), check+clear eflags, conditional jump taken. 182 ksVariation_16_NoJmp = '_16_NoJmp'; ##< 16-bit mode code (386+), conditional jump not taken. 183 ksVariation_16f_NoJmp = '_16f_NoJmp'; ##< 16-bit mode code (386+), check+clear eflags, conditional jump not taken. 184 ksVariation_16_Addr32 = '_16_Addr32'; ##< 16-bit mode code (386+), address size prefixed to 32-bit addressing. 185 ksVariation_16f_Addr32 = '_16f_Addr32'; ##< 16-bit mode code (386+), address size prefixed to 32-bit addressing, eflags. 186 ksVariation_16_Pre386 = '_16_Pre386'; ##< 16-bit mode code, pre-386 CPU target. 187 ksVariation_16f_Pre386 = '_16f_Pre386'; ##< 16-bit mode code, pre-386 CPU target, check+clear eflags. 188 ksVariation_16_Pre386_Jmp = '_16_Pre386_Jmp'; ##< 16-bit mode code, pre-386 CPU target, conditional jump taken. 189 ksVariation_16f_Pre386_Jmp = '_16f_Pre386_Jmp'; ##< 16-bit mode code, pre-386 CPU target, check+clear eflags, conditional jump taken. 190 ksVariation_16_Pre386_NoJmp = '_16_Pre386_NoJmp'; ##< 16-bit mode code, pre-386 CPU target, conditional jump not taken. 191 ksVariation_16f_Pre386_NoJmp = '_16f_Pre386_NoJmp'; ##< 16-bit mode code, pre-386 CPU target, check+clear eflags, conditional jump not taken. 192 ksVariation_32 = '_32'; ##< 32-bit mode code (386+). 193 ksVariation_32f = '_32f'; ##< 32-bit mode code (386+), check+clear eflags. 194 ksVariation_32_Jmp = '_32_Jmp'; ##< 32-bit mode code (386+), conditional jump taken. 195 ksVariation_32f_Jmp = '_32f_Jmp'; ##< 32-bit mode code (386+), check+clear eflags, conditional jump taken. 196 ksVariation_32_NoJmp = '_32_NoJmp'; ##< 32-bit mode code (386+), conditional jump not taken. 197 ksVariation_32f_NoJmp = '_32f_NoJmp'; ##< 32-bit mode code (386+), check+clear eflags, conditional jump not taken. 198 ksVariation_32_Flat = '_32_Flat'; ##< 32-bit mode code (386+) with CS, DS, E,S and SS flat and 4GB wide. 199 ksVariation_32f_Flat = '_32f_Flat'; ##< 32-bit mode code (386+) with CS, DS, E,S and SS flat and 4GB wide, eflags. 200 ksVariation_32_Addr16 = '_32_Addr16'; ##< 32-bit mode code (386+), address size prefixed to 16-bit addressing. 201 ksVariation_32f_Addr16 = '_32f_Addr16'; ##< 32-bit mode code (386+), address size prefixed to 16-bit addressing, eflags. 202 ksVariation_64 = '_64'; ##< 64-bit mode code. 203 ksVariation_64f = '_64f'; ##< 64-bit mode code, check+clear eflags. 204 ksVariation_64_Jmp = '_64_Jmp'; ##< 64-bit mode code, conditional jump taken. 205 ksVariation_64f_Jmp = '_64f_Jmp'; ##< 64-bit mode code, check+clear eflags, conditional jump taken. 206 ksVariation_64_NoJmp = '_64_NoJmp'; ##< 64-bit mode code, conditional jump not taken. 207 ksVariation_64f_NoJmp = '_64f_NoJmp'; ##< 64-bit mode code, check+clear eflags, conditional jump not taken. 208 ksVariation_64_FsGs = '_64_FsGs'; ##< 64-bit mode code, with memory accesses via FS or GS. 209 ksVariation_64f_FsGs = '_64f_FsGs'; ##< 64-bit mode code, with memory accesses via FS or GS, check+clear eflags. 210 ksVariation_64_Addr32 = '_64_Addr32'; ##< 64-bit mode code, address size prefixed to 32-bit addressing. 211 ksVariation_64f_Addr32 = '_64f_Addr32'; ##< 64-bit mode code, address size prefixed to 32-bit addressing, c+c eflags. 212 # pylint: enable=line-too-long 186 213 kasVariations = ( 187 214 ksVariation_Default, 188 215 ksVariation_16, 189 216 ksVariation_16f, 217 ksVariation_16_Jmp, 218 ksVariation_16f_Jmp, 219 ksVariation_16_NoJmp, 220 ksVariation_16f_NoJmp, 190 221 ksVariation_16_Addr32, 191 222 ksVariation_16f_Addr32, 192 223 ksVariation_16_Pre386, 193 224 ksVariation_16f_Pre386, 225 ksVariation_16_Pre386_Jmp, 226 ksVariation_16f_Pre386_Jmp, 227 ksVariation_16_Pre386_NoJmp, 228 ksVariation_16f_Pre386_NoJmp, 194 229 ksVariation_32, 195 230 ksVariation_32f, 231 ksVariation_32_Jmp, 232 ksVariation_32f_Jmp, 233 ksVariation_32_NoJmp, 234 ksVariation_32f_NoJmp, 196 235 ksVariation_32_Flat, 197 236 ksVariation_32f_Flat, … … 200 239 ksVariation_64, 201 240 ksVariation_64f, 241 ksVariation_64_Jmp, 242 ksVariation_64f_Jmp, 243 ksVariation_64_NoJmp, 244 ksVariation_64f_NoJmp, 202 245 ksVariation_64_FsGs, 203 246 ksVariation_64f_FsGs, … … 321 364 ksVariation_64, 322 365 ksVariation_64f, 366 ksVariation_64_Jmp, 367 ksVariation_64f_Jmp, 368 ksVariation_64_NoJmp, 369 ksVariation_64f_NoJmp, 323 370 ksVariation_64_FsGs, 324 371 ksVariation_64f_FsGs, … … 327 374 ksVariation_32, 328 375 ksVariation_32f, 376 ksVariation_32_Jmp, 377 ksVariation_32f_Jmp, 378 ksVariation_32_NoJmp, 379 ksVariation_32f_NoJmp, 329 380 ksVariation_16, 330 381 ksVariation_16f, 382 ksVariation_16_Jmp, 383 ksVariation_16f_Jmp, 384 ksVariation_16_NoJmp, 385 ksVariation_16f_NoJmp, 331 386 ksVariation_16_Addr32, 332 387 ksVariation_16f_Addr32, 333 388 ksVariation_16_Pre386, 334 389 ksVariation_16f_Pre386, 390 ksVariation_16_Pre386_Jmp, 391 ksVariation_16f_Pre386_Jmp, 392 ksVariation_16_Pre386_NoJmp, 393 ksVariation_16f_Pre386_NoJmp, 335 394 ksVariation_32_Addr16, 336 395 ksVariation_32f_Addr16, … … 339 398 ); 340 399 kdVariationNames = { 341 ksVariation_Default: 'defer-to-cimpl', 342 ksVariation_16: '16-bit', 343 ksVariation_16f: '16-bit w/ eflag checking and clearing', 344 ksVariation_16_Addr32: '16-bit w/ address prefix (Addr32)', 345 ksVariation_16f_Addr32: '16-bit w/ address prefix (Addr32) and eflag checking and clearing', 346 ksVariation_16_Pre386: '16-bit on pre-386 CPU', 347 ksVariation_16f_Pre386: '16-bit on pre-386 CPU w/ eflag checking and clearing', 348 ksVariation_32: '32-bit', 349 ksVariation_32f: '32-bit w/ eflag checking and clearing', 350 ksVariation_32_Flat: '32-bit flat and wide open CS, SS, DS and ES', 351 ksVariation_32f_Flat: '32-bit flat and wide open CS, SS, DS and ES w/ eflag checking and clearing', 352 ksVariation_32_Addr16: '32-bit w/ address prefix (Addr16)', 353 ksVariation_32f_Addr16: '32-bit w/ address prefix (Addr16) and eflag checking and clearing', 354 ksVariation_64: '64-bit', 355 ksVariation_64f: '64-bit w/ eflag checking and clearing', 356 ksVariation_64_FsGs: '64-bit with memory accessed via FS or GS', 357 ksVariation_64f_FsGs: '64-bit with memory accessed via FS or GS and eflag checking and clearing', 358 ksVariation_64_Addr32: '64-bit w/ address prefix (Addr32)', 359 ksVariation_64f_Addr32: '64-bit w/ address prefix (Addr32) and eflag checking and clearing', 400 ksVariation_Default: 'defer-to-cimpl', 401 ksVariation_16: '16-bit', 402 ksVariation_16f: '16-bit w/ eflag checking and clearing', 403 ksVariation_16_Jmp: '16-bit w/ conditional jump taken', 404 ksVariation_16f_Jmp: '16-bit w/ eflag checking and clearing and conditional jump taken', 405 ksVariation_16_NoJmp: '16-bit w/ conditional jump not taken', 406 ksVariation_16f_NoJmp: '16-bit w/ eflag checking and clearing and conditional jump not taken', 407 ksVariation_16_Addr32: '16-bit w/ address prefix (Addr32)', 408 ksVariation_16f_Addr32: '16-bit w/ address prefix (Addr32) and eflag checking and clearing', 409 ksVariation_16_Pre386: '16-bit on pre-386 CPU', 410 ksVariation_16f_Pre386: '16-bit on pre-386 CPU w/ eflag checking and clearing', 411 ksVariation_16_Pre386_Jmp: '16-bit on pre-386 CPU w/ conditional jump taken', 412 ksVariation_16f_Pre386_Jmp: '16-bit on pre-386 CPU w/ eflag checking and clearing and conditional jump taken', 413 ksVariation_16_Pre386_NoJmp: '16-bit on pre-386 CPU w/ conditional jump taken', 414 ksVariation_16f_Pre386_NoJmp: '16-bit on pre-386 CPU w/ eflag checking and clearing and conditional jump taken', 415 ksVariation_32: '32-bit', 416 ksVariation_32f: '32-bit w/ eflag checking and clearing', 417 ksVariation_32_Jmp: '32-bit w/ conditional jump taken', 418 ksVariation_32f_Jmp: '32-bit w/ eflag checking and clearing and conditional jump taken', 419 ksVariation_32_NoJmp: '32-bit w/ conditional jump not taken', 420 ksVariation_32f_NoJmp: '32-bit w/ eflag checking and clearing and conditional jump not taken', 421 ksVariation_32_Flat: '32-bit flat and wide open CS, SS, DS and ES', 422 ksVariation_32f_Flat: '32-bit flat and wide open CS, SS, DS and ES w/ eflag checking and clearing', 423 ksVariation_32_Addr16: '32-bit w/ address prefix (Addr16)', 424 ksVariation_32f_Addr16: '32-bit w/ address prefix (Addr16) and eflag checking and clearing', 425 ksVariation_64: '64-bit', 426 ksVariation_64f: '64-bit w/ eflag checking and clearing', 427 ksVariation_64_Jmp: '64-bit w/ conditional jump taken', 428 ksVariation_64f_Jmp: '64-bit w/ eflag checking and clearing and conditional jump taken', 429 ksVariation_64_NoJmp: '64-bit w/ conditional jump not taken', 430 ksVariation_64f_NoJmp: '64-bit w/ eflag checking and clearing and conditional jump not taken', 431 ksVariation_64_FsGs: '64-bit with memory accessed via FS or GS', 432 ksVariation_64f_FsGs: '64-bit with memory accessed via FS or GS and eflag checking and clearing', 433 ksVariation_64_Addr32: '64-bit w/ address prefix (Addr32)', 434 ksVariation_64f_Addr32: '64-bit w/ address prefix (Addr32) and eflag checking and clearing', 360 435 }; 361 436 kdVariationsWithEflagsCheckingAndClearing = { 362 437 ksVariation_16f: True, 438 ksVariation_16f_Jmp: True, 439 ksVariation_16f_NoJmp: True, 363 440 ksVariation_16f_Addr32: True, 364 441 ksVariation_16f_Pre386: True, 442 ksVariation_16f_Pre386_Jmp: True, 443 ksVariation_16f_Pre386_NoJmp: True, 365 444 ksVariation_32f: True, 445 ksVariation_32f_Jmp: True, 446 ksVariation_32f_NoJmp: True, 366 447 ksVariation_32f_Flat: True, 367 448 ksVariation_32f_Addr16: True, 368 449 ksVariation_64f: True, 450 ksVariation_64f_Jmp: True, 451 ksVariation_64f_NoJmp: True, 369 452 ksVariation_64f_FsGs: True, 370 453 ksVariation_64f_Addr32: True, 454 }; 455 kdVariationsOnly64NoFlags = { 456 ksVariation_64: True, 457 ksVariation_64_Jmp: True, 458 ksVariation_64_NoJmp: True, 459 ksVariation_64_FsGs: True, 460 ksVariation_64_Addr32: True, 461 }; 462 kdVariationsOnly64WithFlags = { 463 ksVariation_64f: True, 464 ksVariation_64f_Jmp: True, 465 ksVariation_64f_NoJmp: True, 466 ksVariation_64f_FsGs: True, 467 ksVariation_64f_Addr32: True, 468 }; 469 kdVariationsOnlyPre386NoFlags = { 470 ksVariation_16_Pre386: True, 471 ksVariation_16_Pre386_Jmp: True, 472 ksVariation_16_Pre386_NoJmp: True, 473 }; 474 kdVariationsOnlyPre386WithFlags = { 475 ksVariation_16f_Pre386: True, 476 ksVariation_16f_Pre386_Jmp: True, 477 ksVariation_16f_Pre386_NoJmp: True, 371 478 }; 372 479 kdVariationsWithFlatAddress = { … … 411 518 ksVariation_32_Flat: True, 412 519 ksVariation_32f_Flat: True, 520 }; 521 kdVariationsWithAddressOnly64 = { 522 ksVariation_64: True, 523 ksVariation_64f: True, 524 ksVariation_64_FsGs: True, 525 ksVariation_64f_FsGs: True, 526 ksVariation_64_Addr32: True, 527 ksVariation_64f_Addr32: True, 528 }; 529 kdVariationsWithConditional = { 530 ksVariation_16_Jmp: True, 531 ksVariation_16_NoJmp: True, 532 ksVariation_16_Pre386_Jmp: True, 533 ksVariation_16_Pre386_NoJmp: True, 534 ksVariation_32_Jmp: True, 535 ksVariation_32_NoJmp: True, 536 ksVariation_64_Jmp: True, 537 ksVariation_64_NoJmp: True, 538 ksVariation_16f_Jmp: True, 539 ksVariation_16f_NoJmp: True, 540 ksVariation_16f_Pre386_Jmp: True, 541 ksVariation_16f_Pre386_NoJmp: True, 542 ksVariation_32f_Jmp: True, 543 ksVariation_32f_NoJmp: True, 544 ksVariation_64f_Jmp: True, 545 ksVariation_64f_NoJmp: True, 546 }; 547 kdVariationsWithConditionalNoJmp = { 548 ksVariation_16_NoJmp: True, 549 ksVariation_16_Pre386_NoJmp: True, 550 ksVariation_32_NoJmp: True, 551 ksVariation_64_NoJmp: True, 552 ksVariation_16f_NoJmp: True, 553 ksVariation_16f_Pre386_NoJmp: True, 554 ksVariation_32f_NoJmp: True, 555 ksVariation_64f_NoJmp: True, 556 }; 557 kdVariationsOnlyPre386 = { 558 ksVariation_16_Pre386: True, 559 ksVariation_16f_Pre386: True, 560 ksVariation_16_Pre386_Jmp: True, 561 ksVariation_16f_Pre386_Jmp: True, 562 ksVariation_16_Pre386_NoJmp: True, 563 ksVariation_16f_Pre386_NoJmp: True, 413 564 }; 414 565 ## @} … … 858 1009 oNewStmt.asParams.append(self.dParamRefs['cbInstr'][0].sNewName); 859 1010 if ( oNewStmt.sName in ('IEM_MC_REL_JMP_S8_AND_FINISH', ) 860 and self.sVariation not in (self.ksVariation_16_Pre386, self.ksVariation_16f_Pre386,)):1011 and self.sVariation not in self.kdVariationsOnlyPre386): 861 1012 oNewStmt.asParams.append(self.dParamRefs['pVCpu->iem.s.enmEffOpSize'][0].sNewName); 862 1013 oNewStmt.sName += '_THREADED'; 863 if self.sVariation in (self.ksVariation_64, self.ksVariation_64_FsGs, self.ksVariation_64_Addr32):1014 if self.sVariation in self.kdVariationsOnly64NoFlags: 864 1015 oNewStmt.sName += '_PC64'; 865 elif self.sVariation in (self.ksVariation_64f, self.ksVariation_64f_FsGs, self.ksVariation_64f_Addr32):1016 elif self.sVariation in self.kdVariationsOnly64WithFlags: 866 1017 oNewStmt.sName += '_PC64_WITH_FLAGS'; 867 elif self.sVariation == self.ksVariation_16_Pre386:1018 elif self.sVariation in self.kdVariationsOnlyPre386NoFlags: 868 1019 oNewStmt.sName += '_PC16'; 869 elif self.sVariation == self.ksVariation_16f_Pre386:1020 elif self.sVariation in self.kdVariationsOnlyPre386WithFlags: 870 1021 oNewStmt.sName += '_PC16_WITH_FLAGS'; 871 1022 elif self.sVariation not in self.kdVariationsWithEflagsCheckingAndClearing: … … 874 1025 else: 875 1026 oNewStmt.sName += '_PC32_WITH_FLAGS'; 1027 1028 # This is making the wrong branch of conditionals break out of the TB. 1029 if (oStmt.sName in ('IEM_MC_ADVANCE_RIP_AND_FINISH', 'IEM_MC_REL_JMP_S8_AND_FINISH', 1030 'IEM_MC_REL_JMP_S16_AND_FINISH', 'IEM_MC_REL_JMP_S32_AND_FINISH')): 1031 sExitTbStatus = 'VINF_SUCCESS'; 1032 if self.sVariation in self.kdVariationsWithConditional: 1033 if self.sVariation in self.kdVariationsWithConditionalNoJmp: 1034 if oStmt.sName != 'IEM_MC_ADVANCE_RIP_AND_FINISH': 1035 sExitTbStatus = 'VINF_IEM_REEXEC_BREAK'; 1036 elif oStmt.sName == 'IEM_MC_ADVANCE_RIP_AND_FINISH': 1037 sExitTbStatus = 'VINF_IEM_REEXEC_BREAK'; 1038 oNewStmt.asParams.append(sExitTbStatus); 876 1039 877 1040 # ... and IEM_MC_*_GREG_U8 into *_THREADED w/ reworked index taking REX into account … … 1028 1191 1029 1192 if ( oStmt.sName in ('IEM_MC_REL_JMP_S8_AND_FINISH',) 1030 and self.sVariation not in (self.ksVariation_16_Pre386, self.ksVariation_16f_Pre386,)):1193 and self.sVariation not in self.kdVariationsOnlyPre386): 1031 1194 self.aoParamRefs.append(ThreadedParamRef('pVCpu->iem.s.enmEffOpSize', 'IEMMODE', oStmt)); 1032 1195 … … 1047 1210 'uint32_t', oStmt, sStdRef = 'u32Disp')); 1048 1211 else: 1049 assert self.sVariation in self.k asVariationsWithAddressOnly64;1212 assert self.sVariation in self.kdVariationsWithAddressOnly64; 1050 1213 self.aoParamRefs.append(ThreadedParamRef('IEM_GET_MODRM_EX(pVCpu, bRm)', 1051 1214 'uint8_t', oStmt, sStdRef = 'bRmEx')); … … 1380 1543 # else blocks, but scan them too to be on the safe side. 1381 1544 if isinstance(oStmt, iai.McStmtCond): 1382 cBefore = len(self.dVariables);1545 #cBefore = len(self.dVariables); 1383 1546 self.analyzeFindVariablesAndCallArgs(oStmt.aoIfBranch); 1384 1547 self.analyzeFindVariablesAndCallArgs(oStmt.aoElseBranch); … … 1394 1557 branch flags to dsCImplFlags. ASSUMES the caller pre-populates the 1395 1558 dictionary with a copy of self.oMcBlock.dsCImplFlags. 1396 """ 1559 1560 This also sets McStmtCond.oIfBranchAnnotation & McStmtCond.oElseBranchAnnotation. 1561 1562 Returns annotation on return style. 1563 """ 1564 sAnnotation = None; 1397 1565 for oStmt in aoStmts: 1398 1566 # Set IEM_IMPL_C_F_BRANCH if we see any branching MCs. … … 1420 1588 raise Exception('Unknown IEM_MC_CALL_* statement: %s' % (oStmt.sName,)); 1421 1589 1590 # Check for return statements. 1591 if oStmt.sName in ('IEM_MC_ADVANCE_RIP_AND_FINISH',): 1592 assert sAnnotation is None; 1593 sAnnotation = g_ksFinishAnnotation_Advance; 1594 elif oStmt.sName in ('IEM_MC_REL_JMP_S8_AND_FINISH', 'IEM_MC_REL_JMP_S16_AND_FINISH', 1595 'IEM_MC_REL_JMP_S32_AND_FINISH',): 1596 assert sAnnotation is None; 1597 sAnnotation = g_ksFinishAnnotation_RelJmp; 1598 elif oStmt.sName in ('IEM_MC_SET_RIP_U16_AND_FINISH', 'IEM_MC_SET_RIP_U32_AND_FINISH', 1599 'IEM_MC_SET_RIP_U64_AND_FINISH',): 1600 assert sAnnotation is None; 1601 sAnnotation = g_ksFinishAnnotation_SetJmp; 1602 elif oStmt.sName.startswith('IEM_MC_DEFER_TO_CIMPL_'): 1603 assert sAnnotation is None; 1604 sAnnotation = g_ksFinishAnnotation_DeferToCImpl; 1605 1422 1606 # Process branches of conditionals recursively. 1423 1607 if isinstance(oStmt, iai.McStmtCond): 1424 self.analyzeCodeOperation(oStmt.aoIfBranch, True);1608 oStmt.oIfBranchAnnotation = self.analyzeCodeOperation(oStmt.aoIfBranch, True); 1425 1609 if oStmt.aoElseBranch: 1426 self.analyzeCodeOperation(oStmt.aoElseBranch, True);1427 1428 return True;1610 oStmt.oElseBranchAnnotation = self.analyzeCodeOperation(oStmt.aoElseBranch, True); 1611 1612 return sAnnotation; 1429 1613 1430 1614 def analyze(self): … … 1498 1682 asVariations = ThreadedFunctionVariation.kasVariationsWithoutAddress; 1499 1683 1684 if ( 'IEM_CIMPL_F_BRANCH_CONDITIONAL' in self.dsCImplFlags 1685 and 'IEM_CIMPL_F_BRANCH_RELATIVE' in self.dsCImplFlags): # (latter to avoid iemOp_into) 1686 assert set(asVariations).issubset(ThreadedFunctionVariation.kasVariationsWithoutAddress), \ 1687 '%s: vars=%s McFlags=%s' % (self.oMcBlock.oFunction.sName, asVariations, self.oMcBlock.dsMcFlags); 1688 asVariationsBase = asVariations; 1689 asVariations = []; 1690 for sVariation in asVariationsBase: 1691 asVariations.extend([sVariation + '_Jmp', sVariation + '_NoJmp']); 1692 assert set(asVariations).issubset(ThreadedFunctionVariation.kdVariationsWithConditional); 1693 1500 1694 if not iai.McStmt.findStmtByNames(aoStmts, 1501 1695 { 'IEM_MC_ADVANCE_RIP_AND_FINISH': True, … … 1535 1729 }; 1536 1730 1537 def emitThreadedCallStmts(self ):1731 def emitThreadedCallStmts(self, sBranch = None): # pylint: disable=too-many-statements 1538 1732 """ 1539 1733 Worker for morphInputCode that returns a list of statements that emits 1540 1734 the call to the threaded functions for the block. 1735 1736 The sBranch parameter is used with conditional branches where we'll emit 1737 different threaded calls depending on whether we're in the jump-taken or 1738 no-jump code path. 1541 1739 """ 1542 1740 # Special case for only default variation: … … 1626 1824 aoCases = []; 1627 1825 if ThreadedFunctionVariation.ksVariation_64_Addr32 in dByVari: 1628 assert not fSimple ;1826 assert not fSimple and not sBranch; 1629 1827 aoCases.extend([ 1630 1828 Case('IEMMODE_64BIT', ThrdFnVar.ksVariation_64), … … 1641 1839 ]); 1642 1840 elif ThrdFnVar.ksVariation_64 in dByVari: 1643 assert fSimple ;1841 assert fSimple and not sBranch; 1644 1842 aoCases.append(Case('IEMMODE_64BIT', ThrdFnVar.ksVariation_64)); 1645 1843 if ThreadedFunctionVariation.ksVariation_64f in dByVari: 1646 1844 aoCases.append(Case('IEMMODE_64BIT | 32', ThrdFnVar.ksVariation_64f)); 1845 elif ThrdFnVar.ksVariation_64_Jmp in dByVari: 1846 assert fSimple and sBranch; 1847 aoCases.append(Case('IEMMODE_64BIT', 1848 ThrdFnVar.ksVariation_64_Jmp if sBranch == 'Jmp' else ThrdFnVar.ksVariation_64_NoJmp)); 1849 if ThreadedFunctionVariation.ksVariation_64f_Jmp in dByVari: 1850 aoCases.append(Case('IEMMODE_64BIT | 32', 1851 ThrdFnVar.ksVariation_64f_Jmp if sBranch == 'Jmp' else ThrdFnVar.ksVariation_64f_NoJmp)); 1647 1852 1648 1853 if ThrdFnVar.ksVariation_32_Addr16 in dByVari: 1649 assert not fSimple ;1854 assert not fSimple and not sBranch; 1650 1855 aoCases.extend([ 1651 1856 Case('IEMMODE_32BIT | IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK', ThrdFnVar.ksVariation_32_Flat), … … 1670 1875 ]); 1671 1876 elif ThrdFnVar.ksVariation_32 in dByVari: 1672 assert fSimple ;1877 assert fSimple and not sBranch; 1673 1878 aoCases.extend([ 1674 1879 Case('IEMMODE_32BIT | IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK', None), # fall thru … … 1680 1885 Case('IEMMODE_32BIT | 32', ThrdFnVar.ksVariation_32f), 1681 1886 ]); 1887 elif ThrdFnVar.ksVariation_32_Jmp in dByVari: 1888 assert fSimple and sBranch; 1889 aoCases.extend([ 1890 Case('IEMMODE_32BIT | IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK', None), # fall thru 1891 Case('IEMMODE_32BIT', 1892 ThrdFnVar.ksVariation_32_Jmp if sBranch == 'Jmp' else ThrdFnVar.ksVariation_32_NoJmp), 1893 ]); 1894 if ThrdFnVar.ksVariation_32f_Jmp in dByVari: 1895 aoCases.extend([ 1896 Case('IEMMODE_32BIT | IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK | 32', None), # fall thru 1897 Case('IEMMODE_32BIT | 32', 1898 ThrdFnVar.ksVariation_32f_Jmp if sBranch == 'Jmp' else ThrdFnVar.ksVariation_32f_NoJmp), 1899 ]); 1682 1900 1683 1901 if ThrdFnVar.ksVariation_16_Addr32 in dByVari: 1684 assert not fSimple ;1902 assert not fSimple and not sBranch; 1685 1903 aoCases.extend([ 1686 1904 Case('IEMMODE_16BIT | 16', None), # fall thru … … 1697 1915 ]); 1698 1916 elif ThrdFnVar.ksVariation_16 in dByVari: 1699 assert fSimple ;1917 assert fSimple and not sBranch; 1700 1918 aoCases.append(Case('IEMMODE_16BIT', ThrdFnVar.ksVariation_16)); 1701 1919 if ThrdFnVar.ksVariation_16f in dByVari: 1702 1920 aoCases.append(Case('IEMMODE_16BIT | 32', ThrdFnVar.ksVariation_16f)); 1921 elif ThrdFnVar.ksVariation_16_Jmp in dByVari: 1922 assert fSimple and sBranch; 1923 aoCases.append(Case('IEMMODE_16BIT', 1924 ThrdFnVar.ksVariation_16_Jmp if sBranch == 'Jmp' else ThrdFnVar.ksVariation_16_NoJmp)); 1925 if ThrdFnVar.ksVariation_16f_Jmp in dByVari: 1926 aoCases.append(Case('IEMMODE_16BIT | 32', 1927 ThrdFnVar.ksVariation_16f_Jmp if sBranch == 'Jmp' else ThrdFnVar.ksVariation_16f_NoJmp)); 1928 1703 1929 1704 1930 if ThrdFnVar.ksVariation_16_Pre386 in dByVari: … … 1710 1936 aoCases.append(Case('IEMMODE_16BIT | IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK | 32 | 16', None)); # fall thru 1711 1937 aoCases.append(Case('IEMMODE_16BIT | IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK | 32', ThrdFnVar.ksVariation_16f_Pre386)); 1938 1939 if ThrdFnVar.ksVariation_16_Pre386_Jmp in dByVari: 1940 assert fSimple and sBranch; 1941 aoCases.append(Case('IEMMODE_16BIT | IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK', 1942 ThrdFnVar.ksVariation_16_Pre386_Jmp if sBranch == 'Jmp' 1943 else ThrdFnVar.ksVariation_16_Pre386_NoJmp)); 1944 if ThrdFnVar.ksVariation_16f_Pre386_Jmp in dByVari: 1945 assert fSimple and sBranch; 1946 aoCases.append(Case('IEMMODE_16BIT | IEM_F_MODE_X86_FLAT_OR_PRE_386_MASK | 32', 1947 ThrdFnVar.ksVariation_16f_Pre386_Jmp if sBranch == 'Jmp' 1948 else ThrdFnVar.ksVariation_16f_Pre386_NoJmp)); 1712 1949 1713 1950 # … … 1753 1990 return aoStmts; 1754 1991 1755 def morphInputCode(self, aoStmts, f CallEmitted = False, cDepth = 0):1992 def morphInputCode(self, aoStmts, fIsConditional = False, fCallEmitted = False, cDepth = 0, sBranchAnnotation = None): 1756 1993 """ 1757 1994 Adjusts (& copies) the statements for the input/decoder so it will emit … … 1764 2001 aoDecoderStmts = []; 1765 2002 1766 for oStmt in aoStmts:2003 for iStmt, oStmt in enumerate(aoStmts): 1767 2004 # Copy the statement. Make a deep copy to make sure we've got our own 1768 2005 # copies of all instance variables, even if a bit overkill at the moment. … … 1783 2020 or oStmt.sName in ('IEM_MC_RAISE_DIVIDE_ERROR',)): 1784 2021 aoDecoderStmts.pop(); 1785 aoDecoderStmts.extend(self.emitThreadedCallStmts()); 2022 if not fIsConditional: 2023 aoDecoderStmts.extend(self.emitThreadedCallStmts()); 2024 elif oStmt.sName == 'IEM_MC_ADVANCE_RIP_AND_FINISH': 2025 aoDecoderStmts.extend(self.emitThreadedCallStmts('NoJmp')); 2026 else: 2027 assert oStmt.sName in { 'IEM_MC_REL_JMP_S8_AND_FINISH': True, 2028 'IEM_MC_REL_JMP_S16_AND_FINISH': True, 2029 'IEM_MC_REL_JMP_S32_AND_FINISH': True, }; 2030 aoDecoderStmts.extend(self.emitThreadedCallStmts('Jmp')); 1786 2031 aoDecoderStmts.append(oNewStmt); 1787 2032 fCallEmitted = True; 1788 elif ( oStmt.fDecode 2033 2034 elif iai.g_dMcStmtParsers[oStmt.sName][2]: 2035 # This is for Jmp/NoJmp with loopne and friends which modifies state other than RIP. 2036 if not sBranchAnnotation: 2037 self.raiseProblem('Modifying state before emitting calls! %s' % (oStmt.sName,)); 2038 assert fIsConditional; 2039 aoDecoderStmts.pop(); 2040 if sBranchAnnotation == g_ksFinishAnnotation_Advance: 2041 assert iai.McStmt.findStmtByNames(aoStmts[iStmt:], {'IEM_MC_ADVANCE_RIP_AND_FINISH':1,}) 2042 aoDecoderStmts.extend(self.emitThreadedCallStmts('NoJmp')); 2043 elif sBranchAnnotation == g_ksFinishAnnotation_RelJmp: 2044 assert iai.McStmt.findStmtByNames(aoStmts[iStmt:], 2045 { 'IEM_MC_REL_JMP_S8_AND_FINISH': 1, 2046 'IEM_MC_REL_JMP_S16_AND_FINISH': 1, 2047 'IEM_MC_REL_JMP_S32_AND_FINISH': 1, }); 2048 aoDecoderStmts.extend(self.emitThreadedCallStmts('Jmp')); 2049 else: 2050 self.raiseProblem('Modifying state before emitting calls! %s' % (oStmt.sName,)); 2051 aoDecoderStmts.append(oNewStmt); 2052 fCallEmitted = True; 2053 2054 elif ( not fIsConditional 2055 and oStmt.fDecode 1789 2056 and ( oStmt.asParams[0].find('IEMOP_HLP_DONE_') >= 0 1790 2057 or oStmt.asParams[0].find('IEMOP_HLP_DECODED_') >= 0)): … … 1794 2061 # Process branches of conditionals recursively. 1795 2062 if isinstance(oStmt, iai.McStmtCond): 1796 (oNewStmt.aoIfBranch, fCallEmitted1) = self.morphInputCode(oStmt.aoIfBranch, fCallEmitted, cDepth + 1); 2063 (oNewStmt.aoIfBranch, fCallEmitted1) = self.morphInputCode(oStmt.aoIfBranch, fIsConditional, 2064 fCallEmitted, cDepth + 1, oStmt.oIfBranchAnnotation); 1797 2065 if oStmt.aoElseBranch: 1798 (oNewStmt.aoElseBranch, fCallEmitted2) = self.morphInputCode(oStmt.aoElseBranch, fCallEmitted, cDepth + 1); 2066 (oNewStmt.aoElseBranch, fCallEmitted2) = self.morphInputCode(oStmt.aoElseBranch, fIsConditional, 2067 fCallEmitted, cDepth + 1, 2068 oStmt.oElseBranchAnnotation); 1799 2069 else: 1800 2070 fCallEmitted2 = False; … … 1828 2098 # IEM_MC_BEGIN/END block 1829 2099 assert len(self.oMcBlock.asLines) > 2, "asLines=%s" % (self.oMcBlock.asLines,); 1830 return iai.McStmt.renderCodeForList(self.morphInputCode(self.oMcBlock.aoStmts)[0], 2100 fIsConditional = ( 'IEM_CIMPL_F_BRANCH_CONDITIONAL' in self.dsCImplFlags 2101 and 'IEM_CIMPL_F_BRANCH_RELATIVE' in self.dsCImplFlags); # (latter to avoid iemOp_into) 2102 return iai.McStmt.renderCodeForList(self.morphInputCode(self.oMcBlock.aoStmts, fIsConditional)[0], 1831 2103 cchIndent = cchIndent).replace('\n', ' /* gen */\n', 1); 1832 2104 -
trunk/src/VBox/VMM/VMMAll/IEMAllThrdRecompiler.cpp
r102684 r102876 2345 2345 2346 2346 rcStrict = FNIEMOP_CALL(g_apfnIemThreadedRecompilerOneByteMap[b]); 2347 #if 0 2348 for (unsigned i = cCallsPrev; i < pTb->Thrd.cCalls; i++) 2349 Log8(("-> %#u/%u - %d %s\n", i, pTb->Thrd.paCalls[i].idxInstr, pTb->Thrd.paCalls[i].enmFunction, 2350 g_apszIemThreadedFunctions[pTb->Thrd.paCalls[i].enmFunction])); 2351 #endif 2347 2352 if ( rcStrict == VINF_SUCCESS 2348 2353 && pVCpu->iem.s.rcPassUp == VINF_SUCCESS … … 2495 2500 and converted to VINF_SUCCESS or whatever is appropriate. */ 2496 2501 if (rcStrict == VINF_IEM_REEXEC_FINISH_WITH_FLAGS) 2497 return iemExecStatusCodeFiddling(pVCpu, iemFinishInstructionWithFlagsSet(pVCpu ));2502 return iemExecStatusCodeFiddling(pVCpu, iemFinishInstructionWithFlagsSet(pVCpu, VINF_SUCCESS)); 2498 2503 2499 2504 return iemExecStatusCodeFiddling(pVCpu, rcStrict); -
trunk/src/VBox/VMM/include/IEMInline.h
r102586 r102876 2061 2061 * Stacks} 2062 2062 */ 2063 static VBOXSTRICTRC iemFinishInstructionWithFlagsSet(PVMCPUCC pVCpu ) RT_NOEXCEPT2063 static VBOXSTRICTRC iemFinishInstructionWithFlagsSet(PVMCPUCC pVCpu, int rcNormal) RT_NOEXCEPT 2064 2064 { 2065 2065 /* … … 2102 2102 } 2103 2103 pVCpu->cpum.GstCtx.eflags.uBoth &= ~CPUMCTX_DBG_DBGF_MASK; 2104 Assert(rcStrict != VINF_SUCCESS); 2104 2105 return rcStrict; 2105 2106 } 2106 return VINF_SUCCESS;2107 return rcNormal; 2107 2108 } 2108 2109 … … 2112 2113 * 2113 2114 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2114 */ 2115 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegFinishClearingRF(PVMCPUCC pVCpu) RT_NOEXCEPT 2115 * @param rcNormal VINF_SUCCESS to continue TB. 2116 * VINF_IEM_REEXEC_BREAK to force TB exit when 2117 * taking the wrong conditional branhc. 2118 */ 2119 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegFinishClearingRF(PVMCPUCC pVCpu, int rcNormal) RT_NOEXCEPT 2116 2120 { 2117 2121 /* … … 2121 2125 if (RT_LIKELY(!( pVCpu->cpum.GstCtx.eflags.uBoth 2122 2126 & (X86_EFL_TF | X86_EFL_RF | CPUMCTX_INHIBIT_SHADOW | CPUMCTX_DBG_HIT_DRX_MASK | CPUMCTX_DBG_DBGF_MASK)) )) 2123 return VINF_SUCCESS;2124 return iemFinishInstructionWithFlagsSet(pVCpu );2127 return rcNormal; 2128 return iemFinishInstructionWithFlagsSet(pVCpu, rcNormal); 2125 2129 } 2126 2130 … … 2136 2140 { 2137 2141 iemRegAddToRip(pVCpu, cbInstr); 2138 return iemRegFinishClearingRF(pVCpu );2142 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2139 2143 } 2140 2144 … … 2148 2152 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2149 2153 * @param cbInstr The number of bytes to add. 2150 */ 2151 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToRip64AndFinishingClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT 2154 * @param rcNormal VINF_SUCCESS to continue TB. 2155 * VINF_IEM_REEXEC_BREAK to force TB exit when 2156 * taking the wrong conditional branhc. 2157 */ 2158 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToRip64AndFinishingClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int rcNormal) RT_NOEXCEPT 2152 2159 { 2153 2160 pVCpu->cpum.GstCtx.rip = pVCpu->cpum.GstCtx.rip + cbInstr; 2154 return iemRegFinishClearingRF(pVCpu );2161 return iemRegFinishClearingRF(pVCpu, rcNormal); 2155 2162 } 2156 2163 … … 2164 2171 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2165 2172 * @param cbInstr The number of bytes to add. 2166 */ 2167 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToEip32AndFinishingClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT 2173 * @param rcNormal VINF_SUCCESS to continue TB. 2174 * VINF_IEM_REEXEC_BREAK to force TB exit when 2175 * taking the wrong conditional branhc. 2176 */ 2177 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToEip32AndFinishingClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int rcNormal) RT_NOEXCEPT 2168 2178 { 2169 2179 pVCpu->cpum.GstCtx.rip = (uint32_t)(pVCpu->cpum.GstCtx.eip + cbInstr); 2170 return iemRegFinishClearingRF(pVCpu );2180 return iemRegFinishClearingRF(pVCpu, rcNormal); 2171 2181 } 2172 2182 … … 2180 2190 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2181 2191 * @param cbInstr The number of bytes to add. 2182 */ 2183 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToIp16AndFinishingClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT 2192 * @param rcNormal VINF_SUCCESS to continue TB. 2193 * VINF_IEM_REEXEC_BREAK to force TB exit when 2194 * taking the wrong conditional branhc. 2195 */ 2196 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToIp16AndFinishingClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int rcNormal) RT_NOEXCEPT 2184 2197 { 2185 2198 pVCpu->cpum.GstCtx.rip = (uint16_t)(pVCpu->cpum.GstCtx.ip + cbInstr); 2186 return iemRegFinishClearingRF(pVCpu );2199 return iemRegFinishClearingRF(pVCpu, rcNormal); 2187 2200 } 2188 2201 … … 2192 2205 * 2193 2206 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2194 */ 2195 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegFinishNoFlags(PVMCPUCC pVCpu) RT_NOEXCEPT 2207 * @param rcNormal VINF_SUCCESS to continue TB. 2208 * VINF_IEM_REEXEC_BREAK to force TB exit when 2209 * taking the wrong conditional branhc. 2210 */ 2211 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegFinishNoFlags(PVMCPUCC pVCpu, int rcNormal) RT_NOEXCEPT 2196 2212 { 2197 2213 AssertCompile(CPUMCTX_INHIBIT_SHADOW < UINT32_MAX); … … 2199 2215 & (X86_EFL_TF | X86_EFL_RF | CPUMCTX_INHIBIT_SHADOW | CPUMCTX_DBG_HIT_DRX_MASK | CPUMCTX_DBG_DBGF_MASK)) ); 2200 2216 RT_NOREF(pVCpu); 2201 return VINF_SUCCESS;2217 return rcNormal; 2202 2218 } 2203 2219 … … 2211 2227 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2212 2228 * @param cbInstr The number of bytes to add. 2213 */ 2214 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToRip64AndFinishingNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT 2229 * @param rcNormal VINF_SUCCESS to continue TB. 2230 * VINF_IEM_REEXEC_BREAK to force TB exit when 2231 * taking the wrong conditional branhc. 2232 */ 2233 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToRip64AndFinishingNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, int rcNormal) RT_NOEXCEPT 2215 2234 { 2216 2235 pVCpu->cpum.GstCtx.rip = pVCpu->cpum.GstCtx.rip + cbInstr; 2217 return iemRegFinishNoFlags(pVCpu );2236 return iemRegFinishNoFlags(pVCpu, rcNormal); 2218 2237 } 2219 2238 … … 2227 2246 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2228 2247 * @param cbInstr The number of bytes to add. 2229 */ 2230 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToEip32AndFinishingNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT 2248 * @param rcNormal VINF_SUCCESS to continue TB. 2249 * VINF_IEM_REEXEC_BREAK to force TB exit when 2250 * taking the wrong conditional branhc. 2251 */ 2252 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToEip32AndFinishingNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, int rcNormal) RT_NOEXCEPT 2231 2253 { 2232 2254 pVCpu->cpum.GstCtx.rip = (uint32_t)(pVCpu->cpum.GstCtx.eip + cbInstr); 2233 return iemRegFinishNoFlags(pVCpu );2255 return iemRegFinishNoFlags(pVCpu, rcNormal); 2234 2256 } 2235 2257 … … 2243 2265 * @param pVCpu The cross context virtual CPU structure of the calling thread. 2244 2266 * @param cbInstr The number of bytes to add. 2245 */ 2246 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToIp16AndFinishingNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr) RT_NOEXCEPT 2267 * @param rcNormal VINF_SUCCESS to continue TB. 2268 * VINF_IEM_REEXEC_BREAK to force TB exit when 2269 * taking the wrong conditional branhc. 2270 * 2271 */ 2272 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegAddToIp16AndFinishingNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, int rcNormal) RT_NOEXCEPT 2247 2273 { 2248 2274 pVCpu->cpum.GstCtx.rip = (uint16_t)(pVCpu->cpum.GstCtx.ip + cbInstr); 2249 return iemRegFinishNoFlags(pVCpu );2275 return iemRegFinishNoFlags(pVCpu, rcNormal); 2250 2276 } 2251 2277 … … 2261 2287 * @param offNextInstr The offset of the next instruction. 2262 2288 * @param enmEffOpSize Effective operand size. 2289 * @param rcNormal VINF_SUCCESS to continue TB. 2290 * VINF_IEM_REEXEC_BREAK to force TB exit when 2291 * taking the wrong conditional branhc. 2263 2292 */ 2264 2293 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegRip64RelativeJumpS8AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int8_t offNextInstr, 2265 IEMMODE enmEffOpSize ) RT_NOEXCEPT2294 IEMMODE enmEffOpSize, int rcNormal) RT_NOEXCEPT 2266 2295 { 2267 2296 Assert(IEM_IS_64BIT_CODE(pVCpu)); … … 2284 2313 * Clear RF and finish the instruction (maybe raise #DB). 2285 2314 */ 2286 return iemRegFinishClearingRF(pVCpu );2315 return iemRegFinishClearingRF(pVCpu, rcNormal); 2287 2316 } 2288 2317 … … 2299 2328 * @param offNextInstr The offset of the next instruction. 2300 2329 * @param enmEffOpSize Effective operand size. 2330 * @param rcNormal VINF_SUCCESS to continue TB. 2331 * VINF_IEM_REEXEC_BREAK to force TB exit when 2332 * taking the wrong conditional branhc. 2301 2333 */ 2302 2334 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegEip32RelativeJumpS8AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, int8_t offNextInstr, 2303 IEMMODE enmEffOpSize ) RT_NOEXCEPT2335 IEMMODE enmEffOpSize, int rcNormal) RT_NOEXCEPT 2304 2336 { 2305 2337 Assert(!IEM_IS_64BIT_CODE(pVCpu)); … … 2321 2353 * Clear RF and finish the instruction (maybe raise #DB). 2322 2354 */ 2323 return iemRegFinishClearingRF(pVCpu );2355 return iemRegFinishClearingRF(pVCpu, rcNormal); 2324 2356 } 2325 2357 … … 2334 2366 * @param cbInstr Instruction size. 2335 2367 * @param offNextInstr The offset of the next instruction. 2368 * @param rcNormal VINF_SUCCESS to continue TB. 2369 * VINF_IEM_REEXEC_BREAK to force TB exit when 2370 * taking the wrong conditional branhc. 2336 2371 */ 2337 2372 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegIp16RelativeJumpS8AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, 2338 int8_t offNextInstr ) RT_NOEXCEPT2373 int8_t offNextInstr, int rcNormal) RT_NOEXCEPT 2339 2374 { 2340 2375 Assert(!IEM_IS_64BIT_CODE(pVCpu)); … … 2353 2388 * Clear RF and finish the instruction (maybe raise #DB). 2354 2389 */ 2355 return iemRegFinishClearingRF(pVCpu );2390 return iemRegFinishClearingRF(pVCpu, rcNormal); 2356 2391 } 2357 2392 … … 2368 2403 * @param offNextInstr The offset of the next instruction. 2369 2404 * @param enmEffOpSize Effective operand size. 2405 * @param rcNormal VINF_SUCCESS to continue TB. 2406 * VINF_IEM_REEXEC_BREAK to force TB exit when 2407 * taking the wrong conditional branhc. 2370 2408 */ 2371 2409 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegRip64RelativeJumpS8AndFinishNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, int8_t offNextInstr, 2372 IEMMODE enmEffOpSize ) RT_NOEXCEPT2410 IEMMODE enmEffOpSize, int rcNormal) RT_NOEXCEPT 2373 2411 { 2374 2412 Assert(IEM_IS_64BIT_CODE(pVCpu)); … … 2387 2425 iemOpcodeFlushLight(pVCpu, cbInstr); 2388 2426 #endif 2389 return iemRegFinishNoFlags(pVCpu );2427 return iemRegFinishNoFlags(pVCpu, rcNormal); 2390 2428 } 2391 2429 … … 2402 2440 * @param offNextInstr The offset of the next instruction. 2403 2441 * @param enmEffOpSize Effective operand size. 2442 * @param rcNormal VINF_SUCCESS to continue TB. 2443 * VINF_IEM_REEXEC_BREAK to force TB exit when 2444 * taking the wrong conditional branhc. 2404 2445 */ 2405 2446 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegEip32RelativeJumpS8AndFinishNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, int8_t offNextInstr, 2406 IEMMODE enmEffOpSize ) RT_NOEXCEPT2447 IEMMODE enmEffOpSize, int rcNormal) RT_NOEXCEPT 2407 2448 { 2408 2449 Assert(!IEM_IS_64BIT_CODE(pVCpu)); … … 2420 2461 iemOpcodeFlushLight(pVCpu, cbInstr); 2421 2462 #endif 2422 return iemRegFinishNoFlags(pVCpu );2463 return iemRegFinishNoFlags(pVCpu, rcNormal); 2423 2464 } 2424 2465 … … 2434 2475 * @param cbInstr Instruction size. 2435 2476 * @param offNextInstr The offset of the next instruction. 2477 * @param rcNormal VINF_SUCCESS to continue TB. 2478 * VINF_IEM_REEXEC_BREAK to force TB exit when 2479 * taking the wrong conditional branhc. 2436 2480 */ 2437 2481 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegIp16RelativeJumpS8AndFinishNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, 2438 int8_t offNextInstr ) RT_NOEXCEPT2482 int8_t offNextInstr, int rcNormal) RT_NOEXCEPT 2439 2483 { 2440 2484 Assert(!IEM_IS_64BIT_CODE(pVCpu)); … … 2449 2493 iemOpcodeFlushLight(pVCpu, cbInstr); 2450 2494 #endif 2451 return iemRegFinishNoFlags(pVCpu );2495 return iemRegFinishNoFlags(pVCpu, rcNormal); 2452 2496 } 2453 2497 … … 2460 2504 * @param cbInstr Instruction size. 2461 2505 * @param offNextInstr The offset of the next instruction. 2506 * @param rcNormal VINF_SUCCESS to continue TB. 2507 * VINF_IEM_REEXEC_BREAK to force TB exit when 2508 * taking the wrong conditional branhc. 2462 2509 */ 2463 2510 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegRip64RelativeJumpS16AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, 2464 int16_t offNextInstr ) RT_NOEXCEPT2511 int16_t offNextInstr, int rcNormal) RT_NOEXCEPT 2465 2512 { 2466 2513 Assert(IEM_IS_64BIT_CODE(pVCpu)); … … 2475 2522 * Clear RF and finish the instruction (maybe raise #DB). 2476 2523 */ 2477 return iemRegFinishClearingRF(pVCpu );2524 return iemRegFinishClearingRF(pVCpu, rcNormal); 2478 2525 } 2479 2526 … … 2489 2536 * @param cbInstr Instruction size. 2490 2537 * @param offNextInstr The offset of the next instruction. 2538 * @param rcNormal VINF_SUCCESS to continue TB. 2539 * VINF_IEM_REEXEC_BREAK to force TB exit when 2540 * taking the wrong conditional branhc. 2491 2541 * 2492 2542 * @note This is also used by 16-bit code in pre-386 mode, as the code is … … 2494 2544 */ 2495 2545 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegEip32RelativeJumpS16AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, 2496 int16_t offNextInstr ) RT_NOEXCEPT2546 int16_t offNextInstr, int rcNormal) RT_NOEXCEPT 2497 2547 { 2498 2548 Assert(!IEM_IS_64BIT_CODE(pVCpu)); … … 2511 2561 * Clear RF and finish the instruction (maybe raise #DB). 2512 2562 */ 2513 return iemRegFinishClearingRF(pVCpu );2563 return iemRegFinishClearingRF(pVCpu, rcNormal); 2514 2564 } 2515 2565 … … 2523 2573 * @param cbInstr Instruction size. 2524 2574 * @param offNextInstr The offset of the next instruction. 2575 * @param rcNormal VINF_SUCCESS to continue TB. 2576 * VINF_IEM_REEXEC_BREAK to force TB exit when 2577 * taking the wrong conditional branhc. 2525 2578 */ 2526 2579 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegRip64RelativeJumpS16AndFinishNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, 2527 int16_t offNextInstr ) RT_NOEXCEPT2580 int16_t offNextInstr, int rcNormal) RT_NOEXCEPT 2528 2581 { 2529 2582 Assert(IEM_IS_64BIT_CODE(pVCpu)); … … 2534 2587 iemOpcodeFlushLight(pVCpu, cbInstr); 2535 2588 #endif 2536 return iemRegFinishNoFlags(pVCpu );2589 return iemRegFinishNoFlags(pVCpu, rcNormal); 2537 2590 } 2538 2591 … … 2549 2602 * @param cbInstr Instruction size. 2550 2603 * @param offNextInstr The offset of the next instruction. 2604 * @param rcNormal VINF_SUCCESS to continue TB. 2605 * VINF_IEM_REEXEC_BREAK to force TB exit when 2606 * taking the wrong conditional branhc. 2551 2607 * 2552 2608 * @note This is also used by 16-bit code in pre-386 mode, as the code is … … 2554 2610 */ 2555 2611 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegEip32RelativeJumpS16AndFinishNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, 2556 int16_t offNextInstr ) RT_NOEXCEPT2612 int16_t offNextInstr, int rcNormal) RT_NOEXCEPT 2557 2613 { 2558 2614 Assert(!IEM_IS_64BIT_CODE(pVCpu)); … … 2567 2623 iemOpcodeFlushLight(pVCpu, cbInstr); 2568 2624 #endif 2569 return iemRegFinishNoFlags(pVCpu );2625 return iemRegFinishNoFlags(pVCpu, rcNormal); 2570 2626 } 2571 2627 … … 2585 2641 * @param cbInstr Instruction size. 2586 2642 * @param offNextInstr The offset of the next instruction. 2643 * @param rcNormal VINF_SUCCESS to continue TB. 2644 * VINF_IEM_REEXEC_BREAK to force TB exit when 2645 * taking the wrong conditional branhc. 2587 2646 */ 2588 2647 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegRip64RelativeJumpS32AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, 2589 int32_t offNextInstr ) RT_NOEXCEPT2648 int32_t offNextInstr, int rcNormal) RT_NOEXCEPT 2590 2649 { 2591 2650 Assert(IEM_IS_64BIT_CODE(pVCpu)); … … 2604 2663 * Clear RF and finish the instruction (maybe raise #DB). 2605 2664 */ 2606 return iemRegFinishClearingRF(pVCpu );2665 return iemRegFinishClearingRF(pVCpu, rcNormal); 2607 2666 } 2608 2667 … … 2622 2681 * @param cbInstr Instruction size. 2623 2682 * @param offNextInstr The offset of the next instruction. 2683 * @param rcNormal VINF_SUCCESS to continue TB. 2684 * VINF_IEM_REEXEC_BREAK to force TB exit when 2685 * taking the wrong conditional branhc. 2624 2686 */ 2625 2687 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegEip32RelativeJumpS32AndFinishClearingRF(PVMCPUCC pVCpu, uint8_t cbInstr, 2626 int32_t offNextInstr ) RT_NOEXCEPT2688 int32_t offNextInstr, int rcNormal) RT_NOEXCEPT 2627 2689 { 2628 2690 Assert(!IEM_IS_64BIT_CODE(pVCpu)); … … 2642 2704 * Clear RF and finish the instruction (maybe raise #DB). 2643 2705 */ 2644 return iemRegFinishClearingRF(pVCpu );2706 return iemRegFinishClearingRF(pVCpu, rcNormal); 2645 2707 } 2646 2708 … … 2661 2723 * @param cbInstr Instruction size. 2662 2724 * @param offNextInstr The offset of the next instruction. 2725 * @param rcNormal VINF_SUCCESS to continue TB. 2726 * VINF_IEM_REEXEC_BREAK to force TB exit when 2727 * taking the wrong conditional branhc. 2663 2728 */ 2664 2729 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegRip64RelativeJumpS32AndFinishNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, 2665 int32_t offNextInstr ) RT_NOEXCEPT2730 int32_t offNextInstr, int rcNormal) RT_NOEXCEPT 2666 2731 { 2667 2732 Assert(IEM_IS_64BIT_CODE(pVCpu)); … … 2676 2741 iemOpcodeFlushLight(pVCpu, cbInstr); 2677 2742 #endif 2678 return iemRegFinishNoFlags(pVCpu );2743 return iemRegFinishNoFlags(pVCpu, rcNormal); 2679 2744 } 2680 2745 … … 2695 2760 * @param cbInstr Instruction size. 2696 2761 * @param offNextInstr The offset of the next instruction. 2762 * @param rcNormal VINF_SUCCESS to continue TB. 2763 * VINF_IEM_REEXEC_BREAK to force TB exit when 2764 * taking the wrong conditional branhc. 2697 2765 */ 2698 2766 DECL_FORCE_INLINE(VBOXSTRICTRC) iemRegEip32RelativeJumpS32AndFinishNoFlags(PVMCPUCC pVCpu, uint8_t cbInstr, 2699 int32_t offNextInstr ) RT_NOEXCEPT2767 int32_t offNextInstr, int rcNormal) RT_NOEXCEPT 2700 2768 { 2701 2769 Assert(!IEM_IS_64BIT_CODE(pVCpu)); … … 2711 2779 iemOpcodeFlushLight(pVCpu, cbInstr); 2712 2780 #endif 2713 return iemRegFinishNoFlags(pVCpu );2781 return iemRegFinishNoFlags(pVCpu, rcNormal); 2714 2782 } 2715 2783 … … 2755 2823 iemRegAddToRip(pVCpu, cbInstr); 2756 2824 if (!(fEflOld & X86_EFL_TF)) 2757 return iemRegFinishClearingRF(pVCpu );2825 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2758 2826 return iemFinishInstructionWithTfSet(pVCpu); 2759 2827 } … … 2791 2859 else 2792 2860 return iemRaiseGeneralProtectionFault0(pVCpu); 2793 return iemRegFinishNoFlags(pVCpu );2861 return iemRegFinishNoFlags(pVCpu, VINF_SUCCESS); 2794 2862 } 2795 2863 … … 2812 2880 else 2813 2881 return iemRaiseGeneralProtectionFault0(pVCpu); 2814 return iemRegFinishNoFlags(pVCpu );2882 return iemRegFinishNoFlags(pVCpu, VINF_SUCCESS); 2815 2883 } 2816 2884 … … 2833 2901 else 2834 2902 return iemRaiseGeneralProtectionFault0(pVCpu); 2835 return iemRegFinishNoFlags(pVCpu );2903 return iemRegFinishNoFlags(pVCpu, VINF_SUCCESS); 2836 2904 } 2837 2905 … … 2859 2927 RT_NOREF_PV(cbInstr); 2860 2928 #endif 2861 return iemRegFinishClearingRF(pVCpu );2929 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2862 2930 } 2863 2931 … … 2885 2953 RT_NOREF_PV(cbInstr); 2886 2954 #endif 2887 return iemRegFinishClearingRF(pVCpu );2955 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2888 2956 } 2889 2957 … … 2911 2979 RT_NOREF_PV(cbInstr); 2912 2980 #endif 2913 return iemRegFinishClearingRF(pVCpu );2981 return iemRegFinishClearingRF(pVCpu, VINF_SUCCESS); 2914 2982 } 2915 2983 -
trunk/src/VBox/VMM/include/IEMMc.h
r102586 r102876 2841 2841 && !!(pVCpu->cpum.GstCtx.eflags.u & (a_fBit1)) \ 2842 2842 == !!(pVCpu->cpum.GstCtx.eflags.u & (a_fBit2)) ) { 2843 #define IEM_MC_IF_CX_IS_NZ() if (pVCpu->cpum.GstCtx.cx != 0) {2843 #define IEM_MC_IF_CX_IS_NZ() if (pVCpu->cpum.GstCtx.cx != 0) { 2844 2844 #define IEM_MC_IF_ECX_IS_NZ() if (pVCpu->cpum.GstCtx.ecx != 0) { 2845 2845 #define IEM_MC_IF_RCX_IS_NZ() if (pVCpu->cpum.GstCtx.rcx != 0) { 2846 #define IEM_MC_IF_CX_IS_NOT_ONE() if (pVCpu->cpum.GstCtx.cx != 1) { 2847 #define IEM_MC_IF_ECX_IS_NOT_ONE() if (pVCpu->cpum.GstCtx.ecx != 1) { 2848 #define IEM_MC_IF_RCX_IS_NOT_ONE() if (pVCpu->cpum.GstCtx.rcx != 1) { 2846 2849 /** @note Not for IOPL or IF testing. */ 2847 #define IEM_MC_IF_CX_IS_N Z_AND_EFL_BIT_SET(a_fBit) \2848 if ( pVCpu->cpum.GstCtx.cx != 0\2850 #define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 2851 if ( pVCpu->cpum.GstCtx.cx != 1 \ 2849 2852 && (pVCpu->cpum.GstCtx.eflags.u & a_fBit)) { 2850 2853 /** @note Not for IOPL or IF testing. */ 2851 #define IEM_MC_IF_ECX_IS_N Z_AND_EFL_BIT_SET(a_fBit) \2852 if ( pVCpu->cpum.GstCtx.ecx != 0\2854 #define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 2855 if ( pVCpu->cpum.GstCtx.ecx != 1 \ 2853 2856 && (pVCpu->cpum.GstCtx.eflags.u & a_fBit)) { 2854 2857 /** @note Not for IOPL or IF testing. */ 2855 #define IEM_MC_IF_RCX_IS_N Z_AND_EFL_BIT_SET(a_fBit) \2856 if ( pVCpu->cpum.GstCtx.rcx != 0\2858 #define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \ 2859 if ( pVCpu->cpum.GstCtx.rcx != 1 \ 2857 2860 && (pVCpu->cpum.GstCtx.eflags.u & a_fBit)) { 2858 2861 /** @note Not for IOPL or IF testing. */ 2859 #define IEM_MC_IF_CX_IS_N Z_AND_EFL_BIT_NOT_SET(a_fBit) \2860 if ( pVCpu->cpum.GstCtx.cx != 0\2862 #define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 2863 if ( pVCpu->cpum.GstCtx.cx != 1 \ 2861 2864 && !(pVCpu->cpum.GstCtx.eflags.u & a_fBit)) { 2862 2865 /** @note Not for IOPL or IF testing. */ 2863 #define IEM_MC_IF_ECX_IS_N Z_AND_EFL_BIT_NOT_SET(a_fBit) \2864 if ( pVCpu->cpum.GstCtx.ecx != 0\2866 #define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 2867 if ( pVCpu->cpum.GstCtx.ecx != 1 \ 2865 2868 && !(pVCpu->cpum.GstCtx.eflags.u & a_fBit)) { 2866 2869 /** @note Not for IOPL or IF testing. */ 2867 #define IEM_MC_IF_RCX_IS_N Z_AND_EFL_BIT_NOT_SET(a_fBit) \2868 if ( pVCpu->cpum.GstCtx.rcx != 0\2870 #define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \ 2871 if ( pVCpu->cpum.GstCtx.rcx != 1 \ 2869 2872 && !(pVCpu->cpum.GstCtx.eflags.u & a_fBit)) { 2870 2873 #define IEM_MC_IF_LOCAL_IS_Z(a_Local) if ((a_Local) == 0) { -
trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h
r102857 r102876 4963 4963 4964 4964 4965 /** 4966 * Emits a compare of a 32-bit GPR with a constant value, settings status 4967 * flags/whatever for use with conditional instruction. 4968 * 4969 * @note ARM64: Helper register is required (@a idxTmpReg) for isolating the 4970 * 16-bit value from @a iGrpLeft. 4971 * @note On ARM64 the @a uImm value must be in the range 0x000..0xfff or that 4972 * shifted 12 bits to the left (e.g. 0x1000..0xfff0000 with the lower 12 4973 * bits all zero). Will release assert or throw exception if the caller 4974 * violates this restriction. 4975 */ 4976 DECL_FORCE_INLINE_THROW(uint32_t) 4977 iemNativeEmitCmpGpr16WithImmEx(PIEMNATIVEINSTR pCodeBuf, uint32_t off, uint8_t iGprLeft, uint16_t uImm, 4978 uint8_t idxTmpReg = UINT8_MAX) 4979 { 4980 #ifdef RT_ARCH_AMD64 4981 pCodeBuf[off++] = X86_OP_PRF_SIZE_OP; 4982 if (iGprLeft >= 8) 4983 pCodeBuf[off++] = X86_OP_REX_B; 4984 if (uImm <= UINT32_C(0x7f)) 4985 { 4986 /* cmp Ev, Ib */ 4987 pCodeBuf[off++] = 0x83; 4988 pCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, 7, iGprLeft & 7); 4989 pCodeBuf[off++] = (uint8_t)uImm; 4990 } 4991 else 4992 { 4993 /* cmp Ev, imm */ 4994 pCodeBuf[off++] = 0x81; 4995 pCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, 7, iGprLeft & 7); 4996 pCodeBuf[off++] = RT_BYTE1(uImm); 4997 pCodeBuf[off++] = RT_BYTE2(uImm); 4998 } 4999 RT_NOREF(idxTmpReg); 5000 5001 #elif defined(RT_ARCH_ARM64) 5002 # ifdef IEM_WITH_THROW_CATCH 5003 AssertStmt(idxTmpReg < 32, IEMNATIVE_DO_LONGJMP(NULL, VERR_IEM_IPE_9)); 5004 # else 5005 AssertReleaseStmt(idxTmpReg < 32, off = UINT32_MAX); 5006 # endif 5007 Assert(Armv8A64ConvertImmRImmS2Mask32(15, 0) == 0xffff); 5008 pCodeBuf[off++] = Armv8A64MkInstrAndImm(idxTmpReg, iGprLeft, 15, 0, false /*f64Bit*/); 5009 off = iemNativeEmitCmpGpr32WithImmEx(pCodeBuf, off, idxTmpReg, uImm); 5010 5011 #else 5012 # error "Port me!" 5013 #endif 5014 return off; 5015 } 5016 5017 5018 /** 5019 * Emits a compare of a 16-bit GPR with a constant value, settings status 5020 * flags/whatever for use with conditional instruction. 5021 * 5022 * @note ARM64: Helper register is required (idxTmpReg). 5023 */ 5024 DECL_INLINE_THROW(uint32_t) 5025 iemNativeEmitCmpGpr16WithImm(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprLeft, uint16_t uImm, 5026 uint8_t idxTmpReg = UINT8_MAX) 5027 { 5028 #ifdef RT_ARCH_AMD64 5029 off = iemNativeEmitCmpGpr16WithImmEx(iemNativeInstrBufEnsure(pReNative, off, 7), off, iGprLeft, uImm, idxTmpReg); 5030 #elif defined(RT_ARCH_ARM64) 5031 off = iemNativeEmitCmpGpr16WithImmEx(iemNativeInstrBufEnsure(pReNative, off, 2), off, iGprLeft, uImm, idxTmpReg); 5032 #else 5033 # error "Port me!" 5034 #endif 5035 IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off); 5036 return off; 5037 } 5038 5039 4965 5040 4966 5041 /********************************************************************************************************************************* … … 5974 6049 5975 6050 6051 /* if (Grp1 == 0) Jmp idxLabel; */ 6052 5976 6053 /** 5977 6054 * Emits code that jumps to @a idxLabel if @a iGprSrc is zero. … … 6014 6091 6015 6092 6093 /* if (Grp1 != 0) Jmp idxLabel; */ 6094 6016 6095 /** 6017 6096 * Emits code that jumps to @a idxLabel if @a iGprSrc is not zero. … … 6054 6133 6055 6134 6135 /* if (Grp1 != Gpr2) Jmp idxLabel; */ 6136 6056 6137 /** 6057 6138 * Emits code that jumps to the given label if @a iGprLeft and @a iGprRight … … 6081 6162 6082 6163 6164 /* if (Grp != Imm) Jmp idxLabel; */ 6165 6083 6166 /** 6084 6167 * Emits code that jumps to the given label if @a iGprSrc differs from @a uImm. … … 6131 6214 uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData); 6132 6215 return iemNativeEmitTestIfGpr32NotEqualImmAndJmpToLabel(pReNative, off, iGprSrc, uImm, idxLabel); 6216 } 6217 6218 6219 /** 6220 * Emits code that jumps to the given label if 16-bit @a iGprSrc differs from 6221 * @a uImm. 6222 */ 6223 DECL_INLINE_THROW(uint32_t) iemNativeEmitTestIfGpr16NotEqualImmAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, 6224 uint8_t iGprSrc, uint16_t uImm, uint32_t idxLabel) 6225 { 6226 off = iemNativeEmitCmpGpr16WithImm(pReNative, off, iGprSrc, uImm); 6227 off = iemNativeEmitJnzToLabel(pReNative, off, idxLabel); 6228 return off; 6229 } 6230 6231 6232 /** 6233 * Emits code that jumps to a new label if 16-bit @a iGprSrc differs from 6234 * @a uImm. 6235 */ 6236 DECL_INLINE_THROW(uint32_t) 6237 iemNativeEmitTestIfGpr16NotEqualImmAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, 6238 uint8_t iGprSrc, uint16_t uImm, 6239 IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0) 6240 { 6241 uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData); 6242 return iemNativeEmitTestIfGpr16NotEqualImmAndJmpToLabel(pReNative, off, iGprSrc, uImm, idxLabel); 6243 } 6244 6245 6246 /* if (Grp == Imm) Jmp idxLabel; */ 6247 6248 /** 6249 * Emits code that jumps to the given label if @a iGprSrc equals @a uImm. 6250 */ 6251 DECL_INLINE_THROW(uint32_t) 6252 iemNativeEmitTestIfGprEqualsImmAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, 6253 uint8_t iGprSrc, uint64_t uImm, uint32_t idxLabel) 6254 { 6255 off = iemNativeEmitCmpGprWithImm(pReNative, off, iGprSrc, uImm); 6256 off = iemNativeEmitJzToLabel(pReNative, off, idxLabel); 6257 return off; 6258 } 6259 6260 6261 /** 6262 * Emits code that jumps to a new label if @a iGprSrc equals from @a uImm. 6263 */ 6264 DECL_INLINE_THROW(uint32_t) 6265 iemNativeEmitTestIfGprEqualsImmAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc, uint64_t uImm, 6266 IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0) 6267 { 6268 uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData); 6269 return iemNativeEmitTestIfGprEqualsImmAndJmpToLabel(pReNative, off, iGprSrc, uImm, idxLabel); 6270 } 6271 6272 6273 /** 6274 * Emits code that jumps to the given label if 32-bit @a iGprSrc equals @a uImm. 6275 */ 6276 DECL_INLINE_THROW(uint32_t) iemNativeEmitTestIfGpr32EqualsImmAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, 6277 uint8_t iGprSrc, uint32_t uImm, uint32_t idxLabel) 6278 { 6279 off = iemNativeEmitCmpGpr32WithImm(pReNative, off, iGprSrc, uImm); 6280 off = iemNativeEmitJzToLabel(pReNative, off, idxLabel); 6281 return off; 6282 } 6283 6284 6285 /** 6286 * Emits code that jumps to a new label if 32-bit @a iGprSrc equals @a uImm. 6287 */ 6288 DECL_INLINE_THROW(uint32_t) 6289 iemNativeEmitTestIfGpr32EqualsImmAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc, uint32_t uImm, 6290 IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0) 6291 { 6292 uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData); 6293 return iemNativeEmitTestIfGpr32EqualsImmAndJmpToLabel(pReNative, off, iGprSrc, uImm, idxLabel); 6294 } 6295 6296 6297 /** 6298 * Emits code that jumps to the given label if 16-bit @a iGprSrc equals @a uImm. 6299 * 6300 * @note ARM64: Helper register is required (idxTmpReg). 6301 */ 6302 DECL_INLINE_THROW(uint32_t) iemNativeEmitTestIfGpr16EqualsImmAndJmpToLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, 6303 uint8_t iGprSrc, uint16_t uImm, uint32_t idxLabel, 6304 uint8_t idxTmpReg = UINT8_MAX) 6305 { 6306 off = iemNativeEmitCmpGpr16WithImm(pReNative, off, iGprSrc, uImm, idxTmpReg); 6307 off = iemNativeEmitJzToLabel(pReNative, off, idxLabel); 6308 return off; 6309 } 6310 6311 6312 /** 6313 * Emits code that jumps to a new label if 16-bit @a iGprSrc equals @a uImm. 6314 * 6315 * @note ARM64: Helper register is required (idxTmpReg). 6316 */ 6317 DECL_INLINE_THROW(uint32_t) 6318 iemNativeEmitTestIfGpr16EqualsImmAndJmpToNewLabel(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iGprSrc, uint16_t uImm, 6319 IEMNATIVELABELTYPE enmLabelType, uint16_t uData = 0, 6320 uint8_t idxTmpReg = UINT8_MAX) 6321 { 6322 uint32_t const idxLabel = iemNativeLabelCreate(pReNative, enmLabelType, UINT32_MAX /*offWhere*/, uData); 6323 return iemNativeEmitTestIfGpr16EqualsImmAndJmpToLabel(pReNative, off, iGprSrc, uImm, idxLabel, idxTmpReg); 6133 6324 } 6134 6325 -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r102817 r102876 1063 1063 #define IEM_MC_IF_ECX_IS_NZ() (void)fMcBegin; if (g_fRandom) { 1064 1064 #define IEM_MC_IF_RCX_IS_NZ() (void)fMcBegin; if (g_fRandom) { 1065 #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1066 #define IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1067 #define IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1068 #define IEM_MC_IF_CX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1069 #define IEM_MC_IF_ECX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1070 #define IEM_MC_IF_RCX_IS_NZ_AND_EFL_BIT_NOT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1065 #define IEM_MC_IF_CX_IS_NOT_ONE() (void)fMcBegin; if (g_fRandom) { 1066 #define IEM_MC_IF_ECX_IS_NOT_ONE() (void)fMcBegin; if (g_fRandom) { 1067 #define IEM_MC_IF_RCX_IS_NOT_ONE() (void)fMcBegin; if (g_fRandom) { 1068 #define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1069 #define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1070 #define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1071 #define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1072 #define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1073 #define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) (void)fMcBegin; if (g_fRandom) { 1071 1074 #define IEM_MC_IF_LOCAL_IS_Z(a_Local) (void)fMcBegin; if ((a_Local) == 0) { 1072 1075 #define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo) (void)fMcBegin; CHK_GREG_IDX(a_iGReg); if (g_fRandom) {
Note:
See TracChangeset
for help on using the changeset viewer.