Changeset 102959 in vbox for trunk/include/iprt/asm.h

Timestamp:

Jan 18, 2024 8:36:48 PM (13 months ago)

Author:

vboxsync

Message:

iprt/asm.h: Working over the ASMAtomicXchg* functions for arm64 again, opting for acquire-lrelase w/o DMB (barrier) as a safer alternative. bugref:9898

File:

• trunk/include/iprt/asm.h (modified) (5 diffs)

trunk/include/iprt/asm.h

@@ -104 +104 @@
  * assuming that the host CPU always supports these. */
 # define RTASM_ARM64_USE_FEAT_LSE 1
+/** @def RTASM_ARM64_USE_FEAT_LSE_WITHOUT_DMB
+ * Set to use DMB w/o barrier in most places and rely on the acquire-release
+ * aspects to do the serializing.   The assumption is that the tstRTInline
+ * benchmark may be skewing the results testing an unusual scenario. */
+# define RTASM_ARM64_USE_FEAT_LSE_WITHOUT_DMB 1
 #endif
 
@@ -531 +536 @@
        care of by the DMB. The SWPB is rather cheap (~70% faster). */
     __asm__ __volatile__("Lstart_ASMAtomicXchgU8_%=:\n\t"
+#   if defined(RTASM_ARM64_USE_FEAT_LSE_WITHOUT_DMB)
+                         "swpalb    %w[uNew], %w[uOld], %[pMem]\n\t"
+#   else
                          RTASM_ARM_DMB_SY
                          "swpb      %w[uNew], %w[uOld], %[pMem]\n\t"
+#   endif
                          : [pMem] "+Q" (*pu8)
                          , [uOld] "=&r" (uOld)
                          : [uNew] "r" ((uint32_t)u8)
-                           RTASM_ARM_DMB_SY_COMMA_IN_REG
                          : );
 #  else
@@ -643 +651 @@
        The SWPH is rather cheap (~70% faster). */
     __asm__ __volatile__("Lstart_ASMAtomicXchgU16_%=:\n\t"
+#   if defined(RTASM_ARM64_USE_FEAT_LSE_WITHOUT_DMB)
+                         "swpalh    %w[uNew], %w[uOld], %[pMem]\n\t"
+#   else
                          RTASM_ARM_DMB_SY
                          "swph      %w[uNew], %w[uOld], %[pMem]\n\t"
+#   endif
                          : [pMem] "+Q" (*pu16)
                          , [uOld] "=&r" (uOld)
                          : [uNew] "r" ((uint32_t)u16)
-                           RTASM_ARM_DMB_SY_COMMA_IN_REG
                          : );
 #  else
@@ -744 +755 @@
        The SWP is rather cheap (~70% faster). */
     __asm__ __volatile__("Lstart_ASMAtomicXchgU32_%=:\n\t"
+#   if defined(RTASM_ARM64_USE_FEAT_LSE_WITHOUT_DMB)
+                         "swpal     %w[uNew], %w[uOld], %[pMem]\n\t"
+#   else
                          RTASM_ARM_DMB_SY
                          "swp       %w[uNew], %w[uOld], %[pMem]\n\t"
+#   endif
                          : [pMem] "+Q" (*pu32)
                          , [uOld] "=&r" (uOld)
                          : [uNew] "r" (u32)
-                           RTASM_ARM_DMB_SY_COMMA_IN_REG
                          : );
 #  else
@@ -885 +899 @@
        The SWP is rather cheap (~70% faster). */
     __asm__ __volatile__("Lstart_ASMAtomicXchgU64_%=:\n\t"
+#   if defined(RTASM_ARM64_USE_FEAT_LSE_WITHOUT_DMB)
+                         "swpal     %[uNew], %[uOld], %[pMem]\n\t"
+#   else
                          RTASM_ARM_DMB_SY
                          "swp       %[uNew], %[uOld], %[pMem]\n\t"
+#   endif
                          : [pMem] "+Q" (*pu64)
                          , [uOld] "=&r" (uOld)
                          : [uNew] "r" (u64)
-                           RTASM_ARM_DMB_SY_COMMA_IN_REG
                          : );
 #  else