Changeset 103056 in vbox for trunk/src/VBox/VMM/testcase/tstIEMAImpl.cpp
- Timestamp:
- Jan 25, 2024 10:08:29 AM (12 months ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/testcase/tstIEMAImpl.cpp (modified) (22 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/testcase/tstIEMAImpl.cpp
r103050 r103056 59 59 * Defined Constants And Macros * 60 60 *********************************************************************************************************************************/ 61 #define ENTRY(a_Name) ENTRY_EX(a_Name, 0)61 #define ENTRY(a_Name) ENTRY_EX(a_Name, 0) 62 62 #define ENTRY_EX(a_Name, a_uExtra) \ 63 63 { RT_XSTR(a_Name), iemAImpl_ ## a_Name, NULL, \ … … 65 65 a_uExtra, IEMTARGETCPU_EFL_BEHAVIOR_NATIVE /* means same for all here */ } 66 66 67 #define ENTRY_ FIX(a_Name) ENTRY_FIX_EX(a_Name, 0)67 #define ENTRY_BIN_FIX(a_Name) ENTRY_BIN_FIX_EX(a_Name, 0) 68 68 #ifdef TSTIEMAIMPL_WITH_GENERATOR 69 # define ENTRY_ FIX_EX(a_Name, a_uExtra) \69 # define ENTRY_BIN_FIX_EX(a_Name, a_uExtra) \ 70 70 { RT_XSTR(a_Name), iemAImpl_ ## a_Name, NULL, \ 71 g_aTests_ ## a_Name, &g_c Tests_ ## a_Name, \71 g_aTests_ ## a_Name, &g_cbTests_ ## a_Name, \ 72 72 a_uExtra, IEMTARGETCPU_EFL_BEHAVIOR_NATIVE /* means same for all here */, \ 73 false, false, RT_ELEMENTS(g_aFixedTests_ ## a_Name), g_aFixedTests_ ## a_Name }73 true /*fBinary*/, true /*fCompressed*/, RT_ELEMENTS(g_aFixedTests_ ## a_Name), g_aFixedTests_ ## a_Name } 74 74 #else 75 # define ENTRY_ FIX_EX(a_Name, a_uExtra) ENTRY_EX(a_Name, a_uExtra)75 # define ENTRY_BIN_FIX_EX(a_Name, a_uExtra) ENTRY_BIN_EX(a_Name, a_uExtra) 76 76 #endif 77 77 78 #define ENTRY_ PFN_CAST(a_Name, a_pfnType) ENTRY_PFN_CAST_EX(a_Name, a_pfnType, 0)79 #define ENTRY_ PFN_CAST_EX(a_Name, a_pfnType, a_uExtra) \78 #define ENTRY_BIN_PFN_CAST(a_Name, a_pfnType) ENTRY_BIN_PFN_CAST_EX(a_Name, a_pfnType, 0) 79 #define ENTRY_BIN_PFN_CAST_EX(a_Name, a_pfnType, a_uExtra) \ 80 80 { RT_XSTR(a_Name), (a_pfnType)iemAImpl_ ## a_Name, NULL, \ 81 g_aTests_ ## a_Name, &g_c Tests_ ## a_Name, \82 a_uExtra, IEMTARGETCPU_EFL_BEHAVIOR_NATIVE /* means same for all here */ }83 84 #define ENTRY_BIN(a_Name) ENTRY_EX_BIN(a_Name, 0)85 #define ENTRY_ EX_BIN(a_Name, a_uExtra) \81 g_aTests_ ## a_Name, &g_cbTests_ ## a_Name, \ 82 a_uExtra, IEMTARGETCPU_EFL_BEHAVIOR_NATIVE /* means same for all here */, true /*fBinary*/, true /*fCompressed*/ } 83 84 #define ENTRY_BIN(a_Name) ENTRY_BIN_EX(a_Name, 0) 85 #define ENTRY_BIN_EX(a_Name, a_uExtra) \ 86 86 { RT_XSTR(a_Name), iemAImpl_ ## a_Name, NULL, \ 87 87 g_aTests_ ## a_Name, &g_cbTests_ ## a_Name, \ 88 88 a_uExtra, IEMTARGETCPU_EFL_BEHAVIOR_NATIVE /* means same for all here */, true /*fBinary*/, true /*fCompressed*/ } 89 89 90 #define ENTRY_BIN_AVX(a_Name) ENTRY_BIN_AVX_EX(a_Name, 0)90 #define ENTRY_BIN_AVX(a_Name) ENTRY_BIN_AVX_EX(a_Name, 0) 91 91 #ifndef IEM_WITHOUT_ASSEMBLY 92 92 # define ENTRY_BIN_AVX_EX(a_Name, a_uExtra) \ … … 101 101 #endif 102 102 103 #define ENTRY_BIN_SSE_OPT(a_Name) ENTRY_BIN_SSE_OPT_EX(a_Name, 0)103 #define ENTRY_BIN_SSE_OPT(a_Name) ENTRY_BIN_SSE_OPT_EX(a_Name, 0) 104 104 #ifndef IEM_WITHOUT_ASSEMBLY 105 105 # define ENTRY_BIN_SSE_OPT_EX(a_Name, a_uExtra) \ … … 114 114 #endif 115 115 116 117 #define ENTRY_INTEL(a_Name, a_fEflUndef) ENTRY_INTEL_EX(a_Name, a_fEflUndef, 0) 116 #define ENTRY_BIN_INTEL(a_Name, a_fEflUndef) ENTRY_BIN_INTEL_EX(a_Name, a_fEflUndef, 0) 117 #define ENTRY_BIN_INTEL_EX(a_Name, a_fEflUndef, a_uExtra) \ 118 { RT_XSTR(a_Name) "_intel", iemAImpl_ ## a_Name ## _intel, iemAImpl_ ## a_Name, \ 119 g_aTests_ ## a_Name ## _intel, &g_cbTests_ ## a_Name ## _intel, \ 120 a_uExtra, IEMTARGETCPU_EFL_BEHAVIOR_INTEL, true /*fBinary*/, true /*fCompressed*/ } 121 122 #define ENTRY_BIN_AMD(a_Name, a_fEflUndef) ENTRY_BIN_AMD_EX(a_Name, a_fEflUndef, 0) 123 #define ENTRY_BIN_AMD_EX(a_Name, a_fEflUndef, a_uExtra) \ 124 { RT_XSTR(a_Name) "_amd", iemAImpl_ ## a_Name ## _amd, iemAImpl_ ## a_Name, \ 125 g_aTests_ ## a_Name ## _amd, &g_cbTests_ ## a_Name ## _amd, \ 126 a_uExtra, IEMTARGETCPU_EFL_BEHAVIOR_AMD, true /*fBinary*/, true /*fCompressed*/ } 127 128 #define ENTRY_INTEL(a_Name, a_fEflUndef) ENTRY_INTEL_EX(a_Name, a_fEflUndef, 0) 118 129 #define ENTRY_INTEL_EX(a_Name, a_fEflUndef, a_uExtra) \ 119 130 { RT_XSTR(a_Name) "_intel", iemAImpl_ ## a_Name ## _intel, iemAImpl_ ## a_Name, \ … … 121 132 a_uExtra, IEMTARGETCPU_EFL_BEHAVIOR_INTEL } 122 133 123 #define ENTRY_AMD(a_Name, a_fEflUndef) ENTRY_AMD_EX(a_Name, a_fEflUndef, 0)134 #define ENTRY_AMD(a_Name, a_fEflUndef) ENTRY_AMD_EX(a_Name, a_fEflUndef, 0) 124 135 #define ENTRY_AMD_EX(a_Name, a_fEflUndef, a_uExtra) \ 125 136 { RT_XSTR(a_Name) "_amd", iemAImpl_ ## a_Name ## _amd, iemAImpl_ ## a_Name, \ … … 1684 1695 continue; \ 1685 1696 a_TestType const * const paTests = a_aSubTests[iFn].paTests; \ 1686 uint32_t const cTests = *a_aSubTests[iFn].pcTests ; \1697 uint32_t const cTests = *a_aSubTests[iFn].pcTests / sizeof(paTests[0]); \ 1687 1698 PFNIEMAIMPLBINU ## a_cBits pfn = a_aSubTests[iFn].pfn; \ 1688 1699 uint32_t const cVars = COUNT_VARIATIONS(a_aSubTests[iFn]); \ … … 1734 1745 static BINU8_T g_aBinU8[] = 1735 1746 { 1736 ENTRY (add_u8),1737 ENTRY (add_u8_locked),1738 ENTRY (adc_u8),1739 ENTRY (adc_u8_locked),1740 ENTRY (sub_u8),1741 ENTRY (sub_u8_locked),1742 ENTRY (sbb_u8),1743 ENTRY (sbb_u8_locked),1744 ENTRY (or_u8),1745 ENTRY (or_u8_locked),1746 ENTRY (xor_u8),1747 ENTRY (xor_u8_locked),1748 ENTRY (and_u8),1749 ENTRY (and_u8_locked),1750 ENTRY_ PFN_CAST(cmp_u8, PFNIEMAIMPLBINU8),1751 ENTRY_ PFN_CAST(test_u8, PFNIEMAIMPLBINU8),1747 ENTRY_BIN(add_u8), 1748 ENTRY_BIN(add_u8_locked), 1749 ENTRY_BIN(adc_u8), 1750 ENTRY_BIN(adc_u8_locked), 1751 ENTRY_BIN(sub_u8), 1752 ENTRY_BIN(sub_u8_locked), 1753 ENTRY_BIN(sbb_u8), 1754 ENTRY_BIN(sbb_u8_locked), 1755 ENTRY_BIN(or_u8), 1756 ENTRY_BIN(or_u8_locked), 1757 ENTRY_BIN(xor_u8), 1758 ENTRY_BIN(xor_u8_locked), 1759 ENTRY_BIN(and_u8), 1760 ENTRY_BIN(and_u8_locked), 1761 ENTRY_BIN_PFN_CAST(cmp_u8, PFNIEMAIMPLBINU8), 1762 ENTRY_BIN_PFN_CAST(test_u8, PFNIEMAIMPLBINU8), 1752 1763 }; 1753 1764 TEST_BINARY_OPS(8, uint8_t, "%#04x", BINU8_TEST_T, g_aBinU8) … … 1766 1777 static BINU16_T g_aBinU16[] = 1767 1778 { 1768 ENTRY_ FIX(add_u16),1769 ENTRY (add_u16_locked),1770 ENTRY (adc_u16),1771 ENTRY (adc_u16_locked),1772 ENTRY (sub_u16),1773 ENTRY (sub_u16_locked),1774 ENTRY (sbb_u16),1775 ENTRY (sbb_u16_locked),1776 ENTRY (or_u16),1777 ENTRY (or_u16_locked),1778 ENTRY (xor_u16),1779 ENTRY (xor_u16_locked),1780 ENTRY (and_u16),1781 ENTRY (and_u16_locked),1782 ENTRY_ PFN_CAST(cmp_u16, PFNIEMAIMPLBINU16),1783 ENTRY_ PFN_CAST(test_u16, PFNIEMAIMPLBINU16),1784 ENTRY_ PFN_CAST_EX(bt_u16, PFNIEMAIMPLBINU16, 1),1785 ENTRY_ EX(btc_u16, 1),1786 ENTRY_ EX(btc_u16_locked, 1),1787 ENTRY_ EX(btr_u16, 1),1788 ENTRY_ EX(btr_u16_locked, 1),1789 ENTRY_ EX(bts_u16, 1),1790 ENTRY_ EX(bts_u16_locked, 1),1791 ENTRY_ AMD( bsf_u16, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1792 ENTRY_ INTEL(bsf_u16, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1793 ENTRY_ AMD( bsr_u16, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1794 ENTRY_ INTEL(bsr_u16, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1795 ENTRY_ AMD( imul_two_u16, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF),1796 ENTRY_ INTEL(imul_two_u16, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF),1797 ENTRY (arpl),1779 ENTRY_BIN_FIX(add_u16), 1780 ENTRY_BIN(add_u16_locked), 1781 ENTRY_BIN(adc_u16), 1782 ENTRY_BIN(adc_u16_locked), 1783 ENTRY_BIN(sub_u16), 1784 ENTRY_BIN(sub_u16_locked), 1785 ENTRY_BIN(sbb_u16), 1786 ENTRY_BIN(sbb_u16_locked), 1787 ENTRY_BIN(or_u16), 1788 ENTRY_BIN(or_u16_locked), 1789 ENTRY_BIN(xor_u16), 1790 ENTRY_BIN(xor_u16_locked), 1791 ENTRY_BIN(and_u16), 1792 ENTRY_BIN(and_u16_locked), 1793 ENTRY_BIN_PFN_CAST(cmp_u16, PFNIEMAIMPLBINU16), 1794 ENTRY_BIN_PFN_CAST(test_u16, PFNIEMAIMPLBINU16), 1795 ENTRY_BIN_PFN_CAST_EX(bt_u16, PFNIEMAIMPLBINU16, 1), 1796 ENTRY_BIN_EX(btc_u16, 1), 1797 ENTRY_BIN_EX(btc_u16_locked, 1), 1798 ENTRY_BIN_EX(btr_u16, 1), 1799 ENTRY_BIN_EX(btr_u16_locked, 1), 1800 ENTRY_BIN_EX(bts_u16, 1), 1801 ENTRY_BIN_EX(bts_u16_locked, 1), 1802 ENTRY_BIN_AMD( bsf_u16, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1803 ENTRY_BIN_INTEL(bsf_u16, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1804 ENTRY_BIN_AMD( bsr_u16, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1805 ENTRY_BIN_INTEL(bsr_u16, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1806 ENTRY_BIN_AMD( imul_two_u16, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF), 1807 ENTRY_BIN_INTEL(imul_two_u16, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF), 1808 ENTRY_BIN(arpl), 1798 1809 }; 1799 1810 TEST_BINARY_OPS(16, uint16_t, "%#06x", BINU16_TEST_T, g_aBinU16) … … 1812 1823 static BINU32_T g_aBinU32[] = 1813 1824 { 1814 ENTRY_ FIX(add_u32),1815 ENTRY (add_u32_locked),1816 ENTRY (adc_u32),1817 ENTRY (adc_u32_locked),1818 ENTRY (sub_u32),1819 ENTRY (sub_u32_locked),1820 ENTRY (sbb_u32),1821 ENTRY (sbb_u32_locked),1822 ENTRY (or_u32),1823 ENTRY (or_u32_locked),1824 ENTRY (xor_u32),1825 ENTRY (xor_u32_locked),1826 ENTRY (and_u32),1827 ENTRY (and_u32_locked),1828 ENTRY_ PFN_CAST(cmp_u32, PFNIEMAIMPLBINU32),1829 ENTRY_ PFN_CAST(test_u32, PFNIEMAIMPLBINU32),1830 ENTRY_ PFN_CAST_EX(bt_u32, PFNIEMAIMPLBINU32, 1),1831 ENTRY_ EX(btc_u32, 1),1832 ENTRY_ EX(btc_u32_locked, 1),1833 ENTRY_ EX(btr_u32, 1),1834 ENTRY_ EX(btr_u32_locked, 1),1835 ENTRY_ EX(bts_u32, 1),1836 ENTRY_ EX(bts_u32_locked, 1),1837 ENTRY_ AMD( bsf_u32, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1838 ENTRY_ INTEL(bsf_u32, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1839 ENTRY_ AMD( bsr_u32, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1840 ENTRY_ INTEL(bsr_u32, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1841 ENTRY_ AMD( imul_two_u32, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF),1842 ENTRY_ INTEL(imul_two_u32, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF),1843 ENTRY (adcx_u32),1844 ENTRY (adox_u32),1825 ENTRY_BIN_FIX(add_u32), 1826 ENTRY_BIN(add_u32_locked), 1827 ENTRY_BIN(adc_u32), 1828 ENTRY_BIN(adc_u32_locked), 1829 ENTRY_BIN(sub_u32), 1830 ENTRY_BIN(sub_u32_locked), 1831 ENTRY_BIN(sbb_u32), 1832 ENTRY_BIN(sbb_u32_locked), 1833 ENTRY_BIN(or_u32), 1834 ENTRY_BIN(or_u32_locked), 1835 ENTRY_BIN(xor_u32), 1836 ENTRY_BIN(xor_u32_locked), 1837 ENTRY_BIN(and_u32), 1838 ENTRY_BIN(and_u32_locked), 1839 ENTRY_BIN_PFN_CAST(cmp_u32, PFNIEMAIMPLBINU32), 1840 ENTRY_BIN_PFN_CAST(test_u32, PFNIEMAIMPLBINU32), 1841 ENTRY_BIN_PFN_CAST_EX(bt_u32, PFNIEMAIMPLBINU32, 1), 1842 ENTRY_BIN_EX(btc_u32, 1), 1843 ENTRY_BIN_EX(btc_u32_locked, 1), 1844 ENTRY_BIN_EX(btr_u32, 1), 1845 ENTRY_BIN_EX(btr_u32_locked, 1), 1846 ENTRY_BIN_EX(bts_u32, 1), 1847 ENTRY_BIN_EX(bts_u32_locked, 1), 1848 ENTRY_BIN_AMD( bsf_u32, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1849 ENTRY_BIN_INTEL(bsf_u32, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1850 ENTRY_BIN_AMD( bsr_u32, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1851 ENTRY_BIN_INTEL(bsr_u32, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1852 ENTRY_BIN_AMD( imul_two_u32, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF), 1853 ENTRY_BIN_INTEL(imul_two_u32, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF), 1854 ENTRY_BIN(adcx_u32), 1855 ENTRY_BIN(adox_u32), 1845 1856 }; 1846 1857 TEST_BINARY_OPS(32, uint32_t, "%#010RX32", BINU32_TEST_T, g_aBinU32) … … 1859 1870 static BINU64_T g_aBinU64[] = 1860 1871 { 1861 ENTRY_ FIX(add_u64),1862 ENTRY (add_u64_locked),1863 ENTRY (adc_u64),1864 ENTRY (adc_u64_locked),1865 ENTRY (sub_u64),1866 ENTRY (sub_u64_locked),1867 ENTRY (sbb_u64),1868 ENTRY (sbb_u64_locked),1869 ENTRY (or_u64),1870 ENTRY (or_u64_locked),1871 ENTRY (xor_u64),1872 ENTRY (xor_u64_locked),1873 ENTRY (and_u64),1874 ENTRY (and_u64_locked),1875 ENTRY_ PFN_CAST(cmp_u64, PFNIEMAIMPLBINU64),1876 ENTRY_ PFN_CAST(test_u64, PFNIEMAIMPLBINU64),1877 ENTRY_ PFN_CAST_EX(bt_u64, PFNIEMAIMPLBINU64, 1),1878 ENTRY_ EX(btc_u64, 1),1879 ENTRY_ EX(btc_u64_locked, 1),1880 ENTRY_ EX(btr_u64, 1),1881 ENTRY_ EX(btr_u64_locked, 1),1882 ENTRY_ EX(bts_u64, 1),1883 ENTRY_ EX(bts_u64_locked, 1),1884 ENTRY_ AMD( bsf_u64, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1885 ENTRY_ INTEL(bsf_u64, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1886 ENTRY_ AMD( bsr_u64, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1887 ENTRY_ INTEL(bsr_u64, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF),1888 ENTRY_ AMD( imul_two_u64, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF),1889 ENTRY_ INTEL(imul_two_u64, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF),1890 ENTRY (adcx_u64),1891 ENTRY (adox_u64),1872 ENTRY_BIN_FIX(add_u64), 1873 ENTRY_BIN(add_u64_locked), 1874 ENTRY_BIN(adc_u64), 1875 ENTRY_BIN(adc_u64_locked), 1876 ENTRY_BIN(sub_u64), 1877 ENTRY_BIN(sub_u64_locked), 1878 ENTRY_BIN(sbb_u64), 1879 ENTRY_BIN(sbb_u64_locked), 1880 ENTRY_BIN(or_u64), 1881 ENTRY_BIN(or_u64_locked), 1882 ENTRY_BIN(xor_u64), 1883 ENTRY_BIN(xor_u64_locked), 1884 ENTRY_BIN(and_u64), 1885 ENTRY_BIN(and_u64_locked), 1886 ENTRY_BIN_PFN_CAST(cmp_u64, PFNIEMAIMPLBINU64), 1887 ENTRY_BIN_PFN_CAST(test_u64, PFNIEMAIMPLBINU64), 1888 ENTRY_BIN_PFN_CAST_EX(bt_u64, PFNIEMAIMPLBINU64, 1), 1889 ENTRY_BIN_EX(btc_u64, 1), 1890 ENTRY_BIN_EX(btc_u64_locked, 1), 1891 ENTRY_BIN_EX(btr_u64, 1), 1892 ENTRY_BIN_EX(btr_u64_locked, 1), 1893 ENTRY_BIN_EX(bts_u64, 1), 1894 ENTRY_BIN_EX(bts_u64_locked, 1), 1895 ENTRY_BIN_AMD( bsf_u64, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1896 ENTRY_BIN_INTEL(bsf_u64, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1897 ENTRY_BIN_AMD( bsr_u64, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1898 ENTRY_BIN_INTEL(bsr_u64, X86_EFL_CF | X86_EFL_PF | X86_EFL_AF | X86_EFL_SF | X86_EFL_OF), 1899 ENTRY_BIN_AMD( imul_two_u64, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF), 1900 ENTRY_BIN_INTEL(imul_two_u64, X86_EFL_PF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_SF), 1901 ENTRY_BIN(adcx_u64), 1902 ENTRY_BIN(adox_u64), 1892 1903 }; 1893 1904 TEST_BINARY_OPS(64, uint64_t, "%#018RX64", BINU64_TEST_T, g_aBinU64) … … 1973 1984 static struct \ 1974 1985 { \ 1975 const char *pszName; \ 1976 FNIEMAIMPLXADDU ## a_cBits *pfn; \ 1986 const char * const pszName; \ 1987 FNIEMAIMPLXADDU ## a_cBits * const pfn; \ 1988 bool fCompressed; \ 1989 bool fBinary; \ 1977 1990 BINU ## a_cBits ## _TEST_T const *paTests; \ 1978 1991 uint32_t const *pcTests; \ 1979 } consts_aFuncs[] = \1992 } s_aFuncs[] = \ 1980 1993 { \ 1981 1994 { "xadd_u" # a_cBits, iemAImpl_xadd_u ## a_cBits, \ 1982 g_aTests_add_u ## a_cBits, &g_cTests_add_u ## a_cBits }, \1995 true, true, g_aTests_add_u ## a_cBits, &g_cbTests_add_u ## a_cBits }, \ 1983 1996 { "xadd_u" # a_cBits "8_locked", iemAImpl_xadd_u ## a_cBits ## _locked, \ 1984 g_aTests_add_u ## a_cBits, &g_cTests_add_u ## a_cBits }, \1997 true, true, g_aTests_add_u ## a_cBits, &g_cbTests_add_u ## a_cBits }, \ 1985 1998 }; \ 1986 1999 for (size_t iFn = 0; iFn < RT_ELEMENTS(s_aFuncs); iFn++) \ 1987 2000 { \ 1988 if (!SubTestAndCheckIfEnabled(s_aFuncs[iFn].pszName)) continue; \ 1989 uint32_t const cTests = *s_aFuncs[iFn].pcTests; \ 2001 if (!SUBTEST_CHECK_IF_ENABLED_AND_DECOMPRESS(s_aFuncs[iFn])) continue; \ 1990 2002 BINU ## a_cBits ## _TEST_T const * const paTests = s_aFuncs[iFn].paTests; \ 2003 uint32_t const cTests = *s_aFuncs[iFn].pcTests / sizeof(paTests[0]); \ 1991 2004 if (!cTests) RTTestSkipped(g_hTest, "no tests"); \ 1992 2005 for (uint32_t iTest = 0; iTest < cTests; iTest++) \ … … 2023 2036 static struct \ 2024 2037 { \ 2025 const char *pszName; \ 2026 FNIEMAIMPLCMPXCHGU ## a_cBits *pfn; \ 2027 PFNIEMAIMPLBINU ## a_cBits pfnSub; \ 2028 BINU ## a_cBits ## _TEST_T const *paTests; \ 2029 uint32_t const *pcTests; \ 2030 } const s_aFuncs[] = \ 2038 const char * const pszName; \ 2039 FNIEMAIMPLCMPXCHGU ## a_cBits * const pfn; \ 2040 PFNIEMAIMPLBINU ## a_cBits const pfnSub; \ 2041 bool fCompressed; \ 2042 bool fBinary; \ 2043 BINU ## a_cBits ## _TEST_T const *paTests; \ 2044 uint32_t const *pcTests; \ 2045 } s_aFuncs[] = \ 2031 2046 { \ 2032 2047 { "cmpxchg_u" # a_cBits, iemAImpl_cmpxchg_u ## a_cBits, iemAImpl_sub_u ## a_cBits, \ 2033 g_aTests_cmp_u ## a_cBits, &g_cTests_cmp_u ## a_cBits }, \2048 true, true, g_aTests_cmp_u ## a_cBits, &g_cbTests_cmp_u ## a_cBits }, \ 2034 2049 { "cmpxchg_u" # a_cBits "_locked", iemAImpl_cmpxchg_u ## a_cBits ## _locked, iemAImpl_sub_u ## a_cBits, \ 2035 g_aTests_cmp_u ## a_cBits, &g_cTests_cmp_u ## a_cBits }, \2050 true, true, g_aTests_cmp_u ## a_cBits, &g_cbTests_cmp_u ## a_cBits }, \ 2036 2051 }; \ 2037 2052 for (size_t iFn = 0; iFn < RT_ELEMENTS(s_aFuncs); iFn++) \ 2038 2053 { \ 2039 if (!S ubTestAndCheckIfEnabled(s_aFuncs[iFn].pszName)) continue; \2054 if (!SUBTEST_CHECK_IF_ENABLED_AND_DECOMPRESS(s_aFuncs[iFn])) continue; \ 2040 2055 BINU ## a_cBits ## _TEST_T const * const paTests = s_aFuncs[iFn].paTests; \ 2041 uint32_t const cTests = *s_aFuncs[iFn].pcTests ; \2056 uint32_t const cTests = *s_aFuncs[iFn].pcTests / sizeof(paTests[0]); \ 2042 2057 if (!cTests) RTTestSkipped(g_hTest, "no tests"); \ 2043 2058 for (uint32_t iTest = 0; iTest < cTests; iTest++) \ … … 2277 2292 static a_SubTestType a_aSubTests[] = \ 2278 2293 { \ 2279 ENTRY_ AMD(shld_u ## a_cBits, X86_EFL_OF | X86_EFL_CF), \2280 ENTRY_ INTEL(shld_u ## a_cBits, X86_EFL_OF | X86_EFL_CF), \2281 ENTRY_ AMD(shrd_u ## a_cBits, X86_EFL_OF | X86_EFL_CF), \2282 ENTRY_ INTEL(shrd_u ## a_cBits, X86_EFL_OF | X86_EFL_CF), \2294 ENTRY_BIN_AMD(shld_u ## a_cBits, X86_EFL_OF | X86_EFL_CF), \ 2295 ENTRY_BIN_INTEL(shld_u ## a_cBits, X86_EFL_OF | X86_EFL_CF), \ 2296 ENTRY_BIN_AMD(shrd_u ## a_cBits, X86_EFL_OF | X86_EFL_CF), \ 2297 ENTRY_BIN_INTEL(shrd_u ## a_cBits, X86_EFL_OF | X86_EFL_CF), \ 2283 2298 }; \ 2284 2299 \ … … 2293 2308 a_TestType const * const paTests = a_aSubTests[iFn].paTests; \ 2294 2309 PFNIEMAIMPLSHIFTDBLU ## a_cBits pfn = a_aSubTests[iFn].pfn; \ 2295 uint32_t const cTests = *a_aSubTests[iFn].pcTests ; \2310 uint32_t const cTests = *a_aSubTests[iFn].pcTests / sizeof(paTests[0]); \ 2296 2311 uint32_t const cVars = COUNT_VARIATIONS(a_aSubTests[iFn]); \ 2297 2312 if (!cTests) RTTestSkipped(g_hTest, "no tests"); \ … … 2409 2424 static a_SubTestType g_aUnaryU ## a_cBits [] = \ 2410 2425 { \ 2411 ENTRY (inc_u ## a_cBits), \2412 ENTRY (inc_u ## a_cBits ## _locked), \2413 ENTRY (dec_u ## a_cBits), \2414 ENTRY (dec_u ## a_cBits ## _locked), \2415 ENTRY (not_u ## a_cBits), \2416 ENTRY (not_u ## a_cBits ## _locked), \2417 ENTRY (neg_u ## a_cBits), \2418 ENTRY (neg_u ## a_cBits ## _locked), \2426 ENTRY_BIN(inc_u ## a_cBits), \ 2427 ENTRY_BIN(inc_u ## a_cBits ## _locked), \ 2428 ENTRY_BIN(dec_u ## a_cBits), \ 2429 ENTRY_BIN(dec_u ## a_cBits ## _locked), \ 2430 ENTRY_BIN(not_u ## a_cBits), \ 2431 ENTRY_BIN(not_u ## a_cBits ## _locked), \ 2432 ENTRY_BIN(neg_u ## a_cBits), \ 2433 ENTRY_BIN(neg_u ## a_cBits ## _locked), \ 2419 2434 }; \ 2420 2435 \ … … 2428 2443 continue; \ 2429 2444 a_TestType const * const paTests = g_aUnaryU ## a_cBits[iFn].paTests; \ 2430 uint32_t const cTests = *g_aUnaryU ## a_cBits[iFn].pcTests ; \2445 uint32_t const cTests = *g_aUnaryU ## a_cBits[iFn].pcTests / sizeof(paTests[0]); \ 2431 2446 if (!cTests) RTTestSkipped(g_hTest, "no tests"); \ 2432 2447 for (uint32_t iTest = 0; iTest < cTests; iTest++ ) \ … … 2555 2570 static a_SubTestType a_aSubTests[] = \ 2556 2571 { \ 2557 ENTRY_ AMD( rol_u ## a_cBits, X86_EFL_OF), \2558 ENTRY_ INTEL(rol_u ## a_cBits, X86_EFL_OF), \2559 ENTRY_ AMD( ror_u ## a_cBits, X86_EFL_OF), \2560 ENTRY_ INTEL(ror_u ## a_cBits, X86_EFL_OF), \2561 ENTRY_ AMD( rcl_u ## a_cBits, X86_EFL_OF), \2562 ENTRY_ INTEL(rcl_u ## a_cBits, X86_EFL_OF), \2563 ENTRY_ AMD( rcr_u ## a_cBits, X86_EFL_OF), \2564 ENTRY_ INTEL(rcr_u ## a_cBits, X86_EFL_OF), \2565 ENTRY_ AMD( shl_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \2566 ENTRY_ INTEL(shl_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \2567 ENTRY_ AMD( shr_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \2568 ENTRY_ INTEL(shr_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \2569 ENTRY_ AMD( sar_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \2570 ENTRY_ INTEL(sar_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \2572 ENTRY_BIN_AMD( rol_u ## a_cBits, X86_EFL_OF), \ 2573 ENTRY_BIN_INTEL(rol_u ## a_cBits, X86_EFL_OF), \ 2574 ENTRY_BIN_AMD( ror_u ## a_cBits, X86_EFL_OF), \ 2575 ENTRY_BIN_INTEL(ror_u ## a_cBits, X86_EFL_OF), \ 2576 ENTRY_BIN_AMD( rcl_u ## a_cBits, X86_EFL_OF), \ 2577 ENTRY_BIN_INTEL(rcl_u ## a_cBits, X86_EFL_OF), \ 2578 ENTRY_BIN_AMD( rcr_u ## a_cBits, X86_EFL_OF), \ 2579 ENTRY_BIN_INTEL(rcr_u ## a_cBits, X86_EFL_OF), \ 2580 ENTRY_BIN_AMD( shl_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \ 2581 ENTRY_BIN_INTEL(shl_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \ 2582 ENTRY_BIN_AMD( shr_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \ 2583 ENTRY_BIN_INTEL(shr_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \ 2584 ENTRY_BIN_AMD( sar_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \ 2585 ENTRY_BIN_INTEL(sar_u ## a_cBits, X86_EFL_OF | X86_EFL_AF), \ 2571 2586 }; \ 2572 2587 \ … … 2581 2596 PFNIEMAIMPLSHIFTU ## a_cBits pfn = a_aSubTests[iFn].pfn; \ 2582 2597 a_TestType const * const paTests = a_aSubTests[iFn].paTests; \ 2583 uint32_t const cTests = *a_aSubTests[iFn].pcTests ; \2598 uint32_t const cTests = *a_aSubTests[iFn].pcTests / sizeof(paTests[0]); \ 2584 2599 uint32_t const cVars = COUNT_VARIATIONS(a_aSubTests[iFn]); \ 2585 2600 if (!cTests) RTTestSkipped(g_hTest, "no tests"); \ … … 2662 2677 static INT_MULDIV_U8_T g_aMulDivU8[] = 2663 2678 { 2664 ENTRY_ AMD_EX(mul_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF,2665 X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF),2666 ENTRY_ INTEL_EX(mul_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0),2667 ENTRY_ AMD_EX(imul_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF,2668 X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF),2669 ENTRY_ INTEL_EX(imul_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0),2670 ENTRY_ AMD_EX(div_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0),2671 ENTRY_ INTEL_EX(div_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0),2672 ENTRY_ AMD_EX(idiv_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0),2673 ENTRY_ INTEL_EX(idiv_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0),2679 ENTRY_BIN_AMD_EX(mul_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 2680 X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF), 2681 ENTRY_BIN_INTEL_EX(mul_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), 2682 ENTRY_BIN_AMD_EX(imul_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 2683 X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF), 2684 ENTRY_BIN_INTEL_EX(imul_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), 2685 ENTRY_BIN_AMD_EX(div_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), 2686 ENTRY_BIN_INTEL_EX(div_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), 2687 ENTRY_BIN_AMD_EX(idiv_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), 2688 ENTRY_BIN_INTEL_EX(idiv_u8, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), 2674 2689 }; 2675 2690 … … 2725 2740 continue; \ 2726 2741 MULDIVU8_TEST_T const * const paTests = g_aMulDivU8[iFn].paTests; 2727 uint32_t const cTests = *g_aMulDivU8[iFn].pcTests ;2742 uint32_t const cTests = *g_aMulDivU8[iFn].pcTests / sizeof(paTests[0]); 2728 2743 uint32_t const fEflIgn = g_aMulDivU8[iFn].uExtra; 2729 2744 PFNIEMAIMPLMULDIVU8 pfn = g_aMulDivU8[iFn].pfn; … … 2815 2830 static a_SubTestType a_aSubTests [] = \ 2816 2831 { \ 2817 ENTRY_ AMD_EX(mul_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), \2818 ENTRY_ INTEL_EX(mul_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), \2819 ENTRY_ AMD_EX(imul_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), \2820 ENTRY_ INTEL_EX(imul_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), \2821 ENTRY_ AMD_EX(div_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), \2822 ENTRY_ INTEL_EX(div_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), \2823 ENTRY_ AMD_EX(idiv_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), \2824 ENTRY_ INTEL_EX(idiv_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), \2832 ENTRY_BIN_AMD_EX(mul_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), \ 2833 ENTRY_BIN_INTEL_EX(mul_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), \ 2834 ENTRY_BIN_AMD_EX(imul_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), \ 2835 ENTRY_BIN_INTEL_EX(imul_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF, 0), \ 2836 ENTRY_BIN_AMD_EX(div_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), \ 2837 ENTRY_BIN_INTEL_EX(div_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), \ 2838 ENTRY_BIN_AMD_EX(idiv_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), \ 2839 ENTRY_BIN_INTEL_EX(idiv_u ## a_cBits, X86_EFL_SF | X86_EFL_ZF | X86_EFL_AF | X86_EFL_PF | X86_EFL_CF | X86_EFL_OF, 0), \ 2825 2840 }; \ 2826 2841 \ … … 2834 2849 continue; \ 2835 2850 a_TestType const * const paTests = a_aSubTests[iFn].paTests; \ 2836 uint32_t const cTests = *a_aSubTests[iFn].pcTests ; \2851 uint32_t const cTests = *a_aSubTests[iFn].pcTests / sizeof(paTests[0]); \ 2837 2852 uint32_t const fEflIgn = a_aSubTests[iFn].uExtra; \ 2838 2853 PFNIEMAIMPLMULDIVU ## a_cBits pfn = a_aSubTests[iFn].pfn; \
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