Changeset 103256 in vbox
- Timestamp:
- Feb 7, 2024 3:07:09 PM (15 months ago)
- svn:sync-xref-src-repo-rev:
- 161545
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r103247 r103256 7147 7147 #include "IEMAllMemRWTmpl.cpp.h" 7148 7148 7149 #define TMPL_MEM_TYPE RTUINT128U 7150 #define TMPL_MEM_TYPE_ALIGN 0 7151 #define TMPL_MEM_FN_SUFF U128NoAc 7152 #define TMPL_MEM_FMT_TYPE "%.16Rhxs" 7153 #define TMPL_MEM_FMT_DESC "dqword" 7154 #include "IEMAllMemRWTmpl.cpp.h" 7149 7155 7150 7156 /** … … 7277 7283 * @param GCPtrMem The address of the guest memory. 7278 7284 */ 7279 VBOXSTRICTRC iemMemFetchDataU256 (PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT7285 VBOXSTRICTRC iemMemFetchDataU256NoAc(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT 7280 7286 { 7281 7287 /* The lazy approach for now... */ … … 7307 7313 * @param GCPtrMem The address of the guest memory. 7308 7314 */ 7309 void iemMemFetchDataU256 Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP7315 void iemMemFetchDataU256NoAcJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP 7310 7316 { 7311 7317 /* The lazy approach for now... */ … … 7553 7559 */ 7554 7560 void iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP 7561 { 7562 /* The lazy approach for now... */ 7563 uint8_t bUnmapInfo; 7564 PRTUINT256U pu256Dst = (PRTUINT256U)iemMemMapJmp(pVCpu, &bUnmapInfo, sizeof(*pu256Dst), iSegReg, GCPtrMem, 7565 IEM_ACCESS_DATA_W, 0 /* NO_AC variant */); 7566 pu256Dst->au64[0] = pu256Value->au64[0]; 7567 pu256Dst->au64[1] = pu256Value->au64[1]; 7568 pu256Dst->au64[2] = pu256Value->au64[2]; 7569 pu256Dst->au64[3] = pu256Value->au64[3]; 7570 iemMemCommitAndUnmapJmp(pVCpu, bUnmapInfo); 7571 Log5(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 7572 } 7573 #endif 7574 7575 7576 /** 7577 * Stores a data qqword. 7578 * 7579 * @returns Strict VBox status code. 7580 * @param pVCpu The cross context virtual CPU structure of the calling thread. 7581 * @param iSegReg The index of the segment register to use for 7582 * this access. The base and limits are checked. 7583 * @param GCPtrMem The address of the guest memory. 7584 * @param pu256Value Pointer to the value to store. 7585 */ 7586 VBOXSTRICTRC iemMemStoreDataU256NoAc(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT 7587 { 7588 /* The lazy approach for now... */ 7589 uint8_t bUnmapInfo; 7590 PRTUINT256U pu256Dst; 7591 VBOXSTRICTRC rc = iemMemMap(pVCpu, (void **)&pu256Dst, &bUnmapInfo, sizeof(*pu256Dst), iSegReg, GCPtrMem, 7592 IEM_ACCESS_DATA_W, 0 /* NO_AC variant */); 7593 if (rc == VINF_SUCCESS) 7594 { 7595 pu256Dst->au64[0] = pu256Value->au64[0]; 7596 pu256Dst->au64[1] = pu256Value->au64[1]; 7597 pu256Dst->au64[2] = pu256Value->au64[2]; 7598 pu256Dst->au64[3] = pu256Value->au64[3]; 7599 rc = iemMemCommitAndUnmap(pVCpu, bUnmapInfo); 7600 Log5(("IEM WR qqword %d|%RGv: %.32Rhxs\n", iSegReg, GCPtrMem, pu256Dst)); 7601 } 7602 return rc; 7603 } 7604 7605 7606 #ifdef IEM_WITH_SETJMP 7607 /** 7608 * Stores a data qqword, longjmp on error. 7609 * 7610 * @param pVCpu The cross context virtual CPU structure of the calling thread. 7611 * @param iSegReg The index of the segment register to use for 7612 * this access. The base and limits are checked. 7613 * @param GCPtrMem The address of the guest memory. 7614 * @param pu256Value Pointer to the value to store. 7615 */ 7616 void iemMemStoreDataU256NoAcJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP 7555 7617 { 7556 7618 /* The lazy approach for now... */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py
r103233 r103256 3228 3228 'IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF': (McBlock.parseMcGeneric, True, True, False, ), 3229 3229 'IEM_MC_STORE_MEM_U128': (McBlock.parseMcGeneric, True, True, False, ), 3230 'IEM_MC_STORE_MEM_U128_NO_AC': (McBlock.parseMcGeneric, True, True, False, ), 3230 3231 'IEM_MC_STORE_MEM_U128_ALIGN_SSE': (McBlock.parseMcGeneric, True, True, False, ), 3231 3232 'IEM_MC_STORE_MEM_U16': (McBlock.parseMcGeneric, True, True, True, ), 3232 3233 'IEM_MC_STORE_MEM_U16_CONST': (McBlock.parseMcGeneric, True, True, True, ), 3233 3234 'IEM_MC_STORE_MEM_U256': (McBlock.parseMcGeneric, True, True, False, ), 3235 'IEM_MC_STORE_MEM_U256_NO_AC': (McBlock.parseMcGeneric, True, True, False, ), 3234 3236 'IEM_MC_STORE_MEM_U256_ALIGN_AVX': (McBlock.parseMcGeneric, True, True, False, ), 3235 3237 'IEM_MC_STORE_MEM_U32': (McBlock.parseMcGeneric, True, True, True, ), -
trunk/src/VBox/VMM/VMMAll/IEMAllInstTwoByte0f.cpp.h
r103255 r103256 2149 2149 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2150 2150 2151 IEM_MC_FETCH_MEM_U128 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2151 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2152 2152 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2153 2153 … … 2200 2200 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 2201 2201 2202 IEM_MC_FETCH_MEM_U128 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);2202 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 2203 2203 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 2204 2204 … … 2357 2357 2358 2358 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2359 IEM_MC_STORE_MEM_U128 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2359 IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2360 2360 2361 2361 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 2407 2407 2408 2408 IEM_MC_FETCH_XREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 2409 IEM_MC_STORE_MEM_U128 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);2409 IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 2410 2410 2411 2411 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 6660 6660 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 6661 6661 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 6662 IEM_MC_FETCH_MEM_U128 (u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);6662 IEM_MC_FETCH_MEM_U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 6663 6663 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 6664 6664 … … 7812 7812 7813 7813 IEM_MC_FETCH_XREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm)); 7814 IEM_MC_STORE_MEM_U128 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp);7814 IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp); 7815 7815 7816 7816 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 14082 14082 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 14083 14083 IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE(); 14084 IEM_MC_FETCH_MEM_U128 (u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);14084 IEM_MC_FETCH_MEM_U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 14085 14085 IEM_MC_STORE_XREG_U128(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 14086 14086 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap1.cpp.h
r103212 r103256 459 459 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 460 460 461 IEM_MC_FETCH_MEM_U128 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);461 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 462 462 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 463 463 … … 479 479 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 480 480 481 IEM_MC_FETCH_MEM_U256 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);481 IEM_MC_FETCH_MEM_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 482 482 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 483 483 … … 534 534 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 535 535 536 IEM_MC_FETCH_MEM_U128 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);536 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 537 537 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 538 538 … … 554 554 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 555 555 556 IEM_MC_FETCH_MEM_U256 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);556 IEM_MC_FETCH_MEM_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 557 557 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uSrc); 558 558 … … 737 737 738 738 IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 739 IEM_MC_STORE_MEM_U128 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);739 IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 740 740 741 741 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 757 757 758 758 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 759 IEM_MC_STORE_MEM_U256 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);759 IEM_MC_STORE_MEM_U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 760 760 761 761 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 812 812 813 813 IEM_MC_FETCH_YREG_U128(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 814 IEM_MC_STORE_MEM_U128 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);814 IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 815 815 816 816 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 832 832 833 833 IEM_MC_FETCH_YREG_U256(uSrc, IEM_GET_MODRM_REG(pVCpu, bRm)); 834 IEM_MC_STORE_MEM_U256 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc);834 IEM_MC_STORE_MEM_U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, uSrc); 835 835 836 836 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 1161 1161 IEM_MC_PREPARE_AVX_USAGE(); 1162 1162 1163 IEM_MC_FETCH_MEM_U128 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1163 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1164 1164 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 0, uSrc, 0); 1165 1165 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 1, uSrc, 0); … … 1185 1185 IEM_MC_PREPARE_AVX_USAGE(); 1186 1186 1187 IEM_MC_FETCH_MEM_U256 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1187 IEM_MC_FETCH_MEM_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1188 1188 IEM_MC_CALL_AVX_AIMPL_2(iemAImpl_vmovsldup_256_rm, iYRegDst, puSrc); 1189 1189 … … 1615 1615 IEM_MC_PREPARE_AVX_USAGE(); 1616 1616 1617 IEM_MC_FETCH_MEM_U128 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1617 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1618 1618 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 0, uSrc, 1); 1619 1619 IEM_MC_STORE_XREG_U32_U128(IEM_GET_MODRM_REG(pVCpu, bRm), 1, uSrc, 1); … … 1639 1639 IEM_MC_PREPARE_AVX_USAGE(); 1640 1640 1641 IEM_MC_FETCH_MEM_U256 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);1641 IEM_MC_FETCH_MEM_U256_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 1642 1642 IEM_MC_CALL_AVX_AIMPL_2(iemAImpl_vmovshdup_256_rm, iYRegDst, puSrc); 1643 1643 … … 3406 3406 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 3407 3407 3408 IEM_MC_FETCH_MEM_U128 (u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3408 IEM_MC_FETCH_MEM_U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3409 3409 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 3410 3410 … … 3426 3426 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 3427 3427 3428 IEM_MC_FETCH_MEM_U256 (u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);3428 IEM_MC_FETCH_MEM_U256_NO_AC(u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 3429 3429 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u256Tmp); 3430 3430 … … 4255 4255 4256 4256 IEM_MC_FETCH_YREG_U128(u128Tmp, IEM_GET_MODRM_REG(pVCpu, bRm)); 4257 IEM_MC_STORE_MEM_U128 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp);4257 IEM_MC_STORE_MEM_U128_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u128Tmp); 4258 4258 4259 4259 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 4275 4275 4276 4276 IEM_MC_FETCH_YREG_U256(u256Tmp, IEM_GET_MODRM_REG(pVCpu, bRm)); 4277 IEM_MC_STORE_MEM_U256 (pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u256Tmp);4277 IEM_MC_STORE_MEM_U256_NO_AC(pVCpu->iem.s.iEffSeg, GCPtrEffSrc, u256Tmp); 4278 4278 4279 4279 IEM_MC_ADVANCE_RIP_AND_FINISH(); … … 5349 5349 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 5350 5350 5351 IEM_MC_FETCH_MEM_U128 (u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);5351 IEM_MC_FETCH_MEM_U128_NO_AC(u128Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 5352 5352 IEM_MC_STORE_YREG_U128_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u128Tmp); 5353 5353 … … 5369 5369 IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE(); 5370 5370 5371 IEM_MC_FETCH_MEM_U256 (u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);5371 IEM_MC_FETCH_MEM_U256_NO_AC(u256Tmp, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 5372 5372 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), u256Tmp); 5373 5373 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap2.cpp.h
r103212 r103256 547 547 548 548 /** Body for the vpmov{s,z}x* instructions. */ 549 #define IEMOP_BODY_VPMOV_S_Z(a_Instr, a_SrcWidth ) \549 #define IEMOP_BODY_VPMOV_S_Z(a_Instr, a_SrcWidth, a_VexLengthMemFetch) \ 550 550 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); \ 551 551 if (IEM_IS_MODRM_REG_MODE(bRm)) \ … … 606 606 IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT(); \ 607 607 IEM_MC_PREPARE_AVX_USAGE(); \ 608 IEM_MC_FETCH_MEM_U128(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \608 a_VexLengthMemFetch(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 609 609 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fAvx2, iemAImpl_ ## a_Instr ## _u256, \ 610 610 iemAImpl_ ## a_Instr ## _u256_fallback), \ … … 641 641 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 642 642 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXBW, vpmovsxbw, Vx, Wq, DISOPTYPE_HARMLESS, 0); 643 IEMOP_BODY_VPMOV_S_Z(vpmovsxbw, 64 );643 IEMOP_BODY_VPMOV_S_Z(vpmovsxbw, 64, IEM_MC_FETCH_MEM_U128_NO_AC); 644 644 } 645 645 … … 650 650 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 651 651 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXBD, vpmovsxbd, Vx, Wq, DISOPTYPE_HARMLESS, 0); 652 IEMOP_BODY_VPMOV_S_Z(vpmovsxbd, 32 );652 IEMOP_BODY_VPMOV_S_Z(vpmovsxbd, 32, IEM_MC_FETCH_MEM_U128); 653 653 } 654 654 … … 659 659 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 660 660 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXBQ, vpmovsxbq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 661 IEMOP_BODY_VPMOV_S_Z(vpmovsxbq, 16 );661 IEMOP_BODY_VPMOV_S_Z(vpmovsxbq, 16, IEM_MC_FETCH_MEM_U128); 662 662 } 663 663 … … 668 668 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 669 669 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXWD, vpmovsxwd, Vx, Wq, DISOPTYPE_HARMLESS, 0); 670 IEMOP_BODY_VPMOV_S_Z(vpmovsxwd, 64 );670 IEMOP_BODY_VPMOV_S_Z(vpmovsxwd, 64, IEM_MC_FETCH_MEM_U128_NO_AC); 671 671 } 672 672 … … 677 677 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 678 678 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXWQ, vpmovsxwq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 679 IEMOP_BODY_VPMOV_S_Z(vpmovsxwq, 32 );679 IEMOP_BODY_VPMOV_S_Z(vpmovsxwq, 32, IEM_MC_FETCH_MEM_U128); 680 680 } 681 681 … … 686 686 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 687 687 IEMOP_MNEMONIC2(VEX_RM, VPMOVSXDQ, vpmovsxdq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 688 IEMOP_BODY_VPMOV_S_Z(vpmovsxdq, 64 );688 IEMOP_BODY_VPMOV_S_Z(vpmovsxdq, 64, IEM_MC_FETCH_MEM_U128_NO_AC); 689 689 } 690 690 … … 820 820 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 821 821 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXBW, vpmovzxbw, Vx, Wq, DISOPTYPE_HARMLESS, 0); 822 IEMOP_BODY_VPMOV_S_Z(vpmovzxbw, 64 );822 IEMOP_BODY_VPMOV_S_Z(vpmovzxbw, 64, IEM_MC_FETCH_MEM_U128_NO_AC); 823 823 } 824 824 … … 829 829 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 830 830 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXBD, vpmovzxbd, Vx, Wq, DISOPTYPE_HARMLESS, 0); 831 IEMOP_BODY_VPMOV_S_Z(vpmovzxbd, 32 );831 IEMOP_BODY_VPMOV_S_Z(vpmovzxbd, 32, IEM_MC_FETCH_MEM_U128); 832 832 } 833 833 … … 838 838 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 839 839 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXBQ, vpmovzxbq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 840 IEMOP_BODY_VPMOV_S_Z(vpmovzxbq, 16 );840 IEMOP_BODY_VPMOV_S_Z(vpmovzxbq, 16, IEM_MC_FETCH_MEM_U128); 841 841 } 842 842 … … 847 847 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 848 848 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXWD, vpmovzxwd, Vx, Wq, DISOPTYPE_HARMLESS, 0); 849 IEMOP_BODY_VPMOV_S_Z(vpmovzxwd, 64 );849 IEMOP_BODY_VPMOV_S_Z(vpmovzxwd, 64, IEM_MC_FETCH_MEM_U128_NO_AC); 850 850 } 851 851 … … 856 856 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 857 857 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXWQ, vpmovzxwq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 858 IEMOP_BODY_VPMOV_S_Z(vpmovzxwq, 32 );858 IEMOP_BODY_VPMOV_S_Z(vpmovzxwq, 32, IEM_MC_FETCH_MEM_U128); 859 859 } 860 860 … … 865 865 /** @todo r=aeichner Review code, the naming of this function and the parameter type specifiers. */ 866 866 IEMOP_MNEMONIC2(VEX_RM, VPMOVZXDQ, vpmovzxdq, Vx, Wq, DISOPTYPE_HARMLESS, 0); 867 IEMOP_BODY_VPMOV_S_Z(vpmovzxdq, 64 );867 IEMOP_BODY_VPMOV_S_Z(vpmovzxdq, 64, IEM_MC_FETCH_MEM_U128_NO_AC); 868 868 } 869 869 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstVexMap3.cpp.h
r103190 r103256 454 454 IEM_MC_PREPARE_AVX_USAGE(); 455 455 456 IEM_MC_FETCH_MEM_U128 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);456 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 457 457 IEM_MC_COPY_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_EFFECTIVE_VVVV(pVCpu)); 458 458 IEM_MC_STORE_YREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1, uSrc); … … 546 546 IEM_MC_PREPARE_AVX_USAGE(); 547 547 548 IEM_MC_FETCH_MEM_U128 (uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);548 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 549 549 IEM_MC_COPY_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), IEM_GET_EFFECTIVE_VVVV(pVCpu)); 550 550 IEM_MC_STORE_YREG_U128( IEM_GET_MODRM_REG(pVCpu, bRm), bImm & 1, uSrc); -
trunk/src/VBox/VMM/include/IEMInline.h
r102977 r103256 4081 4081 #undef TMPL_MEM_WITH_ATOMIC_MAPPING 4082 4082 4083 #define TMPL_MEM_NO_MAPPING 4084 #define TMPL_MEM_TYPE RTUINT128U 4085 #define TMPL_MEM_TYPE_ALIGN 0 4086 #define TMPL_MEM_TYPE_SIZE 16 4087 #define TMPL_MEM_FN_SUFF U128NoAc 4088 #define TMPL_MEM_FMT_TYPE "%.16Rhxs" 4089 #define TMPL_MEM_FMT_DESC "dqword" 4090 #include "../VMMAll/IEMAllMemRWTmplInline.cpp.h" 4091 #undef TMPL_MEM_NO_MAPPING 4092 4083 4093 #undef TMPL_MEM_CHECK_UNALIGNED_WITHIN_PAGE_OK 4084 4094 -
trunk/src/VBox/VMM/include/IEMInternal.h
r103233 r103256 5204 5204 VBOXSTRICTRC iemMemFetchDataD80(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT; 5205 5205 VBOXSTRICTRC iemMemFetchDataU128(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT; 5206 VBOXSTRICTRC iemMemFetchDataU128NoAc(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT; 5206 5207 VBOXSTRICTRC iemMemFetchDataU128AlignedSse(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT; 5207 5208 VBOXSTRICTRC iemMemFetchDataU256(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT; 5209 VBOXSTRICTRC iemMemFetchDataU256NoAc(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT; 5208 5210 VBOXSTRICTRC iemMemFetchDataU256AlignedSse(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT; 5209 5211 VBOXSTRICTRC iemMemFetchDataXdtr(PVMCPUCC pVCpu, uint16_t *pcbLimit, PRTGCPTR pGCPtrBase, uint8_t iSegReg, … … 5219 5221 void iemMemFetchDataD80SafeJmp(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5220 5222 void iemMemFetchDataU128SafeJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5223 void iemMemFetchDataU128NoAcSafeJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5221 5224 void iemMemFetchDataU128AlignedSseSafeJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5222 5225 void iemMemFetchDataU256SafeJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5226 void iemMemFetchDataU256NoAcSafeJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5223 5227 void iemMemFetchDataU256AlignedSseSafeJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5224 5228 # if 0 /* these are inlined now */ … … 5232 5236 void iemMemFetchDataD80Jmp(PVMCPUCC pVCpu, PRTPBCD80U pd80Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5233 5237 void iemMemFetchDataU128Jmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5238 void iemMemFetchDataU128NoAcJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5234 5239 # endif 5235 5240 void iemMemFetchDataU128AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT128U pu128Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5236 5241 void iemMemFetchDataU256Jmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5242 void iemMemFetchDataU256NoAcJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5237 5243 void iemMemFetchDataU256AlignedSseJmp(PVMCPUCC pVCpu, PRTUINT256U pu256Dst, uint8_t iSegReg, RTGCPTR GCPtrMem) IEM_NOEXCEPT_MAY_LONGJMP; 5238 5244 #endif … … 5249 5255 VBOXSTRICTRC iemMemStoreDataU64(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) RT_NOEXCEPT; 5250 5256 VBOXSTRICTRC iemMemStoreDataU128(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT; 5257 VBOXSTRICTRC iemMemStoreDataU128NoAc(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT; 5251 5258 VBOXSTRICTRC iemMemStoreDataU128AlignedSse(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) RT_NOEXCEPT; 5252 5259 VBOXSTRICTRC iemMemStoreDataU256(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT; 5260 VBOXSTRICTRC iemMemStoreDataU256NoAc(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT; 5253 5261 VBOXSTRICTRC iemMemStoreDataU256AlignedAvx(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) RT_NOEXCEPT; 5254 5262 VBOXSTRICTRC iemMemStoreDataXdtr(PVMCPUCC pVCpu, uint16_t cbLimit, RTGCPTR GCPtrBase, uint8_t iSegReg, RTGCPTR GCPtrMem) RT_NOEXCEPT; … … 5259 5267 void iemMemStoreDataU64SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) IEM_NOEXCEPT_MAY_LONGJMP; 5260 5268 void iemMemStoreDataU128SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP; 5269 void iemMemStoreDataU128NoAcSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP; 5261 5270 void iemMemStoreDataU128AlignedSseSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP; 5262 5271 void iemMemStoreDataU256SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP; 5272 void iemMemStoreDataU256NoAcSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP; 5263 5273 void iemMemStoreDataU256AlignedAvxSafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP; 5264 5274 void iemMemStoreDataR80SafeJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTFLOAT80U pr80Value) IEM_NOEXCEPT_MAY_LONGJMP; … … 5270 5280 void iemMemStoreDataU64Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, uint64_t u64Value) IEM_NOEXCEPT_MAY_LONGJMP; 5271 5281 void iemMemStoreDataU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP; 5282 void iemMemStoreDataNoAcU128Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP; 5272 5283 #endif 5273 5284 void iemMemStoreDataU128AlignedSseJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, RTUINT128U u128Value) IEM_NOEXCEPT_MAY_LONGJMP; 5274 5285 void iemMemStoreDataU256Jmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP; 5286 void iemMemStoreDataU256NoAcJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP; 5275 5287 void iemMemStoreDataU256AlignedAvxJmp(PVMCPUCC pVCpu, uint8_t iSegReg, RTGCPTR GCPtrMem, PCRTUINT256U pu256Value) IEM_NOEXCEPT_MAY_LONGJMP; 5276 5288 #endif -
trunk/src/VBox/VMM/include/IEMMc.h
r103233 r103256 999 999 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU128(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem))) 1000 1000 # define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) \ 1001 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU128 (pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem)))1001 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU128NoAc(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem))) 1002 1002 # define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) \ 1003 1003 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU128AlignedSse(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem))) 1004 1004 1005 # define IEM_MC_FETCH_MEM_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) \1006 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU128(pVCpu, &(a_XmmDst).uXmm, (a_iSeg), (a_GCPtrMem)))1007 1005 # define IEM_MC_FETCH_MEM_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) \ 1008 1006 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU128(pVCpu, &(a_XmmDst).uXmm, (a_iSeg), (a_GCPtrMem))) … … 1014 1012 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU64(pVCpu, &(a_XmmDst).au64[(a_iQWord)], (a_iSeg), (a_GCPtrMem))) 1015 1013 1016 # define IEM_MC_FETCH_MEM_U128_ AND_XREG_U128(a_u128Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \1017 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU128 (pVCpu, &(a_Dst).uSrc2, (a_iSeg2), (a_GCPtrMem2))); \1014 # define IEM_MC_FETCH_MEM_U128_NO_AC_AND_XREG_U128(a_u128Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) do { \ 1015 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU128NoAc(pVCpu, &(a_Dst).uSrc2, (a_iSeg2), (a_GCPtrMem2))); \ 1018 1016 (a_Dst).uSrc1.au64[0] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(a_iXReg1)].au64[0]; \ 1019 1017 (a_Dst).uSrc1.au64[1] = pVCpu->cpum.GstCtx.XState.x87.aXMM[(a_iXReg1)].au64[1]; \ … … 1060 1058 iemMemFetchDataU128Jmp(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem)) 1061 1059 # define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) \ 1062 iemMemFetchDataU128 Jmp(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem))1060 iemMemFetchDataU128NoAcJmp(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem)) 1063 1061 # define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) \ 1064 1062 iemMemFetchDataU128AlignedSseJmp(pVCpu, &(a_u128Dst), (a_iSeg), (a_GCPtrMem)) … … 1178 1176 #ifndef IEM_WITH_SETJMP 1179 1177 # define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1180 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256 (pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)))1178 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256NoAc(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem))) 1181 1179 # define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1182 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256 (pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)))1180 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256NoAc(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem))) 1183 1181 # define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1184 1182 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256AlignedSse(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem))) 1185 1183 1186 1184 # define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1187 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256 (pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)))1185 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256NoAc(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem))) 1188 1186 # define IEM_MC_FETCH_MEM_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1189 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256 (pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)))1187 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256NoAc(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem))) 1190 1188 # define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1191 1189 IEM_MC_RETURN_ON_FAILURE(iemMemFetchDataU256AlignedSse(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem))) 1192 1190 #else 1193 1191 # define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1194 iemMemFetchDataU256 Jmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem))1192 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)) 1195 1193 # define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1196 iemMemFetchDataU256 Jmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem))1194 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)) 1197 1195 # define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) \ 1198 1196 iemMemFetchDataU256AlignedSseJmp(pVCpu, &(a_u256Dst), (a_iSeg), (a_GCPtrMem)) 1199 1197 1200 1198 # define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1201 iemMemFetchDataU256 Jmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem))1199 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)) 1202 1200 # define IEM_MC_FETCH_MEM_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1203 iemMemFetchDataU256 Jmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem))1201 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)) 1204 1202 # define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) \ 1205 1203 iemMemFetchDataU256AlignedSseJmp(pVCpu, &(a_YmmDst).ymm, (a_iSeg), (a_GCPtrMem)) 1206 1204 1207 1205 # define IEM_MC_FETCH_MEM_FLAT_U256(a_u256Dst, a_GCPtrMem) \ 1208 iemMemFetchDataU256 Jmp(pVCpu, &(a_u256Dst), UINT8_MAX, (a_GCPtrMem))1206 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), UINT8_MAX, (a_GCPtrMem)) 1209 1207 # define IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(a_u256Dst, a_GCPtrMem) \ 1210 iemMemFetchDataU256 Jmp(pVCpu, &(a_u256Dst), UINT8_MAX, (a_GCPtrMem))1208 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_u256Dst), UINT8_MAX, (a_GCPtrMem)) 1211 1209 # define IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX(a_u256Dst, a_GCPtrMem) \ 1212 1210 iemMemFetchDataU256AlignedSseJmp(pVCpu, &(a_u256Dst), UINT8_MAX, (a_GCPtrMem)) 1213 1211 1214 1212 # define IEM_MC_FETCH_MEM_FLAT_YMM(a_YmmDst, a_GCPtrMem) \ 1215 iemMemFetchDataU256 Jmp(pVCpu, &(a_YmmDst).ymm, UINT8_MAX, (a_GCPtrMem))1213 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, UINT8_MAX, (a_GCPtrMem)) 1216 1214 # define IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC(a_YmmDst, a_GCPtrMem) \ 1217 iemMemFetchDataU256 Jmp(pVCpu, &(a_YmmDst).ymm, UINT8_MAX, (a_GCPtrMem))1215 iemMemFetchDataU256NoAcJmp(pVCpu, &(a_YmmDst).ymm, UINT8_MAX, (a_GCPtrMem)) 1218 1216 # define IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX(a_YmmDst, a_GCPtrMem) \ 1219 1217 iemMemFetchDataU256AlignedSseJmp(pVCpu, &(a_YmmDst).ymm, UINT8_MAX, (a_GCPtrMem)) … … 1430 1428 # define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) \ 1431 1429 IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU128(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u128Value))) 1430 # define IEM_MC_STORE_MEM_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) \ 1431 IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU128NoAc(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u128Value))) 1432 1432 # define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) \ 1433 1433 IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU128AlignedSse(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u128Value))) … … 1435 1435 # define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) \ 1436 1436 iemMemStoreDataU128Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u128Value)) 1437 # define IEM_MC_STORE_MEM_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) \ 1438 iemMemStoreDataU128NoAcJmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u128Value)) 1437 1439 # define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) \ 1438 1440 iemMemStoreDataU128AlignedSseJmp(pVCpu, (a_iSeg), (a_GCPtrMem), (a_u128Value)) … … 1440 1442 # define IEM_MC_STORE_MEM_FLAT_U128(a_GCPtrMem, a_u128Value) \ 1441 1443 iemMemFlatStoreDataU128Jmp(pVCpu, (a_GCPtrMem), &(a_u128Value)) 1444 # define IEM_MC_STORE_MEM_FLAT_U128_NO_AC(a_GCPtrMem, a_u128Value) \ 1445 iemMemFlatStoreDataU128NoAcJmp(pVCpu, (a_GCPtrMem), &(a_u128Value)) 1442 1446 # define IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE(a_GCPtrMem, a_u128Value) \ 1443 1447 iemMemStoreDataU128AlignedSseJmp(pVCpu, UINT8_MAX, (a_GCPtrMem), (a_u128Value)) … … 1447 1451 # define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Value) \ 1448 1452 IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU256(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value))) 1453 # define IEM_MC_STORE_MEM_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) \ 1454 IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU256NoAc(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value))) 1449 1455 # define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) \ 1450 1456 IEM_MC_RETURN_ON_FAILURE(iemMemStoreDataU256AlignedAvx(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value))) … … 1452 1458 # define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Value) \ 1453 1459 iemMemStoreDataU256Jmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value)) 1460 # define IEM_MC_STORE_MEM_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) \ 1461 iemMemStoreDataU256NoAcJmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value)) 1454 1462 # define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) \ 1455 1463 iemMemStoreDataU256AlignedAvxJmp(pVCpu, (a_iSeg), (a_GCPtrMem), &(a_u256Value)) … … 1457 1465 # define IEM_MC_STORE_MEM_FLAT_U256(a_GCPtrMem, a_u256Value) \ 1458 1466 iemMemStoreDataU256Jmp(pVCpu, UINT8_MAX, (a_GCPtrMem), &(a_u256Value)) 1467 # define IEM_MC_STORE_MEM_FLAT_U256_NO_AC(a_GCPtrMem, a_u256Value) \ 1468 iemMemStoreDataU256NoAcJmp(pVCpu, UINT8_MAX, (a_GCPtrMem), &(a_u256Value)) 1459 1469 # define IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX(a_GCPtrMem, a_u256Value) \ 1460 1470 iemMemStoreDataU256AlignedAvxJmp(pVCpu, UINT8_MAX, (a_GCPtrMem), &(a_u256Value)) -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r103233 r103256 919 919 #define IEM_MC_STORE_MEM_INDEF_D80_BY_REF(a_pd80Dst) do { CHK_VAR(a_pd80Dst); CHK_TYPE(PRTPBCD80U, a_pd80Dst); (void)fMcBegin; } while (0) 920 920 #define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0) 921 #define IEM_MC_STORE_MEM_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0) 921 922 #define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u128Src); CHK_TYPE(RTUINT128U, a_u128Src); (void)fMcBegin; } while (0) 922 923 #define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0) 924 #define IEM_MC_STORE_MEM_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0) 923 925 #define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Src) do { CHK_SEG_IDX(a_iSeg); CHK_GCPTR(a_GCPtrMem); CHK_VAR(a_GCPtrMem); CHK_VAR(a_u256Src); CHK_TYPE(RTUINT256U, a_u256Src); (void)fMcBegin; } while (0) 924 926
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