Changeset 103667 in vbox

Timestamp:

Mar 4, 2024 1:46:36 PM (13 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

162027

Message:

VMM/IEM: Native translation of IEM_MC_REF_MXCSR() body, bugref:10371

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAllInstPython.py (modified) (1 diff)
• VMMAll/IEMAllN8veLiveness.cpp (modified) (4 diffs)
• VMMAll/IEMAllN8veRecompiler.cpp (modified) (2 diffs)
• include/IEMN8veRecompiler.h (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py

@@ -3226 +3226 @@
     'IEM_MC_REF_MREG_U64':                                       (McBlock.parseMcGeneric,           False, False, False, ),
     'IEM_MC_REF_MREG_U64_CONST':                                 (McBlock.parseMcGeneric,           False, False, False, ),
-    'IEM_MC_REF_MXCSR':                                          (McBlock.parseMcGeneric,           False, False, False, ),
+    'IEM_MC_REF_MXCSR':                                          (McBlock.parseMcGeneric,           False, False, True,  ),
     'IEM_MC_REF_XREG_R32_CONST':                                 (McBlock.parseMcGeneric,           False, False, False, ),
     'IEM_MC_REF_XREG_R64_CONST':                                 (McBlock.parseMcGeneric,           False, False, False, ),

trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp

@@ -178 +178 @@
 
 
-#define IEM_LIVENESS_CR0_INPUT()                    IEM_LIVENESS_BITMAP_MEMBER_INPUT(  fCr0,  0)
-#define IEM_LIVENESS_CR4_INPUT()                    IEM_LIVENESS_BITMAP_MEMBER_INPUT(  fCr4,  0)
-#define IEM_LIVENESS_XCR0_INPUT()                   IEM_LIVENESS_BITMAP_MEMBER_INPUT(  fXcr0, 0)
+#define IEM_LIVENESS_CR0_INPUT()                    IEM_LIVENESS_BITMAP_MEMBER_INPUT(  fCr0,   0)
+#define IEM_LIVENESS_CR4_INPUT()                    IEM_LIVENESS_BITMAP_MEMBER_INPUT(  fCr4,   0)
+#define IEM_LIVENESS_XCR0_INPUT()                   IEM_LIVENESS_BITMAP_MEMBER_INPUT(  fXcr0,  0)
 
 
@@ -191 +191 @@
 #define IEM_LIVENESS_FSW_CLOBBER()                  IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFsw, 0)
 #define IEM_LIVENESS_FSW_MODIFY()                   IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFsw, 0)
+
+
+#define IEM_LIVENESS_MXCSR_INPUT()                  IEM_LIVENESS_BITMAP_MEMBER_INPUT(  fMxCsr, 0)
+#define IEM_LIVENESS_MXCSR_CLOBBER()                IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fMxCsr, 0)
+#define IEM_LIVENESS_MXCSR_MODIFY()                 IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fMxCsr, 0)
 
 
@@ -576 +581 @@
     } while (0)
 #define IEM_MC_ASSERT_EFLAGS(a_fEflInput, a_fEflOutput)             NOP()
-#define IEM_MC_REF_MXCSR(a_pfMxcsr)                                 NOP()
+#define IEM_MC_REF_MXCSR(a_pfMxcsr)                                 IEM_LIVENESS_MXCSR_MODIFY()
 
 
@@ -1063 +1068 @@
 #define IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE()                                                 NOP()
 
-#define IEM_MC_STORE_SSE_RESULT(a_SseData, a_iXmmReg)                                           NOP()
-#define IEM_MC_SSE_UPDATE_MXCSR(a_fMxcsr)                                                       NOP()
+#define IEM_MC_STORE_SSE_RESULT(a_SseData, a_iXmmReg)                                           IEM_LIVENESS_MXCSR_MODIFY() //; IEM_LIVENESS_XREG_CLOBBER(a_iXmmReg)
+#define IEM_MC_SSE_UPDATE_MXCSR(a_fMxcsr)                                                       IEM_LIVENESS_MXCSR_MODIFY()
 
 #define IEM_MC_PREPARE_SSE_USAGE()                                                              NOP()

trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

@@ -3583 +3583 @@
     /* [kIemNativeGstReg_Cr4] = */                      { CPUMCTX_OFF_AND_SIZE(cr4),                "cr4", },
     /* [kIemNativeGstReg_Xcr0] = */                     { CPUMCTX_OFF_AND_SIZE(aXcr[0]),            "xcr0", },
+    /* [kIemNativeGstReg_MxCsr] = */                    { CPUMCTX_OFF_AND_SIZE(XState.x87.MXCSR),   "mxcsr", },
     /* [kIemNativeGstReg_EFlags] = */                   { CPUMCTX_OFF_AND_SIZE(eflags),             "eflags", },
 #undef CPUMCTX_OFF_AND_SIZE
@@ -10900 +10901 @@
     RT_NOREF(fConst);
 #endif
+
+    return off;
+}
+
+
+#define IEM_MC_REF_MXCSR(a_pfMxcsr) \
+    off = iemNativeEmitRefMxcsr(pReNative, off, a_pfMxcsr)
+
+/** Handles IEM_MC_REF_MXCSR. */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitRefMxcsr(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxVarRef)
+{
+    iemNativeVarSetKindToGstRegRef(pReNative, idxVarRef, kIemNativeGstRegRef_MxCsr, 0);
+    IEMNATIVE_ASSERT_VAR_SIZE(pReNative, idxVarRef, sizeof(void *));
+
+    /* If we've delayed writing back the register value, flush it now. */
+    off = iemNativeRegFlushPendingSpecificWrite(pReNative, off, kIemNativeGstRegRef_MxCsr, 0);
+
+    /* If there is a shadow copy of guest MXCSR, flush it now. */
+    iemNativeRegFlushGuestShadows(pReNative, RT_BIT_64(kIemNativeGstReg_MxCsr));
 
     return off;

trunk/src/VBox/VMM/include/IEMN8veRecompiler.h

@@ -418 +418 @@
         uint64_t    fCr4        :  1;   /**< 0x2c / 44: */
         uint64_t    fXcr0       :  1;   /**< 0x2d / 45: */
-        uint64_t    fEflOther   :  1;   /**< 0x2e / 46: Other EFLAGS bits   (~X86_EFL_STATUS_BITS & X86_EFL_LIVE_MASK). First! */
-        uint64_t    fEflCf      :  1;   /**< 0x2f / 47: Carry flag          (X86_EFL_CF / 0). */
-        uint64_t    fEflPf      :  1;   /**< 0x30 / 48: Parity flag         (X86_EFL_PF / 2). */
-        uint64_t    fEflAf      :  1;   /**< 0x31 / 49: Auxilary carry flag (X86_EFL_AF / 4). */
-        uint64_t    fEflZf      :  1;   /**< 0x32 / 50: Zero flag           (X86_EFL_ZF / 6). */
-        uint64_t    fEflSf      :  1;   /**< 0x33 / 51: Signed flag         (X86_EFL_SF / 7). */
-        uint64_t    fEflOf      :  1;   /**< 0x34 / 52: Overflow flag       (X86_EFL_OF / 12). */
-        uint64_t    uUnused     : 11;     /* 0x35 / 53 -> 0x40/64 */
+        uint64_t    fMxCsr      :  1;   /**< 0x2e / 46: */
+        uint64_t    fEflOther   :  1;   /**< 0x2f / 47: Other EFLAGS bits   (~X86_EFL_STATUS_BITS & X86_EFL_LIVE_MASK). First! */
+        uint64_t    fEflCf      :  1;   /**< 0x30 / 48: Carry flag          (X86_EFL_CF / 0). */
+        uint64_t    fEflPf      :  1;   /**< 0x31 / 49: Parity flag         (X86_EFL_PF / 2). */
+        uint64_t    fEflAf      :  1;   /**< 0x32 / 50: Auxilary carry flag (X86_EFL_AF / 4). */
+        uint64_t    fEflZf      :  1;   /**< 0x33 / 51: Zero flag           (X86_EFL_ZF / 6). */
+        uint64_t    fEflSf      :  1;   /**< 0x34 / 52: Signed flag         (X86_EFL_SF / 7). */
+        uint64_t    fEflOf      :  1;   /**< 0x35 / 53: Overflow flag       (X86_EFL_OF / 12). */
+        uint64_t    uUnused     : 10;     /* 0x36 / 54 -> 0x40/64 */
     };
 } IEMLIVENESSBIT;
@@ -487 +488 @@
 /** @name 64-bit value masks for IEMLIVENESSENTRY.
  * @{ */                                      /*         0xzzzzyyyyxxxxwwww */
-#define IEMLIVENESSBIT_MASK                     UINT64_C(0x001ffffffffeffff)
+#define IEMLIVENESSBIT_MASK                     UINT64_C(0x003ffffffffeffff)
 
 #ifndef IEMLIVENESS_EXTENDED_LAYOUT
@@ -497 +498 @@
 #endif
 
-#define IEMLIVENESSBIT_ALL_EFL_MASK             UINT64_C(0x001fc00000000000)
+#define IEMLIVENESSBIT_ALL_EFL_MASK             UINT64_C(0x003f800000000000)
 
 #ifndef IEMLIVENESS_EXTENDED_LAYOUT
@@ -717 +718 @@
     kIemNativeGstReg_Cr4,
     kIemNativeGstReg_Xcr0,
+    kIemNativeGstReg_MxCsr,
     kIemNativeGstReg_EFlags,            /**< 32-bit, includes internal flags - last! */
     kIemNativeGstReg_End