Changeset 103745 in vbox for trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32
- Timestamp:
- Mar 9, 2024 12:28:08 PM (12 months ago)
- svn:sync-xref-src-repo-rev:
- 162114
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32
r103736 r103745 7419 7419 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7420 7420 /* => */ RTUINT256_INIT_C(0xb7406b0058c0a500, 0x5700bb001c808cc0, 0x000056c0e640b0c0, 0xf4c06800e1007f40) }, /* sll 6-by-16 */ 7421 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000543201), 7422 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7423 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* sll big-by-16 */ 7421 7424 }; 7422 7425 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues16_01[] = … … 7446 7449 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7447 7450 /* => */ RTUINT256_INIT_C(0xb7776b0058cca500, 0x5723bb001c958cc0, 0x003a56c0e658b0c0, 0xf4f36800e1267f40) }, /* sll 6-by-32 */ 7451 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x00000000fedca204), 7452 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7453 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* sll big-by-32 */ 7448 7454 }; 7449 7455 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues32_01[] = … … 7458 7464 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7459 7465 /* => */ RTUINT256_INIT_C(0x76b00000ca500000, 0x3bb0000058cc0000, 0xa56c00008b0c0000, 0x3680000067f40000) }, /* sll 0x12-by-32 */ 7466 }; 7467 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues32_big[] = 7468 { 7469 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x00000000fedca204), 7470 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7471 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* sll big-by-32 */ 7460 7472 }; 7461 7473 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues64[] = … … 7473 7485 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7474 7486 /* => */ RTUINT256_INIT_C(0xb7776b0258cca500, 0x5723bb101c958cc0, 0x003a56efe658b0c0, 0xf4f36808e1267f40) }, /* sll 6-by-64 */ 7487 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0xf000000102030405), 7488 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7489 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* sll big-by-64 */ 7475 7490 }; 7476 7491 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues64_01[] = … … 7485 7500 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7486 7501 /* => */ RTUINT256_INIT_C(0x76b0258cca500000, 0x3bb101c958cc0000, 0xa56efe658b0c0000, 0x36808e1267f40000) }, /* sll 0x12-by-64 */ 7502 }; 7503 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues64_big[] = 7504 { 7505 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0xf000000102030405), 7506 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7507 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* sll big-by-64 */ 7487 7508 }; 7488 7509 … … 7510 7531 { bs3CpuInstr3_pslld_MM1_001h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7511 7532 { bs3CpuInstr3_pslld_MM1_012h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7533 { bs3CpuInstr3_pslld_MM1_021h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7512 7534 { bs3CpuInstr3_pslld_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7513 7535 { bs3CpuInstr3_pslld_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7514 7536 { bs3CpuInstr3_pslld_XMM1_001h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7515 7537 { bs3CpuInstr3_pslld_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7538 { bs3CpuInstr3_pslld_XMM1_021h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7516 7539 { bs3CpuInstr3_vpslld_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7517 7540 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7518 7541 { bs3CpuInstr3_vpslld_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7519 7542 { bs3CpuInstr3_vpslld_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7543 { bs3CpuInstr3_vpslld_XMM1_XMM2_021h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7520 7544 { bs3CpuInstr3_vpslld_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7521 7545 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7522 7546 { bs3CpuInstr3_vpslld_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7523 7547 { bs3CpuInstr3_vpslld_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7548 { bs3CpuInstr3_vpslld_YMM1_YMM2_021h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7524 7549 7525 7550 { bs3CpuInstr3_psllq_MM1_MM2_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, … … 7527 7552 { bs3CpuInstr3_psllq_MM1_001h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7528 7553 { bs3CpuInstr3_psllq_MM1_012h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7554 { bs3CpuInstr3_psllq_MM1_045h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7529 7555 { bs3CpuInstr3_psllq_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7530 7556 { bs3CpuInstr3_psllq_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7531 7557 { bs3CpuInstr3_psllq_XMM1_001h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7532 7558 { bs3CpuInstr3_psllq_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7559 { bs3CpuInstr3_psllq_XMM1_045h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7533 7560 { bs3CpuInstr3_vpsllq_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7534 7561 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7535 7562 { bs3CpuInstr3_vpsllq_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7536 7563 { bs3CpuInstr3_vpsllq_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7564 { bs3CpuInstr3_vpsllq_XMM1_XMM2_045h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7537 7565 { bs3CpuInstr3_vpsllq_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7538 7566 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7539 7567 { bs3CpuInstr3_vpsllq_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7540 7568 { bs3CpuInstr3_vpsllq_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7569 { bs3CpuInstr3_vpsllq_YMM1_YMM2_045h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7541 7570 }; 7542 7571 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = … … 7563 7592 { bs3CpuInstr3_pslld_MM1_001h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7564 7593 { bs3CpuInstr3_pslld_MM1_012h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7594 { bs3CpuInstr3_pslld_MM1_021h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7565 7595 { bs3CpuInstr3_pslld_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7566 7596 { bs3CpuInstr3_pslld_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7567 7597 { bs3CpuInstr3_pslld_XMM1_001h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7568 7598 { bs3CpuInstr3_pslld_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7599 { bs3CpuInstr3_pslld_XMM1_021h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7569 7600 { bs3CpuInstr3_vpslld_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7570 7601 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7571 7602 { bs3CpuInstr3_vpslld_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7572 7603 { bs3CpuInstr3_vpslld_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7604 { bs3CpuInstr3_vpslld_XMM1_XMM2_021h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7573 7605 { bs3CpuInstr3_vpslld_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7574 7606 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7575 7607 { bs3CpuInstr3_vpslld_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7576 7608 { bs3CpuInstr3_vpslld_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7609 { bs3CpuInstr3_vpslld_YMM1_YMM2_021h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7577 7610 7578 7611 { bs3CpuInstr3_psllq_MM1_MM2_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, … … 7580 7613 { bs3CpuInstr3_psllq_MM1_001h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7581 7614 { bs3CpuInstr3_psllq_MM1_012h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7615 { bs3CpuInstr3_psllq_MM1_045h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7582 7616 { bs3CpuInstr3_psllq_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7583 7617 { bs3CpuInstr3_psllq_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7584 7618 { bs3CpuInstr3_psllq_XMM1_001h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7585 7619 { bs3CpuInstr3_psllq_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7620 { bs3CpuInstr3_psllq_XMM1_045h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7586 7621 { bs3CpuInstr3_vpsllq_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7587 7622 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7588 7623 { bs3CpuInstr3_vpsllq_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7589 7624 { bs3CpuInstr3_vpsllq_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7625 { bs3CpuInstr3_vpsllq_XMM1_XMM2_045h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7590 7626 { bs3CpuInstr3_vpsllq_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7591 7627 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7592 7628 { bs3CpuInstr3_vpsllq_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7593 7629 { bs3CpuInstr3_vpsllq_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7630 { bs3CpuInstr3_vpsllq_YMM1_YMM2_045h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7594 7631 }; 7595 7632 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = … … 7624 7661 { bs3CpuInstr3_pslld_MM1_001h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7625 7662 { bs3CpuInstr3_pslld_MM1_012h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7663 { bs3CpuInstr3_pslld_MM1_021h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7626 7664 { bs3CpuInstr3_pslld_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7627 7665 { bs3CpuInstr3_pslld_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7628 7666 { bs3CpuInstr3_pslld_XMM1_001h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7629 7667 { bs3CpuInstr3_pslld_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7668 { bs3CpuInstr3_pslld_XMM1_021h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7630 7669 { bs3CpuInstr3_vpslld_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7631 7670 { bs3CpuInstr3_vpslld_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7632 7671 { bs3CpuInstr3_vpslld_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7633 7672 { bs3CpuInstr3_vpslld_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7673 { bs3CpuInstr3_vpslld_XMM1_XMM2_021h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7634 7674 { bs3CpuInstr3_vpslld_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7635 7675 { bs3CpuInstr3_vpslld_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7636 7676 { bs3CpuInstr3_vpslld_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7637 7677 { bs3CpuInstr3_vpslld_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7678 { bs3CpuInstr3_vpslld_YMM1_YMM2_021h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7638 7679 { bs3CpuInstr3_vpslld_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7639 7680 { bs3CpuInstr3_vpslld_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7640 7681 { bs3CpuInstr3_vpslld_XMM8_XMM9_001h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7641 7682 { bs3CpuInstr3_vpslld_XMM8_XMM9_012h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7683 { bs3CpuInstr3_vpslld_XMM8_XMM9_021h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7642 7684 { bs3CpuInstr3_vpslld_YMM8_YMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7643 7685 { bs3CpuInstr3_vpslld_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7644 7686 { bs3CpuInstr3_vpslld_YMM8_YMM9_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7645 7687 { bs3CpuInstr3_vpslld_YMM8_YMM9_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7688 { bs3CpuInstr3_vpslld_YMM8_YMM9_021h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7646 7689 7647 7690 { bs3CpuInstr3_psllq_MM1_MM2_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, … … 7649 7692 { bs3CpuInstr3_psllq_MM1_001h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7650 7693 { bs3CpuInstr3_psllq_MM1_012h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7694 { bs3CpuInstr3_psllq_MM1_045h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7651 7695 { bs3CpuInstr3_psllq_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7652 7696 { bs3CpuInstr3_psllq_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7653 7697 { bs3CpuInstr3_psllq_XMM1_001h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7654 7698 { bs3CpuInstr3_psllq_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7699 { bs3CpuInstr3_psllq_XMM1_045h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7655 7700 { bs3CpuInstr3_vpsllq_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7656 7701 { bs3CpuInstr3_vpsllq_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7657 7702 { bs3CpuInstr3_vpsllq_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7658 7703 { bs3CpuInstr3_vpsllq_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7704 { bs3CpuInstr3_vpsllq_XMM1_XMM2_045h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7659 7705 { bs3CpuInstr3_vpsllq_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7660 7706 { bs3CpuInstr3_vpsllq_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7661 7707 { bs3CpuInstr3_vpsllq_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7662 7708 { bs3CpuInstr3_vpsllq_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7709 { bs3CpuInstr3_vpsllq_YMM1_YMM2_045h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7663 7710 { bs3CpuInstr3_vpsllq_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7664 7711 { bs3CpuInstr3_vpsllq_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7665 7712 { bs3CpuInstr3_vpsllq_XMM8_XMM9_001h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7666 7713 { bs3CpuInstr3_vpsllq_XMM8_XMM9_012h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7714 { bs3CpuInstr3_vpsllq_XMM8_XMM9_045h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7667 7715 { bs3CpuInstr3_vpsllq_YMM8_YMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7668 7716 { bs3CpuInstr3_vpsllq_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7669 7717 { bs3CpuInstr3_vpsllq_YMM8_YMM9_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7670 7718 { bs3CpuInstr3_vpsllq_YMM8_YMM9_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 7719 { bs3CpuInstr3_vpsllq_YMM8_YMM9_045h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7671 7720 }; 7672 7721 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); … … 7696 7745 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7697 7746 /* => */ RTUINT256_INIT_C(0x007bff76002500ca, 0xffe5fe3b01010158, 0xfe20ffa5fefe018b, 0x010fff36008efe67) }, /* sra 6-by-16 */ 7747 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000543201), 7748 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7749 /* => */ RTUINT256_INIT_C(0x0000ffff00000000, 0xffffffff00000000, 0xffffffffffff0000, 0x0000ffff0000ffff) }, /* sra big-by-16 */ 7698 7750 }; 7699 7751 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues16_01[] = … … 7723 7775 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7724 7776 /* => */ RTUINT256_INIT_C(0x007b777600258cca, 0xffe5723b0101c958, 0xfe2003a5fefe658b, 0x010f4f36008e1267) }, /* sra 6-by-32 */ 7777 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x00000000fedca204), 7778 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7779 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0xffffffff00000000, 0xffffffffffffffff, 0x0000000000000000) }, /* sra big-by-32 */ 7725 7780 }; 7726 7781 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues32_01[] = … … 7735 7790 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7736 7791 /* => */ RTUINT256_INIT_C(0x000007b700000258, 0xfffffe570000101c, 0xffffe200ffffefe6, 0x000010f4000008e1) }, /* sra 0x12-by-32 */ 7792 }; 7793 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues32_big[] = 7794 { 7795 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x00000000fedca204), 7796 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7797 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0xffffffff00000000, 0xffffffffffffffff, 0x0000000000000000) }, /* sra big-by-32 */ 7737 7798 }; 7738 7799 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = … … 7759 7820 { bs3CpuInstr3_psrad_MM1_001h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7760 7821 { bs3CpuInstr3_psrad_MM1_012h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7822 { bs3CpuInstr3_psrad_MM1_021h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7761 7823 { bs3CpuInstr3_psrad_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7762 7824 { bs3CpuInstr3_psrad_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7763 7825 { bs3CpuInstr3_psrad_XMM1_001h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7764 7826 { bs3CpuInstr3_psrad_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7827 { bs3CpuInstr3_psrad_XMM1_021h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7765 7828 { bs3CpuInstr3_vpsrad_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7766 7829 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7767 7830 { bs3CpuInstr3_vpsrad_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7768 7831 { bs3CpuInstr3_vpsrad_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7832 { bs3CpuInstr3_vpsrad_XMM1_XMM2_021h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7769 7833 { bs3CpuInstr3_vpsrad_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7770 7834 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7771 7835 { bs3CpuInstr3_vpsrad_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7772 7836 { bs3CpuInstr3_vpsrad_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7837 { bs3CpuInstr3_vpsrad_YMM1_YMM2_021h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7773 7838 }; 7774 7839 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = … … 7795 7860 { bs3CpuInstr3_psrad_MM1_001h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7796 7861 { bs3CpuInstr3_psrad_MM1_012h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7862 { bs3CpuInstr3_psrad_MM1_021h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7797 7863 { bs3CpuInstr3_psrad_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7798 7864 { bs3CpuInstr3_psrad_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7799 7865 { bs3CpuInstr3_psrad_XMM1_001h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7800 7866 { bs3CpuInstr3_psrad_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7867 { bs3CpuInstr3_psrad_XMM1_021h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7801 7868 { bs3CpuInstr3_vpsrad_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7802 7869 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7803 7870 { bs3CpuInstr3_vpsrad_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7804 7871 { bs3CpuInstr3_vpsrad_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7872 { bs3CpuInstr3_vpsrad_XMM1_XMM2_021h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7805 7873 { bs3CpuInstr3_vpsrad_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7806 7874 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7807 7875 { bs3CpuInstr3_vpsrad_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7808 7876 { bs3CpuInstr3_vpsrad_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7877 { bs3CpuInstr3_vpsrad_YMM1_YMM2_021h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7809 7878 }; 7810 7879 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = … … 7839 7908 { bs3CpuInstr3_psrad_MM1_001h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7840 7909 { bs3CpuInstr3_psrad_MM1_012h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7910 { bs3CpuInstr3_psrad_MM1_021h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7841 7911 { bs3CpuInstr3_psrad_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7842 7912 { bs3CpuInstr3_psrad_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7843 7913 { bs3CpuInstr3_psrad_XMM1_001h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7844 7914 { bs3CpuInstr3_psrad_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7915 { bs3CpuInstr3_psrad_XMM1_021h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7845 7916 { bs3CpuInstr3_vpsrad_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7846 7917 { bs3CpuInstr3_vpsrad_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7847 7918 { bs3CpuInstr3_vpsrad_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7848 7919 { bs3CpuInstr3_vpsrad_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7920 { bs3CpuInstr3_vpsrad_XMM1_XMM2_021h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7849 7921 { bs3CpuInstr3_vpsrad_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7850 7922 { bs3CpuInstr3_vpsrad_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7851 7923 { bs3CpuInstr3_vpsrad_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7852 7924 { bs3CpuInstr3_vpsrad_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7925 { bs3CpuInstr3_vpsrad_YMM1_YMM2_021h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7853 7926 { bs3CpuInstr3_vpsrad_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7854 7927 { bs3CpuInstr3_vpsrad_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7855 7928 { bs3CpuInstr3_vpsrad_XMM8_XMM9_001h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7856 7929 { bs3CpuInstr3_vpsrad_XMM8_XMM9_012h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7930 { bs3CpuInstr3_vpsrad_XMM8_XMM9_021h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7857 7931 { bs3CpuInstr3_vpsrad_YMM8_YMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7858 7932 { bs3CpuInstr3_vpsrad_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7859 7933 { bs3CpuInstr3_vpsrad_YMM8_YMM9_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7860 7934 { bs3CpuInstr3_vpsrad_YMM8_YMM9_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 7935 { bs3CpuInstr3_vpsrad_YMM8_YMM9_021h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7861 7936 }; 7862 7937 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); … … 7886 7961 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7887 7962 /* => */ RTUINT256_INIT_C(0x007b0376002500ca, 0x03e5023b01010158, 0x022003a502fe018b, 0x010f0336008e0267) }, /* srl 6-by-16 */ 7963 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000543201), 7964 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7965 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* srl big-by-16 */ 7888 7966 }; 7889 7967 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues16_01[] = … … 7913 7991 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7914 7992 /* => */ RTUINT256_INIT_C(0x007b777600258cca, 0x03e5723b0101c958, 0x022003a502fe658b, 0x010f4f36008e1267) }, /* srl 6-by-32 */ 7993 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x00000000fedca204), 7994 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7995 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* srl big-by-32 */ 7915 7996 }; 7916 7997 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues32_01[] = … … 7926 8007 /* => */ RTUINT256_INIT_C(0x000007b700000258, 0x00003e570000101c, 0x0000220000002fe6, 0x000010f4000008e1) }, /* srl 0x12-by-32 */ 7927 8008 8009 }; 8010 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues32_big[] = 8011 { 8012 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x00000000fedca204), 8013 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 8014 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* srl big-by-32 */ 7928 8015 }; 7929 8016 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues64[] = … … 7941 8028 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7942 8029 /* => */ RTUINT256_INIT_C(0x007b7776b0258cca, 0x03e5723bb101c958, 0x022003a56efe658b, 0x010f4f36808e1267) }, /* srl 6-by-64 */ 8030 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0xf000000102030405), 8031 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 8032 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* srl big-by-64 */ 7943 8033 }; 7944 8034 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues64_01[] = … … 7953 8043 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7954 8044 /* => */ RTUINT256_INIT_C(0x000007b7776b0258, 0x00003e5723bb101c, 0x000022003a56efe6, 0x000010f4f36808e1) }, /* srl 0x12-by-64 */ 8045 }; 8046 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues64_big[] = 8047 { 8048 { /*src2*/ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0xf000000102030405), 8049 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 8050 /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000) }, /* srl big-by-64 */ 7955 8051 }; 7956 8052 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = … … 7977 8073 { bs3CpuInstr3_psrld_MM1_001h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7978 8074 { bs3CpuInstr3_psrld_MM1_012h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8075 { bs3CpuInstr3_psrld_MM1_021h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7979 8076 { bs3CpuInstr3_psrld_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7980 8077 { bs3CpuInstr3_psrld_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7981 8078 { bs3CpuInstr3_psrld_XMM1_001h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7982 8079 { bs3CpuInstr3_psrld_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8080 { bs3CpuInstr3_psrld_XMM1_021h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7983 8081 { bs3CpuInstr3_vpsrld_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7984 8082 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7985 8083 { bs3CpuInstr3_vpsrld_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7986 8084 { bs3CpuInstr3_vpsrld_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8085 { bs3CpuInstr3_vpsrld_XMM1_XMM2_021h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7987 8086 { bs3CpuInstr3_vpsrld_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7988 8087 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 7989 8088 { bs3CpuInstr3_vpsrld_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 7990 8089 { bs3CpuInstr3_vpsrld_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8090 { bs3CpuInstr3_vpsrld_YMM1_YMM2_021h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 7991 8091 7992 8092 { bs3CpuInstr3_psrlq_MM1_MM2_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, … … 7994 8094 { bs3CpuInstr3_psrlq_MM1_001h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7995 8095 { bs3CpuInstr3_psrlq_MM1_012h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8096 { bs3CpuInstr3_psrlq_MM1_045h_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 7996 8097 { bs3CpuInstr3_psrlq_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7997 8098 { bs3CpuInstr3_psrlq_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 7998 8099 { bs3CpuInstr3_psrlq_XMM1_001h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 7999 8100 { bs3CpuInstr3_psrlq_XMM1_012h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8101 { bs3CpuInstr3_psrlq_XMM1_045h_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8000 8102 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8001 8103 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8002 8104 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_001h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8003 8105 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_012h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8106 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_045h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8004 8107 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_XMM3_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8005 8108 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8006 8109 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_001h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8007 8110 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_012h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8111 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_045h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8008 8112 }; 8009 8113 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = … … 8030 8134 { bs3CpuInstr3_psrld_MM1_001h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8031 8135 { bs3CpuInstr3_psrld_MM1_012h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8136 { bs3CpuInstr3_psrld_MM1_021h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8032 8137 { bs3CpuInstr3_psrld_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8033 8138 { bs3CpuInstr3_psrld_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8034 8139 { bs3CpuInstr3_psrld_XMM1_001h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8035 8140 { bs3CpuInstr3_psrld_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8141 { bs3CpuInstr3_psrld_XMM1_021h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8036 8142 { bs3CpuInstr3_vpsrld_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8037 8143 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8038 8144 { bs3CpuInstr3_vpsrld_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8039 8145 { bs3CpuInstr3_vpsrld_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8146 { bs3CpuInstr3_vpsrld_XMM1_XMM2_021h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8040 8147 { bs3CpuInstr3_vpsrld_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8041 8148 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8042 8149 { bs3CpuInstr3_vpsrld_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8043 8150 { bs3CpuInstr3_vpsrld_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8151 { bs3CpuInstr3_vpsrld_YMM1_YMM2_021h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8044 8152 8045 8153 { bs3CpuInstr3_psrlq_MM1_MM2_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, … … 8047 8155 { bs3CpuInstr3_psrlq_MM1_001h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8048 8156 { bs3CpuInstr3_psrlq_MM1_012h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8157 { bs3CpuInstr3_psrlq_MM1_045h_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8049 8158 { bs3CpuInstr3_psrlq_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8050 8159 { bs3CpuInstr3_psrlq_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8051 8160 { bs3CpuInstr3_psrlq_XMM1_001h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8052 8161 { bs3CpuInstr3_psrlq_XMM1_012h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8162 { bs3CpuInstr3_psrlq_XMM1_045h_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8053 8163 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8054 8164 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8055 8165 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_001h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8056 8166 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_012h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8167 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_045h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8057 8168 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_XMM3_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8058 8169 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8059 8170 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_001h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8060 8171 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_012h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8172 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_045h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8061 8173 }; 8062 8174 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = … … 8091 8203 { bs3CpuInstr3_psrld_MM1_001h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8092 8204 { bs3CpuInstr3_psrld_MM1_012h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8205 { bs3CpuInstr3_psrld_MM1_021h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8093 8206 { bs3CpuInstr3_psrld_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8094 8207 { bs3CpuInstr3_psrld_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8095 8208 { bs3CpuInstr3_psrld_XMM1_001h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8096 8209 { bs3CpuInstr3_psrld_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8210 { bs3CpuInstr3_psrld_XMM1_021h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8097 8211 { bs3CpuInstr3_vpsrld_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8098 8212 { bs3CpuInstr3_vpsrld_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8099 8213 { bs3CpuInstr3_vpsrld_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8100 8214 { bs3CpuInstr3_vpsrld_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8215 { bs3CpuInstr3_vpsrld_XMM1_XMM2_021h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8101 8216 { bs3CpuInstr3_vpsrld_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8102 8217 { bs3CpuInstr3_vpsrld_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8103 8218 { bs3CpuInstr3_vpsrld_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8104 8219 { bs3CpuInstr3_vpsrld_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8220 { bs3CpuInstr3_vpsrld_YMM1_YMM2_021h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8105 8221 { bs3CpuInstr3_vpsrld_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8106 8222 { bs3CpuInstr3_vpsrld_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8107 8223 { bs3CpuInstr3_vpsrld_XMM8_XMM9_001h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8108 8224 { bs3CpuInstr3_vpsrld_XMM8_XMM9_012h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8225 { bs3CpuInstr3_vpsrld_XMM8_XMM9_021h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8109 8226 { bs3CpuInstr3_vpsrld_YMM8_YMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8110 8227 { bs3CpuInstr3_vpsrld_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues32), s_aValues32 }, 8111 8228 { bs3CpuInstr3_vpsrld_YMM8_YMM9_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_01), s_aValues32_01 }, 8112 8229 { bs3CpuInstr3_vpsrld_YMM8_YMM9_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_12), s_aValues32_12 }, 8230 { bs3CpuInstr3_vpsrld_YMM8_YMM9_021h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues32_big), s_aValues32_big }, 8113 8231 8114 8232 { bs3CpuInstr3_psrlq_MM1_MM2_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, … … 8116 8234 { bs3CpuInstr3_psrlq_MM1_001h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8117 8235 { bs3CpuInstr3_psrlq_MM1_012h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8236 { bs3CpuInstr3_psrlq_MM1_045h_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8118 8237 { bs3CpuInstr3_psrlq_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8119 8238 { bs3CpuInstr3_psrlq_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8120 8239 { bs3CpuInstr3_psrlq_XMM1_001h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8121 8240 { bs3CpuInstr3_psrlq_XMM1_012h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8241 { bs3CpuInstr3_psrlq_XMM1_045h_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8122 8242 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8123 8243 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8124 8244 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_001h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8125 8245 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_012h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8246 { bs3CpuInstr3_vpsrlq_XMM1_XMM2_045h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8126 8247 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_XMM3_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8127 8248 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8128 8249 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8129 8250 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8251 { bs3CpuInstr3_vpsrlq_YMM1_YMM2_045h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8130 8252 { bs3CpuInstr3_vpsrlq_XMM8_XMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8131 8253 { bs3CpuInstr3_vpsrlq_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8132 8254 { bs3CpuInstr3_vpsrlq_XMM8_XMM9_001h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8133 8255 { bs3CpuInstr3_vpsrlq_XMM8_XMM9_012h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8256 { bs3CpuInstr3_vpsrlq_XMM8_XMM9_045h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8134 8257 { bs3CpuInstr3_vpsrlq_YMM8_YMM9_XMM10_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8135 8258 { bs3CpuInstr3_vpsrlq_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues64), s_aValues64 }, 8136 8259 { bs3CpuInstr3_vpsrlq_YMM8_YMM9_001h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues64_01), s_aValues64_01 }, 8137 8260 { bs3CpuInstr3_vpsrlq_YMM8_YMM9_012h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues64_12), s_aValues64_12 }, 8261 { bs3CpuInstr3_vpsrlq_YMM8_YMM9_045h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 1, RT_ELEMENTS(s_aValues64_big), s_aValues64_big }, 8138 8262 }; 8139 8263 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
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