Changeset 103834 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Mar 13, 2024 3:32:59 PM (9 months ago)

Author:

vboxsync

Message:

VMM/IEM: Implement native emitter for IEM_MC_CLEAR_XREG_U32_MASK(), bugref:10614

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAllInstPython.py (modified) (1 diff)
• IEMAllN8veRecompFuncs.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllInstPython.py

@@ -2997 +2997 @@
     'IEM_MC_CLEAR_FSW_EX':                                       (McBlock.parseMcGeneric,           True,  True,  False, ),
     'IEM_MC_CLEAR_HIGH_GREG_U64':                                (McBlock.parseMcGeneric,           True,  True,  True,  ),
-    'IEM_MC_CLEAR_XREG_U32_MASK':                                (McBlock.parseMcGeneric,           True,  True,  False, ),
+    'IEM_MC_CLEAR_XREG_U32_MASK':                                (McBlock.parseMcGeneric,           True,  True,  g_fNativeSimd),
     'IEM_MC_CLEAR_YREG_128_UP':                                  (McBlock.parseMcGeneric,           True,  True,  g_fNativeSimd),
     'IEM_MC_COMMIT_EFLAGS':                                      (McBlock.parseMcGeneric,           True,  True,  True,  ),

trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompFuncs.h

@@ -7105 +7105 @@
 }
 
+
+#define IEM_MC_CLEAR_XREG_U32_MASK(a_iXReg, a_bMask) \
+    off = iemNativeEmitSimdClearXregU32Mask(pReNative, off, a_iXReg, a_bMask)
+
+
+/** Emits code for IEM_MC_CLEAR_XREG_U32_MASK. */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitSimdClearXregU32Mask(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iXReg, uint8_t bImm8Mask)
+{
+    uint8_t const idxSimdRegDst = iemNativeSimdRegAllocTmpForGuestSimdReg(pReNative, &off, IEMNATIVEGSTSIMDREG_SIMD(iXReg),
+                                                                          kIemNativeGstSimdRegLdStSz_Low128, kIemNativeGstRegUse_ForUpdate);
+
+    /** @todo r=aeichner For certain bit combinations we could reduce the number of emitted instructions. */
+    if (bImm8Mask & RT_BIT(0))
+        off = iemNativeEmitSimdZeroVecRegElemU32(pReNative, off, idxSimdRegDst, 0 /*iDWord*/);
+    if (bImm8Mask & RT_BIT(1))
+        off = iemNativeEmitSimdZeroVecRegElemU32(pReNative, off, idxSimdRegDst, 1 /*iDWord*/);
+    if (bImm8Mask & RT_BIT(2))
+        off = iemNativeEmitSimdZeroVecRegElemU32(pReNative, off, idxSimdRegDst, 2 /*iDWord*/);
+    if (bImm8Mask & RT_BIT(3))
+        off = iemNativeEmitSimdZeroVecRegElemU32(pReNative, off, idxSimdRegDst, 3 /*iDWord*/);
+    IEMNATIVE_SIMD_REG_STATE_SET_DIRTY_LO_U128(pReNative, iXReg);
+
+    /* Free but don't flush the destination register. */
+    iemNativeSimdRegFreeTmp(pReNative, idxSimdRegDst);
+
+    return off;
+}
+
 #endif /* IEMNATIVE_WITH_SIMD_REG_ALLOCATOR */