Changeset 104000 in vbox for trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-gen-asm.asm
- Timestamp:
- Mar 22, 2024 3:37:38 PM (11 months ago)
- File:
-
- 1 edited
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trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-gen-asm.asm
r103602 r104000 40 40 ;********************************************************************************************************************************* 41 41 %include "iprt/asmdefs.mac" 42 %include "iprt/x86.mac" 42 43 43 44 BEGINCODE … … 45 46 %ifdef ASM_CALL64_MSC 46 47 %define EFLAGS_PARAM_REG r8d 48 %define EFLAGS_PARAM_REG64 r8 47 49 %else 48 50 %define EFLAGS_PARAM_REG ecx 51 %define EFLAGS_PARAM_REG64 rcx 49 52 %endif 50 53 … … 156 159 DO_BINARY bts, 0, 0 157 160 161 162 ;; 163 ; @param 1 instruction 164 ; @param 2 Whether it takes carry in. 165 %macro DO_SHIFT 2 166 167 BEGINPROC GenU8_ %+ %1 168 pushf 169 and dword [rsp], ~X86_EFL_STATUS_BITS 170 or dword [rsp], EFLAGS_PARAM_REG 171 popf 172 %ifdef ASM_CALL64_MSC 173 xchg cl, dl 174 %1 dl, cl 175 mov [r9], dl 176 %else 177 mov cl, dil 178 %1 sil, cl 179 mov [rdx], sil 180 %endif 181 pushf 182 pop rax 183 ret 184 ENDPROC GenU8_ %+ %1 185 186 BEGINPROC GenU16_ %+ %1 187 pushf 188 and dword [rsp], ~X86_EFL_STATUS_BITS 189 or dword [rsp], EFLAGS_PARAM_REG 190 popf 191 %ifdef ASM_CALL64_MSC 192 xchg cx, dx 193 %1 dx, cl 194 mov [r9], dx 195 %else 196 mov cl, dil 197 %1 si, cl 198 mov [rdx], si 199 %endif 200 pushf 201 pop rax 202 ret 203 ENDPROC GenU16_ %+ %1 204 205 BEGINPROC GenU32_ %+ %1 206 pushf 207 and dword [rsp], ~X86_EFL_STATUS_BITS 208 or dword [rsp], EFLAGS_PARAM_REG 209 popf 210 %ifdef ASM_CALL64_MSC 211 xchg ecx, edx 212 %1 edx, cl 213 mov [r9], edx 214 %else 215 mov cl, dil 216 %1 esi, cl 217 mov [rdx], esi 218 %endif 219 pushf 220 pop rax 221 ret 222 ENDPROC GenU32_ %+ %1 223 224 BEGINPROC GenU64_ %+ %1 225 pushf 226 and dword [rsp], ~X86_EFL_STATUS_BITS 227 or dword [rsp], EFLAGS_PARAM_REG 228 popf 229 %ifdef ASM_CALL64_MSC 230 xchg rcx, rdx 231 %1 rdx, cl 232 mov [r9], rdx 233 %else 234 mov cl, dil 235 %1 rsi, cl 236 mov [rdx], rsi 237 %endif 238 pushf 239 pop rax 240 ret 241 ENDPROC GenU64_ %+ %1 242 243 244 BEGINPROC GenU8_ %+ %1 %+ _Ib 245 pushf 246 and dword [rsp], ~X86_EFL_STATUS_BITS 247 or dword [rsp], EFLAGS_PARAM_REG 248 popf 249 250 %ifdef ASM_CALL64_MSC 251 movzx r11d, dl 252 mov al, cl 253 mov rdx, r9 254 %else 255 movzx r11d, sil 256 mov al, dil 257 ;mov rdx, rdx 258 %endif 259 lea r10, [.first_imm wrt rip] 260 lea r10, [r10 + r11 * 8] ;; @todo assert that the entry size is 8 bytes 261 jmp r10 262 .return: 263 mov [rdx], al 264 pushf 265 pop rax 266 ret 267 268 ALIGNCODE(8) 269 .first_imm: 270 %assign i 0 271 %rep 256 272 %1 al, i 273 jmp near .return 274 %if i == 1 275 db 0cch 276 %endif 277 %assign i i+1 278 %endrep 279 ENDPROC GenU8_ %+ %1 %+ _Ib 280 281 BEGINPROC GenU16_ %+ %1 %+ _Ib 282 pushf 283 and dword [rsp], ~X86_EFL_STATUS_BITS 284 or dword [rsp], EFLAGS_PARAM_REG 285 popf 286 287 %ifdef ASM_CALL64_MSC 288 movzx r11d, dl 289 mov ax, cx 290 mov rdx, r9 291 %else 292 movzx r11d, sil 293 mov ax, di 294 ;mov rdx, rdx 295 %endif 296 lea r10, [.first_imm wrt rip] 297 lea r10, [r10 + r11] ;; @todo assert that the entry size is 9 bytes 298 lea r10, [r10 + r11 * 8] 299 jmp r10 300 .return: 301 mov [rdx], ax 302 pushf 303 pop rax 304 ret 305 306 ALIGNCODE(8) 307 .first_imm: 308 %assign i 0 309 %rep 256 310 %1 ax, i 311 jmp near .return 312 %if i == 1 313 db 0cch 314 %endif 315 %assign i i+1 316 %endrep 317 ENDPROC GenU16_ %+ %1 %+ _Ib 318 319 BEGINPROC GenU32_ %+ %1 %+ _Ib 320 pushf 321 and dword [rsp], ~X86_EFL_STATUS_BITS 322 or dword [rsp], EFLAGS_PARAM_REG 323 popf 324 325 %ifdef ASM_CALL64_MSC 326 movzx r11d, dl 327 mov eax, ecx 328 mov rdx, r9 329 %else 330 movzx r11d, sil 331 mov eax, edi 332 ;mov rdx, rdx 333 %endif 334 lea r10, [.first_imm wrt rip] 335 lea r10, [r10 + r11 * 8] ;; @todo assert that the entry size is 8 bytes 336 jmp r10 337 .return: 338 mov [rdx], eax 339 pushf 340 pop rax 341 ret 342 343 ALIGNCODE(8) 344 .first_imm: 345 %assign i 0 346 %rep 256 347 %1 eax, i 348 jmp near .return 349 %if i == 1 350 db 0cch 351 %endif 352 %assign i i+1 353 %endrep 354 ENDPROC GenU32_ %+ %1 %+ _Ib 355 356 BEGINPROC GenU64_ %+ %1 %+ _Ib 357 pushf 358 and dword [rsp], ~X86_EFL_STATUS_BITS 359 or dword [rsp], EFLAGS_PARAM_REG 360 popf 361 362 %ifdef ASM_CALL64_MSC 363 movzx r11d, dl 364 mov rax, rcx 365 mov rdx, r9 366 %else 367 movzx r11d, sil 368 mov rax, rdi 369 ;mov rdx, rdx 370 %endif 371 lea r10, [.first_imm wrt rip] 372 lea r10, [r10 + r11] ;; @todo assert that the entry size is 9 bytes 373 lea r10, [r10 + r11 * 8] 374 jmp r10 375 .return: 376 mov [rdx], rax 377 pushf 378 pop rax 379 ret 380 381 ALIGNCODE(8) 382 .first_imm: 383 %assign i 0 384 %rep 256 385 %1 rax, i 386 jmp near .return 387 %if i == 1 388 db 0cch 389 %endif 390 %assign i i+1 391 %endrep 392 ENDPROC GenU64_ %+ %1 %+ _Ib 393 394 395 %endmacro 396 397 DO_SHIFT shl, 0 398 DO_SHIFT shr, 0 399 DO_SHIFT sar, 0 400 DO_SHIFT rol, 0 401 DO_SHIFT ror, 0 402 DO_SHIFT rcl, 1 403 DO_SHIFT rcr, 1 404
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