Changeset 104033 in vbox for trunk/src/VBox/VMM

Timestamp:

Mar 25, 2024 7:55:45 AM (11 months ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

162422

Message:

VMM/IEM: Implement loading the missing part from CPUMCTX when the source SIMD register is missing what the destination requires to be loaded, fix loading the high 128-bits of a shadow register on amd64, bugref:10614

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAllN8veRecompiler.cpp (modified) (7 diffs)
• include/IEMN8veRecompilerEmit.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllN8veRecompiler.cpp

@@ -5710 +5710 @@
 
 
-static uint32_t iemNativeSimdRegAllocLoadVecRegFromVecRegSz(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t idxHstSimdRegDst,
-                                                            uint8_t idxHstSimdRegSrc, IEMNATIVEGSTSIMDREGLDSTSZ enmLoadSzDst)
+static uint32_t iemNativeSimdRegAllocLoadVecRegFromVecRegSz(PIEMRECOMPILERSTATE pReNative, uint32_t off, IEMNATIVEGSTSIMDREG enmGstSimdRegDst,
+                                                            uint8_t idxHstSimdRegDst, uint8_t idxHstSimdRegSrc, IEMNATIVEGSTSIMDREGLDSTSZ enmLoadSzDst)
 {
     /* Easy case first, either the destination loads the same range as what the source has already loaded or the source has loaded everything. */
@@ -5733 +5733 @@
                     break;
                 case kIemNativeGstSimdRegLdStSz_High128:
-                    off = iemNativeEmitSimdLoadVecRegFromVecRegU128(pReNative, off, idxHstSimdRegDst + 1, idxHstSimdRegSrc + 1);
+                    off = iemNativeEmitSimdLoadVecRegHighU128FromVecRegHighU128(pReNative, off, idxHstSimdRegDst, idxHstSimdRegSrc);
                     break;
                 default:
@@ -5744 +5744 @@
     else
     {
-        /* Complicated stuff where the source is currently missing something, later. */
-        AssertFailedStmt(IEMNATIVE_DO_LONGJMP(pReNative, VERR_IPE_NOT_REACHED_DEFAULT_CASE));
+        /* The source doesn't has the part loaded, so load the register from CPUMCTX. */
+        Assert(enmLoadSzDst == kIemNativeGstSimdRegLdStSz_Low128 || enmLoadSzDst == kIemNativeGstSimdRegLdStSz_High128);
+        off = iemNativeEmitLoadSimdRegWithGstShadowSimdReg(pReNative, off, idxHstSimdRegDst, enmGstSimdRegDst, enmLoadSzDst);
     }
 
@@ -5826 +5827 @@
                 uint8_t const idxRegNew = iemNativeSimdRegAllocTmpEx(pReNative, poff, fRegMask);
 
-                *poff = iemNativeSimdRegAllocLoadVecRegFromVecRegSz(pReNative, *poff, idxRegNew, idxSimdReg, enmLoadSz);
+                *poff = iemNativeSimdRegAllocLoadVecRegFromVecRegSz(pReNative, *poff, enmGstSimdReg, idxRegNew, idxSimdReg, enmLoadSz);
 
                 Log12(("iemNativeSimdRegAllocTmpForGuestSimdReg: Duplicated %s for guest %s into %s for destructive calc\n",
@@ -5842 +5843 @@
                 {
                     if (enmIntendedUse != kIemNativeGstRegUse_ForFullWrite)
-                        *poff = iemNativeSimdRegAllocLoadVecRegFromVecRegSz(pReNative, *poff, idxSimdReg, idxSimdReg, enmLoadSz);
+                        *poff = iemNativeSimdRegAllocLoadVecRegFromVecRegSz(pReNative, *poff, enmGstSimdReg, idxSimdReg, idxSimdReg, enmLoadSz);
                     else
                         iemNativeSimdRegSetValidLoadFlag(pReNative, idxSimdReg, enmLoadSz);
@@ -5864 +5865 @@
                                                                     !fNoVolatileRegs
                                                                  && enmIntendedUse == kIemNativeGstRegUse_Calculation);
-                *poff = iemNativeSimdRegAllocLoadVecRegFromVecRegSz(pReNative, *poff, idxRegNew, idxSimdReg, enmLoadSz);
+                *poff = iemNativeSimdRegAllocLoadVecRegFromVecRegSz(pReNative, *poff, enmGstSimdReg, idxRegNew, idxSimdReg, enmLoadSz);
                 if (enmIntendedUse != kIemNativeGstRegUse_Calculation)
                 {
@@ -5897 +5898 @@
 
             if (enmIntendedUse != kIemNativeGstRegUse_ForFullWrite)
-                *poff = iemNativeSimdRegAllocLoadVecRegFromVecRegSz(pReNative, *poff, idxRegNew, idxSimdReg, enmLoadSz);
+                *poff = iemNativeSimdRegAllocLoadVecRegFromVecRegSz(pReNative, *poff, enmGstSimdReg, idxRegNew, idxSimdReg, enmLoadSz);
             else
                 iemNativeSimdRegSetValidLoadFlag(pReNative, idxRegNew, enmLoadSz);

trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

@@ -7989 +7989 @@
 
 /**
+ * Emits a vecdst[128:255] = vecsrc[128:255] load.
+ */
+DECL_FORCE_INLINE_THROW(uint32_t)
+iemNativeEmitSimdLoadVecRegHighU128FromVecRegHighU128Ex(PIEMNATIVEINSTR pCodeBuf, uint32_t off, uint8_t iVecRegDst, uint8_t iVecRegSrc)
+{
+#ifdef RT_ARCH_AMD64
+    /* vperm2i128 dst, dst, src, 0x30. */ /* ASSUMES AVX2 support */
+    pCodeBuf[off++] = X86_OP_VEX3;
+    pCodeBuf[off++] = X86_OP_VEX3_BYTE1_MAKE(0x3, iVecRegSrc >= 8, false, iVecRegDst >= 8);
+    pCodeBuf[off++] = X86_OP_VEX3_BYTE2_MAKE(false, iVecRegDst, true, X86_OP_VEX3_BYTE2_P_066H);
+    pCodeBuf[off++] = 0x46;
+    pCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iVecRegDst & 7, iVecRegSrc & 7);
+    pCodeBuf[off++] = 0x30; /* Immediate, this will leave the low 128 bits of dst untouched and move the high 128 bits from src to dst. */
+
+#elif defined(RT_ARCH_ARM64)
+    RT_NOREF(pCodeBuf, iVecRegDst, iVecRegSrc);
+
+    /* Should never be called because we can just use iemNativeEmitSimdLoadVecRegFromVecRegU128(). */
+# ifdef IEM_WITH_THROW_CATCH
+    AssertFailedStmt(IEMNATIVE_DO_LONGJMP(NULL, VERR_IEM_IPE_9));
+# else
+    AssertReleaseFailedStmt(off = UINT32_MAX);
+# endif
+#else
+# error "port me"
+#endif
+    return off;
+}
+
+
+/**
+ * Emits a vecdst[128:255] = vecsrc[128:255] load, high 128-bit.
+ */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitSimdLoadVecRegHighU128FromVecRegHighU128(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iVecRegDst, uint8_t iVecRegSrc)
+{
+#ifdef RT_ARCH_AMD64
+    off = iemNativeEmitSimdLoadVecRegHighU128FromVecRegHighU128Ex(iemNativeInstrBufEnsure(pReNative, off, 5), off, iVecRegDst, iVecRegSrc);
+#elif defined(RT_ARCH_ARM64)
+    Assert(!(iVecRegDst & 0x1) && !(iVecRegSrc & 0x1));
+    off = iemNativeEmitSimdLoadVecRegFromVecRegU128Ex(iemNativeInstrBufEnsure(pReNative, off, 1), off, iVecRegDst + 1, iVecRegSrc + 1);
+#else
+# error "port me"
+#endif
+    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
+    return off;
+}
+
+
+/**
  * Emits a vecdst = vecsrc load, 256-bit.
  */