Changeset 104033 in vbox for trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

Timestamp:

Mar 25, 2024 7:55:45 AM (10 months ago)

Author:

vboxsync

Message:

VMM/IEM: Implement loading the missing part from CPUMCTX when the source SIMD register is missing what the destination requires to be loaded, fix loading the high 128-bits of a shadow register on amd64, bugref:10614

File:

• trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h (modified) (1 diff)

trunk/src/VBox/VMM/include/IEMN8veRecompilerEmit.h

@@ -7989 +7989 @@
 
 /**
+ * Emits a vecdst[128:255] = vecsrc[128:255] load.
+ */
+DECL_FORCE_INLINE_THROW(uint32_t)
+iemNativeEmitSimdLoadVecRegHighU128FromVecRegHighU128Ex(PIEMNATIVEINSTR pCodeBuf, uint32_t off, uint8_t iVecRegDst, uint8_t iVecRegSrc)
+{
+#ifdef RT_ARCH_AMD64
+    /* vperm2i128 dst, dst, src, 0x30. */ /* ASSUMES AVX2 support */
+    pCodeBuf[off++] = X86_OP_VEX3;
+    pCodeBuf[off++] = X86_OP_VEX3_BYTE1_MAKE(0x3, iVecRegSrc >= 8, false, iVecRegDst >= 8);
+    pCodeBuf[off++] = X86_OP_VEX3_BYTE2_MAKE(false, iVecRegDst, true, X86_OP_VEX3_BYTE2_P_066H);
+    pCodeBuf[off++] = 0x46;
+    pCodeBuf[off++] = X86_MODRM_MAKE(X86_MOD_REG, iVecRegDst & 7, iVecRegSrc & 7);
+    pCodeBuf[off++] = 0x30; /* Immediate, this will leave the low 128 bits of dst untouched and move the high 128 bits from src to dst. */
+
+#elif defined(RT_ARCH_ARM64)
+    RT_NOREF(pCodeBuf, iVecRegDst, iVecRegSrc);
+
+    /* Should never be called because we can just use iemNativeEmitSimdLoadVecRegFromVecRegU128(). */
+# ifdef IEM_WITH_THROW_CATCH
+    AssertFailedStmt(IEMNATIVE_DO_LONGJMP(NULL, VERR_IEM_IPE_9));
+# else
+    AssertReleaseFailedStmt(off = UINT32_MAX);
+# endif
+#else
+# error "port me"
+#endif
+    return off;
+}
+
+
+/**
+ * Emits a vecdst[128:255] = vecsrc[128:255] load, high 128-bit.
+ */
+DECL_INLINE_THROW(uint32_t)
+iemNativeEmitSimdLoadVecRegHighU128FromVecRegHighU128(PIEMRECOMPILERSTATE pReNative, uint32_t off, uint8_t iVecRegDst, uint8_t iVecRegSrc)
+{
+#ifdef RT_ARCH_AMD64
+    off = iemNativeEmitSimdLoadVecRegHighU128FromVecRegHighU128Ex(iemNativeInstrBufEnsure(pReNative, off, 5), off, iVecRegDst, iVecRegSrc);
+#elif defined(RT_ARCH_ARM64)
+    Assert(!(iVecRegDst & 0x1) && !(iVecRegSrc & 0x1));
+    off = iemNativeEmitSimdLoadVecRegFromVecRegU128Ex(iemNativeInstrBufEnsure(pReNative, off, 1), off, iVecRegDst + 1, iVecRegSrc + 1);
+#else
+# error "port me"
+#endif
+    IEMNATIVE_ASSERT_INSTR_BUF_ENSURE(pReNative, off);
+    return off;
+}
+
+
+/**
  * Emits a vecdst = vecsrc load, 256-bit.
  */